diff options
| author | Jordan Justen <jordan.l.justen@intel.com> | 2022-10-24 12:52:20 -0400 |
|---|---|---|
| committer | Jordan Justen <jordan.l.justen@intel.com> | 2022-10-27 01:04:12 -0700 |
| commit | d4a0db3c69f2a2a091b1a2298e2ed8dffb15aaad (patch) | |
| tree | b93d278705fb722647bcb96c59e82d06681efb78 | |
| parent | 650597a7701c45efc4b358965cb64d19b6dcf025 (diff) | |
intel/compiler: Broadcast lower code should check 64-bit int supportmtl-vk-rt-startup
This will affect MTL which will have fp64 support without int64
support.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
| -rw-r--r-- | src/intel/compiler/brw_eu_emit.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index 750c3a7e418..5459db37c2c 100644 --- a/src/intel/compiler/brw_eu_emit.c +++ b/src/intel/compiler/brw_eu_emit.c @@ -3496,7 +3496,7 @@ brw_broadcast(struct brw_codegen *p, src = align1 ? stride(suboffset(src, i), 0, 1, 0) : stride(suboffset(src, 4 * i), 0, 4, 1); - if (type_sz(src.type) > 4 && !devinfo->has_64bit_float) { + if (type_sz(src.type) > 4 && !devinfo->has_64bit_int) { brw_MOV(p, subscript(dst, BRW_REGISTER_TYPE_D, 0), subscript(src, BRW_REGISTER_TYPE_D, 0)); brw_set_default_swsb(p, tgl_swsb_null()); @@ -3554,7 +3554,7 @@ brw_broadcast(struct brw_codegen *p, /* Use indirect addressing to fetch the specified component. */ if (type_sz(src.type) > 4 && (devinfo->platform == INTEL_PLATFORM_CHV || intel_device_info_is_9lp(devinfo) || - !devinfo->has_64bit_float)) { + !devinfo->has_64bit_int)) { /* From the Cherryview PRM Vol 7. "Register Region Restrictions": * * "When source or destination datatype is 64b or operation is |