diff options
author | Nanley Chery <nanley.g.chery@intel.com> | 2021-10-21 15:49:11 -0700 |
---|---|---|
committer | Marge Bot <emma+marge@anholt.net> | 2021-12-11 04:14:20 +0000 |
commit | eef4399afda91f484fb4572c457b5bb01b335d40 (patch) | |
tree | 842e9587e11252d9cd583a144e05ef50a5edb3c1 | |
parent | cba6d6cad3451fc4491e6fdada1e88a36459e5ba (diff) |
iris: Modify the comment about zeroing CCS
Among other changes, we highlight the fact that we'll map the CCS -
something we can't do on XeHP.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13555>
-rw-r--r-- | src/gallium/drivers/iris/iris_resource.c | 13 |
1 files changed, 5 insertions, 8 deletions
diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c index 8c3aa9d17c8..a1845ec519c 100644 --- a/src/gallium/drivers/iris/iris_resource.c +++ b/src/gallium/drivers/iris/iris_resource.c @@ -831,18 +831,15 @@ iris_resource_configure_aux(struct iris_screen *screen, case ISL_AUX_USAGE_GFX12_CCS_E: case ISL_AUX_USAGE_STC_CCS: case ISL_AUX_USAGE_MC: - /* When CCS_E is used, we need to ensure that the CCS starts off in - * a valid state. From the Sky Lake PRM, "MCS Buffer for Render - * Target(s)": + /* When CCS is used, we need to ensure that it starts off in a valid + * state. From the Sky Lake PRM, "MCS Buffer for Render Target(s)": * * "If Software wants to enable Color Compression without Fast * clear, Software needs to initialize MCS with zeros." * - * A CCS value of 0 indicates that the corresponding block is in the - * pass-through state which is what we want. - * - * For CCS_D, do the same thing. On Gfx9+, this avoids having any - * undefined bits in the aux buffer. + * A CCS surface initialized to zero is in the pass-through state. This + * state can avoid the need to ambiguate in some cases. We'll map and + * zero the CCS later on in iris_resource_init_aux_buf. */ if (imported) { assert(res->aux.usage != ISL_AUX_USAGE_STC_CCS); |