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authorNanley Chery <nanley.g.chery@intel.com>2020-06-04 16:42:20 -0700
committerMarge Bot <eric+marge@anholt.net>2020-06-19 22:41:40 +0000
commit9dea3e1b4777bc2331c0967d62d02ed58c184975 (patch)
tree2f41dd5bd51e86a5b8546e4097e2d18e8ed4996b
parent230952c21017b184a9bfbfaa2c56489d55b71d30 (diff)
iris: Use ISL_AUX_USAGE_GEN12_CCS_E on gen12
Makes iris pass a subtest of the fcc-write-after-clear piglit test (fast-clear tracking across layers 1 -> 0 -> 1) on gen12. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5363>
-rw-r--r--src/gallium/drivers/iris/iris_blit.c1
-rw-r--r--src/gallium/drivers/iris/iris_resolve.c25
-rw-r--r--src/gallium/drivers/iris/iris_resource.c24
3 files changed, 28 insertions, 22 deletions
diff --git a/src/gallium/drivers/iris/iris_blit.c b/src/gallium/drivers/iris/iris_blit.c
index 15bbea616bf..84ea9298fe2 100644
--- a/src/gallium/drivers/iris/iris_blit.c
+++ b/src/gallium/drivers/iris/iris_blit.c
@@ -602,6 +602,7 @@ get_copy_region_aux_settings(struct iris_context *ice,
case ISL_AUX_USAGE_MCS:
case ISL_AUX_USAGE_MCS_CCS:
case ISL_AUX_USAGE_CCS_E:
+ case ISL_AUX_USAGE_GEN12_CCS_E:
*out_aux_usage = res->aux.usage;
/* Prior to Gen9, fast-clear only supported 0/1 clear colors. Since
* we're going to re-interpret the format as an integer format possibly
diff --git a/src/gallium/drivers/iris/iris_resolve.c b/src/gallium/drivers/iris/iris_resolve.c
index 594e0eb56fb..018a28955f5 100644
--- a/src/gallium/drivers/iris/iris_resolve.c
+++ b/src/gallium/drivers/iris/iris_resolve.c
@@ -54,7 +54,8 @@ disable_rb_aux_buffer(struct iris_context *ice,
/* We only need to worry about color compression and fast clears. */
if (tex_res->aux.usage != ISL_AUX_USAGE_CCS_D &&
- tex_res->aux.usage != ISL_AUX_USAGE_CCS_E)
+ tex_res->aux.usage != ISL_AUX_USAGE_CCS_E &&
+ tex_res->aux.usage != ISL_AUX_USAGE_GEN12_CCS_E)
return false;
for (unsigned i = 0; i < cso_fb->nr_cbufs; i++) {
@@ -838,6 +839,7 @@ iris_resource_texture_aux_usage(struct iris_context *ice,
return res->aux.usage;
case ISL_AUX_USAGE_CCS_E:
+ case ISL_AUX_USAGE_GEN12_CCS_E:
/* If we don't have any unresolved color, report an aux usage of
* ISL_AUX_USAGE_NONE. This way, texturing won't even look at the
* aux surface and we can save some bandwidth.
@@ -859,7 +861,7 @@ iris_resource_texture_aux_usage(struct iris_context *ice,
*/
if (isl_formats_are_ccs_e_compatible(devinfo, res->surf.format,
view_format))
- return ISL_AUX_USAGE_CCS_E;
+ return res->aux.usage;
break;
default:
@@ -877,8 +879,6 @@ iris_image_view_aux_usage(struct iris_context *ice,
if (!info)
return ISL_AUX_USAGE_NONE;
- struct iris_screen *screen = (void *) ice->ctx.screen;
- const struct gen_device_info *devinfo = &screen->devinfo;
struct iris_resource *res = (void *) pview->resource;
enum isl_format view_format = iris_image_view_get_format(ice, pview);
@@ -888,9 +888,8 @@ iris_image_view_aux_usage(struct iris_context *ice,
bool uses_atomic_load_store =
ice->shaders.uncompiled[info->stage]->uses_atomic_load_store;
- if ((devinfo->gen == 12 && aux_usage == ISL_AUX_USAGE_CCS_E) &&
- !uses_atomic_load_store)
- return ISL_AUX_USAGE_CCS_E;
+ if (aux_usage == ISL_AUX_USAGE_GEN12_CCS_E && !uses_atomic_load_store)
+ return ISL_AUX_USAGE_GEN12_CCS_E;
return ISL_AUX_USAGE_NONE;
}
@@ -974,6 +973,7 @@ iris_resource_render_aux_usage(struct iris_context *ice,
case ISL_AUX_USAGE_CCS_D:
case ISL_AUX_USAGE_CCS_E:
+ case ISL_AUX_USAGE_GEN12_CCS_E:
/* Disable CCS for some cases of texture-view rendering. On gen12, HW
* may convert some subregions of shader output to fast-cleared blocks
* if CCS is enabled and the shader output matches the clear color.
@@ -990,15 +990,14 @@ iris_resource_render_aux_usage(struct iris_context *ice,
return ISL_AUX_USAGE_NONE;
}
- if (res->aux.usage == ISL_AUX_USAGE_CCS_E &&
- isl_formats_are_ccs_e_compatible(devinfo, res->surf.format,
- render_format)) {
- return ISL_AUX_USAGE_CCS_E;
- }
-
if (res->aux.usage == ISL_AUX_USAGE_CCS_D)
return ISL_AUX_USAGE_CCS_D;
+ if (isl_formats_are_ccs_e_compatible(devinfo, res->surf.format,
+ render_format)) {
+ return res->aux.usage;
+ }
+
default:
return ISL_AUX_USAGE_NONE;
}
diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c
index 5d27887a808..bd7493c1641 100644
--- a/src/gallium/drivers/iris/iris_resource.c
+++ b/src/gallium/drivers/iris/iris_resource.c
@@ -472,8 +472,10 @@ iris_resource_configure_aux(struct iris_screen *screen,
/* Try to create the auxiliary surfaces allowed by the modifier or by
* the user if no modifier is specified.
*/
- assert(!res->mod_info || res->mod_info->aux_usage == ISL_AUX_USAGE_NONE ||
- res->mod_info->aux_usage == ISL_AUX_USAGE_CCS_E);
+ assert(!res->mod_info ||
+ res->mod_info->aux_usage == ISL_AUX_USAGE_NONE ||
+ res->mod_info->aux_usage == ISL_AUX_USAGE_CCS_E ||
+ res->mod_info->aux_usage == ISL_AUX_USAGE_GEN12_CCS_E);
const bool has_mcs = !res->mod_info &&
isl_surf_get_mcs_surf(&screen->isl_dev, &res->surf, &res->aux.surf);
@@ -521,10 +523,12 @@ iris_resource_configure_aux(struct iris_screen *screen,
} else if (has_ccs && isl_surf_usage_is_stencil(res->surf.usage)) {
res->aux.possible_usages |= 1 << ISL_AUX_USAGE_STC_CCS;
} else if (has_ccs) {
- if (want_ccs_e_for_format(devinfo, res->surf.format))
- res->aux.possible_usages |= 1 << ISL_AUX_USAGE_CCS_E;
- else if (isl_format_supports_ccs_d(devinfo, res->surf.format))
+ if (want_ccs_e_for_format(devinfo, res->surf.format)) {
+ res->aux.possible_usages |= devinfo->gen < 12 ?
+ 1 << ISL_AUX_USAGE_CCS_E : 1 << ISL_AUX_USAGE_GEN12_CCS_E;
+ } else if (isl_format_supports_ccs_d(devinfo, res->surf.format)) {
res->aux.possible_usages |= 1 << ISL_AUX_USAGE_CCS_D;
+ }
}
res->aux.usage = util_last_bit(res->aux.possible_usages) - 1;
@@ -567,10 +571,9 @@ iris_resource_configure_aux(struct iris_screen *screen,
*/
initial_state = ISL_AUX_STATE_CLEAR;
break;
- case ISL_AUX_USAGE_GEN12_CCS_E:
- unreachable("Driver unprepared to handle this aux_usage.");
case ISL_AUX_USAGE_CCS_D:
case ISL_AUX_USAGE_CCS_E:
+ case ISL_AUX_USAGE_GEN12_CCS_E:
case ISL_AUX_USAGE_STC_CCS:
/* When CCS_E is used, we need to ensure that the CCS starts off in
* a valid state. From the Sky Lake PRM, "MCS Buffer for Render
@@ -1856,7 +1859,8 @@ iris_transfer_map(struct pipe_context *ctx,
need_color_resolve =
(res->aux.usage == ISL_AUX_USAGE_CCS_D ||
- res->aux.usage == ISL_AUX_USAGE_CCS_E) &&
+ res->aux.usage == ISL_AUX_USAGE_CCS_E ||
+ res->aux.usage == ISL_AUX_USAGE_GEN12_CCS_E) &&
iris_has_color_unresolved(res, level, 1, box->z, box->depth);
need_resolve = need_color_resolve ||
@@ -1926,7 +1930,9 @@ iris_transfer_map(struct pipe_context *ctx,
if (fmtl->txc == ISL_TXC_ASTC)
no_gpu = true;
- if ((map_would_stall || res->aux.usage == ISL_AUX_USAGE_CCS_E) && !no_gpu) {
+ if ((map_would_stall ||
+ res->aux.usage == ISL_AUX_USAGE_CCS_E ||
+ res->aux.usage == ISL_AUX_USAGE_GEN12_CCS_E) && !no_gpu) {
/* If we need a synchronous mapping and the resource is busy, or needs
* resolving, we copy to/from a linear temporary buffer using the GPU.
*/