diff options
author | Caio Oliveira <caio.oliveira@intel.com> | 2024-03-07 13:58:55 -0800 |
---|---|---|
committer | Marge Bot <emma+marge@anholt.net> | 2024-03-13 03:23:30 +0000 |
commit | e324fbbe68df870dede5a7b4efbd6528dd041de6 (patch) | |
tree | 47096e2d7ca07c54d0c61581037614fb49614643 | |
parent | db8022dc4d30cc1dc2903f1a8be0b2354d406357 (diff) |
intel/brw: Fix validation of accumulator register
The `stride` and `offset` attributes are meaningful for the "virtual"
register files (VGRFs, UNIFORMs and ATTRs). Accumulator is an ARF so
validation should check `hstride` (part of the <V,W,H> triple) and `subnr`
instead.
Fixes: 12d7aaf2b82 ("intel/compiler: add more validation for acc register usage")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28059>
-rw-r--r-- | src/intel/compiler/brw_fs_validate.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/intel/compiler/brw_fs_validate.cpp b/src/intel/compiler/brw_fs_validate.cpp index 499bc8181c3..7ef2be70146 100644 --- a/src/intel/compiler/brw_fs_validate.cpp +++ b/src/intel/compiler/brw_fs_validate.cpp @@ -191,8 +191,8 @@ fs_visitor::validate() */ if (intel_needs_workaround(devinfo, 14014617373) && inst->dst.is_accumulator() && - inst->dst.offset == 0) { - fsv_assert_eq(inst->dst.stride, 1); + phys_subnr(devinfo, inst->dst.as_brw_reg()) == 0) { + fsv_assert_eq(inst->dst.hstride, 1); } } } |