From e324fbbe68df870dede5a7b4efbd6528dd041de6 Mon Sep 17 00:00:00 2001
From: Caio Oliveira <caio.oliveira@intel.com>
Date: Thu, 7 Mar 2024 13:58:55 -0800
Subject: intel/brw: Fix validation of accumulator register

The `stride` and `offset` attributes are meaningful for the "virtual"
register files (VGRFs, UNIFORMs and ATTRs).  Accumulator is an ARF so
validation should check `hstride` (part of the <V,W,H> triple) and `subnr`
instead.

Fixes: 12d7aaf2b82 ("intel/compiler: add more validation for acc register usage")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28059>
---
 src/intel/compiler/brw_fs_validate.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/intel/compiler/brw_fs_validate.cpp b/src/intel/compiler/brw_fs_validate.cpp
index 499bc8181c3..7ef2be70146 100644
--- a/src/intel/compiler/brw_fs_validate.cpp
+++ b/src/intel/compiler/brw_fs_validate.cpp
@@ -191,8 +191,8 @@ fs_visitor::validate()
        */
       if (intel_needs_workaround(devinfo, 14014617373) &&
           inst->dst.is_accumulator() &&
-          inst->dst.offset == 0) {
-         fsv_assert_eq(inst->dst.stride, 1);
+          phys_subnr(devinfo, inst->dst.as_brw_reg()) == 0) {
+         fsv_assert_eq(inst->dst.hstride, 1);
       }
    }
 }
-- 
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