diff options
author | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2014-02-10 21:53:15 +0200 |
---|---|---|
committer | Jordan Justen <jordan.l.justen@intel.com> | 2014-02-10 21:08:15 -0800 |
commit | ebe0175a3fd4b976207bfc8a0f260d688bc1ec8b (patch) | |
tree | 001a3f681f97c58969ec3724cd173637c226b529 | |
parent | 47863a76a808bca5e7a50f1a26d5690c27bd6dca (diff) |
i965/blorp: handle tile offsets for all sources in the programrm-blorp-offsets
Note that hiz and clear programs need no consideration here as
they do not use any source surfaces.
No regressions on IVB and SNB.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp.cpp | 10 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen6_blorp.cpp | 18 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen7_blorp.cpp | 17 |
3 files changed, 14 insertions, 31 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index 355552d8b5..92bb037b4b 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp @@ -190,8 +190,8 @@ brw_blorp_surface_info::compute_page_offset() const void brw_blorp_params::configure_miplevel_offsets() { - uint32_t src_tile_orig_space_x = 0; - uint32_t src_tile_orig_space_y = 0; + uint32_t src_tile_orig_space_x; + uint32_t src_tile_orig_space_y; uint32_t dst_tile_orig_space_x; uint32_t dst_tile_orig_space_y; @@ -204,11 +204,13 @@ brw_blorp_params::configure_miplevel_offsets() dst_tile_orig_space_y = dst.tile_y; } + src.compute_tile_offsets(&src.tile_x, &src.tile_y); if (src.map_stencil_as_y_tiled) { - src.compute_tile_offsets(&src.tile_x, &src.tile_y); - src_tile_orig_space_x = src.tile_x / 2; src_tile_orig_space_y = src.tile_y * 2; + } else { + src_tile_orig_space_x = src.tile_x; + src_tile_orig_space_y = src.tile_y; } /* Compensate for the adjusted destination offsets when calculating the diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index c89ec86adc..4614e7f659 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -391,13 +391,11 @@ gen6_blorp_emit_surface_state(struct brw_context *brw, /* reloc */ surf[1] = surface->compute_page_offset() + region->bo->offset64; - /* When the tile offsets are handled by the blorp program directly the - * dimensions of the surface need to be updated to allow full access. + /* Tile offsets are handled by the blorp program directly and therefore + * the dimensions of the surface need to be updated to allow full access. */ - if (surface->map_stencil_as_y_tiled || ¶ms->dst == surface) { - width += surface->tile_x; - height += surface->tile_y; - } + width += surface->tile_x; + height += surface->tile_y; surf[2] = (0 << BRW_SURFACE_LOD_SHIFT | (width - 1) << BRW_SURFACE_WIDTH_SHIFT | (height - 1) << BRW_SURFACE_HEIGHT_SHIFT); @@ -416,14 +414,6 @@ gen6_blorp_emit_surface_state(struct brw_context *brw, surf[5] = (surface->mt->align_h == 4 ? BRW_SURFACE_VERTICAL_ALIGN_ENABLE : 0); - if (!surface->map_stencil_as_y_tiled && ¶ms->dst != surface) { - uint32_t tile_x, tile_y; - - surface->compute_tile_offsets(&tile_x, &tile_y); - surf[5] |= (SET_FIELD(tile_x / 4, BRW_SURFACE_X_OFFSET) | - SET_FIELD(tile_y / 2, BRW_SURFACE_Y_OFFSET)); - } - /* Emit relocation to surface contents */ drm_intel_bo_emit_reloc(brw->batch.bo, wm_surf_offset + 4, diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp index 8488e26dbf..53c0e153c8 100644 --- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp @@ -178,20 +178,11 @@ gen7_blorp_emit_surface_state(struct brw_context *brw, surf[5] = SET_FIELD(mocs, GEN7_SURFACE_MOCS); - /* When the tile offsets are handled by the blorp program directly the - * dimensions of the surface need to be updated to allow full access. + /* Tile offsets are handled by the blorp program directly and therefore + * the dimensions of the surface need to be updated to allow full access. */ - if (surface->map_stencil_as_y_tiled || is_render_target) { - width += surface->tile_x; - height += surface->tile_y; - } else { - uint32_t tile_x, tile_y; - - surface->compute_tile_offsets(&tile_x, &tile_y); - surf[5] |= (SET_FIELD(tile_x / 4, BRW_SURFACE_X_OFFSET) | - SET_FIELD(tile_y / 2, BRW_SURFACE_Y_OFFSET)); - } - + width += surface->tile_x; + height += surface->tile_y; surf[2] = SET_FIELD(width - 1, GEN7_SURFACE_WIDTH) | SET_FIELD(height - 1, GEN7_SURFACE_HEIGHT); |