diff options
author | Jordan Justen <jljusten@gmail.com> | 2013-05-26 17:31:38 -0700 |
---|---|---|
committer | Jordan Justen <jljusten@gmail.com> | 2013-05-26 17:31:38 -0700 |
commit | 8747ceabb6bdeed66bec6aff695f94fda6ce5592 (patch) | |
tree | 4a989b4fa4fcfbc8e3be2a3f4908637c0745c4f3 | |
parent | 61aded1dd7959a6dbfbfdab7e99405f7e263dcf8 (diff) | |
parent | aa72c1d7c32007c06d2478524ca08837e5050ba1 (diff) |
Merge remote-tracking branch 'debian/ubuntu-raring' into mesa-9.1-precisemesa-9.1-precise
150 files changed, 3127 insertions, 1536 deletions
diff --git a/Makefile.am b/Makefile.am index a1f7bced44..0c398cb039 100644 --- a/Makefile.am +++ b/Makefile.am @@ -36,7 +36,7 @@ check-local: # Rules for making release tarballs -PACKAGE_VERSION=9.1 +PACKAGE_VERSION=9.1.3 PACKAGE_DIR = Mesa-$(PACKAGE_VERSION) PACKAGE_NAME = MesaLib-$(PACKAGE_VERSION) diff --git a/bin/.cherry-ignore b/bin/.cherry-ignore index a622ec1f8f..2a5fae2dcf 100644 --- a/bin/.cherry-ignore +++ b/bin/.cherry-ignore @@ -2,3 +2,15 @@ d60da27273d2cdb68bc32cae2ca66718dab15f27 st/mesa: set ctx->Const.MaxSamples = 0, 5c86a728d4f688c0fe7fbf9f4b8f88060b65c4ee r600g: fix htile buffer leak 496928a442cec980b534bc5da2523b3632b21b61 CopyTexImage: Don't check sRGB vs LINEAR for desktop GL 3ee602314fc22054f69ee476f2e1037653d269bc mesa: Allow glGet* queries of MAX_VARYING_COMPONENTS in ES 3 + +# Already cherry picked without -x +96b3ca89b153f358de74059151d2b0e8bd884dfa scons: Allows choosing VS 10 or 11. + +# This patch is superceded by 7d4f1e6 +dbf94d105a48b7aafb2c8cf64d8b4392d87efea1 glsl: Replace constant-index vector array accesses with swizzles + +# This patch is superceded by 34a4fc5 +0967c362bf378b7415c30ca6d9523d3b2a3a7f5d i965: Fix an inconsistency inb the VUE map with gl_ClipVertex on gen4/5. + +# This patch was backported as c3eb301 +a8246927e35a49097f70cffb7fa8dd05ec1365e1 r600g: Fix UMAD on Cayman diff --git a/bin/bugzilla_mesa.sh b/bin/bugzilla_mesa.sh new file mode 100755 index 0000000000..491ca0e7c0 --- /dev/null +++ b/bin/bugzilla_mesa.sh @@ -0,0 +1,52 @@ +#!/bin/bash + +# This script is used to generate the list of fixed bugs that +# appears in the release notes files, with HTML formatting. +# +# Note: This script could take a while until all details have +# been fetched from bugzilla. +# +# Usage examples: +# +# $ bin/bugzilla_mesa.sh mesa-9.0.2..mesa-9.0.3 +# $ bin/bugzilla_mesa.sh mesa-9.0.2..mesa-9.0.3 > bugfixes +# $ bin/bugzilla_mesa.sh mesa-9.0.2..mesa-9.0.3 | tee bugfixes +# $ DRYRUN=yes bin/bugzilla_mesa.sh mesa-9.0.2..mesa-9.0.3 +# $ DRYRUN=yes bin/bugzilla_mesa.sh mesa-9.0.2..mesa-9.0.3 | wc -l + + +# regex pattern: trim before url +trim_before='s/.*\(http\)/\1/' + +# regex pattern: trim after url +trim_after='s/\(show_bug.cgi?id=[0-9]*\).*/\1/' + +# regex pattern: always use https +use_https='s/http:/https:/' + +# extract fdo urls from commit log +urls=$(git log $* | grep 'bugs.freedesktop.org/show_bug' | sed -e $trim_before -e $trim_after -e $use_https | sort | uniq) + +# if DRYRUN is set to "yes", simply print the URLs and don't fetch the +# details from fdo bugzilla. +#DRYRUN=yes + +if [ "x$DRYRUN" = xyes ]; then + for i in $urls + do + echo $i + done +else + echo "<ul>" + echo "" + + for i in $urls + do + id=$(echo $i | cut -d'=' -f2) + summary=$(wget --quiet -O - $i | grep -e '<title>.*</title>' | sed -e 's/ *<title>Bug [0-9]\+ – \(.*\)<\/title>/\1/') + echo "<li><a href=\"$i\">Bug $id</a> - $summary</li>" + echo "" + done + + echo "</ul>" +fi diff --git a/bin/get-pick-list.sh b/bin/get-pick-list.sh index d3ac511c14..d2b76e7e63 100755 --- a/bin/get-pick-list.sh +++ b/bin/get-pick-list.sh @@ -1,6 +1,12 @@ #!/bin/sh # Script for generating a list of candidates for cherry-picking to a stable branch +# +# Usage examples: +# +# $ bin/get-pick-list.sh +# $ bin/get-pick-list.sh > picklist +# $ bin/get-pick-list.sh | tee picklist # Grep for commits with "cherry picked from commit" in the commit message. git log --reverse --grep="cherry picked from commit" origin/master..HEAD |\ diff --git a/bin/shortlog_mesa.sh b/bin/shortlog_mesa.sh index b20c52fdd4..2ba0815de7 100755 --- a/bin/shortlog_mesa.sh +++ b/bin/shortlog_mesa.sh @@ -2,6 +2,12 @@ # This script is used to generate the list of changes that # appears in the release notes files, with HTML formatting. +# +# Usage examples: +# +# $ bin/shortlog_mesa.sh mesa-9.0.2..mesa-9.0.3 +# $ bin/shortlog_mesa.sh mesa-9.0.2..mesa-9.0.3 > changes +# $ bin/shortlog_mesa.sh mesa-9.0.2..mesa-9.0.3 | tee changes typeset -i in_log=0 @@ -100,4 +100,4 @@ def AddOptions(opts): opts.Add(BoolOption('quiet', 'DEPRECATED: profile build', 'yes')) opts.Add(BoolOption('texture_float', 'enable floating-point textures and renderbuffers', 'no')) if host_platform == 'windows': - opts.Add(EnumOption('MSVS_VERSION', 'MS Visual C++ version', None, allowed_values=('7.1', '8.0', '9.0'))) + opts.Add(EnumOption('MSVC_VERSION', 'MS Visual C++ version', None, allowed_values=('7.1', '8.0', '9.0', '10.0', '11.0'))) diff --git a/configure.ac b/configure.ac index d75cf65e19..36065f11c5 100644 --- a/configure.ac +++ b/configure.ac @@ -6,7 +6,7 @@ dnl Tell the user about autoconf.html in the --help output m4_divert_once([HELP_END], [ See docs/autoconf.html for more details on the options for Mesa.]) -AC_INIT([Mesa], [9.1.0], +AC_INIT([Mesa], [9.1.3], [https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa]) AC_CONFIG_AUX_DIR([bin]) AC_CONFIG_MACRO_DIR([m4]) @@ -452,6 +452,9 @@ if test "x$enable_asm" = xyes; then linux* | *freebsd* | dragonfly* | *netbsd*) test "x$enable_64bit" = xyes && asm_arch=x86_64 || asm_arch=x86 ;; + gnu*) + asm_arch=x86 + ;; esac ;; x86_64) @@ -826,20 +829,6 @@ if test "x$enable_dri" = xyes; then fi fi -dnl Find out if X is available. -PKG_CHECK_MODULES([X11], [x11], [no_x=no], [no_x=yes]) - -dnl Try to tell the user that the --x-* options are only used when -dnl pkg-config is not available. This must be right after AC_PATH_XTRA. -m4_divert_once([HELP_BEGIN], -[These options are only used when the X libraries cannot be found by the -pkg-config utility.]) - -dnl We need X for xlib and dri, so bomb now if it's not found -if test "x$enable_glx" = xyes -a "x$no_x" = xyes; then - AC_MSG_ERROR([X11 development libraries needed for GLX]) -fi - dnl Direct rendering or just indirect rendering case "$host_os" in gnu*) diff --git a/debian/changelog b/debian/changelog index 7c9f05b21f..fcfaa14fec 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,32 +1,41 @@ -mesa (9.1~git-pre-9.1.1~20130313.ed29a987-1) precise; urgency=low +mesa (9.1.3-0ubuntu0.1) precise; urgency=low - * Drop gbm-remember-to-init-format.patch + * Mesa 9.1.3 for precise + * Merge from debian/ubuntu-raring which is at mesa-9.1.3 - -- Jordan Justen <jljusten@gmail.com> Wed, 13 Mar 2013 10:50:01 -0700 + -- Jordan Justen <jljusten@gmail.com> Sun, 26 May 2013 17:27:16 -0700 -mesa (9.1~git-pre-9.1.1~20130312.ed29a987-1) precise; urgency=low +mesa (9.1.3-0ubuntu0.1) raring-proposed; urgency=low - * Merge from upstream mesa/9.1 branch (ed29a987) - - Nearing Mesa 9.1.1 release + * New upstream micro-release. (LP: #1183269) + * Drop revert-a64c1eb9b110.diff; it no longer applies. + - The patch reverted the regression where the unity dash appeared + very slowly, but should no longer be needed with the upstream fixes. - -- Jordan Justen <jljusten@gmail.com> Tue, 12 Mar 2013 15:42:30 -0700 + -- Maarten Lankhorst <maarten.lankhorst@ubuntu.com> Thu, 23 May 2013 11:33:44 +0200 -mesa (9.1-0ubuntu1) UNRELEASED; urgency=low +mesa (9.1.3-0ubuntu1) saucy; urgency=low - * Merge from unreleased debian git - - new upstream release - * gbm-remember-to-init-format.patch: Commit from master to - init format on gbm_dri_bo_create. (LP: #1112147) - - -- Timo Aaltonen <tjaalton@ubuntu.com> Wed, 27 Feb 2013 11:12:43 +0200 - -mesa (9.1-1) UNRELEASED; urgency=low + [ Robert Hooker ] + * New upstream bug-fix release. + * Drop upstream patches: + - 0001-nv50-fix-3D-render-target-setup.patch + - 0002-nv50-nvc0-disable-DEPTH_RANGE_NEAR-FAR-clipping-duri.patch + - 0003-nv50-nvc0-fix-3d-blits-restore-viewport-after-blit.patch + - 0004-nvc0-fix-for-2d-engine-R-source-formats-writing-RRR1.patch + - 100_no_abi_tag.patch + - 119-libllvmradeon-link.patch + - vbo-fix-crash.diff + * debian/patches/117-static-gallium.patch: Refresh for minor change + in 9.1.2 + + -- Maarten Lankhorst <maarten.lankhorst@ubuntu.com> Thu, 23 May 2013 10:06:41 +0200 + +mesa (9.1.3-1) UNRELEASED; urgency=low * New upstream release. - Set close on exec flag when opening dri devices (Closes: #651370). - - [ Julien Cristau ] - * Use xz for all binary packages not just *-dbg. + - Don't emit a .note.ABI-tag section anymore (Closes: #628758). [ Timo Aaltonen ] * Refresh patches @@ -42,8 +51,6 @@ mesa (9.1-1) UNRELEASED; urgency=low * rules: --with-driver= is deprecated, use --enable-foo. * rules: Purge .la files before dh_install. * Update symbols. - * Added 14-fix-osmesa-build.diff, fixes glapi includes with out-of-tree - builds. * libgl1-mesa-dri.install*.in: Add libdricore. * control: Add new dependencies to libgl1-mesa-dev. * rules, libgl1-mesa-dri.install.linux.in: Add support for radeonsi. @@ -56,11 +63,8 @@ mesa (9.1-1) UNRELEASED; urgency=low * libegl1-mesa-drivers.install.linux: Bump libwayland-egl.so version * control: Add libdrm-dev to mesa-common-dev Depends. * control: Build-depend on llvm-3.2-dev (Closes: #678822). - * 15-fix-oot-build.diff: Use correct includes to fix out-of-tree builds. * libgl1-mesa-dri.install.in: Include gallium-pipe/*.so and libllvmradeon*.so. * rules: Add files to clean. - * 16-avoid-symbols-from-static-llvm.diff: Temporary patch to keep - libxatracker1.symbols sane. * control: Add libxcb-dri2-0-dev to libgl1-mesa-dev depends. [ Steve Langasek ] @@ -84,12 +88,45 @@ mesa (9.1-1) UNRELEASED; urgency=low * Drop xutils-dev build dep, makedepend is no longer required * Recommend libtxc-dxtn0 in libgl1-mesa-dri for easier use with multiarch installs (Closes: #668645). + * Drop 02_use-ieee-fp-on-s390-and-m68k.patch, upstream in 9.1.2. + * Drop 10-hurd-configure-tweaks.diff, upstream in 9.1.2. [ Sven Joachim ] * Bump libdrm-dev build-dependency to 2.4.42. + [ Rico Tzschichholz ] + * Update packaging mesa packaging with xorg-edgers + -- Julien Cristau <jcristau@debian.org> Fri, 03 Aug 2012 23:17:16 +0200 +mesa (9.1.1-0ubuntu3) raring; urgency=low + + * Hide x86sse symbols on i386, preventing conflicts. (LP: #1170074) + - 120-hide-x86sse.patch + + -- Maarten Lankhorst <maarten.lankhorst@ubuntu.com> Thu, 18 Apr 2013 12:27:32 +0200 + +mesa (9.1.1-0ubuntu2) raring; urgency=low + + * control, rules: Add llvm-3.2-dev to build-depends for powerpc, enable + gallium llvm and shared libs (FTBFS). + + -- Timo Aaltonen <tjaalton@ubuntu.com> Wed, 17 Apr 2013 01:42:38 -0600 + +mesa (9.1.1-0ubuntu1) raring; urgency=low + + [ Timo Aaltonen ] + * Merge from unreleased debian git + - new upstream release (LP: #1112147, #1164093) + * Revert a commit to fix slow blur on intel. + * vbo-fix-crash.diff: Patch from the stable tree that fixes a crasher + with shared display lists. + + [ Maarten Lankhorst ] + * Add some more patches to fix image copy regressions on nouveau. + + -- Timo Aaltonen <tjaalton@ubuntu.com> Tue, 16 Apr 2013 15:35:32 +0300 + mesa (9.1~git20130207.f1c46c84-0ubuntu1) UNRELEASED; urgency=low [ Timo Aaltonen ] @@ -102,6 +139,12 @@ mesa (9.1~git20130207.f1c46c84-0ubuntu1) UNRELEASED; urgency=low -- Timo Aaltonen <tjaalton@ubuntu.com> Thu, 07 Feb 2013 18:09:58 +0200 +mesa (9.0.3-0ubuntu1) raring; urgency=low + + * New upstream release. (LP: #1134466) + + -- Maarten Lankhorst <maarten.lankhorst@ubuntu.com> Thu, 14 Mar 2013 12:18:29 +0100 + mesa (9.0.2-0ubuntu1) raring; urgency=low * New upstream release. @@ -212,6 +255,45 @@ mesa (9.0~git20120821.c1114c61-0ubuntu1) quantal; urgency=low -- Timo Aaltonen <tjaalton@ubuntu.com> Thu, 23 Aug 2012 15:37:30 +0300 +mesa (8.0.5-4) unstable; urgency=low + + * Cherry-pick commit 17f1cb1d99 (dri/nouveau: fix crash in + nouveau_flush) from upstream master branch. + + -- Sven Joachim <svenjoac@gmx.de> Wed, 13 Mar 2013 17:52:18 +0100 + +mesa (8.0.5-3) unstable; urgency=high + + * mesa: add bounds checking for uniform array access (CVE-2012-5129). + + -- Julien Cristau <jcristau@debian.org> Thu, 06 Dec 2012 10:20:40 +0100 + +mesa (8.0.5-2) unstable; urgency=low + + * Fix regression in 8.0.5 (spurious GL_INVALID_ENUM errors): + mesa: test for GL_EXT_framebuffer_sRGB in glPopAttrib(). + Thanks to Simon Chopin for the report. + + -- Julien Cristau <jcristau@debian.org> Wed, 28 Nov 2012 22:09:14 +0100 + +mesa (8.0.5-1) unstable; urgency=low + + * New upstream stable release + * Pull a couple more fixes from upstream's 8.0 branch, including: + - nvfx: handle some unknown PIPE_CAPs (closes: 674965) + * Install drirc in libgl1-mesa-dri package with some settings for i965 + (closes: #671747). + + -- Julien Cristau <jcristau@debian.org> Sun, 04 Nov 2012 16:55:17 +0100 + +mesa (8.0.4-2) unstable; urgency=high + + * Use xz for all binary packages not just *-dbg. + * glsl/linker: Avoid buffer over-run in + parcel_out_uniform_storage::visit_field (CVE-2012-2864; closes: #685667). + + -- Julien Cristau <jcristau@debian.org> Fri, 24 Aug 2012 00:09:47 +0200 + mesa (8.0.4-1) unstable; urgency=low [ Sven Joachim ] diff --git a/debian/control b/debian/control index 059bc58bd2..0e965dc018 100644 --- a/debian/control +++ b/debian/control @@ -31,7 +31,7 @@ Build-Depends: libudev-dev [linux-any], flex, bison, - llvm-3.2-dev [amd64 i386 kfreebsd-amd64 kfreebsd-i386], + llvm-3.2-dev [amd64 i386 kfreebsd-amd64 kfreebsd-i386 armhf powerpc], libwayland-dev (>= 1.0.2) [linux-any], Vcs-Git: git://git.debian.org/git/pkg-xorg/lib/mesa Vcs-Browser: http://git.debian.org/?p=pkg-xorg/lib/mesa.git @@ -190,6 +190,7 @@ Depends: libxdamage-dev, libxfixes-dev, libxcb-glx0-dev, + libxcb-dri2-0-dev, libx11-xcb-dev, ${misc:Depends}, Description: free implementation of the EGL API -- development files diff --git a/debian/libgl1-mesa-dri.install.in b/debian/libgl1-mesa-dri.install.in index 89ff2a28f8..bb606d6a59 100644 --- a/debian/libgl1-mesa-dri.install.in +++ b/debian/libgl1-mesa-dri.install.in @@ -1,5 +1,6 @@ +build/dri/src/mesa/drivers/dri/common/drirc etc dri/usr/lib/${DEB_HOST_MULTIARCH}/dri/*_dri.so usr/lib/${DEB_HOST_MULTIARCH}/dri dri/usr/lib/${DEB_HOST_MULTIARCH}/gallium-pipe/*.so usr/lib/${DEB_HOST_MULTIARCH}/gallium-pipe dri/usr/lib/${DEB_HOST_MULTIARCH}/libdricore*.so* usr/lib/${DEB_HOST_MULTIARCH}/ dri/usr/lib/${DEB_HOST_MULTIARCH}/libllvmradeon*.so usr/lib/${DEB_HOST_MULTIARCH}/ -dri/usr/lib/${DEB_HOST_MULTIARCH}/lib*gallium*.so* usr/lib/${DEB_HOST_MULTIARCH}/
\ No newline at end of file +dri/usr/lib/${DEB_HOST_MULTIARCH}/lib*gallium*.so* usr/lib/${DEB_HOST_MULTIARCH}/ diff --git a/debian/libgles2-mesa-dev.install.in b/debian/libgles2-mesa-dev.install.in index 981c4915a7..e7d4422ab1 100644 --- a/debian/libgles2-mesa-dev.install.in +++ b/debian/libgles2-mesa-dev.install.in @@ -1,3 +1,4 @@ dri/usr/lib/${DEB_HOST_MULTIARCH}/libGLESv2.so usr/lib/${DEB_HOST_MULTIARCH}/mesa-egl dri/usr/include/GLES2 usr/include +dri/usr/include/GLES3 usr/include dri/usr/lib/${DEB_HOST_MULTIARCH}/pkgconfig/glesv2.pc usr/lib/${DEB_HOST_MULTIARCH}/pkgconfig diff --git a/debian/not-installed b/debian/not-installed index e071eb7b8e..c24794461a 100644 --- a/debian/not-installed +++ b/debian/not-installed @@ -4,7 +4,4 @@ NOT_INSTALLED := \ dri/etc/drirc \ dri/usr/include/GL/wglext.h \ - dri/usr/include/GL/wmesa.h \ - dri/usr/include/GLES3/gl3platform.h \ - dri/usr/include/GLES3/gl3ext.h \ - dri/usr/include/GLES3/gl3.h + dri/usr/include/GL/wmesa.h diff --git a/debian/patches/02_use-ieee-fp-on-s390-and-m68k.patch b/debian/patches/02_use-ieee-fp-on-s390-and-m68k.patch deleted file mode 100644 index d3d6c1d7fe..0000000000 --- a/debian/patches/02_use-ieee-fp-on-s390-and-m68k.patch +++ /dev/null @@ -1,21 +0,0 @@ -Patch that fixes Debian bug #349437. - -This patch by David Nusinow. - ---- - src/mesa/main/compiler.h | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/src/mesa/main/compiler.h -+++ b/src/mesa/main/compiler.h -@@ -366,8 +366,9 @@ - * USE_IEEE: Determine if we're using IEEE floating point - */ - #if defined(__i386__) || defined(__386__) || defined(__sparc__) || \ -- defined(__s390x__) || defined(__powerpc__) || \ -+ defined(__s390__) || defined(__s390x__) || defined(__powerpc__) || \ - defined(__x86_64__) || \ -+ defined(__m68k__) || \ - defined(ia64) || defined(__ia64__) || \ - defined(__hppa__) || defined(hpux) || \ - defined(__mips) || defined(_MIPS_ARCH) || \ diff --git a/debian/patches/10-hurd-configure-tweaks.diff b/debian/patches/10-hurd-configure-tweaks.diff deleted file mode 100644 index 984e17df1b..0000000000 --- a/debian/patches/10-hurd-configure-tweaks.diff +++ /dev/null @@ -1,14 +0,0 @@ -Enable x86 assembler on Hurd. - -Thanks to Pino Toscano. ---- a/configure.ac -+++ b/configure.ac -@@ -438,7 +438,7 @@ - case "$host_cpu" in - i?86) - case "$host_os" in -- linux* | *freebsd* | dragonfly* | *netbsd*) -+ linux* | *freebsd* | dragonfly* | *netbsd* | gnu*) - test "x$enable_64bit" = xyes && asm_arch=x86_64 || asm_arch=x86 - ;; - esac diff --git a/debian/patches/100_no_abi_tag.patch b/debian/patches/100_no_abi_tag.patch deleted file mode 100644 index 80f1d321b3..0000000000 --- a/debian/patches/100_no_abi_tag.patch +++ /dev/null @@ -1,44 +0,0 @@ ---- a/src/mapi/glapi/gen/gl_x86-64_asm.py -+++ b/src/mapi/glapi/gen/gl_x86-64_asm.py -@@ -181,19 +181,6 @@ class PrintGenericStubs(gl_XML.gl_print_ - - def printRealFooter(self): - print '' -- print '#if defined(GLX_USE_TLS) && defined(__linux__)' -- print ' .section ".note.ABI-tag", "a"' -- print ' .p2align 2' -- print ' .long 1f - 0f /* name length */' -- print ' .long 3f - 2f /* data length */' -- print ' .long 1 /* note length */' -- print '0: .asciz "GNU" /* vendor name */' -- print '1: .p2align 2' -- print '2: .long 0 /* note data: the ABI tag */' -- print ' .long 2,4,20 /* Minimum kernel version w/TLS */' -- print '3: .p2align 2 /* pad out section */' -- print '#endif /* GLX_USE_TLS */' -- print '' - print '#if defined (__ELF__) && defined (__linux__)' - print ' .section .note.GNU-stack,"",%progbits' - print '#endif' ---- a/src/mapi/glapi/gen/gl_x86_asm.py -+++ b/src/mapi/glapi/gen/gl_x86_asm.py -@@ -189,19 +189,6 @@ class PrintGenericStubs(gl_XML.gl_print_ - print '\t\tALIGNTEXT16' - print 'GLNAME(gl_dispatch_functions_end):' - print '' -- print '#if defined(GLX_USE_TLS) && defined(__linux__)' -- print ' .section ".note.ABI-tag", "a"' -- print ' .p2align 2' -- print ' .long 1f - 0f /* name length */' -- print ' .long 3f - 2f /* data length */' -- print ' .long 1 /* note length */' -- print '0: .asciz "GNU" /* vendor name */' -- print '1: .p2align 2' -- print '2: .long 0 /* note data: the ABI tag */' -- print ' .long 2,4,20 /* Minimum kernel version w/TLS */' -- print '3: .p2align 2 /* pad out section */' -- print '#endif /* GLX_USE_TLS */' -- print '' - print '#if defined (__ELF__) && defined (__linux__)' - print ' .section .note.GNU-stack,"",%progbits' - print '#endif' diff --git a/debian/patches/116_use_shared_galliumcore.diff b/debian/patches/116_use_shared_galliumcore.diff deleted file mode 100644 index 2ff5902a14..0000000000 --- a/debian/patches/116_use_shared_galliumcore.diff +++ /dev/null @@ -1,233 +0,0 @@ -Index: mesa/bin/mklib -=================================================================== ---- mesa.orig/bin/mklib 2012-06-01 13:01:25.243165726 -0400 -+++ mesa/bin/mklib 2012-06-01 13:02:46.827167952 -0400 -@@ -147,6 +147,7 @@ - NOPREFIX=0 - EXPORTS="" - ID="" -+WHOLE_ARCHIVE="" - - # - # Parse arguments -@@ -191,6 +192,18 @@ - -R*) - DEPS="$DEPS $1" - ;; -+ '-Wl,-whole-archive') -+ shift -+ while [ "x$1" != "x-Wl,-no-whole-archive" ] ; do -+ if [ "x$1" = "x" ] ; then -+ echo "mklib: End of arguments reached when scanning for -Wl,-no-whole-archive" -+ echo "mklib: Arguments to -no-whole-archive must be terminated by -Wl,-no-whole-archive" -+ exit 1 -+ fi -+ WHOLE_ARCHIVE="$WHOLE_ARCHIVE $1" -+ shift -+ done -+ ;; - -Wl*) - DEPS="$DEPS $1" - ;; -@@ -271,6 +284,10 @@ - OBJECTS=$NEWOBJECTS - fi - -+if [ "x$WHOLE_ARCHIVE" != "x" ] ; then -+ OBJECTS="${OBJECTS} -Wl,-whole-archive ${WHOLE_ARCHIVE} -Wl,-no-whole-archive" -+fi -+ - - # - # Error checking -@@ -284,7 +301,6 @@ - exit 1 - fi - -- - # - # Debugging info - # -@@ -345,6 +361,7 @@ - fi - - rm -f ${LIBNAME} -+ - # make lib - ${LINK} ${OPTS} ${LDFLAGS} -o ${LIBNAME} ${OBJECTS} ${DEPS} - # finish up -Index: mesa/configs/autoconf.in -=================================================================== ---- mesa.orig/configs/autoconf.in 2012-06-01 13:01:25.243165726 -0400 -+++ mesa/configs/autoconf.in 2012-06-01 13:02:46.831167952 -0400 -@@ -124,6 +124,7 @@ - DRICORE_GLSL_LIBS = @DRICORE_GLSL_LIBS@ - DRICORE_LIBS = @DRICORE_LIBS@ - DRICORE_LIB_DEPS = @DRICORE_LIB_DEPS@ -+GALLIUM_LIB_DEPS = @GALLIUM_LIB_DEPS@ - EGL_PLATFORMS = @EGL_PLATFORMS@ - EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ - -Index: mesa/configure.ac -=================================================================== ---- mesa.orig/configure.ac 2012-06-01 13:02:46.511167943 -0400 -+++ mesa/configure.ac 2012-06-01 13:02:46.831167952 -0400 -@@ -1068,6 +1068,41 @@ - GLAPI_LIB_DEPS="-lpthread $SELINUX_LIBS" - AC_SUBST([GLAPI_LIB_DEPS]) - -+dnl Setup default DRI CFLAGS -+DRI_CFLAGS='$(CFLAGS)' -+DRI_CXXFLAGS='$(CXXFLAGS)' -+DRI_LIB_DEPS='$(TOP)/src/mesa/libmesa.a' -+MESA_MODULES='$(TOP)/src/mesa/libmesa.a' -+ -+AC_ARG_ENABLE([shared-dricore], -+ [AS_HELP_STRING([--enable-shared-dricore], -+ [link DRI modules with shared core DRI routines @<:@default=disabled@:>@])], -+ [enable_dricore="$enableval"], -+ [enable_dricore=no]) -+if test "$mesa_driver" = dri ; then -+ if test "$enable_dricore" = yes ; then -+ if test "$GCC$GXX" != yesyes ; then -+ AC_MSG_WARN([Shared dricore requires GCC-compatible rpath handling. Disabling shared dricore]) -+ enable_dricore=no -+ else -+ DRICORE_GLSL_LIBS='$(TOP)/$(LIB_DIR)/libglsl.so' -+ DRICORE_LIBS='$(TOP)/$(LIB_DIR)/libdricore.so' -+ DRICORE_LIB_DEPS='-L$(TOP)/$(LIB_DIR) -Wl,-R$(DRI_DRIVER_INSTALL_DIR) -lglsl' -+ DRI_LIB_DEPS='-L$(TOP)/$(LIB_DIR) -Wl,-R$(DRI_DRIVER_INSTALL_DIR) -lgallium -ldricore -lglsl' -+ GALLIUM_LIB_DEPS='-lgallium' -+ DRI_CFLAGS='$(CFLAGS_NOVISIBILITY) -DUSE_DRICORE' -+ DRI_CXXFLAGS='$(CXXFLAGS_NOVISIBILITY) -DUSE_DRICORE' -+ MESA_MODULES='$(DRICORE_LIBS) $(DRICORE_GLSL_LIBS)' -+ fi -+ fi -+fi -+AC_SUBST([DRICORE_LIBS]) -+AC_SUBST([DRICORE_GLSL_LIBS]) -+AC_SUBST([DRICORE_LIB_DEPS]) -+AC_SUBST([GALLIUM_LIB_DEPS]) -+AC_SUBST([DRI_CXXFLAGS]) -+AC_SUBST([DRI_CFLAGS]) -+AC_SUBST([MESA_MODULES]) - - dnl Setup default DRI CFLAGS - DRI_CFLAGS='$(CFLAGS)' -Index: mesa/src/gallium/Makefile.template -=================================================================== ---- mesa.orig/src/gallium/Makefile.template 2012-06-01 13:01:25.247165726 -0400 -+++ mesa/src/gallium/Makefile.template 2012-06-01 13:02:46.831167952 -0400 -@@ -30,7 +30,7 @@ - - ##### TARGETS ##### - --default: depend lib$(LIBNAME).a $(PROGS) -+default:: depend lib$(LIBNAME).a $(PROGS) - - lib$(LIBNAME).a: $(OBJECTS) $(EXTRA_OBJECTS) Makefile $(TOP)/src/gallium/Makefile.template - $(MKLIB) -o $(LIBNAME) -static $(OBJECTS) $(EXTRA_OBJECTS) -@@ -58,16 +58,16 @@ - ##### RULES ##### - - %.s: %.c -- $(CC) -S $(INCLUDES) $(CFLAGS) $(LIBRARY_DEFINES) $< -o $@ -+ $(CC) -S $(INCLUDES) $(DRI_CFLAGS) $(LIBRARY_DEFINES) $< -o $@ - - %.o: %.c -- $(CC) -c $(INCLUDES) $(CFLAGS) $(LIBRARY_DEFINES) $< -o $@ -+ $(CC) -c $(INCLUDES) $(DRI_CFLAGS) $(LIBRARY_DEFINES) $< -o $@ - - %.o: %.cpp -- $(CXX) -c $(INCLUDES) $(CXXFLAGS) $(LIBRARY_DEFINES) $< -o $@ -+ $(CXX) -c $(INCLUDES) $(DRI_CXXFLAGS) $(LIBRARY_DEFINES) $< -o $@ - - %.o: %.S -- $(CC) -c $(INCLUDES) $(CFLAGS) $(LIBRARY_DEFINES) $< -o $@ -+ $(CC) -c $(INCLUDES) $(DRI_CFLAGS) $(LIBRARY_DEFINES) $< -o $@ - - - sinclude depend -Index: mesa/src/gallium/auxiliary/Makefile -=================================================================== ---- mesa.orig/src/gallium/auxiliary/Makefile 2012-06-01 13:01:25.247165726 -0400 -+++ mesa/src/gallium/auxiliary/Makefile 2012-06-01 13:02:46.831167952 -0400 -@@ -18,6 +18,14 @@ - - include ../Makefile.template - -+# Shared dricore library for classic DRI drivers -+$(TOP)/$(LIB_DIR)/libgallium.so: $(OBJECTS) $(EXTRA_OBJECTS) -+ @$(MKLIB) -o $@ -linker '$(CXX)' -ldflags '$(LDFLAGS)' \ -+ -cplusplus -noprefix \ -+ -install $(TOP)/$(LIB_DIR) -id $(DRI_DRIVER_INSTALL_DIR)/$@.dylib \ -+ -Wl,-whole-archive $(TOP)/src/mesa/libgalliumcore.a -Wl,-no-whole-archive \ -+ $(OBJECTS) $(EXTRA_OBJECTS) -+ - - indices/u_indices_gen.c: indices/u_indices_gen.py - $(PYTHON2) $< > $@ -@@ -33,4 +41,6 @@ - - util/u_half.c: util/u_half.py - $(PYTHON2) util/u_half.py > $@ -+ -+default:: $(TOP)/$(LIB_DIR)/libgallium.so - # DO NOT DELETE -Index: mesa/src/gallium/targets/Makefile.dri -=================================================================== ---- mesa.orig/src/gallium/targets/Makefile.dri 2012-06-01 13:01:25.251165726 -0400 -+++ mesa/src/gallium/targets/Makefile.dri 2012-06-01 13:02:46.831167952 -0400 -@@ -7,7 +7,6 @@ - endif - - MESA_MODULES = \ -- $(TOP)/src/mesa/libmesagallium.a \ - $(GALLIUM_AUXILIARIES) - - COMMON_GALLIUM_SOURCES = \ -@@ -73,8 +72,8 @@ - $(MKLIB) -o $@.tmp -noprefix -linker '$(CXX)' -ldflags '$(LDFLAGS)' \ - $(OBJECTS) $(PIPE_DRIVERS) \ - -Wl,--start-group $(MESA_MODULES) -Wl,--end-group \ -- $(DRI_LIB_DEPS) $(DRIVER_EXTRAS) -- $(CXX) $(CFLAGS) -o $@.test $(TOP)/src/mesa/drivers/dri/common/dri_test.o $@.tmp $(DRI_LIB_DEPS) $(LDFLAGS); -+ $(DRI_LIB_DEPS) $(GALLIUM_LIB_DEPS) $(DRIVER_EXTRAS) -+ $(CXX) $(CFLAGS) -o $@.test $(TOP)/src/mesa/drivers/dri/common/dri_test.o $@.tmp -lgallium $(DRI_LIB_DEPS) $(GALLIUM_LIB_DEPS) $(LDFLAGS); - @rm -f $@.test - mv -f $@.tmp $@ - -Index: mesa/src/mesa/Makefile -=================================================================== ---- mesa.orig/src/mesa/Makefile 2012-06-01 13:01:25.259165726 -0400 -+++ mesa/src/mesa/Makefile 2012-06-01 13:02:46.831167952 -0400 -@@ -16,6 +16,9 @@ - MESA_OBJECTS := $(addprefix $(MESA_OBJ_DIR)/, $(MESA_OBJECTS)) - MESA_GALLIUM_OBJECTS := $(addprefix $(MESA_OBJ_DIR)/, $(MESA_GALLIUM_OBJECTS)) - -+DRICORE_OBJECTS := $(addprefix $(DRICORE_OBJ_DIR)/, $(MESA_OBJECTS)) -+GALLIUMCORE_OBJECTS := $(addprefix $(DRICORE_OBJ_DIR)/, $(filter-out $(MESA_OBJECTS), $(MESA_GALLIUM_OBJECTS))) -+ - # define preprocessor flags - MESA_CPPFLAGS := $(API_DEFINES) $(DEFINES) - -@@ -65,7 +68,7 @@ - - # Default: build dependencies, then asm_subdirs, GLSL built-in lib, - # then convenience libs (.a) and finally the device drivers: --default: $(DEPENDS) asm_subdirs $(MESA_LIBS) $(DRICORE_LIBS) driver_subdirs -+default: $(DEPENDS) asm_subdirs $(MESA_LIBS) $(DRICORE_LIBS) libgalliumcore.a driver_subdirs - - # include glapi_gen.mk for generating glapi headers for GLES - GLAPI := $(TOP)/src/mapi/glapi/gen -@@ -146,6 +149,10 @@ - @$(MKDEP) $(MKDEP_OPTIONS) -a -p$(DRICORE_OBJ_DIR)/ $(MESA_CPPFLAGS) \ - $(ALL_SOURCES) > /dev/null 2>/dev/null - -+# Make archive of subset of core mesa object files for gallium -+libgalliumcore.a: $(GALLIUMCORE_OBJECTS) -+ @ $(MKLIB) -o galliumcore -static $(GALLIUMCORE_OBJECTS) -+ - ###################################################################### - # Installation rules - diff --git a/debian/patches/117-static-gallium.patch b/debian/patches/117-static-gallium.patch index ab72546dd3..939cb7316f 100644 --- a/debian/patches/117-static-gallium.patch +++ b/debian/patches/117-static-gallium.patch @@ -1,6 +1,8 @@ +diff --git a/configure.ac b/configure.ac +index b9fcb0b..be89843 100644 --- a/configure.ac +++ b/configure.ac -@@ -733,6 +733,19 @@ +@@ -747,6 +747,19 @@ if test "x$enable_shared_glapi" = xyes; then fi AM_CONDITIONAL(HAVE_SHARED_GLAPI, test "x$enable_shared_glapi" = xyes) @@ -20,9 +22,11 @@ dnl dnl Driver specific build directories dnl +diff --git a/src/gallium/auxiliary/Makefile.am b/src/gallium/auxiliary/Makefile.am +index f14279b..3cdec83 100644 --- a/src/gallium/auxiliary/Makefile.am +++ b/src/gallium/auxiliary/Makefile.am -@@ -3,13 +3,19 @@ +@@ -3,14 +3,19 @@ AUTOMAKE_OPTIONS = subdir-objects include Makefile.sources include $(top_srcdir)/src/gallium/Automake.inc @@ -30,12 +34,13 @@ - AM_CFLAGS = \ -I$(top_srcdir)/src/gallium/auxiliary/util \ -- $(GALLIUM_CFLAGS) $(VISIBILITY_CFLAGS) +- $(GALLIUM_CFLAGS) \ +- $(VISIBILITY_CFLAGS) + $(GALLIUM_CFLAGS) -+ -+AM_CXXFLAGS = -AM_CXXFLAGS = $(VISIBILITY_CXXFLAGS) ++AM_CXXFLAGS = ++ +if HAVE_SHARED_GALLIUM +lib_LTLIBRARIES = libgallium.la +else @@ -46,7 +51,7 @@ libgallium_la_SOURCES = \ $(C_SOURCES) \ -@@ -28,6 +34,8 @@ +@@ -29,6 +34,8 @@ if LLVM_NEEDS_FNORTTI AM_CXXFLAGS += -fno-rtti diff --git a/debian/patches/118-automake-ldrm.patch b/debian/patches/118-automake-ldrm.patch deleted file mode 100644 index ae0644ca9f..0000000000 --- a/debian/patches/118-automake-ldrm.patch +++ /dev/null @@ -1,297 +0,0 @@ -From b2f18cd2b0f75d200d4fc713325269171ac87616 Mon Sep 17 00:00:00 2001 -From: Maarten Lankhorst <maarten.lankhorst@canonical.com> -Date: Fri, 16 Nov 2012 18:50:57 +0100 -Subject: [PATCH 08/10] [PATCH] makefiles: use configured name for -ldrm* - where possible - -For precise lts support I had to do some magic with the library names, which works fine -as long as the libraries from pkg-config are used. - -The parts with src/gallium/targets/va-*/Makefile will not apply on the master branch, -but do apply to the 9.0 branch. - -NOTE: This is a candidate for the 9.0 branch. - -Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> -Acked-by: Matt Turner <mattst88@gmail.com> -(cherry picked from commit 4f0537e645f9c34e305f2808c70eafbbc1c7689c) ---- - configs/current.in | 2 +- - src/gallium/targets/dri-i915/Makefile | 2 +- - src/gallium/targets/dri-r300/Makefile | 2 +- - src/gallium/targets/dri-r600/Makefile | 2 +- - src/gallium/targets/dri-radeonsi/Makefile | 2 +- - src/gallium/targets/egl-static/Makefile | 16 ++++++++-------- - src/gallium/targets/gbm/Makefile | 2 +- - src/gallium/targets/pipe-loader/Makefile | 12 ++++++------ - src/gallium/targets/vdpau-r300/Makefile | 2 +- - src/gallium/targets/vdpau-r600/Makefile | 2 +- - src/gallium/targets/vdpau-radeonsi/Makefile | 2 +- - src/gallium/targets/xvmc-r300/Makefile | 2 +- - src/gallium/targets/xvmc-r600/Makefile | 2 +- - 13 files changed, 25 insertions(+), 25 deletions(-) - -diff --git a/configs/current.in b/configs/current.in -index 1802271..62edfa5 100644 ---- a/configs/current.in -+++ b/configs/current.in -@@ -144,7 +144,7 @@ GLAPI_LIB_DEPS = @GLAPI_LIB_DEPS@ - DRI_LIB_DEPS = @DRI_LIB_DEPS@ - GALLIUM_DRI_LIB_DEPS = @GALLIUM_DRI_LIB_DEPS@ - LIBDRM_CFLAGS = @LIBDRM_CFLAGS@ --LIBDRM_LIB = @LIBDRM_LIBS@ -+LIBDRM_LIBS = @LIBDRM_LIBS@ - DRI2PROTO_CFLAGS = @DRI2PROTO_CFLAGS@ - GLPROTO_CFLAGS = @GLPROTO_CFLAGS@ - EXPAT_INCLUDES = @EXPAT_INCLUDES@ -diff --git a/src/gallium/targets/dri-i915/Makefile b/src/gallium/targets/dri-i915/Makefile -index ddebff2..a835ee7 100644 ---- a/src/gallium/targets/dri-i915/Makefile -+++ b/src/gallium/targets/dri-i915/Makefile -@@ -28,6 +28,6 @@ endif - - include ../Makefile.dri - --GALLIUM_DRI_LIB_DEPS += -ldrm_intel -+GALLIUM_DRI_LIB_DEPS += $(INTEL_LIBS) - - symlinks: -diff --git a/src/gallium/targets/dri-r300/Makefile b/src/gallium/targets/dri-r300/Makefile -index 256aa23..63a2956 100644 ---- a/src/gallium/targets/dri-r300/Makefile -+++ b/src/gallium/targets/dri-r300/Makefile -@@ -21,6 +21,6 @@ DRIVER_DEFINES = \ - - include ../Makefile.dri - --GALLIUM_DRI_LIB_DEPS += -ldrm_radeon -+GALLIUM_DRI_LIB_DEPS += $(RADEON_LIBS) - - symlinks: -diff --git a/src/gallium/targets/dri-r600/Makefile b/src/gallium/targets/dri-r600/Makefile -index 7402750..2499ede 100644 ---- a/src/gallium/targets/dri-r600/Makefile -+++ b/src/gallium/targets/dri-r600/Makefile -@@ -21,6 +21,6 @@ DRIVER_DEFINES = \ - - include ../Makefile.dri - --GALLIUM_DRI_LIB_DEPS += -ldrm_radeon -+GALLIUM_DRI_LIB_DEPS += $(RADEON_LIBS) - - symlinks: -diff --git a/src/gallium/targets/dri-radeonsi/Makefile b/src/gallium/targets/dri-radeonsi/Makefile -index b45f243..588946e 100644 ---- a/src/gallium/targets/dri-radeonsi/Makefile -+++ b/src/gallium/targets/dri-radeonsi/Makefile -@@ -21,6 +21,6 @@ DRIVER_DEFINES = \ - - include ../Makefile.dri - --GALLIUM_DRI_LIB_DEPS += -ldrm_radeon -+GALLIUM_DRI_LIB_DEPS += $(RADEON_LIBS) - - symlinks: -diff --git a/src/gallium/targets/egl-static/Makefile b/src/gallium/targets/egl-static/Makefile -index f05c81d..08626a9 100644 ---- a/src/gallium/targets/egl-static/Makefile -+++ b/src/gallium/targets/egl-static/Makefile -@@ -48,17 +48,17 @@ egl_SYS += $(LIBUDEV_LIBS) $(DLOPEN_LIBS) -lEGL -lm -lpthread - ifneq ($(findstring x11, $(EGL_PLATFORMS)),) - egl_CPPFLAGS += $(LIBDRM_CFLAGS) - egl_LIBS += $(TOP)/src/gallium/winsys/sw/xlib/libws_xlib.a --egl_SYS += -lX11 -lXext -lXfixes $(LIBDRM_LIB) -+egl_SYS += -lX11 -lXext -lXfixes $(LIBDRM_LIBS) - endif - ifneq ($(findstring wayland, $(EGL_PLATFORMS)),) - egl_CPPFLAGS += $(LIBDRM_CFLAGS) - egl_LIBS += $(TOP)/src/gallium/winsys/sw/wayland/libws_wayland.a - egl_LIBS += $(TOP)/src/egl/wayland/wayland-drm/.libs/libwayland-drm.a --egl_SYS += $(LIBDRM_LIB) $(WAYLAND_LIBS) -+egl_SYS += $(LIBDRM_LIBS) $(WAYLAND_LIBS) - endif - ifneq ($(findstring drm, $(EGL_PLATFORMS)),) - egl_CPPFLAGS += $(LIBDRM_CFLAGS) --egl_SYS += $(LIBDRM_LIB) -lgbm -+egl_SYS += $(LIBDRM_LIBS) -lgbm - endif - ifneq ($(findstring fbdev, $(EGL_PLATFORMS)),) - egl_LIBS += $(TOP)/src/gallium/winsys/sw/fbdev/libfbdev.a -@@ -93,7 +93,7 @@ egl_CPPFLAGS += -D_EGL_PIPE_I915=1 - egl_LIBS += \ - $(TOP)/src/gallium/winsys/i915/drm/libi915drm.a \ - $(TOP)/src/gallium/drivers/i915/libi915.a --egl_SYS += -ldrm_intel -+egl_SYS += $(INTEL_LIBS) - endif - - # nouveau -@@ -105,7 +105,7 @@ egl_LIBS += \ - $(TOP)/src/gallium/drivers/nv50/libnv50.a \ - $(TOP)/src/gallium/drivers/nvc0/libnvc0.a \ - $(TOP)/src/gallium/drivers/nouveau/libnouveau.a --egl_SYS += -ldrm_nouveau -+egl_SYS += $(NOUVEAU_LIBS) - endif - - # r300 -@@ -115,7 +115,7 @@ egl_CPPFLAGS += -D_EGL_PIPE_R300=1 - egl_LIBS += \ - $(TOP)/src/gallium/winsys/radeon/drm/libradeonwinsys.a \ - $(TOP)/src/gallium/drivers/r300/libr300.a --egl_SYS += -ldrm_radeon -+egl_SYS += $(RADEON_LIBS) - endif - endif - -@@ -126,7 +126,7 @@ egl_CPPFLAGS += -D_EGL_PIPE_R600=1 - egl_LIBS += \ - $(TOP)/src/gallium/winsys/radeon/drm/libradeonwinsys.a \ - $(TOP)/src/gallium/drivers/r600/libr600.a --egl_SYS += -ldrm_radeon -+egl_SYS += $(RADEON_LIBS) - endif - endif - -@@ -137,7 +137,7 @@ egl_CPPFLAGS += -D_EGL_PIPE_RADEONSI=1 - egl_LIBS += \ - $(TOP)/src/gallium/winsys/radeon/drm/libradeonwinsys.a \ - $(TOP)/src/gallium/drivers/radeonsi/libradeonsi.a --egl_SYS += -ldrm_radeon -+egl_SYS += $(RADEON_LIBS) - endif - endif - -diff --git a/src/gallium/targets/gbm/Makefile b/src/gallium/targets/gbm/Makefile -index 423debf..17d5648 100644 ---- a/src/gallium/targets/gbm/Makefile -+++ b/src/gallium/targets/gbm/Makefile -@@ -14,7 +14,7 @@ GBM_INCLUDES = \ - -I$(TOP)/src/gallium/winsys \ - -I$(TOP)/src/gallium/include - --GBM_LIBS = $(LIBUDEV_LIBS) $(LIBDRM_LIB) -lm \ -+GBM_LIBS = $(LIBUDEV_LIBS) $(LIBDRM_LIBS) -lm \ - $(TOP)/src/gallium/state_trackers/gbm/libgbm.a \ - $(GALLIUM_PIPE_LOADER_LIBS) $(GALLIUM_AUXILIARIES) - -diff --git a/src/gallium/targets/pipe-loader/Makefile b/src/gallium/targets/pipe-loader/Makefile -index 596539c..f15cd25 100644 ---- a/src/gallium/targets/pipe-loader/Makefile -+++ b/src/gallium/targets/pipe-loader/Makefile -@@ -24,7 +24,7 @@ PIPE_LIBS = \ - $(TOP)/src/gallium/drivers/rbug/librbug.a \ - $(GALLIUM_AUXILIARIES) - --PIPE_SYS = $(LIBDRM_LIB) -lm -lpthread $(DLOPEN_LIBS) -+PIPE_SYS = $(LIBDRM_LIBS) -lm -lpthread $(DLOPEN_LIBS) - - PIPE_CFLAGS = $(LIBDRM_CFLAGS) - -@@ -34,7 +34,7 @@ PIPE_LDFLAGS = -Wl,--no-undefined - i915_LIBS = \ - $(TOP)/src/gallium/winsys/i915/drm/libi915drm.a \ - $(TOP)/src/gallium/drivers/i915/libi915.a --i915_SYS = -ldrm_intel -+i915_SYS = $(INTEL_LIBS) - - # nouveau pipe driver - nouveau_LIBS = \ -@@ -43,25 +43,25 @@ nouveau_LIBS = \ - $(TOP)/src/gallium/drivers/nv50/libnv50.a \ - $(TOP)/src/gallium/drivers/nvc0/libnvc0.a \ - $(TOP)/src/gallium/drivers/nouveau/libnouveau.a --nouveau_SYS = -ldrm_nouveau -+nouveau_SYS = $(NOUVEAU_LIBS) - - # r300 pipe driver - r300_LIBS = \ - $(TOP)/src/gallium/winsys/radeon/drm/libradeonwinsys.a \ - $(TOP)/src/gallium/drivers/r300/libr300.a --r300_SYS += -ldrm_radeon -+r300_SYS += $(RADEON_LIBS) - - # r600 pipe driver - r600_LIBS = \ - $(TOP)/src/gallium/winsys/radeon/drm/libradeonwinsys.a \ - $(TOP)/src/gallium/drivers/r600/libr600.a --r600_SYS += -ldrm_radeon -+r600_SYS += $(RADEON_LIBS) - - # radeonsi pipe driver - radeonsi_LIBS = \ - $(TOP)/src/gallium/winsys/radeon/drm/libradeonwinsys.a \ - $(TOP)/src/gallium/drivers/radeonsi/libradeonsi.a --radeonsi_SYS += -ldrm_radeon -+radeonsi_SYS += $(RADEON_LIBS) - - # vmwgfx pipe driver - vmwgfx_LIBS = \ -diff --git a/src/gallium/targets/vdpau-r300/Makefile b/src/gallium/targets/vdpau-r300/Makefile -index 1ada550..e79c920 100644 ---- a/src/gallium/targets/vdpau-r300/Makefile -+++ b/src/gallium/targets/vdpau-r300/Makefile -@@ -21,7 +21,7 @@ C_SOURCES = \ - $(COMMON_GALLIUM_SOURCES) \ - $(DRIVER_SOURCES) - --DRIVER_LIBS = $(shell $(PKG_CONFIG) libdrm --libs) -lXfixes -ldrm_radeon -+DRIVER_LIBS = $(LIBDRM_LIBS) $(RADEON_LIBS) -lXfixes - - include ../Makefile.vdpau - -diff --git a/src/gallium/targets/vdpau-r600/Makefile b/src/gallium/targets/vdpau-r600/Makefile -index 05e0b4f..6ef7f90 100644 ---- a/src/gallium/targets/vdpau-r600/Makefile -+++ b/src/gallium/targets/vdpau-r600/Makefile -@@ -17,7 +17,7 @@ C_SOURCES = \ - $(COMMON_GALLIUM_SOURCES) \ - $(DRIVER_SOURCES) - --DRIVER_LIBS = $(shell $(PKG_CONFIG) libdrm --libs) -lXfixes -ldrm_radeon -+DRIVER_LIBS = $(LIBDRM_LIBS) $(RADEON_LIBS) -lXfixes - - include ../Makefile.vdpau - -diff --git a/src/gallium/targets/vdpau-radeonsi/Makefile b/src/gallium/targets/vdpau-radeonsi/Makefile -index 6dd2be9..4ff6743 100644 ---- a/src/gallium/targets/vdpau-radeonsi/Makefile -+++ b/src/gallium/targets/vdpau-radeonsi/Makefile -@@ -23,7 +23,7 @@ C_SOURCES = \ - DRIVER_DEFINES = \ - -DGALLIUM_RBUG -DGALLIUM_TRACE -DGALLIUM_NOOP - --DRIVER_LIBS = $(shell $(PKG_CONFIG) libdrm --libs) -lXfixes -ldrm_radeon -+DRIVER_LIBS = $(LIBDRM_LIBS) $(RADEON_LIBS) -lXfixes - - include ../Makefile.vdpau - -diff --git a/src/gallium/targets/xvmc-r300/Makefile b/src/gallium/targets/xvmc-r300/Makefile -index 800f8d5..d2ab488 100644 ---- a/src/gallium/targets/xvmc-r300/Makefile -+++ b/src/gallium/targets/xvmc-r300/Makefile -@@ -17,7 +17,7 @@ C_SOURCES = \ - $(COMMON_GALLIUM_SOURCES) \ - $(DRIVER_SOURCES) - --DRIVER_LIBS = $(shell $(PKG_CONFIG) libdrm --libs) -lXfixes -ldrm_radeon -+DRIVER_LIBS = $(LIBDRM_LIBS) $(RADEON_LIBS) -lXfixes - - include ../Makefile.xvmc - -diff --git a/src/gallium/targets/xvmc-r600/Makefile b/src/gallium/targets/xvmc-r600/Makefile -index d9ce72f..3ef5b1a 100644 ---- a/src/gallium/targets/xvmc-r600/Makefile -+++ b/src/gallium/targets/xvmc-r600/Makefile -@@ -17,7 +17,7 @@ C_SOURCES = \ - $(COMMON_GALLIUM_SOURCES) \ - $(DRIVER_SOURCES) - --DRIVER_LIBS = $(shell $(PKG_CONFIG) libdrm --libs) -lXfixes -ldrm_radeon -+DRIVER_LIBS = $(LIBDRM_LIBS) $(RADEON_LIBS) -lXfixes - - include ../Makefile.xvmc - --- -1.8.0 - diff --git a/debian/patches/119-libllvmradeon-link.patch b/debian/patches/119-libllvmradeon-link.patch deleted file mode 100644 index ee47f8a07d..0000000000 --- a/debian/patches/119-libllvmradeon-link.patch +++ /dev/null @@ -1,9 +0,0 @@ ---- a/src/gallium/drivers/radeon/Makefile.am -+++ b/src/gallium/drivers/radeon/Makefile.am -@@ -26,5 +26,6 @@ - $(C_FILES) - - libllvmradeon@VERSION@_la_LIBADD = \ -+ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ - $(CLOCK_LIB) \ - $(LLVM_LIBS) diff --git a/debian/patches/120-hide-x86sse.patch b/debian/patches/120-hide-x86sse.patch new file mode 100644 index 0000000000..0bf3c65013 --- /dev/null +++ b/debian/patches/120-hide-x86sse.patch @@ -0,0 +1,29 @@ +See LP #1170074 + +The refresh of linking libgallium against dricore patch caused a conflict. +x86sse was taken from an earlier gallium implementation, but is no longer compatible. +Fortunately these symbols are not needed outside libdricore, so the entire +implementation can be hidden, forcing it to use the correct implementation in libgallium +and in libdricore. + +diff --git a/src/mesa/x86/rtasm/x86sse.h b/src/mesa/x86/rtasm/x86sse.h +index f6282f5..35d8906 100644 +--- a/src/mesa/x86/rtasm/x86sse.h ++++ b/src/mesa/x86/rtasm/x86sse.h +@@ -4,6 +4,8 @@ + + #if defined(__i386__) || defined(__386__) + ++#pragma GCC visibility push(internal) ++ + /* It is up to the caller to ensure that instructions issued are + * suitable for the host cpu. There are no checks made in this module + * for mmx/sse/sse2 support on the cpu. +@@ -252,5 +254,7 @@ void x87_fucom( struct x86_function *p, struct x86_reg arg ); + */ + struct x86_reg x86_fn_arg( struct x86_function *p, unsigned arg ); + ++#pragma GCC visibility pop ++ + #endif + #endif diff --git a/debian/patches/14-fix-osmesa-build.diff b/debian/patches/14-fix-osmesa-build.diff deleted file mode 100644 index 00581d0e18..0000000000 --- a/debian/patches/14-fix-osmesa-build.diff +++ /dev/null @@ -1,10 +0,0 @@ ---- a/src/mesa/drivers/osmesa/Makefile.am -+++ b/src/mesa/drivers/osmesa/Makefile.am -@@ -25,6 +25,7 @@ - -I$(top_srcdir)/include \ - -I$(top_srcdir)/src/mapi \ - -I$(top_srcdir)/src/mesa/ \ -+ -I$(top_builddir)/src/mapi \ - $(DEFINES) \ - $(API_DEFINES) - AM_CFLAGS = $(PTHREAD_CFLAGS) \ diff --git a/debian/patches/15-fix-oot-build.diff b/debian/patches/15-fix-oot-build.diff deleted file mode 100644 index 7040999a22..0000000000 --- a/debian/patches/15-fix-oot-build.diff +++ /dev/null @@ -1,13 +0,0 @@ -diff --git a/src/gallium/state_trackers/egl/Makefile.am b/src/gallium/state_trackers/egl/Makefile.am -index d647a64..d770699 100644 ---- a/src/gallium/state_trackers/egl/Makefile.am -+++ b/src/gallium/state_trackers/egl/Makefile.am -@@ -27,7 +27,7 @@ include $(top_srcdir)/src/gallium/Automake.inc - AM_CFLAGS = $(GALLIUM_CFLAGS) - AM_CPPFLAGS = \ - -I$(top_srcdir)/src/egl/main \ -- -I$(top_srcdir)/src/egl/wayland/wayland-drm/ \ -+ -I$(top_builddir)/src/egl/wayland/wayland-drm/ \ - -I$(top_srcdir)/include - - noinst_LTLIBRARIES = libegl.la diff --git a/debian/patches/16-avoid-symbols-from-static-llvm.diff b/debian/patches/16-avoid-symbols-from-static-llvm.diff deleted file mode 100644 index f67f00462a..0000000000 --- a/debian/patches/16-avoid-symbols-from-static-llvm.diff +++ /dev/null @@ -1,90 +0,0 @@ -diff --git a/src/gallium/auxiliary/Makefile.am b/src/gallium/auxiliary/Makefile.am -index a4eee47..148aff9 100644 ---- a/src/gallium/auxiliary/Makefile.am -+++ b/src/gallium/auxiliary/Makefile.am -@@ -7,7 +7,9 @@ noinst_LTLIBRARIES = libgallium.la - - AM_CFLAGS = \ - -I$(top_srcdir)/src/gallium/auxiliary/util \ -- $(GALLIUM_CFLAGS) -+ $(GALLIUM_CFLAGS) $(VISIBILITY_CFLAGS) -+ -+AM_CXXFLAGS = $(VISIBILITY_CXXFLAGS) - - libgallium_la_SOURCES = \ - $(C_SOURCES) \ -@@ -18,7 +20,7 @@ if HAVE_MESA_LLVM - AM_CFLAGS += \ - $(LLVM_CFLAGS) - --AM_CXXFLAGS = \ -+AM_CXXFLAGS += \ - $(GALLIUM_CFLAGS) \ - $(LLVM_CXXFLAGS) - -diff --git a/src/gallium/drivers/rbug/Makefile.am b/src/gallium/drivers/rbug/Makefile.am -index 655bfe1..686daf8 100644 ---- a/src/gallium/drivers/rbug/Makefile.am -+++ b/src/gallium/drivers/rbug/Makefile.am -@@ -29,7 +29,7 @@ noinst_LTLIBRARIES = librbug.la - # different directories, and which one is included by the - # preprocessor is determined by the ordering of the -I flags. - AM_CFLAGS = \ -- $(GALLIUM_CFLAGS) \ -+ $(GALLIUM_CFLAGS) $(VISIBILITY_CFLAGS) \ - -I$(top_srcdir)/src/gallium/drivers \ - -I$(top_srcdir)/include - -diff --git a/src/gallium/drivers/svga/Makefile.am b/src/gallium/drivers/svga/Makefile.am -index fdaa3c8..7eacd90 100644 ---- a/src/gallium/drivers/svga/Makefile.am -+++ b/src/gallium/drivers/svga/Makefile.am -@@ -29,6 +29,8 @@ AM_CPPFLAGS = \ - -I$(top_srcdir)/include \ - $(GALLIUM_CFLAGS) - -+AM_CFLAGS = $(VISIBILITY_CFLAGS) -+ - #On some systems -std= must be added to CFLAGS to be the last -std= - CFLAGS += -std=gnu99 - -diff --git a/src/gallium/drivers/trace/Makefile.am b/src/gallium/drivers/trace/Makefile.am -index a9e1457..b9df06f 100644 ---- a/src/gallium/drivers/trace/Makefile.am -+++ b/src/gallium/drivers/trace/Makefile.am -@@ -1,7 +1,7 @@ - include $(top_srcdir)/src/gallium/Automake.inc - - AM_CFLAGS = \ -- $(GALLIUM_CFLAGS) -+ $(GALLIUM_CFLAGS) $(VISIBILITY_CFLAGS) - - noinst_LTLIBRARIES = libtrace.la - -diff --git a/src/gallium/state_trackers/xa/Makefile.am b/src/gallium/state_trackers/xa/Makefile.am -index 5b53ef9..347dc01 100644 ---- a/src/gallium/state_trackers/xa/Makefile.am -+++ b/src/gallium/state_trackers/xa/Makefile.am -@@ -24,7 +24,8 @@ include $(top_srcdir)/src/gallium/Automake.inc - - AM_CFLAGS = \ - -Wall -pedantic \ -- $(GALLIUM_CFLAGS) -+ $(GALLIUM_CFLAGS) $(VISIBILITY_CFLAGS) -+ - AM_CPPFLAGS = \ - -I$(top_srcdir)/src/gallium/ \ - -I$(top_srcdir)/src/gallium/winsys \ -diff --git a/src/gallium/winsys/svga/drm/Makefile.am b/src/gallium/winsys/svga/drm/Makefile.am -index 53bbcc2..d7ada3c 100644 ---- a/src/gallium/winsys/svga/drm/Makefile.am -+++ b/src/gallium/winsys/svga/drm/Makefile.am -@@ -31,6 +31,8 @@ AM_CPPFLAGS = \ - $(GALLIUM_CFLAGS) \ - $(LIBDRM_CFLAGS) - -+AM_CFLAGS = $(VISIBILITY_CFLAGS) -+ - #On some systems -std= must be added to CFLAGS to be the last -std= - CFLAGS += -std=gnu99 -D_FILE_OFFSET_BITS=64 - diff --git a/debian/patches/series b/debian/patches/series index f75fc6bf63..97a3cee5b3 100644 --- a/debian/patches/series +++ b/debian/patches/series @@ -1,17 +1,11 @@ -02_use-ieee-fp-on-s390-and-m68k.patch 04_osmesa_version.diff #05_kfreebsd-egl-x11.diff 06_kfreebsd-ftbfs.diff 08-kfreebsd-gallium.diff -10-hurd-configure-tweaks.diff #11-hurd-ftbfs-again.diff -14-fix-osmesa-build.diff -15-fix-oot-build.diff -16-avoid-symbols-from-static-llvm.diff # Ubuntu patches. -100_no_abi_tag.patch 101_ubuntu_hidden_glname.patch 117-static-gallium.patch 118-dricore-gallium.patch -119-libllvmradeon-link.patch +120-hide-x86sse.patch diff --git a/debian/rules b/debian/rules index 3f1f626544..7c1d8fcf60 100755 --- a/debian/rules +++ b/debian/rules @@ -80,7 +80,7 @@ else # where we have LLVM enabled. GALLIUM_DRIVERS += radeonsi else - EXTRA_SED=-e"/radeonsi_dri.so/ s/^/\#/" + EXTRA_SED="-e/libllvmradeon/ s/^/\#/" endif endif @@ -94,7 +94,7 @@ else endif # LLVM is required for r300g and recommended for swrastg on x86: - ifneq (,$(filter $(DEB_HOST_ARCH),amd64 i386 kfreebsd-amd64 kfreebsd-i386)) + ifneq (,$(filter $(DEB_HOST_ARCH),amd64 i386 kfreebsd-amd64 kfreebsd-i386 armhf powerpc)) confflags_GALLIUM += --enable-gallium-llvm confflags_GALLIUM += --with-llvm-shared-libs endif @@ -113,7 +113,6 @@ confflags-dri = \ --with-dri-searchpath='/usr/lib/$(DEB_HOST_MULTIARCH)/dri:\$$$${ORIGIN}/dri:/usr/lib/dri' \ --enable-osmesa \ --enable-glx-tls \ - --enable-shared-dricore \ --enable-shared-glapi \ --enable-texture-float \ --enable-xa \ @@ -200,6 +199,8 @@ clean: unpatch rm -f src/mapi/glapi/gen/*.pyc rm -f src/mesa/main/*.pyc rm -f src/gallium/auxiliary/util/*.pyc + rm -f m4/libtool.m4 m4/ltoptions.m4 m4/ltsugar.m4 m4/ltversion.m4 m4/lt~obsolete.m4 + dh_clean # Build architecture-independent files here. @@ -223,6 +224,8 @@ binary-arch: install # Also get rid of other files which aren't installed. Do not # use -f to ensure we notice disappearing files: set -e; for file in $(NOT_INSTALLED); do rm debian/tmp/$$file; done + # Files only in git, not in tarballs, OK to use rm -f here: + set -e; for file in $(NOT_INSTALLED_EITHER); do rm -f debian/tmp/$$file; done # No need for these .so, they're just convenience libraries: rm debian/tmp/dri/usr/lib/${DEB_HOST_MULTIARCH}/libglapi.so rm debian/tmp/dri/usr/lib/${DEB_HOST_MULTIARCH}/libdricore*.so diff --git a/docs/relnotes-9.1.1.html b/docs/relnotes-9.1.1.html new file mode 100644 index 0000000000..a73c974244 --- /dev/null +++ b/docs/relnotes-9.1.1.html @@ -0,0 +1,235 @@ +<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd"> +<html lang="en"> +<head> + <meta http-equiv="content-type" content="text/html; charset=utf-8"> + <title>Mesa Release Notes</title> + <link rel="stylesheet" type="text/css" href="mesa.css"> +</head> +<body> + +<div class="header"> + <h1>The Mesa 3D Graphics Library</h1> +</div> + +<iframe src="contents.html"></iframe> +<div class="content"> + +<h1>Mesa 9.1.1 Release Notes / March 19th, 2013</h1> + +<p> +Mesa 9.1.1 is a bug fix release which fixes bugs found since the 9.1 release. +</p> +<p> +Mesa 9.1 implements the OpenGL 3.1 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 3.1. OpenGL +3.1 is <strong>only</strong> available if requested at context creation +because GL_ARB_compatibility is not supported. +</p> + +<h2>MD5 checksums</h2> +<pre> +6508d9882d8dce7106717f365632700c MesaLib-9.1.1.tar.gz +6ea2bdc3b7ecfb4257b39814b4182580 MesaLib-9.1.1.tar.bz2 +3434c0eb47849a08c53cd32833d10d13 MesaLib-9.1.1.zip +</pre> + +<h2>New features</h2> +<p>None.</p> + +<h2>Bug fixes</h2> + +<p>This list is likely incomplete.</p> + +<ul> +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=30232">Bug 30232</a> - [GM45] mesa demos spriteblast render incorrectly</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=32429">Bug 32429</a> - [gles2] Ironlake: gl_PointCoord takes no effect for point sprites</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=38086">Bug 38086</a> - Mesa 7.11-devel implementation error: Unexpected program target in destroy_program_variants_cb()</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=57121">Bug 57121</a> - [snb] corrupted GLSL built-in function results when using Uniform Buffer contents as arguments</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=58042">Bug 58042</a> - [bisected] Garbled UI in Team Fortress 2 and Counter-Strike: Source</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=58960">Bug 58960</a> - Texture flicker with fragment shader</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=59495">Bug 59495</a> - [i965 Bisected]Oglc fbblit(advanced.blitFb-3d-cube.mirror.both) fails</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=59783">Bug 59783</a> - [IVB bisected] 3DMMES2.0 Taiji performance reduced by ~13% with gnome-session enable compositing</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=60121">Bug 60121</a> - build - libvdpau_softpipe fails at runtime.</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=60143">Bug 60143</a> - gbm_dri_bo_create fails to initialize bo->base.base.format</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=60802">Bug 60802</a> - Corruption with DMA ring on cayman</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=60848">Bug 60848</a> - [bisected] r600g: add htile support cause gpu lockup in Dishonored wine.</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=60938">Bug 60938</a> - [softpipe] piglit interpolation-noperspective-gl_BackColor-flat-fixed regression</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=61012">Bug 61012</a> - alloc_layout_array tx * ty assertion failure when making pbuffer current</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=61026">Bug 61026</a> - Segfault in glBitmap when called with PBO source</li> + +<!-- <li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=">Bug </a> - </li> --> +</ul> + + +<h2>Changes</h2> +<p>The full set of changes can be viewed by using the following GIT command:</p> + +<pre> + git log mesa-9.1..mesa-9.1.1 +</pre> + + +<p>Adam Sampson (1):</p> +<ul> + <li>autotools: oprofilejit should be included in the list of LLVM components required</li> +</ul> + +<p>Alex Deucher (2):</p> +<ul> + <li>r600g: add Richland APU pci ids</li> + <li>r600g: Use blitter rather than DMA for 128bpp on cayman (v3)</li> +</ul> + +<p>Andreas Boll (2):</p> +<ul> + <li>docs: Add 9.1 release md5sums</li> + <li>docs: add news item for 9.1 release</li> +</ul> + +<p>Anuj Phogat (1):</p> +<ul> + <li>meta: Allocate texture before initializing texture coordinates</li> +</ul> + +<p>Brian Paul (11):</p> +<ul> + <li>docs: remove stray 'date' text</li> + <li>docs: insert links to the 9.0.3 release</li> + <li>draw: fix non-perspective interpolation in interp()</li> + <li>st/mesa: implement glBitmap unpacking from a PBO, for the cache path</li> + <li>st/xlib: initialize the drawable size in create_xmesa_buffer()</li> + <li>st/mesa: fix trimming of GL_QUAD_STRIP</li> + <li>st/mesa: check for dummy programs in destroy_program_variants()</li> + <li>st/mesa: fix polygon offset state translation logic</li> + <li>draw: fix broken polygon offset stage</li> + <li>llvmpipe: add missing checks for polygon offset point/line modes</li> + <li>svga: always link with C++</li> +</ul> + +<p>Daniel van Vugt (1):</p> +<ul> + <li>gbm: Remember to init format on gbm_dri_bo_create.</li> +</ul> + +<p>Eric Anholt (7):</p> +<ul> + <li>i965/fs: Do a general SEND dependency workaround for the original 965.</li> + <li>i965/fs: Fix copy propagation with smearing.</li> + <li>i965/fs: Delay setup of uniform loads until after pre-regalloc scheduling.</li> + <li>i965/fs: Only do CSE when the dst types match.</li> + <li>i965/fs: Fix broken math on values loaded from uniform buffers on gen6.</li> + <li>mesa: Fix setup of ctx->Point.PointSprite for GLES2.</li> + <li>i965: Fix the W value of deprecated pointcoords on pre-gen6.</li> +</ul> + +<p>Frank Henigman (1):</p> +<ul> + <li>i965: Link i965_dri.so with C++ linker.</li> +</ul> + +<p>Ian Romanick (3):</p> +<ul> + <li>mesa: Add previously picked commit to .cherry-ignore</li> + <li>mesa: Modify candidate search string</li> + <li>egl: Allow 24-bit visuals for 32-bit RGBA8888 configs</li> +</ul> + +<p>Jakub Bogusz (1):</p> +<ul> + <li>vdpau-softpipe: Build correct source file - vl_winsys_xsp.c</li> +</ul> + +<p>Jerome Glisse (1):</p> +<ul> + <li>r600g: workaround hyperz lockup on evergreen</li> +</ul> + +<p>John Kåre Alsaker (1):</p> +<ul> + <li>llvmpipe: Fix creation of shared and scanout textures.</li> +</ul> + +<p>Jordan Justen (1):</p> +<ul> + <li>attrib: push/pop FRAGMENT_PROGRAM_ARB state</li> +</ul> + +<p>José Fonseca (3):</p> +<ul> + <li>scons: Allows choosing VS 10 or 11.</li> + <li>scons: Define _ALLOW_KEYWORD_MACROS on MSVC builds.</li> + <li>scons: Warn when using MSVS versions prior to 2012.</li> +</ul> + +<p>Keith Kriewall (1):</p> +<ul> + <li>scons: Fix Windows build with LLVM 3.2</li> +</ul> + +<p>Kenneth Graunke (1):</p> +<ul> + <li>i965: Fix Crystal Well PCI IDs.</li> +</ul> + +<p>Marek Olšák (5):</p> +<ul> + <li>r600g: use async DMA with a non-zero src offset</li> + <li>r600g: flush and invalidate htile cache when appropriate</li> + <li>gallium/util: add helper code for 1D integer range</li> + <li>r600g: always map uninitialized buffer range as unsynchronized</li> + <li>r600g: pad the DMA CS to a multiple of 8 dwords</li> +</ul> + +<p>Martin Andersson (1):</p> +<ul> + <li>winsys/radeon: Only add bo to hash table when creating flink</li> +</ul> + +<p>Matt Turner (1):</p> +<ul> + <li>mesa: Allow ETC2/EAC formats with ARB_ES3_compatibility.</li> +</ul> + +<p>Michel Dänzer (3):</p> +<ul> + <li>radeonsi: Fix up and enable flat shading.</li> + <li>r600g/Cayman: Fix blending using destination alpha factor but non-alpha dest</li> + <li>radeonsi: Fix off-by-one for maximum vertex element index in some cases</li> +</ul> + +<p>Tapani Pälli (2):</p> +<ul> + <li>mesa: add missing case in _mesa_GetTexParameterfv()</li> + <li>mesa/es: NULL check in EGLImageTargetTexture2DOES</li> +</ul> + +<p>Vadim Girlin (1):</p> +<ul> + <li>r600g: fix check_and_set_bank_swizzle for cayman</li> +</ul> + +<p>Vincent Lejeune (2):</p> +<ul> + <li>r600g/llvm: Add support for UBO</li> + <li>r600g: Check comp_mask before merging export instructions</li> +</ul> + +</div> +</body> +</html> diff --git a/docs/relnotes-9.1.2.html b/docs/relnotes-9.1.2.html new file mode 100644 index 0000000000..d421371895 --- /dev/null +++ b/docs/relnotes-9.1.2.html @@ -0,0 +1,237 @@ +<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd"> +<html lang="en"> +<head> + <meta http-equiv="content-type" content="text/html; charset=utf-8"> + <title>Mesa Release Notes</title> + <link rel="stylesheet" type="text/css" href="mesa.css"> +</head> +<body> + +<div class="header"> + <h1>The Mesa 3D Graphics Library</h1> +</div> + +<iframe src="contents.html"></iframe> +<div class="content"> + +<h1>Mesa 9.1.2 Release Notes / April 30th, 2013</h1> + +<p> +Mesa 9.1.2 is a bug fix release which fixes bugs found since the 9.1.1 release. +</p> +<p> +Mesa 9.1 implements the OpenGL 3.1 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 3.1. OpenGL +3.1 is <strong>only</strong> available if requested at context creation +because GL_ARB_compatibility is not supported. +</p> + +<h2>MD5 checksums</h2> +<pre> +df2aab86ff4a510ce5b0d074caa0a59f MesaLib-9.1.2.tar.bz2 +415c2bc3a9eb571aafbfa474ebf5a2e0 MesaLib-9.1.2.tar.gz +b1ae5a4d9255953980bc9254f5323420 MesaLib-9.1.2.zip +</pre> + +<h2>New features</h2> +<p>None.</p> + +<h2>Bug fixes</h2> + +<p>This list is likely incomplete.</p> + +<ul> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=44567">Bug 44567</a> - [965gm] green artifacts when using GLSL in XBMC</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=59238">Bug 59238</a> - many new symbols in libxatracker after recent automake work</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=59445">Bug 59445</a> - [SNB/IVB/HSW Bisected]Oglc draw-buffers2(advanced.blending.none) segfault</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=59495">Bug 59495</a> - [i965 Bisected]Oglc fbblit(advanced.blitFb-3d-cube.mirror.both) fails</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=60503">Bug 60503</a> - [r300g] Unigine Heaven 3.0: all objects are black</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=60510">Bug 60510</a> - Firefox 18.0.2 Crash On Nvidia GeForce2</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=61197">Bug 61197</a> - [SNB Bisected] kwin_gles screen corruption</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=61317">Bug 61317</a> - [IVB] corrupt rendering with UBOs</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=61395">Bug 61395</a> - glEdgeFlag can't be set to false</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=61947">Bug 61947</a> - nullpointer dereference causes xorg-server segfault when nouveau DRI driver is loaded</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=62357">Bug 62357</a> - llvmpipe: Fragment Shader with "return" in main causes back output</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=62434">Bug 62434</a> - [bisected] 3284.073] (EE) AIGLX error: dlopen of /usr/lib/xorg/modules/dri/r600_dri.so failed (/usr/lib/libllvmradeon9.2.0.so: undefined symbol: lp_build_tgsi_intrinsic)</li> + +<li><a href="http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=349437">Debian bug #349437</a> - mesa - FTBFS: error: 'IEEE_ONE' undeclared</li> + +<li><a href="http://bugzilla.redhat.com/show_bug.cgi?id=918661">Redhat bug #918661</a> - crash in routine Avogadro UI manipulation</li> + +</ul> + +<h2>Changes</h2> +<p>The full set of changes can be viewed by using the following GIT command:</p> + +<pre> + git log mesa-9.1.1..mesa-9.1.2 +</pre> + +<p>Adam Jackson (2):</p> +<ul> + <li>glx: Build with VISIBILITY_CFLAGS in automake</li> + <li>linux: Don't emit a .note.ABI-tag section anymore (#26663)</li> +</ul> + +<p>Alan Hourihane (3):</p> +<ul> + <li>Add missing GL_TEXTURE_CUBE_MAP entry in _mesa_legal_texture_dimensions</li> + <li>Unreference sampler object when it's currently bound to texture unit.</li> + <li>mesa: fix glGetInteger*(GL_SAMPLER_BINDING).</li> +</ul> + +<p>Alex Deucher (1):</p> +<ul> + <li>r600g: disable hyperz by default on 9.1</li> +</ul> + +<p>Andreas Boll (5):</p> +<ul> + <li>radeon/llvm: Link against libgallium.la to fix an undefined symbol</li> + <li>mesa: use ieee fp on s390 and m68k</li> + <li>build: Enable x86 assembler on Hurd.</li> + <li>osmesa: fix out-of-tree build</li> + <li>gallium/egl: fix out-of-tree build</li> +</ul> + +<p>Anuj Phogat (1):</p> +<ul> + <li>mesa: Fix FB blitting in case of zero size src or dst rect</li> +</ul> + +<p>Brian Paul (4):</p> +<ul> + <li>mesa: flush current state when querying GL_EDGE_FLAG</li> + <li>vbo: fix crash found with shared display lists</li> + <li>llvmpipe: tweak CMD_BLOCK_MAX and LP_SCENE_MAX_SIZE</li> + <li>llvmpipe: add some scene limit sanity check assertions</li> +</ul> + +<p>Carl Worth (1):</p> +<ul> + <li>i965: Avoid segfault in gen6_upload_state</li> +</ul> + +<p>Chris Forbes (1):</p> +<ul> + <li>i965/vs: Fix Gen4/5 VUE map inconsistency with gl_ClipVertex</li> +</ul> + +<p>Christoph Bumiller (4):</p> +<ul> + <li>nv50: fix 3D render target setup</li> + <li>nv50,nvc0: disable DEPTH_RANGE_NEAR/FAR clipping during blit</li> + <li>nv50,nvc0: fix 3d blits, restore viewport after blit</li> + <li>nvc0: fix for 2d engine R source formats writing RRR1 and not R001</li> +</ul> + +<p>Eric Anholt (5):</p> +<ul> + <li>i965/fs: Fix register allocation for uniform pull constants in 16-wide.</li> + <li>i965/fs: Fix broken rendering in large shaders with UBO loads.</li> + <li>i965/fs: Also do the gen4 SEND dependency workaround against other SENDs.</li> + <li>i965: Add definitions for gen7+ data cache messages.</li> + <li>mesa: Disable validate_ir_tree() on release builds.</li> +</ul> + +<p>Ian Romanick (5):</p> +<ul> + <li>docs: Add 9.1.1 release md5sums</li> + <li>mesa: Add previously picked commit to .cherry-ignore</li> + <li>glsl: Add missing bool case in glsl_type::get_scalar_type</li> + <li>mesa: Note that patch dbf94d1 should't actually get picked to the 9.1 branch</li> + <li>mesa: Bump version to 9.1.2</li> +</ul> + +<p>Jan de Groot (1):</p> +<ul> + <li>dri/nouveau: fix crash in nouveau_flush</li> +</ul> + +<p>José Fonseca (3):</p> +<ul> + <li>autotools: Add missing top-level include dir.</li> + <li>mesa,gallium,egl,mapi: One definition of C99 inline/__func__ to rule them all.</li> + <li>include: Fix build with VS 11 (i.e, 2012).</li> +</ul> + +<p>Kenneth Graunke (4):</p> +<ul> + <li>i965: Fix INTEL_DEBUG=shader_time for Haswell.</li> + <li>i965: Specialize SURFACE_STATE creation for shader time.</li> + <li>i965: Make INTEL_DEBUG=shader_time use the RAW surface format.</li> + <li>i965: Don't use texture swizzling to force alpha to 1.0 if unnecessary.</li> +</ul> + +<p>Maarten Lankhorst (2):</p> +<ul> + <li>gallium/build: Fix visibility CFLAGS in automake</li> + <li>radeon/llvm: Do not link against libgallium when building statically.</li> +</ul> + +<p>Marcin Slusarz (1):</p> +<ul> + <li>dri/nouveau: NV17_3D class is not available for NV1a chipset</li> +</ul> + +<p>Marek Olšák (3):</p> +<ul> + <li>mesa: don't allocate a texture if width or height is 0 in CopyTexImage</li> + <li>gallium/tgsi: fix valgrind warning</li> + <li>mesa: handle HALF_FLOAT like FLOAT in get_tex_rgba</li> +</ul> + +<p>Martin Andersson (1):</p> +<ul> + <li>r600g: Use virtual address for PIPE_QUERY_SO* in r600_emit_query_end</li> +</ul> + +<p>Matt Turner (3):</p> +<ul> + <li>configure.ac: Don't check for X11 unconditionally.</li> + <li>configure.ac: Remove stale comment about --x-* arguments.</li> + <li>mesa: Implement TEXTURE_IMMUTABLE_LEVELS for ES 3.0.</li> +</ul> + +<p>Michel Dänzer (1):</p> +<ul> + <li>radeonsi: Emit pixel shader state even when only the vertex shader changed</li> +</ul> + +<p>Paul Berry (1):</p> +<ul> + <li>i965: Apply depthstencil alignment workaround when doing fast clears.</li> +</ul> + +<p>Roland Scheidegger (1):</p> +<ul> + <li>gallivm: fix return opcode handling in main function of a shader</li> +</ul> + +<p>Tapani Pälli (1):</p> +<ul> + <li>intel: Fix regression in intel_create_image_from_name stride handling</li> +</ul> + +<p>Tom Stellard (1):</p> +<ul> + <li>r300g: Fix bug in OMOD optimization</li> +</ul> + +</div> +</body> +</html> diff --git a/docs/relnotes-9.1.3.html b/docs/relnotes-9.1.3.html new file mode 100644 index 0000000000..cff9370bce --- /dev/null +++ b/docs/relnotes-9.1.3.html @@ -0,0 +1,228 @@ +<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd"> +<html lang="en"> +<head> + <meta http-equiv="content-type" content="text/html; charset=utf-8"> + <title>Mesa Release Notes</title> + <link rel="stylesheet" type="text/css" href="mesa.css"> +</head> +<body> + +<div class="header"> + <h1>The Mesa 3D Graphics Library</h1> +</div> + +<iframe src="contents.html"></iframe> +<div class="content"> + +<h1>Mesa 9.1.3 Release Notes / May 21st, 2013</h1> + +<p> +Mesa 9.1.3 is a bug fix release which fixes bugs found since the 9.1.1 release. +</p> +<p> +Mesa 9.1 implements the OpenGL 3.1 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 3.1. OpenGL +3.1 is <strong>only</strong> available if requested at context creation +because GL_ARB_compatibility is not supported. +</p> + +<h2>MD5 checksums</h2> +<pre> +TBD +</pre> + +<h2>New features</h2> +<p>None.</p> + +<h2>Bug fixes</h2> + +<p>This list is likely incomplete.</p> + +<ul> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=39251">Bug 39251</a> - Second Life viewers from release 2.7.4.235167 to the last 3.4.0.264911 crash on start.</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=47478">Bug 47478</a> - [wine] GLX_DONT_CARE does not work for GLX_DRAWABLE_TYPE or GLX_RENDER_TYPE</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=56416">Bug 56416</a> - [SNB bisected] SNB hang with rc6 and hiz on glxgears (and other GL apps) immediately after xinit.</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=57436">Bug 57436</a> - [GLSL1.40 IVB/HSW]Piglit spec/glsl-1.40/compiler_built-in-functions/inverse-mat2.frag fails</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=61554">Bug 61554</a> - [ivb] Mesa 9.1 performance regression on KWin's Lanczos shader</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=61773">Bug 61773</a> - abort is an incredibly not-smart way to handle IR validation</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=62868">Bug 62868</a> - solaris build broken with missing ffsll</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=62999">Bug 62999</a> - glXChooseFBConfig with GLX_DRAWABLE_TYPE, GLX_DONT_CARE fails</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=63078">Bug 63078</a> - EGL X11 Regression: Maximum swap interval is 0 (worked with 9.0)</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=63447">Bug 63447</a> - [i965 Bisected]Ogles1conform/Ogles2conform/Ogles3conform cases segfault</li> + +<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=64662">Bug 64662</a> - [SNB 9.1 Bisected]Ogles2conform GL2ExtensionTests/depth_texture_cube_map/depth_texture_cube_map.test fail</li> + +</ul> + +<h2>Changes</h2> +<p>The full set of changes can be viewed by using the following GIT command:</p> + +<pre> + git log mesa-9.1.2..mesa-9.1.3 +</pre> + +<p>Alex Deucher (2):</p> +<ul> + <li>r600g: add new richland pci ids</li> + <li>radeonsi: add new SI pci ids</li> +</ul> + +<p>Alexander Monakov (1):</p> +<ul> + <li>Honor GLX_DONT_CARE in MATCH_MASK</li> +</ul> + +<p>Andreas Boll (2):</p> +<ul> + <li>mesa: Add a script to generate the list of fixed bugs</li> + <li>mesa: add usage examples to get-pick-list and shortlog scripts</li> +</ul> + +<p>Aras Pranckevicius (1):</p> +<ul> + <li>GLSL: fix lower_jumps to report progress properly</li> +</ul> + +<p>Brian Paul (3):</p> +<ul> + <li>mesa: remove platform checks around __builtin_ffs, __builtin_ffsll</li> + <li>gallium/u_blitter: fix is_blit_generic_supported() stencil checking</li> + <li>mesa: enable GL_ARB_texture_float if TEXTURE_FLOAT_ENABLED is defined</li> +</ul> + +<p>Chad Versace (2):</p> +<ul> + <li>egl/dri2: Fix min/max swap interval of configs</li> + <li>intel: Allocate hiz in intel_renderbuffer_move_to_temp()</li> +</ul> + +<p>Chris Forbes (2):</p> +<ul> + <li>i965/fs: Don't try to use bogus interpolation modes pre-Gen6.</li> + <li>mesa: don't memcmp() off the end of a cache key.</li> +</ul> + +<p>Dave Airlie (2):</p> +<ul> + <li>st/mesa: fix UBO offsets.</li> + <li>ralloc: don't write to memory in case of alloc fail.</li> +</ul> + +<p>Eric Anholt (11):</p> +<ul> + <li>i965/fs: Remove creation of a MOV instruction that's never used.</li> + <li>i965/fs: Move varying uniform offset compuation into the helper func.</li> + <li>i965: Make the constant surface interface take a normal byte size.</li> + <li>i965/fs: Avoid inappropriate optimization with regs_written > 1.</li> + <li>i965/fs: Do CSE on gen7's varying-index pull constant loads.</li> + <li>i965/fs: Clean up the setup of gen4 simd16 message destinations.</li> + <li>i965/gen7: Skip resetting SOL offsets at batch start with HW contexts.</li> + <li>i965/gen6: Reduce updates of transform feedback offsets with HW contexts.</li> + <li>i965: Fix SNB GPU hangs when a blorp batch is the first thing to execute.</li> + <li>i965: Fix hangs on HSW since the gen6 blorp fix.</li> + <li>i965: Disable write masking when setting up texturing m0.</li> +</ul> + +<p>Haixia Shi (1):</p> +<ul> + <li>ACTIVE_UNIFORM_MAX_LENGTH should include 3 extra characters for arrays.</li> +</ul> + +<p>Ian Romanick (11):</p> +<ul> + <li>docs: Add 9.1.2 release md5sums</li> + <li>mesa: Note that patch 0967c36 shouldn't actually get picked to the 9.1 branch</li> + <li>mesa: NULL check the pointer before trying to dereference it</li> + <li>egl/dri2: NULL check value returned by dri2_create_surface</li> + <li>mesa: Don't leak shared state when context initialization fails</li> + <li>mesa: Don't leak gl_context::BeginEnd at context destruction</li> + <li>mesa/swrast: Refactor no-memory error checking in blit_linear</li> + <li>mesa/swrast: Move free calls outside the attachment loop</li> + <li>intel: Don't dereference a NULL pointer of calloc fails</li> + <li>mesa: Note that a824692 is already back ported</li> + <li>mesa: Bump version to 9.1.3</li> +</ul> + +<p>José Fonseca (1):</p> +<ul> + <li>winsys/sw/xlib: Prevent shared memory segment leakage.</li> +</ul> + +<p>Kenneth Graunke (9):</p> +<ul> + <li>mesa: Add new ctx->Stencil._WriteEnabled derived state flag.</li> + <li>i965: Fix stencil write enable flag in 3DSTATE_DEPTH_BUFFER on Gen7+.</li> + <li>mesa: Fix unpack function for ETC2_SRGB8_PUNCHTHROUGH_ALPHA1.</li> + <li>mesa: Add an unpack function for ARGB2101010_UINT.</li> + <li>mesa: Add unpack functions for R/RG/RGB [U]INT8/16/32 formats.</li> + <li>mesa: Add unpack functions for A/I/L/LA [U]INT8/16/32 formats.</li> + <li>glsl: Ignore redundant prototypes after a function's been defined.</li> + <li>i965: Lower textureGrad() for samplerCubeShadow.</li> + <li>i965/vs: Fix textureGrad() with shadow samplers on Haswell.</li> +</ul> + +<p>Maarten Lankhorst (1):</p> +<ul> + <li>nvc0: Fix fd leak in nvc0_create_decoder</li> +</ul> + +<p>Marek Olšák (5):</p> +<ul> + <li>radeonsi: add more cases for copying unsupported formats to resource_copy_region</li> + <li>mesa: fix glGet queries depending on derived framebuffer state (v2)</li> + <li>gallium/u_blitter: implement buffer clearing</li> + <li>r600g: initialize CMASK and HTILE with the GPU using streamout</li> + <li>st/mesa: depth-stencil-alpha state also depends on _NEW_BUFFERS</li> +</ul> + +<p>Martin Andersson (1):</p> +<ul> + <li>r600g: Fix UMAD on Cayman</li> +</ul> + +<p>Michel Dänzer (1):</p> +<ul> + <li>radeonsi: Handle arbitrary 2-byte formats in resource_copy_region</li> +</ul> + +<p>Paul Berry (7):</p> +<ul> + <li>glsl: Fix array indexing when constant folding built-in functions.</li> + <li>i965: Reduce code duplication in handling of depth, stencil, and HiZ.</li> + <li>glsl/linker: fix varying packing for non-flat integer varyings.</li> + <li>glsl: Document lower_packed_varyings' "flat" requirement with an assert.</li> + <li>glsl/linker: Adapt flat varying handling in preparation for geometry shaders.</li> + <li>glsl/linker: Reduce scope of non-flat integer varying fix.</li> + <li>intel: Do a depth resolve before copying images between miptrees.</li> +</ul> + +<p>Ralf Jung (1):</p> +<ul> + <li>egl/x11: Fix initialisation of swap_interval</li> +</ul> + +<p>Roland Scheidegger (1):</p> +<ul> + <li>gallivm: fix small but severe bug in handling multiple lod level strides</li> +</ul> + +<p>Vadim Girlin (1):</p> +<ul> + <li>gallium: handle drirc disable_glsl_line_continuations option</li> +</ul> + +</div> +</body> +</html> diff --git a/include/c99_compat.h b/include/c99_compat.h new file mode 100644 index 0000000000..3a9f502a7e --- /dev/null +++ b/include/c99_compat.h @@ -0,0 +1,147 @@ +/************************************************************************** + * + * Copyright 2007-2013 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#ifndef _C99_COMPAT_H_ +#define _C99_COMPAT_H_ + + +/* + * MSVC hacks. + */ +#if defined(_MSC_VER) + /* + * Visual Studio 2012 will complain if we define the `inline` keyword, but + * actually it only supports the keyword on C++. + * + * We could skip this check by defining _ALLOW_KEYWORD_MACROS, but there is + * probably value in checking this for other keywords. So simply include + * the checking before we define it below. + */ +# if _MSC_VER >= 1700 +# include <xkeycheck.h> +# endif + + /* + * XXX: MSVC has a `__restrict` keyword, but it also has a + * `__declspec(restrict)` modifier, so it is impossible to define a + * `restrict` macro without interfering with the latter. Furthermore the + * MSVC standard library uses __declspec(restrict) under the _CRTRESTRICT + * macro. For now resolve this issue by redefining _CRTRESTRICT, but going + * forward we should probably should stop using restrict, especially + * considering that our code does not obbey strict aliasing rules any way. + */ +# include <crtdefs.h> +# undef _CRTRESTRICT +# define _CRTRESTRICT +#endif + + +/* + * C99 inline keyword + */ +#ifndef inline +# ifdef __cplusplus + /* C++ supports inline keyword */ +# elif defined(__GNUC__) +# define inline __inline__ +# elif defined(_MSC_VER) +# define inline __inline +# elif defined(__ICL) +# define inline __inline +# elif defined(__INTEL_COMPILER) + /* Intel compiler supports inline keyword */ +# elif defined(__WATCOMC__) && (__WATCOMC__ >= 1100) +# define inline __inline +# elif defined(__SUNPRO_C) && defined(__C99FEATURES__) + /* C99 supports inline keyword */ +# elif (__STDC_VERSION__ >= 199901L) + /* C99 supports inline keyword */ +# else +# define inline +# endif +#endif + + +/* + * C99 restrict keyword + * + * See also: + * - http://cellperformance.beyond3d.com/articles/2006/05/demystifying-the-restrict-keyword.html + */ +#ifndef restrict +# if (__STDC_VERSION__ >= 199901L) + /* C99 */ +# elif defined(__SUNPRO_C) && defined(__C99FEATURES__) + /* C99 */ +# elif defined(__GNUC__) +# define restrict __restrict__ +# elif defined(_MSC_VER) +# define restrict __restrict +# else +# define restrict /* */ +# endif +#endif + + +/* + * C99 __func__ macro + */ +#ifndef __func__ +# if (__STDC_VERSION__ >= 199901L) + /* C99 */ +# elif defined(__SUNPRO_C) && defined(__C99FEATURES__) + /* C99 */ +# elif defined(__GNUC__) +# if __GNUC__ >= 2 +# define __func__ __FUNCTION__ +# else +# define __func__ "<unknown>" +# endif +# elif defined(_MSC_VER) +# if _MSC_VER >= 1300 +# define __func__ __FUNCTION__ +# else +# define __func__ "<unknown>" +# endif +# else +# define __func__ "<unknown>" +# endif +#endif + + +/* Simple test case for debugging */ +#if 0 +static inline const char * +test_c99_compat_h(const void * restrict a, + const void * restrict b) +{ + return __func__; +} +#endif + + +#endif /* _C99_COMPAT_H_ */ diff --git a/include/pci_ids/r600_pci_ids.h b/include/pci_ids/r600_pci_ids.h index 7ceb820ea1..5036a83e2a 100644 --- a/include/pci_ids/r600_pci_ids.h +++ b/include/pci_ids/r600_pci_ids.h @@ -298,6 +298,10 @@ CHIPSET(0x9907, ARUBA_9907, ARUBA) CHIPSET(0x9908, ARUBA_9908, ARUBA) CHIPSET(0x9909, ARUBA_9909, ARUBA) CHIPSET(0x990A, ARUBA_990A, ARUBA) +CHIPSET(0x990B, ARUBA_990B, ARUBA) +CHIPSET(0x990C, ARUBA_990C, ARUBA) +CHIPSET(0x990D, ARUBA_990D, ARUBA) +CHIPSET(0x990E, ARUBA_990E, ARUBA) CHIPSET(0x990F, ARUBA_990F, ARUBA) CHIPSET(0x9910, ARUBA_9910, ARUBA) CHIPSET(0x9913, ARUBA_9913, ARUBA) @@ -309,6 +313,15 @@ CHIPSET(0x9991, ARUBA_9991, ARUBA) CHIPSET(0x9992, ARUBA_9992, ARUBA) CHIPSET(0x9993, ARUBA_9993, ARUBA) CHIPSET(0x9994, ARUBA_9994, ARUBA) +CHIPSET(0x9995, ARUBA_9995, ARUBA) +CHIPSET(0x9996, ARUBA_9996, ARUBA) +CHIPSET(0x9997, ARUBA_9997, ARUBA) +CHIPSET(0x9998, ARUBA_9998, ARUBA) +CHIPSET(0x9999, ARUBA_9999, ARUBA) +CHIPSET(0x999A, ARUBA_999A, ARUBA) +CHIPSET(0x999B, ARUBA_999B, ARUBA) +CHIPSET(0x999C, ARUBA_999C, ARUBA) +CHIPSET(0x999D, ARUBA_999D, ARUBA) CHIPSET(0x99A0, ARUBA_99A0, ARUBA) CHIPSET(0x99A2, ARUBA_99A2, ARUBA) CHIPSET(0x99A4, ARUBA_99A4, ARUBA) diff --git a/include/pci_ids/radeonsi_pci_ids.h b/include/pci_ids/radeonsi_pci_ids.h index 22c96c0826..68d794812b 100644 --- a/include/pci_ids/radeonsi_pci_ids.h +++ b/include/pci_ids/radeonsi_pci_ids.h @@ -28,6 +28,7 @@ CHIPSET(0x684C, PITCAIRN_684C, PITCAIRN) CHIPSET(0x6820, VERDE_6820, VERDE) CHIPSET(0x6821, VERDE_6821, VERDE) +CHIPSET(0x6822, VERDE_6822, VERDE) CHIPSET(0x6823, VERDE_6823, VERDE) CHIPSET(0x6824, VERDE_6824, VERDE) CHIPSET(0x6825, VERDE_6825, VERDE) @@ -35,11 +36,13 @@ CHIPSET(0x6826, VERDE_6826, VERDE) CHIPSET(0x6827, VERDE_6827, VERDE) CHIPSET(0x6828, VERDE_6828, VERDE) CHIPSET(0x6829, VERDE_6829, VERDE) +CHIPSET(0x682A, VERDE_682A, VERDE) CHIPSET(0x682B, VERDE_682B, VERDE) CHIPSET(0x682D, VERDE_682D, VERDE) CHIPSET(0x682F, VERDE_682F, VERDE) CHIPSET(0x6830, VERDE_6830, VERDE) CHIPSET(0x6831, VERDE_6831, VERDE) +CHIPSET(0x6835, VERDE_6835, VERDE) CHIPSET(0x6837, VERDE_6837, VERDE) CHIPSET(0x6838, VERDE_6838, VERDE) CHIPSET(0x6839, VERDE_6839, VERDE) diff --git a/scons/gallium.py b/scons/gallium.py index 4b51b6e7cb..b28be5d896 100755 --- a/scons/gallium.py +++ b/scons/gallium.py @@ -289,6 +289,7 @@ def generate(env): '_CRT_SECURE_NO_DEPRECATE', '_SCL_SECURE_NO_WARNINGS', '_SCL_SECURE_NO_DEPRECATE', + '_ALLOW_KEYWORD_MACROS', ] if env['build'] in ('debug', 'checked'): cppdefines += ['_DEBUG'] @@ -401,6 +402,8 @@ def generate(env): '/Oi', # enable intrinsic functions ] else: + if distutils.version.LooseVersion(env['MSVC_VERSION']) < distutils.version.LooseVersion('11.0'): + print 'scons: warning: Visual Studio versions prior to 2012 are known to produce incorrect code when optimizations are enabled ( https://bugs.freedesktop.org/show_bug.cgi?id=58718 )' ccflags += [ '/O2', # optimize for speed ] diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c index e17d5befbb..0f4e94895c 100644 --- a/src/egl/drivers/dri2/egl_dri2.c +++ b/src/egl/drivers/dri2/egl_dri2.c @@ -221,6 +221,9 @@ dri2_add_config(_EGLDisplay *disp, const __DRIconfig *dri_config, int id, base.RenderableType = disp->ClientAPIs; base.Conformant = disp->ClientAPIs; + base.MinSwapInterval = dri2_dpy->min_swap_interval; + base.MaxSwapInterval = dri2_dpy->max_swap_interval; + if (!_eglValidateConfig(&base, EGL_FALSE)) { _eglLog(_EGL_DEBUG, "DRI2: failed to validate config %d", id); return NULL; @@ -268,9 +271,6 @@ dri2_add_config(_EGLDisplay *disp, const __DRIconfig *dri_config, int id, if (double_buffer) { surface_type &= ~EGL_PIXMAP_BIT; - - conf->base.MinSwapInterval = dri2_dpy->min_swap_interval; - conf->base.MaxSwapInterval = dri2_dpy->max_swap_interval; } conf->base.SurfaceType |= surface_type; diff --git a/src/egl/drivers/dri2/platform_x11.c b/src/egl/drivers/dri2/platform_x11.c index da61cfc749..ccb097f124 100644 --- a/src/egl/drivers/dri2/platform_x11.c +++ b/src/egl/drivers/dri2/platform_x11.c @@ -284,14 +284,15 @@ dri2_create_window_surface(_EGLDriver *drv, _EGLDisplay *disp, surf = dri2_create_surface(drv, disp, EGL_WINDOW_BIT, conf, window, attrib_list); - - /* When we first create the DRI2 drawable, its swap interval on the server - * side is 1. - */ - surf->SwapInterval = 1; - - /* Override that with a driconf-set value. */ - drv->API.SwapInterval(drv, disp, surf, dri2_dpy->default_swap_interval); + if (surf != NULL) { + /* When we first create the DRI2 drawable, its swap interval on the + * server side is 1. + */ + surf->SwapInterval = 1; + + /* Override that with a driconf-set value. */ + drv->API.SwapInterval(drv, disp, surf, dri2_dpy->default_swap_interval); + } return surf; } @@ -1162,6 +1163,8 @@ dri2_initialize_x11_dri2(_EGLDriver *drv, _EGLDisplay *disp) if (!dri2_create_screen(disp)) goto cleanup_fd; + dri2_setup_swap_interval(dri2_dpy); + if (dri2_dpy->conn) { if (!dri2_add_configs_for_visuals(dri2_dpy, disp)) goto cleanup_configs; @@ -1181,8 +1184,6 @@ dri2_initialize_x11_dri2(_EGLDriver *drv, _EGLDisplay *disp) disp->VersionMajor = 1; disp->VersionMinor = 4; - dri2_setup_swap_interval(dri2_dpy); - return EGL_TRUE; cleanup_configs: diff --git a/src/egl/main/eglcompiler.h b/src/egl/main/eglcompiler.h index 98236936c0..2499172a1c 100644 --- a/src/egl/main/eglcompiler.h +++ b/src/egl/main/eglcompiler.h @@ -31,6 +31,9 @@ #define EGLCOMPILER_INCLUDED +#include "c99_compat.h" /* inline, __func__, etc. */ + + /** * Get standard integer types */ @@ -62,30 +65,7 @@ #endif -/** - * Function inlining - */ -#ifndef inline -# ifdef __cplusplus - /* C++ supports inline keyword */ -# elif defined(__GNUC__) -# define inline __inline__ -# elif defined(_MSC_VER) -# define inline __inline -# elif defined(__ICL) -# define inline __inline -# elif defined(__INTEL_COMPILER) - /* Intel compiler supports inline keyword */ -# elif defined(__WATCOMC__) && (__WATCOMC__ >= 1100) -# define inline __inline -# elif defined(__SUNPRO_C) && defined(__C99FEATURES__) - /* C99 supports inline keyword */ -# elif (__STDC_VERSION__ >= 199901L) - /* C99 supports inline keyword */ -# else -# define inline -# endif -#endif +/* XXX: Use standard `inline` keyword instead */ #ifndef INLINE # define INLINE inline #endif @@ -104,21 +84,9 @@ # endif #endif -/** - * The __FUNCTION__ gcc variable is generally only used for debugging. - * If we're not using gcc, define __FUNCTION__ as a cpp symbol here. - * Don't define it if using a newer Windows compiler. - */ +/* XXX: Use standard `__func__` instead */ #ifndef __FUNCTION__ -# if (!defined __GNUC__) && (!defined __xlC__) && \ - (!defined(_MSC_VER) || _MSC_VER < 1300) -# if (__STDC_VERSION__ >= 199901L) /* C99 */ || \ - (defined(__SUNPRO_C) && defined(__C99FEATURES__)) -# define __FUNCTION__ __func__ -# else -# define __FUNCTION__ "<unknown>" -# endif -# endif +# define __FUNCTION__ __func__ #endif #endif /* EGLCOMPILER_INCLUDED */ diff --git a/src/gallium/auxiliary/Makefile.am b/src/gallium/auxiliary/Makefile.am index a4eee4773c..f14279b4f9 100644 --- a/src/gallium/auxiliary/Makefile.am +++ b/src/gallium/auxiliary/Makefile.am @@ -7,7 +7,10 @@ noinst_LTLIBRARIES = libgallium.la AM_CFLAGS = \ -I$(top_srcdir)/src/gallium/auxiliary/util \ - $(GALLIUM_CFLAGS) + $(GALLIUM_CFLAGS) \ + $(VISIBILITY_CFLAGS) + +AM_CXXFLAGS = $(VISIBILITY_CXXFLAGS) libgallium_la_SOURCES = \ $(C_SOURCES) \ @@ -18,7 +21,7 @@ if HAVE_MESA_LLVM AM_CFLAGS += \ $(LLVM_CFLAGS) -AM_CXXFLAGS = \ +AM_CXXFLAGS += \ $(GALLIUM_CFLAGS) \ $(LLVM_CXXFLAGS) diff --git a/src/gallium/auxiliary/gallivm/lp_bld_sample.c b/src/gallium/auxiliary/gallivm/lp_bld_sample.c index 5322397317..4ea14071e8 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_sample.c +++ b/src/gallium/auxiliary/gallivm/lp_bld_sample.c @@ -867,7 +867,7 @@ lp_build_get_level_stride_vec(struct lp_build_sample_context *bld, stride = bld->int_coord_bld.undef; for (i = 0; i < bld->num_lods; i++) { LLVMValueRef indexi = lp_build_const_int32(bld->gallivm, i); - LLVMValueRef indexo = lp_build_const_int32(bld->gallivm, i); + LLVMValueRef indexo = lp_build_const_int32(bld->gallivm, 4 * i); indexes[1] = LLVMBuildExtractElement(builder, level, indexi, ""); stride1 = LLVMBuildGEP(builder, stride_array, indexes, 2, ""); stride1 = LLVMBuildLoad(builder, stride1, ""); diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h index 489884906c..5fb4a11267 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h +++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h @@ -240,6 +240,7 @@ struct lp_exec_mask { struct lp_build_context *bld; boolean has_mask; + boolean ret_in_main; LLVMTypeRef int_vec_type; diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c index 0621fb482c..413a9182c0 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c +++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c @@ -73,6 +73,7 @@ static void lp_exec_mask_init(struct lp_exec_mask *mask, struct lp_build_context mask->bld = bld; mask->has_mask = FALSE; + mask->ret_in_main = FALSE; mask->cond_stack_size = 0; mask->loop_stack_size = 0; mask->call_stack_size = 0; @@ -108,7 +109,7 @@ static void lp_exec_mask_update(struct lp_exec_mask *mask) } else mask->exec_mask = mask->cond_mask; - if (mask->call_stack_size) { + if (mask->call_stack_size || mask->ret_in_main) { mask->exec_mask = LLVMBuildAnd(builder, mask->exec_mask, mask->ret_mask, @@ -117,7 +118,8 @@ static void lp_exec_mask_update(struct lp_exec_mask *mask) mask->has_mask = (mask->cond_stack_size > 0 || mask->loop_stack_size > 0 || - mask->call_stack_size > 0); + mask->call_stack_size > 0 || + mask->ret_in_main); } static void lp_exec_mask_cond_push(struct lp_exec_mask *mask, @@ -348,11 +350,23 @@ static void lp_exec_mask_ret(struct lp_exec_mask *mask, int *pc) LLVMBuilderRef builder = mask->bld->gallivm->builder; LLVMValueRef exec_mask; - if (mask->call_stack_size == 0) { + if (mask->cond_stack_size == 0 && + mask->loop_stack_size == 0 && + mask->call_stack_size == 0) { /* returning from main() */ *pc = -1; return; } + + if (mask->call_stack_size == 0) { + /* + * This requires special handling since we need to ensure + * we don't drop the mask even if we have no call stack + * (e.g. after a ret in a if clause after the endif) + */ + mask->ret_in_main = TRUE; + } + exec_mask = LLVMBuildNot(builder, mask->exec_mask, "ret"); diff --git a/src/gallium/auxiliary/tgsi/tgsi_text.c b/src/gallium/auxiliary/tgsi/tgsi_text.c index 1267e79edb..dc3a5fb0c5 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_text.c +++ b/src/gallium/auxiliary/tgsi/tgsi_text.c @@ -1569,7 +1569,7 @@ tgsi_text_translate( struct tgsi_token *tokens, uint num_tokens ) { - struct translate_ctx ctx; + struct translate_ctx ctx = {0}; ctx.text = text; ctx.cur = text; diff --git a/src/gallium/auxiliary/util/u_blitter.c b/src/gallium/auxiliary/util/u_blitter.c index 95224020c7..fcda494118 100644 --- a/src/gallium/auxiliary/util/u_blitter.c +++ b/src/gallium/auxiliary/util/u_blitter.c @@ -100,7 +100,7 @@ struct blitter_context_priv void *velem_state; void *velem_uint_state; void *velem_sint_state; - void *velem_state_readbuf; + void *velem_state_readbuf[4]; /**< X, XY, XYZ, XYZW */ /* Sampler state. */ void *sampler_state, *sampler_state_linear; @@ -277,9 +277,19 @@ struct blitter_context *util_blitter_create(struct pipe_context *pipe) } if (ctx->has_stream_out) { - velem[0].src_format = PIPE_FORMAT_R32_UINT; - velem[0].vertex_buffer_index = ctx->base.vb_slot; - ctx->velem_state_readbuf = pipe->create_vertex_elements_state(pipe, 1, &velem[0]); + static enum pipe_format formats[4] = { + PIPE_FORMAT_R32_UINT, + PIPE_FORMAT_R32G32_UINT, + PIPE_FORMAT_R32G32B32_UINT, + PIPE_FORMAT_R32G32B32A32_UINT + }; + + for (i = 0; i < 4; i++) { + velem[0].src_format = formats[i]; + velem[0].vertex_buffer_index = ctx->base.vb_slot; + ctx->velem_state_readbuf[i] = + pipe->create_vertex_elements_state(pipe, 1, &velem[0]); + } } /* fragment shaders are created on-demand */ @@ -344,8 +354,11 @@ void util_blitter_destroy(struct blitter_context *blitter) pipe->delete_vertex_elements_state(pipe, ctx->velem_sint_state); pipe->delete_vertex_elements_state(pipe, ctx->velem_uint_state); } - if (ctx->velem_state_readbuf) - pipe->delete_vertex_elements_state(pipe, ctx->velem_state_readbuf); + for (i = 0; i < 4; i++) { + if (ctx->velem_state_readbuf[i]) { + pipe->delete_vertex_elements_state(pipe, ctx->velem_state_readbuf[i]); + } + } for (i = 0; i < PIPE_MAX_TEXTURE_TYPES; i++) { if (ctx->fs_texfetch_col[i]) @@ -1120,18 +1133,17 @@ static boolean is_blit_generic_supported(struct blitter_context *blitter, if (dst) { unsigned bind; - boolean is_stencil; const struct util_format_description *desc = util_format_description(dst_format); - - is_stencil = util_format_has_stencil(desc); + boolean dst_has_stencil = util_format_has_stencil(desc); /* Stencil export must be supported for stencil copy. */ - if ((mask & PIPE_MASK_S) && is_stencil && !ctx->has_stencil_export) { + if ((mask & PIPE_MASK_S) && dst_has_stencil && + !ctx->has_stencil_export) { return FALSE; } - if (is_stencil || util_format_has_depth(desc)) + if (dst_has_stencil || util_format_has_depth(desc)) bind = PIPE_BIND_DEPTH_STENCIL; else bind = PIPE_BIND_RENDER_TARGET; @@ -1153,15 +1165,18 @@ static boolean is_blit_generic_supported(struct blitter_context *blitter, } /* Check stencil sampler support for stencil copy. */ - if (util_format_has_stencil(util_format_description(src_format))) { - enum pipe_format stencil_format = + if (mask & PIPE_MASK_S) { + if (util_format_has_stencil(util_format_description(src_format))) { + enum pipe_format stencil_format = util_format_stencil_only(src_format); - assert(stencil_format != PIPE_FORMAT_NONE); + assert(stencil_format != PIPE_FORMAT_NONE); - if (stencil_format != src_format && - !screen->is_format_supported(screen, stencil_format, src->target, - src->nr_samples, PIPE_BIND_SAMPLER_VIEW)) { - return FALSE; + if (stencil_format != src_format && + !screen->is_format_supported(screen, stencil_format, + src->target, src->nr_samples, + PIPE_BIND_SAMPLER_VIEW)) { + return FALSE; + } } } } @@ -1714,7 +1729,7 @@ void util_blitter_copy_buffer(struct blitter_context *blitter, vb.stride = 4; pipe->set_vertex_buffers(pipe, ctx->base.vb_slot, 1, &vb); - pipe->bind_vertex_elements_state(pipe, ctx->velem_state_readbuf); + pipe->bind_vertex_elements_state(pipe, ctx->velem_state_readbuf[0]); pipe->bind_vs_state(pipe, ctx->vs_pos_only); if (ctx->has_geometry_shader) pipe->bind_gs_state(pipe, NULL); @@ -1731,6 +1746,66 @@ void util_blitter_copy_buffer(struct blitter_context *blitter, pipe_so_target_reference(&so_target, NULL); } +void util_blitter_clear_buffer(struct blitter_context *blitter, + struct pipe_resource *dst, + unsigned offset, unsigned size, + unsigned num_channels, + const union pipe_color_union *clear_value) +{ + struct blitter_context_priv *ctx = (struct blitter_context_priv*)blitter; + struct pipe_context *pipe = ctx->base.pipe; + struct pipe_vertex_buffer vb = {0}; + struct pipe_stream_output_target *so_target; + + assert(num_channels >= 1); + assert(num_channels <= 4); + + /* IMPORTANT: DON'T DO ANY BOUNDS CHECKING HERE! + * + * R600 uses this to initialize texture resources, so width0 might not be + * what you think it is. + */ + + /* Streamout is required. */ + if (!ctx->has_stream_out) { + assert(!"Streamout unsupported in util_blitter_clear_buffer()"); + return; + } + + /* Some alignment is required. */ + if (offset % 4 != 0 || size % 4 != 0) { + assert(!"Bad alignment in util_blitter_clear_buffer()"); + return; + } + + u_upload_data(ctx->upload, 0, num_channels*4, clear_value, + &vb.buffer_offset, &vb.buffer); + vb.stride = 0; + + blitter_set_running_flag(ctx); + blitter_check_saved_vertex_states(ctx); + blitter_disable_render_cond(ctx); + + pipe->set_vertex_buffers(pipe, ctx->base.vb_slot, 1, &vb); + pipe->bind_vertex_elements_state(pipe, + ctx->velem_state_readbuf[num_channels-1]); + pipe->bind_vs_state(pipe, ctx->vs_pos_only); + if (ctx->has_geometry_shader) + pipe->bind_gs_state(pipe, NULL); + pipe->bind_rasterizer_state(pipe, ctx->rs_discard_state); + + so_target = pipe->create_stream_output_target(pipe, dst, offset, size); + pipe->set_stream_output_targets(pipe, 1, &so_target, 0); + + util_draw_arrays(pipe, PIPE_PRIM_POINTS, 0, size / 4); + + blitter_restore_vertex_states(ctx); + blitter_restore_render_cond(ctx); + blitter_unset_running_flag(ctx); + pipe_so_target_reference(&so_target, NULL); + pipe_resource_reference(&vb.buffer, NULL); +} + /* probably radeon specific */ void util_blitter_custom_resolve_color(struct blitter_context *blitter, struct pipe_resource *dst, diff --git a/src/gallium/auxiliary/util/u_blitter.h b/src/gallium/auxiliary/util/u_blitter.h index 20e69ed5b7..19015844ef 100644 --- a/src/gallium/auxiliary/util/u_blitter.h +++ b/src/gallium/auxiliary/util/u_blitter.h @@ -276,7 +276,7 @@ void util_blitter_default_src_texture(struct pipe_sampler_view *src_templ, /** * Copy data from one buffer to another using the Stream Output functionality. - * Some alignment is required, otherwise software fallback is used. + * 4-byte alignment is required, otherwise software fallback is used. */ void util_blitter_copy_buffer(struct blitter_context *blitter, struct pipe_resource *dst, @@ -286,6 +286,22 @@ void util_blitter_copy_buffer(struct blitter_context *blitter, unsigned size); /** + * Clear the contents of a buffer using the Stream Output functionality. + * 4-byte alignment is required. + * + * "num_channels" can be 1, 2, 3, or 4, and specifies if the clear value is + * R, RG, RGB, or RGBA. + * + * For each element, only "num_channels" components of "clear_value" are + * copied to the buffer, then the offset is incremented by num_channels*4. + */ +void util_blitter_clear_buffer(struct blitter_context *blitter, + struct pipe_resource *dst, + unsigned offset, unsigned size, + unsigned num_channels, + const union pipe_color_union *clear_value); + +/** * Clear a region of a (color) surface to a constant value. * * These states must be saved in the blitter in addition to the state objects diff --git a/src/gallium/drivers/Makefile.am b/src/gallium/drivers/Makefile.am index 25d9533c94..3477feef05 100644 --- a/src/gallium/drivers/Makefile.am +++ b/src/gallium/drivers/Makefile.am @@ -1,6 +1,7 @@ AUTOMAKE_OPTIONS = subdir-objects AM_CPPFLAGS = \ + -I$(top_srcdir)/include \ -I$(top_srcdir)/src/gallium/include \ -I$(top_srcdir)/src/gallium/auxiliary \ -I$(top_srcdir)/src/gallium/drivers \ diff --git a/src/gallium/drivers/llvmpipe/lp_scene.c b/src/gallium/drivers/llvmpipe/lp_scene.c index 328c0f7457..e14539188d 100644 --- a/src/gallium/drivers/llvmpipe/lp_scene.c +++ b/src/gallium/drivers/llvmpipe/lp_scene.c @@ -64,6 +64,28 @@ lp_scene_create( struct pipe_context *pipe ) pipe_mutex_init(scene->mutex); +#ifdef DEBUG + /* Do some scene limit sanity checks here */ + { + size_t maxBins = TILES_X * TILES_Y; + size_t maxCommandBytes = sizeof(struct cmd_block) * maxBins; + size_t maxCommandPlusData = maxCommandBytes + DATA_BLOCK_SIZE; + /* We'll need at least one command block per bin. Make sure that's + * less than the max allowed scene size. + */ + assert(maxCommandBytes < LP_SCENE_MAX_SIZE); + /* We'll also need space for at least one other data block */ + assert(maxCommandPlusData <= LP_SCENE_MAX_SIZE); + + /* Ideally, the size of a cmd_block object will be a power of two + * in order to avoid wasting space when we allocation them from + * data blocks (which are power of two also). + */ + assert(sizeof(struct cmd_block) == + util_next_power_of_two(sizeof(struct cmd_block))); + } +#endif + return scene; } diff --git a/src/gallium/drivers/llvmpipe/lp_scene.h b/src/gallium/drivers/llvmpipe/lp_scene.h index b1db61bd5a..801829d93d 100644 --- a/src/gallium/drivers/llvmpipe/lp_scene.h +++ b/src/gallium/drivers/llvmpipe/lp_scene.h @@ -49,12 +49,18 @@ struct lp_rast_state; #define TILES_Y (LP_MAX_HEIGHT / TILE_SIZE) -#define CMD_BLOCK_MAX 128 +/* Commands per command block (ideally so sizeof(cmd_block) is a power of + * two in size.) + */ +#define CMD_BLOCK_MAX 29 + +/* Bytes per data block. + */ #define DATA_BLOCK_SIZE (64 * 1024) /* Scene temporary storage is clamped to this size: */ -#define LP_SCENE_MAX_SIZE (4*1024*1024) +#define LP_SCENE_MAX_SIZE (9*1024*1024) /* The maximum amount of texture storage referenced by a scene is * clamped ot this size: diff --git a/src/gallium/drivers/nv50/nv50_blit.h b/src/gallium/drivers/nv50/nv50_blit.h index d409f21f61..bdd6a63d1f 100644 --- a/src/gallium/drivers/nv50/nv50_blit.h +++ b/src/gallium/drivers/nv50/nv50_blit.h @@ -180,4 +180,44 @@ nv50_blit_eng2d_get_mask(const struct pipe_blit_info *info) return mask; } +#if NOUVEAU_DRIVER == 0xc0 +# define nv50_format_table nvc0_format_table +#endif + +/* return TRUE for formats that can be converted among each other by NVC0_2D */ +static INLINE boolean +nv50_2d_dst_format_faithful(enum pipe_format format) +{ + const uint64_t mask = + NV50_ENG2D_SUPPORTED_FORMATS & + ~NV50_ENG2D_NOCONVERT_FORMATS; + uint8_t id = nv50_format_table[format].rt; + return (id >= 0xc0) && (mask & (1ULL << (id - 0xc0))); +} +static INLINE boolean +nv50_2d_src_format_faithful(enum pipe_format format) +{ + const uint64_t mask = + NV50_ENG2D_SUPPORTED_FORMATS & + ~(NV50_ENG2D_LUMINANCE_FORMATS | NV50_ENG2D_INTENSITY_FORMATS); + uint8_t id = nv50_format_table[format].rt; + return (id >= 0xc0) && (mask & (1ULL << (id - 0xc0))); +} + +static INLINE boolean +nv50_2d_format_supported(enum pipe_format format) +{ + uint8_t id = nv50_format_table[format].rt; + return (id >= 0xc0) && + (NV50_ENG2D_SUPPORTED_FORMATS & (1ULL << (id - 0xc0))); +} + +static INLINE boolean +nv50_2d_dst_format_ops_supported(enum pipe_format format) +{ + uint8_t id = nv50_format_table[format].rt; + return (id >= 0xc0) && + (NV50_ENG2D_OPERATION_FORMATS & (1ULL << (id - 0xc0))); +} + #endif /* __NV50_BLIT_H__ */ diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c index a95e96d3c5..f5e7b36809 100644 --- a/src/gallium/drivers/nv50/nv50_state_validate.c +++ b/src/gallium/drivers/nv50/nv50_state_validate.c @@ -9,6 +9,7 @@ nv50_validate_fb(struct nv50_context *nv50) struct pipe_framebuffer_state *fb = &nv50->framebuffer; unsigned i; unsigned ms_mode = NV50_3D_MULTISAMPLE_MODE_MS1; + uint32_t array_size = 0xffff, array_mode = 0; nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_FB); @@ -23,6 +24,13 @@ nv50_validate_fb(struct nv50_context *nv50) struct nv50_surface *sf = nv50_surface(fb->cbufs[i]); struct nouveau_bo *bo = mt->base.bo; + array_size = MIN2(array_size, sf->depth); + if (mt->layout_3d) + array_mode = NV50_3D_RT_ARRAY_MODE_MODE_3D; /* 1 << 16 */ + + /* can't mix 3D with ARRAY or have RTs of different depth/array_size */ + assert(mt->layout_3d || !array_mode || array_size == 1); + BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(i)), 5); PUSH_DATAh(push, bo->offset + sf->offset); PUSH_DATA (push, bo->offset + sf->offset); @@ -34,7 +42,7 @@ nv50_validate_fb(struct nv50_context *nv50) PUSH_DATA (push, sf->width); PUSH_DATA (push, sf->height); BEGIN_NV04(push, NV50_3D(RT_ARRAY_MODE), 1); - PUSH_DATA (push, sf->depth); + PUSH_DATA (push, array_mode | array_size); } else { PUSH_DATA (push, 0); PUSH_DATA (push, 0); @@ -63,7 +71,7 @@ nv50_validate_fb(struct nv50_context *nv50) struct nv50_miptree *mt = nv50_miptree(fb->zsbuf->texture); struct nv50_surface *sf = nv50_surface(fb->zsbuf); struct nouveau_bo *bo = mt->base.bo; - int unk = mt->base.base.target == PIPE_TEXTURE_2D; + int unk = mt->base.base.target == PIPE_TEXTURE_3D || sf->depth == 1; BEGIN_NV04(push, NV50_3D(ZETA_ADDRESS_HIGH), 5); PUSH_DATAh(push, bo->offset + sf->offset); diff --git a/src/gallium/drivers/nv50/nv50_surface.c b/src/gallium/drivers/nv50/nv50_surface.c index 7a0470c429..3a780f6e2c 100644 --- a/src/gallium/drivers/nv50/nv50_surface.c +++ b/src/gallium/drivers/nv50/nv50_surface.c @@ -35,25 +35,22 @@ #include "nv50_context.h" #include "nv50_resource.h" -#include "nv50_blit.h" #include "nv50_defs.xml.h" #include "nv50_texture.xml.h" +/* these are used in nv50_blit.h */ #define NV50_ENG2D_SUPPORTED_FORMATS 0xff0843e080608409ULL +#define NV50_ENG2D_NOCONVERT_FORMATS 0x0008402000000000ULL +#define NV50_ENG2D_LUMINANCE_FORMATS 0x0008402000000000ULL +#define NV50_ENG2D_INTENSITY_FORMATS 0x0000000000000000ULL +#define NV50_ENG2D_OPERATION_FORMATS 0x060001c000608000ULL -/* return TRUE for formats that can be converted among each other by NV50_2D */ -static INLINE boolean -nv50_2d_format_faithful(enum pipe_format format) -{ - uint8_t id = nv50_format_table[format].rt; - - return (id >= 0xc0) && - (NV50_ENG2D_SUPPORTED_FORMATS & (1ULL << (id - 0xc0))); -} +#define NOUVEAU_DRIVER 0x50 +#include "nv50_blit.h" static INLINE uint8_t -nv50_2d_format(enum pipe_format format) +nv50_2d_format(enum pipe_format format, boolean dst, boolean dst_src_equal) { uint8_t id = nv50_format_table[format].rt; @@ -62,6 +59,7 @@ nv50_2d_format(enum pipe_format format) */ if ((id >= 0xc0) && (NV50_ENG2D_SUPPORTED_FORMATS & (1ULL << (id - 0xc0)))) return id; + assert(dst_src_equal); switch (util_format_get_blocksize(format)) { case 1: @@ -78,7 +76,7 @@ nv50_2d_format(enum pipe_format format) static int nv50_2d_texture_set(struct nouveau_pushbuf *push, int dst, struct nv50_miptree *mt, unsigned level, unsigned layer, - enum pipe_format pformat) + enum pipe_format pformat, boolean dst_src_pformat_equal) { struct nouveau_bo *bo = mt->base.bo; uint32_t width, height, depth; @@ -86,7 +84,7 @@ nv50_2d_texture_set(struct nouveau_pushbuf *push, int dst, uint32_t mthd = dst ? NV50_2D_DST_FORMAT : NV50_2D_SRC_FORMAT; uint32_t offset = mt->level[level].offset; - format = nv50_2d_format(pformat); + format = nv50_2d_format(pformat, dst, dst_src_pformat_equal); if (!format) { NOUVEAU_ERR("invalid/unsupported surface format: %s\n", util_format_name(pformat)); @@ -155,15 +153,16 @@ nv50_2d_texture_do_copy(struct nouveau_pushbuf *push, const enum pipe_format dfmt = dst->base.base.format; const enum pipe_format sfmt = src->base.base.format; int ret; + boolean eqfmt = dfmt == sfmt; if (!PUSH_SPACE(push, 2 * 16 + 32)) return PIPE_ERROR; - ret = nv50_2d_texture_set(push, 1, dst, dst_level, dz, dfmt); + ret = nv50_2d_texture_set(push, 1, dst, dst_level, dz, dfmt, eqfmt); if (ret) return ret; - ret = nv50_2d_texture_set(push, 0, src, src_level, sz, sfmt); + ret = nv50_2d_texture_set(push, 0, src, src_level, sz, sfmt, eqfmt); if (ret) return ret; @@ -243,8 +242,8 @@ nv50_resource_copy_region(struct pipe_context *pipe, } assert((src->format == dst->format) || - (nv50_2d_format_faithful(src->format) && - nv50_2d_format_faithful(dst->format))); + (nv50_2d_src_format_faithful(src->format) && + nv50_2d_dst_format_faithful(dst->format))); BCTX_REFN(nv50->bufctx, 2D, nv04_resource(src), RD); BCTX_REFN(nv50->bufctx, 2D, nv04_resource(dst), WR); @@ -936,7 +935,7 @@ nv50_blit_3d(struct nv50_context *nv50, const struct pipe_blit_info *info) nv50_blit_select_fp(blit, info); nv50_blitctx_pre_blit(blit); - nv50_blit_set_dst(blit, dst, info->dst.level, 0, info->dst.format); + nv50_blit_set_dst(blit, dst, info->dst.level, -1, info->dst.format); nv50_blit_set_src(blit, src, info->src.level, -1, info->src.format, blit->filter); @@ -977,6 +976,8 @@ nv50_blit_3d(struct nv50_context *nv50, const struct pipe_blit_info *info) BEGIN_NV04(push, NV50_3D(VIEWPORT_TRANSFORM_EN), 1); PUSH_DATA (push, 0); + BEGIN_NV04(push, NV50_3D(VIEW_VOLUME_CLIP_CTRL), 1); + PUSH_DATA (push, 0x1); /* Draw a large triangle in screen coordinates covering the whole * render target, with scissors defining the destination region. @@ -1059,7 +1060,8 @@ nv50_blit_eng2d(struct nv50_context *nv50, const struct pipe_blit_info *info) int64_t du_dx, dv_dy; int i; uint32_t mode; - const uint32_t mask = nv50_blit_eng2d_get_mask(info); + uint32_t mask = nv50_blit_eng2d_get_mask(info); + boolean b; mode = nv50_blit_get_filter(info) ? NV50_2D_BLIT_CONTROL_FILTER_BILINEAR : @@ -1070,8 +1072,9 @@ nv50_blit_eng2d(struct nv50_context *nv50, const struct pipe_blit_info *info) du_dx = ((int64_t)info->src.box.width << 32) / info->dst.box.width; dv_dy = ((int64_t)info->src.box.height << 32) / info->dst.box.height; - nv50_2d_texture_set(push, 1, dst, info->dst.level, dz, info->dst.format); - nv50_2d_texture_set(push, 0, src, info->src.level, sz, info->src.format); + b = info->dst.format == info->src.format; + nv50_2d_texture_set(push, 1, dst, info->dst.level, dz, info->dst.format, b); + nv50_2d_texture_set(push, 0, src, info->src.level, sz, info->src.format, b); if (info->scissor_enable) { BEGIN_NV04(push, NV50_2D(CLIP_X), 5); @@ -1094,6 +1097,17 @@ nv50_blit_eng2d(struct nv50_context *nv50, const struct pipe_blit_info *info) PUSH_DATA (push, 0xffffffff); BEGIN_NV04(push, NV50_2D(OPERATION), 1); PUSH_DATA (push, NV50_2D_OPERATION_ROP); + } else + if (info->src.format != info->dst.format) { + if (info->src.format == PIPE_FORMAT_R8_UNORM || + info->src.format == PIPE_FORMAT_R16_UNORM || + info->src.format == PIPE_FORMAT_R16_FLOAT || + info->src.format == PIPE_FORMAT_R32_FLOAT) { + mask = 0xffff0000; /* also makes condition for OPERATION reset true */ + BEGIN_NV04(push, NV50_2D(BETA4), 2); + PUSH_DATA (push, mask); + PUSH_DATA (push, NV50_2D_OPERATION_SRCCOPY_PREMULT); + } } if (src->ms_x > dst->ms_x || src->ms_y > dst->ms_y) { @@ -1224,10 +1238,25 @@ nv50_blit(struct pipe_context *pipe, const struct pipe_blit_info *info) debug_printf("blit: cannot filter array or cube textures in z direction"); } - if (!eng3d && info->dst.format != info->src.format) - if (!nv50_2d_format_faithful(info->dst.format) || - !nv50_2d_format_faithful(info->src.format)) + if (!eng3d && info->dst.format != info->src.format) { + if (!nv50_2d_dst_format_faithful(info->dst.format) || + !nv50_2d_src_format_faithful(info->src.format)) { eng3d = TRUE; + } else + if (!nv50_2d_src_format_faithful(info->src.format)) { + if (!util_format_is_luminance(info->src.format)) { + if (util_format_is_intensity(info->src.format)) + eng3d = TRUE; + else + if (!nv50_2d_dst_format_ops_supported(info->dst.format)) + eng3d = TRUE; + else + eng3d = !nv50_2d_format_supported(info->src.format); + } + } else + if (util_format_is_luminance_alpha(info->src.format)) + eng3d = TRUE; + } if (info->src.resource->nr_samples == 8 && info->dst.resource->nr_samples <= 1) diff --git a/src/gallium/drivers/nvc0/nvc0_3d.xml.h b/src/gallium/drivers/nvc0/nvc0_3d.xml.h index 1cf1f96569..bd3de58a05 100644 --- a/src/gallium/drivers/nvc0/nvc0_3d.xml.h +++ b/src/gallium/drivers/nvc0/nvc0_3d.xml.h @@ -1041,7 +1041,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_3D_VIEWPORT_TRANSFORM_EN 0x0000192c #define NVC0_3D_VIEW_VOLUME_CLIP_CTRL 0x0000193c -#define NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK0 0x00000001 +#define NVC0_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_RANGE_0_1 0x00000001 #define NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK1__MASK 0x00000006 #define NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK1__SHIFT 1 #define NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK1_UNK0 0x00000000 diff --git a/src/gallium/drivers/nvc0/nvc0_surface.c b/src/gallium/drivers/nvc0/nvc0_surface.c index 281d740b21..66154a45f5 100644 --- a/src/gallium/drivers/nvc0/nvc0_surface.c +++ b/src/gallium/drivers/nvc0/nvc0_surface.c @@ -36,29 +36,32 @@ #include "nv50/nv50_defs.xml.h" #include "nv50/nv50_texture.xml.h" -#include "nv50/nv50_blit.h" -#define NVC0_ENG2D_SUPPORTED_FORMATS 0xff9ccfe1cce3ccc9ULL +/* these are used in nv50_blit.h */ +#define NV50_ENG2D_SUPPORTED_FORMATS 0xff9ccfe1cce3ccc9ULL +#define NV50_ENG2D_NOCONVERT_FORMATS 0x009cc02000000000ULL +#define NV50_ENG2D_LUMINANCE_FORMATS 0x001cc02000000000ULL +#define NV50_ENG2D_INTENSITY_FORMATS 0x0080000000000000ULL +#define NV50_ENG2D_OPERATION_FORMATS 0x060001c000638000ULL -/* return TRUE for formats that can be converted among each other by NVC0_2D */ -static INLINE boolean -nvc0_2d_format_faithful(enum pipe_format format) -{ - uint8_t id = nvc0_format_table[format].rt; - - return (id >= 0xc0) && (NVC0_ENG2D_SUPPORTED_FORMATS & (1ULL << (id - 0xc0))); -} +#define NOUVEAU_DRIVER 0xc0 +#include "nv50/nv50_blit.h" static INLINE uint8_t -nvc0_2d_format(enum pipe_format format) +nvc0_2d_format(enum pipe_format format, boolean dst, boolean dst_src_equal) { uint8_t id = nvc0_format_table[format].rt; + /* A8_UNORM is treated as I8_UNORM as far as the 2D engine is concerned. */ + if (!dst && unlikely(format == PIPE_FORMAT_I8_UNORM) && !dst_src_equal) + return NV50_SURFACE_FORMAT_A8_UNORM; + /* Hardware values for color formats range from 0xc0 to 0xff, * but the 2D engine doesn't support all of them. */ - if (nvc0_2d_format_faithful(format)) + if (nv50_2d_format_supported(format)) return id; + assert(dst_src_equal); switch (util_format_get_blocksize(format)) { case 1: @@ -72,6 +75,7 @@ nvc0_2d_format(enum pipe_format format) case 16: return NV50_SURFACE_FORMAT_RGBA32_FLOAT; default: + assert(0); return 0; } } @@ -79,7 +83,7 @@ nvc0_2d_format(enum pipe_format format) static int nvc0_2d_texture_set(struct nouveau_pushbuf *push, boolean dst, struct nv50_miptree *mt, unsigned level, unsigned layer, - enum pipe_format pformat) + enum pipe_format pformat, boolean dst_src_pformat_equal) { struct nouveau_bo *bo = mt->base.bo; uint32_t width, height, depth; @@ -87,7 +91,7 @@ nvc0_2d_texture_set(struct nouveau_pushbuf *push, boolean dst, uint32_t mthd = dst ? NVC0_2D_DST_FORMAT : NVC0_2D_SRC_FORMAT; uint32_t offset = mt->level[level].offset; - format = nvc0_2d_format(pformat); + format = nvc0_2d_format(pformat, dst, dst_src_pformat_equal); if (!format) { NOUVEAU_ERR("invalid/unsupported surface format: %s\n", util_format_name(pformat)); @@ -157,15 +161,16 @@ nvc0_2d_texture_do_copy(struct nouveau_pushbuf *push, const enum pipe_format dfmt = dst->base.base.format; const enum pipe_format sfmt = src->base.base.format; int ret; + boolean eqfmt = dfmt == sfmt; if (!PUSH_SPACE(push, 2 * 16 + 32)) return PIPE_ERROR; - ret = nvc0_2d_texture_set(push, TRUE, dst, dst_level, dz, dfmt); + ret = nvc0_2d_texture_set(push, TRUE, dst, dst_level, dz, dfmt, eqfmt); if (ret) return ret; - ret = nvc0_2d_texture_set(push, FALSE, src, src_level, sz, sfmt); + ret = nvc0_2d_texture_set(push, FALSE, src, src_level, sz, sfmt, eqfmt); if (ret) return ret; @@ -243,8 +248,8 @@ nvc0_resource_copy_region(struct pipe_context *pipe, return; } - assert(nvc0_2d_format_faithful(src->format)); - assert(nvc0_2d_format_faithful(dst->format)); + assert(nv50_2d_dst_format_faithful(dst->format)); + assert(nv50_2d_src_format_faithful(src->format)); BCTX_REFN(nvc0->bufctx, 2D, nv04_resource(src), RD); BCTX_REFN(nvc0->bufctx, 2D, nv04_resource(dst), WR); @@ -490,19 +495,19 @@ nvc0_blitter_make_vp(struct nvc0_blitter *blit) { static const uint32_t code_nvc0[] = { - 0xfff01c66, 0x06000080, /* vfetch b128 { $r0 $r1 $r2 $r3 } a[0x80] */ - 0xfff11c26, 0x06000090, /* vfetch b96 { $r4 $r5 $r6 } a[0x90]*/ - 0x03f01c66, 0x0a7e0070, /* export b128 o[0x70] { $r0 $r1 $r2 $r3 } */ - 0x13f01c26, 0x0a7e0080, /* export b96 o[0x80] { $r4 $r5 $r6 } */ + 0xfff11c26, 0x06000080, /* vfetch b64 $r4:$r5 a[0x80] */ + 0xfff01c46, 0x06000090, /* vfetch b96 $r0:$r1:$r2 a[0x90] */ + 0x13f01c26, 0x0a7e0070, /* export b64 o[0x70] $r4:$r5 */ + 0x03f01c46, 0x0a7e0080, /* export b96 o[0x80] $r0:$r1:$r2 */ 0x00001de7, 0x80000000, /* exit */ }; static const uint32_t code_nve4[] = { 0x00000007, 0x20000000, /* sched */ - 0xfff01c66, 0x06000080, /* vfetch b128 { $r0 $r1 $r2 $r3 } a[0x80] */ - 0xfff11c46, 0x06000090, /* vfetch b96 { $r4 $r5 $r6 } a[0x90]*/ - 0x03f01c66, 0x0a7e0070, /* export b128 o[0x70] { $r0 $r1 $r2 $r3 } */ - 0x13f01c46, 0x0a7e0080, /* export b96 o[0x80] { $r4 $r5 $r6 } */ + 0xfff11c26, 0x06000080, /* vfetch b64 $r4:$r5 a[0x80] */ + 0xfff01c46, 0x06000090, /* vfetch b96 $r0:$r1:$r2 a[0x90] */ + 0x13f01c26, 0x0a7e0070, /* export b64 o[0x70] $r4:$r5 */ + 0x03f01c46, 0x0a7e0080, /* export b96 o[0x80] $r0:$r1:$r2 */ 0x00001de7, 0x80000000, /* exit */ }; @@ -515,13 +520,13 @@ nvc0_blitter_make_vp(struct nvc0_blitter *blit) blit->vp.code = (uint32_t *)code_nvc0; /* const_cast */ blit->vp.code_size = sizeof(code_nvc0); } - blit->vp.max_gpr = 7; + blit->vp.max_gpr = 6; blit->vp.vp.edgeflag = PIPE_MAX_ATTRIBS; blit->vp.hdr[0] = 0x00020461; /* vertprog magic */ blit->vp.hdr[4] = 0x000ff000; /* no outputs read */ - blit->vp.hdr[6] = 0x0000003f; /* a[0x80], a[0x90] */ - blit->vp.hdr[13] = 0x0003f000; /* o[0x70], o[0x80] */ + blit->vp.hdr[6] = 0x00000073; /* a[0x80].xy, a[0x90].xyz */ + blit->vp.hdr[13] = 0x00073000; /* o[0x70].xy, o[0x80].xyz */ } static void @@ -820,7 +825,7 @@ nvc0_blit_3d(struct nvc0_context *nvc0, const struct pipe_blit_info *info) nvc0_blit_select_fp(blit, info); nvc0_blitctx_pre_blit(blit); - nvc0_blit_set_dst(blit, dst, info->dst.level, 0, info->dst.format); + nvc0_blit_set_dst(blit, dst, info->dst.level, -1, info->dst.format); nvc0_blit_set_src(blit, src, info->src.level, -1, info->src.format, blit->filter); @@ -859,6 +864,8 @@ nvc0_blit_3d(struct nvc0_context *nvc0, const struct pipe_blit_info *info) z += 0.5f * dz; IMMED_NVC0(push, NVC0_3D(VIEWPORT_TRANSFORM_EN), 0); + IMMED_NVC0(push, NVC0_3D(VIEW_VOLUME_CLIP_CTRL), 0x2 | + NVC0_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_RANGE_0_1); BEGIN_NVC0(push, NVC0_3D(VIEWPORT_HORIZ(0)), 2); PUSH_DATA (push, nvc0->framebuffer.width << 16); PUSH_DATA (push, nvc0->framebuffer.height << 16); @@ -925,11 +932,14 @@ nvc0_blit_3d(struct nvc0_context *nvc0, const struct pipe_blit_info *info) if (info->dst.box.z + info->dst.box.depth - 1) IMMED_NVC0(push, NVC0_3D(LAYER), 0); - /* re-enable normally constant state */ + nvc0_blitctx_post_blit(blit); - IMMED_NVC0(push, NVC0_3D(VIEWPORT_TRANSFORM_EN), 1); + /* restore viewport */ - nvc0_blitctx_post_blit(blit); + BEGIN_NVC0(push, NVC0_3D(VIEWPORT_HORIZ(0)), 2); + PUSH_DATA (push, nvc0->framebuffer.width << 16); + PUSH_DATA (push, nvc0->framebuffer.height << 16); + IMMED_NVC0(push, NVC0_3D(VIEWPORT_TRANSFORM_EN), 1); } static void @@ -948,7 +958,8 @@ nvc0_blit_eng2d(struct nvc0_context *nvc0, const struct pipe_blit_info *info) int64_t du_dx, dv_dy; int i; uint32_t mode; - const uint32_t mask = nv50_blit_eng2d_get_mask(info); + uint32_t mask = nv50_blit_eng2d_get_mask(info); + boolean b; mode = nv50_blit_get_filter(info) ? NVC0_2D_BLIT_CONTROL_FILTER_BILINEAR : @@ -959,8 +970,9 @@ nvc0_blit_eng2d(struct nvc0_context *nvc0, const struct pipe_blit_info *info) du_dx = ((int64_t)info->src.box.width << 32) / info->dst.box.width; dv_dy = ((int64_t)info->src.box.height << 32) / info->dst.box.height; - nvc0_2d_texture_set(push, 1, dst, info->dst.level, dz, info->dst.format); - nvc0_2d_texture_set(push, 0, src, info->src.level, sz, info->src.format); + b = info->dst.format == info->src.format; + nvc0_2d_texture_set(push, 1, dst, info->dst.level, dz, info->dst.format, b); + nvc0_2d_texture_set(push, 0, src, info->src.level, sz, info->src.format, b); if (info->scissor_enable) { BEGIN_NVC0(push, NVC0_2D(CLIP_X), 5); @@ -981,6 +993,25 @@ nvc0_blit_eng2d(struct nvc0_context *nvc0, const struct pipe_blit_info *info) PUSH_DATA (push, 0xffffffff); PUSH_DATA (push, 0xffffffff); IMMED_NVC0(push, NVC0_2D(OPERATION), NVC0_2D_OPERATION_ROP); + } else + if (info->src.format != info->dst.format) { + if (info->src.format == PIPE_FORMAT_R8_UNORM || + info->src.format == PIPE_FORMAT_R8_SNORM || + info->src.format == PIPE_FORMAT_R16_UNORM || + info->src.format == PIPE_FORMAT_R16_SNORM || + info->src.format == PIPE_FORMAT_R16_FLOAT || + info->src.format == PIPE_FORMAT_R32_FLOAT) { + mask = 0xffff0000; /* also makes condition for OPERATION reset true */ + BEGIN_NVC0(push, NVC0_2D(BETA4), 2); + PUSH_DATA (push, mask); + PUSH_DATA (push, NVC0_2D_OPERATION_SRCCOPY_PREMULT); + } else + if (info->src.format == PIPE_FORMAT_A8_UNORM) { + mask = 0xff000000; + BEGIN_NVC0(push, NVC0_2D(BETA4), 2); + PUSH_DATA (push, mask); + PUSH_DATA (push, NVC0_2D_OPERATION_SRCCOPY_PREMULT); + } } if (src->ms_x > dst->ms_x || src->ms_y > dst->ms_y) { @@ -1106,10 +1137,24 @@ nvc0_blit(struct pipe_context *pipe, const struct pipe_blit_info *info) debug_printf("blit: cannot filter array or cube textures in z direction"); } - if (!eng3d && info->dst.format != info->src.format) - if (!nvc0_2d_format_faithful(info->dst.format) || - !nvc0_2d_format_faithful(info->src.format)) + if (!eng3d && info->dst.format != info->src.format) { + if (!nv50_2d_dst_format_faithful(info->dst.format)) { + eng3d = TRUE; + } else + if (!nv50_2d_src_format_faithful(info->src.format)) { + if (!util_format_is_luminance(info->src.format)) { + if (util_format_is_intensity(info->src.format)) + eng3d = info->src.format != PIPE_FORMAT_I8_UNORM; + else + if (!nv50_2d_dst_format_ops_supported(info->dst.format)) + eng3d = TRUE; + else + eng3d = !nv50_2d_format_supported(info->src.format); + } + } else + if (util_format_is_luminance_alpha(info->src.format)) eng3d = TRUE; + } if (info->src.resource->nr_samples == 8 && info->dst.resource->nr_samples <= 1) diff --git a/src/gallium/drivers/nvc0/nvc0_video.c b/src/gallium/drivers/nvc0/nvc0_video.c index cdb80dba06..b185ded09f 100644 --- a/src/gallium/drivers/nvc0/nvc0_video.c +++ b/src/gallium/drivers/nvc0/nvc0_video.c @@ -356,19 +356,19 @@ nvc0_create_decoder(struct pipe_context *context, goto fw_fail; } r = read(fd, dec->fw_bo->map, 0x4000); + close(fd); + if (r < 0) { fprintf(stderr, "reading firmware file %s failed: %m\n", path); goto fw_fail; } if (r == 0x4000) { - close(fd); fprintf(stderr, "firmware file %s too large!\n", path); goto fw_fail; } if (r & 0xff) { - close(fd); fprintf(stderr, "firmware file %s wrong size!\n", path); goto fw_fail; } diff --git a/src/gallium/drivers/r300/compiler/radeon_optimize.c b/src/gallium/drivers/r300/compiler/radeon_optimize.c index 734c7f2348..74afd6fbae 100644 --- a/src/gallium/drivers/r300/compiler/radeon_optimize.c +++ b/src/gallium/drivers/r300/compiler/radeon_optimize.c @@ -708,6 +708,7 @@ static int peephole_mul_omod( struct rc_list * writer_list; struct rc_variable * var; struct peephole_mul_cb_data cb_data; + unsigned writemask_sum; for (i = 0; i < 2; i++) { unsigned int j; @@ -815,10 +816,11 @@ static int peephole_mul_omod( } /* Rewrite the instructions */ + writemask_sum = rc_variable_writemask_sum(writer_list->Item); for (var = writer_list->Item; var; var = var->Friend) { struct rc_variable * writer = var; unsigned conversion_swizzle = rc_make_conversion_swizzle( - writer->Inst->U.I.DstReg.WriteMask, + writemask_sum, inst_mul->U.I.DstReg.WriteMask); writer->Inst->U.I.Omod = omod_op; writer->Inst->U.I.DstReg.File = inst_mul->U.I.DstReg.File; diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index 33f306c7ef..804c03712e 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -3676,6 +3676,17 @@ boolean evergreen_dma_blit(struct pipe_context *ctx, return FALSE; } + /* 128 bpp surfaces require non_disp_tiling for both + * tiled and linear buffers on cayman. However, async + * DMA only supports it on the tiled side. As such + * the tile order is backwards after a L2T/T2L packet. + */ + if ((rctx->chip_class == CAYMAN) && + (src_mode != dst_mode) && + (util_format_get_blocksize(src->format) >= 16)) { + return FALSE; + } + if (src_mode == dst_mode) { uint64_t dst_offset, src_offset; /* simple dma blit would do NOTE code here assume : diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c index 046eab54c4..1659ac1c26 100644 --- a/src/gallium/drivers/r600/r600_blit.c +++ b/src/gallium/drivers/r600/r600_blit.c @@ -523,6 +523,37 @@ void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst, unsig } } +static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst, + unsigned offset, unsigned size, unsigned char value) +{ + struct r600_context *rctx = (struct r600_context*)ctx; + + if (rctx->screen->has_streamout && offset % 4 == 0 && size % 4 == 0) { + union pipe_color_union clear_value; + uint32_t v = value; + + clear_value.ui[0] = v | (v << 8) | (v << 16) | (v << 24); + + r600_blitter_begin(ctx, R600_DISABLE_RENDER_COND); + util_blitter_clear_buffer(rctx->blitter, dst, offset, size, + 1, &clear_value); + r600_blitter_end(ctx); + } else { + char *map = r600_buffer_mmap_sync_with_rings(rctx, r600_resource(dst), + PIPE_TRANSFER_WRITE); + memset(map + offset, value, size); + } +} + +void r600_screen_clear_buffer(struct r600_screen *rscreen, struct pipe_resource *dst, + unsigned offset, unsigned size, unsigned char value) +{ + pipe_mutex_lock(rscreen->aux_context_lock); + r600_clear_buffer(rscreen->aux_context, dst, offset, size, value); + rscreen->aux_context->flush(rscreen->aux_context, NULL, 0); + pipe_mutex_unlock(rscreen->aux_context_lock); +} + static bool util_format_is_subsampled_2x1_32bpp(enum pipe_format format) { const struct util_format_description *desc = util_format_description(format); diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c index a7973a525d..21dcaef928 100644 --- a/src/gallium/drivers/r600/r600_pipe.c +++ b/src/gallium/drivers/r600/r600_pipe.c @@ -834,6 +834,9 @@ static void r600_destroy_screen(struct pipe_screen* pscreen) if (rscreen == NULL) return; + pipe_mutex_destroy(rscreen->aux_context_lock); + rscreen->aux_context->destroy(rscreen->aux_context); + if (rscreen->global_pool) { compute_memory_pool_delete(rscreen->global_pool); } @@ -1157,7 +1160,7 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws) * case were triggering lockup quickly such as : * piglit/bin/depthstencil-render-miplevels 1024 d=s=z24_s8 */ - rscreen->use_hyperz = debug_get_bool_option("R600_HYPERZ", TRUE); + rscreen->use_hyperz = debug_get_bool_option("R600_HYPERZ", FALSE); rscreen->use_hyperz = rscreen->info.drm_minor >= 26 ? rscreen->use_hyperz : FALSE; rscreen->global_pool = compute_memory_pool_new(rscreen); @@ -1176,5 +1179,41 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws) } #endif + /* Create the auxiliary context. */ + pipe_mutex_init(rscreen->aux_context_lock); + rscreen->aux_context = rscreen->screen.context_create(&rscreen->screen, NULL); + +#if 0 /* This is for testing whether aux_context and buffer clearing work correctly. */ + struct pipe_resource templ = {}; + + templ.width0 = 4; + templ.height0 = 2048; + templ.depth0 = 1; + templ.array_size = 1; + templ.target = PIPE_TEXTURE_2D; + templ.format = PIPE_FORMAT_R8G8B8A8_UNORM; + templ.usage = PIPE_USAGE_STATIC; + + struct r600_resource *res = r600_resource(rscreen->screen.resource_create(&rscreen->screen, &templ)); + unsigned char *map = ws->buffer_map(res->cs_buf, NULL, PIPE_TRANSFER_WRITE); + + memset(map, 0, 256); + + r600_screen_clear_buffer(rscreen, &res->b.b, 4, 4, 0xCC); + r600_screen_clear_buffer(rscreen, &res->b.b, 8, 4, 0xDD); + r600_screen_clear_buffer(rscreen, &res->b.b, 12, 4, 0xEE); + r600_screen_clear_buffer(rscreen, &res->b.b, 20, 4, 0xFF); + r600_screen_clear_buffer(rscreen, &res->b.b, 32, 20, 0x87); + + ws->buffer_wait(res->buf, RADEON_USAGE_WRITE); + + int i; + for (i = 0; i < 256; i++) { + printf("%02X", map[i]); + if (i % 16 == 15) + printf("\n"); + } +#endif + return &rscreen->screen; } diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h index 1be4321259..ba6654d513 100644 --- a/src/gallium/drivers/r600/r600_pipe.h +++ b/src/gallium/drivers/r600/r600_pipe.h @@ -252,6 +252,11 @@ struct r600_screen { unsigned cs_count; #endif r600g_dma_blit_t dma_blit; + + /* Auxiliary context. Mainly used to initialize resources. + * It must be locked prior to using and flushed before unlocking. */ + struct pipe_context *aux_context; + pipe_mutex aux_context_lock; }; struct r600_pipe_sampler_view { @@ -630,6 +635,8 @@ void evergreen_update_db_shader_control(struct r600_context * rctx); /* r600_blit.c */ void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst, unsigned dstx, struct pipe_resource *src, const struct pipe_box *src_box); +void r600_screen_clear_buffer(struct r600_screen *rscreen, struct pipe_resource *dst, + unsigned offset, unsigned size, unsigned char value); void r600_init_blit_functions(struct r600_context *rctx); void r600_blit_decompress_depth(struct pipe_context *ctx, struct r600_texture *texture, diff --git a/src/gallium/drivers/r600/r600_query.c b/src/gallium/drivers/r600/r600_query.c index 0335189297..782ad26e3b 100644 --- a/src/gallium/drivers/r600/r600_query.c +++ b/src/gallium/drivers/r600/r600_query.c @@ -186,10 +186,11 @@ static void r600_emit_query_end(struct r600_context *ctx, struct r600_query *que case PIPE_QUERY_PRIMITIVES_GENERATED: case PIPE_QUERY_SO_STATISTICS: case PIPE_QUERY_SO_OVERFLOW_PREDICATE: + va += query->buffer.results_end + query->result_size/2; cs->buf[cs->cdw++] = PKT3(PKT3_EVENT_WRITE, 2, 0); cs->buf[cs->cdw++] = EVENT_TYPE(EVENT_TYPE_SAMPLE_STREAMOUTSTATS) | EVENT_INDEX(3); - cs->buf[cs->cdw++] = query->buffer.results_end + query->result_size/2; - cs->buf[cs->cdw++] = 0; + cs->buf[cs->cdw++] = va; + cs->buf[cs->cdw++] = (va >> 32UL) & 0xFF; break; case PIPE_QUERY_TIME_ELAPSED: va += query->buffer.results_end + query->result_size/2; diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index e8992ba5be..e0fb18b4ef 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -5760,7 +5760,7 @@ static int tgsi_umad(struct r600_shader_ctx *ctx) { struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction; struct r600_bytecode_alu alu; - int i, j, r; + int i, j, k, r; int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask); /* src0 * src1 */ @@ -5768,21 +5768,40 @@ static int tgsi_umad(struct r600_shader_ctx *ctx) if (!(inst->Dst[0].Register.WriteMask & (1 << i))) continue; - memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - - alu.dst.chan = i; - alu.dst.sel = ctx->temp_reg; - alu.dst.write = 1; - - alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT); - for (j = 0; j < 2; j++) { - r600_bytecode_src(&alu.src[j], &ctx->src[j], i); - } - - alu.last = 1; - r = r600_bytecode_add_alu(ctx->bc, &alu); - if (r) - return r; + if (ctx->bc->chip_class == CAYMAN) { + for (j = 0; j < 4; j++) { + memset(&alu, 0, sizeof(struct r600_bytecode_alu)); + alu.dst.chan = j; + alu.dst.sel = ctx->temp_reg; + alu.dst.write = (j == i); + + if (j == 3) + alu.last = 1; + alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT); + for (k = 0; k < inst->Instruction.NumSrcRegs; k++) { + r600_bytecode_src(&alu.src[k], &ctx->src[k], i); + } + r = r600_bytecode_add_alu(ctx->bc, &alu); + if (r) + return r; + } + } else { + memset(&alu, 0, sizeof(struct r600_bytecode_alu)); + + alu.dst.chan = i; + alu.dst.sel = ctx->temp_reg; + alu.dst.write = 1; + + alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT); + for (j = 0; j < 2; j++) { + r600_bytecode_src(&alu.src[j], &ctx->src[j], i); + } + + alu.last = 1; + r = r600_bytecode_add_alu(ctx->bc, &alu); + if (r) + return r; + } } diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c index 85fc887971..12ae984f92 100644 --- a/src/gallium/drivers/r600/r600_texture.c +++ b/src/gallium/drivers/r600/r600_texture.c @@ -480,10 +480,7 @@ r600_texture_create_object(struct pipe_screen *screen, */ R600_ERR("r600: failed to create bo for htile buffers\n"); } else { - void *ptr; - ptr = rscreen->ws->buffer_map(rtex->htile->cs_buf, NULL, PIPE_TRANSFER_WRITE); - memset(ptr, 0x0, htile_size); - rscreen->ws->buffer_unmap(rtex->htile->cs_buf); + r600_screen_clear_buffer(rscreen, &rtex->htile->b.b, 0, htile_size, 0); } } @@ -505,9 +502,8 @@ r600_texture_create_object(struct pipe_screen *screen, if (rtex->cmask_size) { /* Initialize the cmask to 0xCC (= compressed state). */ - char *ptr = rscreen->ws->buffer_map(resource->cs_buf, NULL, PIPE_TRANSFER_WRITE); - memset(ptr + rtex->cmask_offset, 0xCC, rtex->cmask_size); - rscreen->ws->buffer_unmap(resource->cs_buf); + r600_screen_clear_buffer(rscreen, &rtex->resource.b.b, + rtex->cmask_offset, rtex->cmask_size, 0xCC); } if (debug_get_option_print_texdepth() && rtex->is_depth && rtex->non_disp_tiling) { diff --git a/src/gallium/drivers/radeon/Makefile.am b/src/gallium/drivers/radeon/Makefile.am index e6eb2419d8..a3a7b74c48 100644 --- a/src/gallium/drivers/radeon/Makefile.am +++ b/src/gallium/drivers/radeon/Makefile.am @@ -1,11 +1,14 @@ include Makefile.sources include $(top_srcdir)/src/gallium/Automake.inc +LIBGALLIUM_LIBS= + if HAVE_GALLIUM_R600 if HAVE_GALLIUM_RADEONSI lib_LTLIBRARIES = libllvmradeon@VERSION@.la libllvmradeon@VERSION@_la_LDFLAGS = -Wl, -shared -avoid-version \ $(LLVM_LDFLAGS) +LIBGALLIUM_LIBS += $(top_builddir)/src/gallium/auxiliary/libgallium.la else noinst_LTLIBRARIES = libllvmradeon@VERSION@.la endif @@ -26,5 +29,6 @@ libllvmradeon@VERSION@_la_SOURCES = \ $(C_FILES) libllvmradeon@VERSION@_la_LIBADD = \ + $(LIBGALLIUM_LIBS) \ $(CLOCK_LIB) \ $(LLVM_LIBS) diff --git a/src/gallium/drivers/radeonsi/r600_blit.c b/src/gallium/drivers/radeonsi/r600_blit.c index 0b0eba3c79..5bdb6fa118 100644 --- a/src/gallium/drivers/radeonsi/r600_blit.c +++ b/src/gallium/drivers/radeonsi/r600_blit.c @@ -417,12 +417,30 @@ static void r600_resource_copy_region(struct pipe_context *ctx, r600_change_format(dst, dst_level, &orig_info[1], PIPE_FORMAT_R8_UNORM); break; + case 2: + r600_change_format(src, src_level, &orig_info[0], + PIPE_FORMAT_R8G8_UNORM); + r600_change_format(dst, dst_level, &orig_info[1], + PIPE_FORMAT_R8G8_UNORM); + break; case 4: r600_change_format(src, src_level, &orig_info[0], PIPE_FORMAT_R8G8B8A8_UNORM); r600_change_format(dst, dst_level, &orig_info[1], PIPE_FORMAT_R8G8B8A8_UNORM); break; + case 8: + r600_change_format(src, src_level, &orig_info[0], + PIPE_FORMAT_R16G16B16A16_UINT); + r600_change_format(dst, dst_level, &orig_info[1], + PIPE_FORMAT_R16G16B16A16_UINT); + break; + case 16: + r600_change_format(src, src_level, &orig_info[0], + PIPE_FORMAT_R32G32B32A32_UINT); + r600_change_format(dst, dst_level, &orig_info[1], + PIPE_FORMAT_R32G32B32A32_UINT); + break; default: fprintf(stderr, "Unhandled format %s with blocksize %u\n", util_format_short_name(src->format), blocksize); diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 61dea74ac1..93766a38c6 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -401,6 +401,11 @@ static void si_update_derived_state(struct r600_context *rctx) } if (si_pm4_state_changed(rctx, ps) || si_pm4_state_changed(rctx, vs)) { + /* XXX: Emitting the PS state even when only the VS changed + * fixes random failures with piglit glsl-max-varyings. + * Not sure why... + */ + rctx->emitted.named.ps = NULL; si_update_spi_map(rctx); } } @@ -445,8 +450,14 @@ static void si_vertex_buffer_update(struct r600_context *rctx) si_pm4_sh_data_add(pm4, va & 0xFFFFFFFF); si_pm4_sh_data_add(pm4, (S_008F04_BASE_ADDRESS_HI(va >> 32) | S_008F04_STRIDE(vb->stride))); - si_pm4_sh_data_add(pm4, (vb->buffer->width0 - vb->buffer_offset) / - MAX2(vb->stride, 1)); + if (vb->stride) + /* Round up by rounding down and adding 1 */ + si_pm4_sh_data_add(pm4, + (vb->buffer->width0 - offset - + util_format_get_blocksize(ve->src_format)) / + vb->stride + 1); + else + si_pm4_sh_data_add(pm4, vb->buffer->width0 - offset); si_pm4_sh_data_add(pm4, rctx->vertex_elements->rsrc_word3[i]); if (!bound[ve->vertex_buffer_index]) { diff --git a/src/gallium/drivers/rbug/Makefile.am b/src/gallium/drivers/rbug/Makefile.am index 655bfe1e40..3c1a8b5f87 100644 --- a/src/gallium/drivers/rbug/Makefile.am +++ b/src/gallium/drivers/rbug/Makefile.am @@ -30,6 +30,7 @@ noinst_LTLIBRARIES = librbug.la # preprocessor is determined by the ordering of the -I flags. AM_CFLAGS = \ $(GALLIUM_CFLAGS) \ + $(VISIBILITY_CFLAGS) \ -I$(top_srcdir)/src/gallium/drivers \ -I$(top_srcdir)/include diff --git a/src/gallium/drivers/svga/Makefile.am b/src/gallium/drivers/svga/Makefile.am index fdaa3c8ebc..7eacd90c0e 100644 --- a/src/gallium/drivers/svga/Makefile.am +++ b/src/gallium/drivers/svga/Makefile.am @@ -29,6 +29,8 @@ AM_CPPFLAGS = \ -I$(top_srcdir)/include \ $(GALLIUM_CFLAGS) +AM_CFLAGS = $(VISIBILITY_CFLAGS) + #On some systems -std= must be added to CFLAGS to be the last -std= CFLAGS += -std=gnu99 diff --git a/src/gallium/drivers/trace/Makefile.am b/src/gallium/drivers/trace/Makefile.am index a9e1457d33..984ead4d7a 100644 --- a/src/gallium/drivers/trace/Makefile.am +++ b/src/gallium/drivers/trace/Makefile.am @@ -1,7 +1,8 @@ include $(top_srcdir)/src/gallium/Automake.inc AM_CFLAGS = \ - $(GALLIUM_CFLAGS) + $(GALLIUM_CFLAGS) \ + $(VISIBILITY_CFLAGS) noinst_LTLIBRARIES = libtrace.la diff --git a/src/gallium/include/pipe/p_compiler.h b/src/gallium/include/pipe/p_compiler.h index 595833356a..a131969c6e 100644 --- a/src/gallium/include/pipe/p_compiler.h +++ b/src/gallium/include/pipe/p_compiler.h @@ -29,6 +29,8 @@ #define P_COMPILER_H +#include "c99_compat.h" /* inline, __func__, etc. */ + #include "p_config.h" #include <stdlib.h> @@ -90,28 +92,7 @@ typedef unsigned char boolean; #endif #endif -/* Function inlining */ -#ifndef inline -# ifdef __cplusplus - /* C++ supports inline keyword */ -# elif defined(__GNUC__) -# define inline __inline__ -# elif defined(_MSC_VER) -# define inline __inline -# elif defined(__ICL) -# define inline __inline -# elif defined(__INTEL_COMPILER) - /* Intel compiler supports inline keyword */ -# elif defined(__WATCOMC__) && (__WATCOMC__ >= 1100) -# define inline __inline -# elif defined(__SUNPRO_C) && defined(__C99FEATURES__) - /* C99 supports inline keyword */ -# elif (__STDC_VERSION__ >= 199901L) - /* C99 supports inline keyword */ -# else -# define inline -# endif -#endif +/* XXX: Use standard `inline` keyword instead */ #ifndef INLINE # define INLINE inline #endif @@ -127,26 +108,6 @@ typedef unsigned char boolean; # endif #endif -/* - * Define the C99 restrict keyword. - * - * See also: - * - http://cellperformance.beyond3d.com/articles/2006/05/demystifying-the-restrict-keyword.html - */ -#ifndef restrict -# if (__STDC_VERSION__ >= 199901L) - /* C99 */ -# elif defined(__SUNPRO_C) && defined(__C99FEATURES__) - /* C99 */ -# elif defined(__GNUC__) -# define restrict __restrict__ -# elif defined(_MSC_VER) -# define restrict __restrict -# else -# define restrict /* */ -# endif -#endif - /* Function visibility */ #ifndef PUBLIC @@ -160,35 +121,10 @@ typedef unsigned char boolean; #endif -/* The __FUNCTION__ gcc variable is generally only used for debugging. - * If we're not using gcc, define __FUNCTION__ as a cpp symbol here. - */ +/* XXX: Use standard `__func__` instead */ #ifndef __FUNCTION__ -# if !defined(__GNUC__) -# if (__STDC_VERSION__ >= 199901L) /* C99 */ || \ - (defined(__SUNPRO_C) && defined(__C99FEATURES__)) -# define __FUNCTION__ __func__ -# else -# define __FUNCTION__ "<unknown>" -# endif -# endif -# if defined(_MSC_VER) && _MSC_VER < 1300 -# define __FUNCTION__ "<unknown>" -# endif +# define __FUNCTION__ __func__ #endif -#ifndef __func__ -# if (__STDC_VERSION__ >= 199901L) || \ - (defined(__SUNPRO_C) && defined(__C99FEATURES__)) - /* __func__ is part of C99 */ -# elif defined(_MSC_VER) -# if _MSC_VER >= 1300 -# define __func__ __FUNCTION__ -# else -# define __func__ "<unknown>" -# endif -# endif -#endif - /* This should match linux gcc cdecl semantics everywhere, so that we diff --git a/src/gallium/include/state_tracker/st_api.h b/src/gallium/include/state_tracker/st_api.h index 9f3d2a12cb..52c9dc0c3a 100644 --- a/src/gallium/include/state_tracker/st_api.h +++ b/src/gallium/include/state_tracker/st_api.h @@ -240,6 +240,7 @@ struct st_visual struct st_config_options { boolean force_glsl_extensions_warn; + boolean disable_glsl_line_continuations; }; /** diff --git a/src/gallium/state_trackers/dri/common/dri_context.c b/src/gallium/state_trackers/dri/common/dri_context.c index 00b9b0aebe..465fb871b2 100644 --- a/src/gallium/state_trackers/dri/common/dri_context.c +++ b/src/gallium/state_trackers/dri/common/dri_context.c @@ -54,6 +54,8 @@ static void dri_fill_st_options(struct st_config_options *options, { options->force_glsl_extensions_warn = driQueryOptionb(optionCache, "force_glsl_extensions_warn"); + options->disable_glsl_line_continuations = + driQueryOptionb(optionCache, "disable_glsl_line_continuations"); } GLboolean diff --git a/src/gallium/state_trackers/dri/common/dri_screen.c b/src/gallium/state_trackers/dri/common/dri_screen.c index a908e28be7..bf9caec233 100644 --- a/src/gallium/state_trackers/dri/common/dri_screen.c +++ b/src/gallium/state_trackers/dri/common/dri_screen.c @@ -65,13 +65,14 @@ PUBLIC const char __driConfigOptions[] = DRI_CONF_SECTION_DEBUG DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN(false) + DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS(false) DRI_CONF_SECTION_END DRI_CONF_END; #define false 0 -static const uint __driNConfigOptions = 10; +static const uint __driNConfigOptions = 11; static const __DRIconfig ** dri_fill_in_modes(struct dri_screen *screen) diff --git a/src/gallium/state_trackers/egl/Makefile.am b/src/gallium/state_trackers/egl/Makefile.am index e19e9a31bd..f78b36e3d1 100644 --- a/src/gallium/state_trackers/egl/Makefile.am +++ b/src/gallium/state_trackers/egl/Makefile.am @@ -27,7 +27,7 @@ include $(top_srcdir)/src/gallium/Automake.inc AM_CFLAGS = $(GALLIUM_CFLAGS) AM_CPPFLAGS = \ -I$(top_srcdir)/src/egl/main \ - -I$(top_srcdir)/src/egl/wayland/wayland-drm/ \ + -I$(top_builddir)/src/egl/wayland/wayland-drm/ \ -I$(top_srcdir)/include noinst_LTLIBRARIES = libegl.la diff --git a/src/gallium/state_trackers/xa/Makefile.am b/src/gallium/state_trackers/xa/Makefile.am index 5b53ef96f1..57d55c4a91 100644 --- a/src/gallium/state_trackers/xa/Makefile.am +++ b/src/gallium/state_trackers/xa/Makefile.am @@ -24,7 +24,9 @@ include $(top_srcdir)/src/gallium/Automake.inc AM_CFLAGS = \ -Wall -pedantic \ - $(GALLIUM_CFLAGS) + $(GALLIUM_CFLAGS) \ + $(VISIBILITY_CFLAGS) + AM_CPPFLAGS = \ -I$(top_srcdir)/src/gallium/ \ -I$(top_srcdir)/src/gallium/winsys \ diff --git a/src/gallium/winsys/svga/drm/Makefile.am b/src/gallium/winsys/svga/drm/Makefile.am index 53bbcc244f..d7ada3c6b7 100644 --- a/src/gallium/winsys/svga/drm/Makefile.am +++ b/src/gallium/winsys/svga/drm/Makefile.am @@ -31,6 +31,8 @@ AM_CPPFLAGS = \ $(GALLIUM_CFLAGS) \ $(LIBDRM_CFLAGS) +AM_CFLAGS = $(VISIBILITY_CFLAGS) + #On some systems -std= must be added to CFLAGS to be the last -std= CFLAGS += -std=gnu99 -D_FILE_OFFSET_BITS=64 diff --git a/src/gallium/winsys/sw/xlib/xlib_sw_winsys.c b/src/gallium/winsys/sw/xlib/xlib_sw_winsys.c index 3aef8daa42..6e71530e63 100644 --- a/src/gallium/winsys/sw/xlib/xlib_sw_winsys.c +++ b/src/gallium/winsys/sw/xlib/xlib_sw_winsys.c @@ -165,6 +165,7 @@ alloc_shm_ximage(struct xlib_displaytarget *xlib_dt, &xlib_dt->shminfo, width, height); if (xlib_dt->tempImage == NULL) { + shmctl(xlib_dt->shminfo.shmid, IPC_RMID, 0); xlib_dt->shm = False; return; } @@ -176,6 +177,11 @@ alloc_shm_ximage(struct xlib_displaytarget *xlib_dt, XShmAttach(xlib_dt->display, &xlib_dt->shminfo); XSync(xlib_dt->display, False); + /* Mark the segment to be destroyed, so that it is automatically destroyed + * when this process dies. Needs to be after XShmAttach() for *BSD. + */ + shmctl(xlib_dt->shminfo.shmid, IPC_RMID, 0); + if (XErrorFlag) { /* we are on a remote display, this error is normal, don't print it */ XFlush(xlib_dt->display); diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp index 2ff44ada77..77e54bb19e 100644 --- a/src/glsl/ast_to_hir.cpp +++ b/src/glsl/ast_to_hir.cpp @@ -3349,10 +3349,17 @@ ast_function::hir(exec_list *instructions, "match prototype", name); } - if (is_definition && sig->is_defined) { - YYLTYPE loc = this->get_location(); - - _mesa_glsl_error(& loc, state, "function `%s' redefined", name); + if (sig->is_defined) { + if (is_definition) { + YYLTYPE loc = this->get_location(); + _mesa_glsl_error(& loc, state, "function `%s' redefined", name); + } else { + /* We just encountered a prototype that exactly matches a + * function that's already been defined. This is redundant, + * and we should ignore it. + */ + return NULL; + } } } } else { diff --git a/src/glsl/glsl_types.cpp b/src/glsl/glsl_types.cpp index 02d85b8f6e..dee97096c7 100644 --- a/src/glsl/glsl_types.cpp +++ b/src/glsl/glsl_types.cpp @@ -446,6 +446,8 @@ const glsl_type *glsl_type::get_scalar_type() const return int_type; case GLSL_TYPE_FLOAT: return float_type; + case GLSL_TYPE_BOOL: + return bool_type; default: /* Handle everything else */ return type; diff --git a/src/glsl/ir_constant_expression.cpp b/src/glsl/ir_constant_expression.cpp index 86b863f310..703cd7948c 100644 --- a/src/glsl/ir_constant_expression.cpp +++ b/src/glsl/ir_constant_expression.cpp @@ -1385,7 +1385,7 @@ ir_dereference_array::constant_referenced(struct hash_table *variable_context, return; } - const glsl_type *vt = substore->type; + const glsl_type *vt = array->type; if (vt->is_array()) { store = substore->get_array_element(index); offset = 0; diff --git a/src/glsl/ir_validate.cpp b/src/glsl/ir_validate.cpp index d8cafd55f0..78ce13e998 100644 --- a/src/glsl/ir_validate.cpp +++ b/src/glsl/ir_validate.cpp @@ -695,6 +695,11 @@ check_node_type(ir_instruction *ir, void *data) void validate_ir_tree(exec_list *instructions) { + /* We shouldn't have any reason to validate IR in a release build, + * and it's half composed of assert()s anyway which wouldn't do + * anything. + */ +#ifdef DEBUG ir_validate v; v.run(instructions); @@ -704,4 +709,5 @@ validate_ir_tree(exec_list *instructions) visit_tree(ir, check_node_type, NULL); } +#endif } diff --git a/src/glsl/link_varyings.cpp b/src/glsl/link_varyings.cpp index e2cb46e8ce..95e5ca9e3b 100644 --- a/src/glsl/link_varyings.cpp +++ b/src/glsl/link_varyings.cpp @@ -541,7 +541,7 @@ store_tfeedback_info(struct gl_context *ctx, struct gl_shader_program *prog, class varying_matches { public: - varying_matches(bool disable_varying_packing); + varying_matches(bool disable_varying_packing, bool consumer_is_fs); ~varying_matches(); void record(ir_variable *producer_var, ir_variable *consumer_var); unsigned assign_locations(); @@ -621,11 +621,15 @@ private: * it was allocated. */ unsigned matches_capacity; + + const bool consumer_is_fs; }; -varying_matches::varying_matches(bool disable_varying_packing) - : disable_varying_packing(disable_varying_packing) +varying_matches::varying_matches(bool disable_varying_packing, + bool consumer_is_fs) + : disable_varying_packing(disable_varying_packing), + consumer_is_fs(consumer_is_fs) { /* Note: this initial capacity is rather arbitrarily chosen to be large * enough for many cases without wasting an unreasonable amount of space. @@ -656,6 +660,10 @@ varying_matches::~varying_matches() * If \c producer_var has already been paired up with a consumer_var, or * producer_var is part of fixed pipeline functionality (and hence already has * a location assigned), this function has no effect. + * + * Note: as a side effect this function may change the interpolation type of + * \c producer_var, but only when the change couldn't possibly affect + * rendering. */ void varying_matches::record(ir_variable *producer_var, ir_variable *consumer_var) @@ -668,6 +676,25 @@ varying_matches::record(ir_variable *producer_var, ir_variable *consumer_var) return; } + if ((consumer_var == NULL && producer_var->type->contains_integer()) || + !consumer_is_fs) { + /* Since this varying is not being consumed by the fragment shader, its + * interpolation type varying cannot possibly affect rendering. Also, + * this variable is non-flat and is (or contains) an integer. + * + * lower_packed_varyings requires all integer varyings to flat, + * regardless of where they appear. We can trivially satisfy that + * requirement by changing the interpolation type to flat here. + */ + producer_var->centroid = false; + producer_var->interpolation = INTERP_QUALIFIER_FLAT; + + if (consumer_var) { + consumer_var->centroid = false; + consumer_var->interpolation = INTERP_QUALIFIER_FLAT; + } + } + if (this->num_matches == this->matches_capacity) { this->matches_capacity *= 2; this->matches = (match *) @@ -959,7 +986,8 @@ assign_varying_locations(struct gl_context *ctx, /* FINISHME: Set dynamically when geometry shader support is added. */ const unsigned producer_base = VERT_RESULT_VAR0; const unsigned consumer_base = FRAG_ATTRIB_VAR0; - varying_matches matches(ctx->Const.DisableVaryingPacking); + varying_matches matches(ctx->Const.DisableVaryingPacking, + consumer && consumer->Type == GL_FRAGMENT_SHADER); hash_table *tfeedback_candidates = hash_table_ctor(0, hash_table_string_hash, hash_table_string_compare); diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp index 57e7a9ad36..cf0420c99c 100644 --- a/src/glsl/linker.cpp +++ b/src/glsl/linker.cpp @@ -1067,13 +1067,11 @@ link_intrastage_shaders(void *mem_ctx, free(linking_shaders); -#ifdef DEBUG /* At this point linked should contain all of the linked IR, so * validate it to make sure nothing went wrong. */ if (linked) validate_ir_tree(linked->ir); -#endif /* Make a pass over all variable declarations to ensure that arrays with * unspecified sizes have a size specified. The size is inferred from the diff --git a/src/glsl/lower_jumps.cpp b/src/glsl/lower_jumps.cpp index 92813f567f..bfc8c013bd 100644 --- a/src/glsl/lower_jumps.cpp +++ b/src/glsl/lower_jumps.cpp @@ -1002,10 +1002,12 @@ do_lower_jumps(exec_list *instructions, bool pull_out_jumps, bool lower_sub_retu v.lower_sub_return = lower_sub_return; v.lower_main_return = lower_main_return; + bool progress_ever = false; do { v.progress = false; visit_exec_list(instructions, &v); + progress_ever = v.progress || progress_ever; } while (v.progress); - return v.progress; + return progress_ever; } diff --git a/src/glsl/lower_packed_varyings.cpp b/src/glsl/lower_packed_varyings.cpp index 8a40f5e72e..b64e896d92 100644 --- a/src/glsl/lower_packed_varyings.cpp +++ b/src/glsl/lower_packed_varyings.cpp @@ -178,6 +178,14 @@ lower_packed_varyings_visitor::run(exec_list *instructions) !this->needs_lowering(var)) continue; + /* This lowering pass is only capable of packing floats and ints + * together when their interpolation mode is "flat". Therefore, to be + * safe, caller should ensure that integral varyings always use flat + * interpolation, even when this is not required by GLSL. + */ + assert(var->interpolation == INTERP_QUALIFIER_FLAT || + !var->type->contains_integer()); + /* Change the old varying into an ordinary global. */ var->mode = ir_var_auto; diff --git a/src/glsl/ralloc.c b/src/glsl/ralloc.c index 59e71c48b0..0281642522 100644 --- a/src/glsl/ralloc.c +++ b/src/glsl/ralloc.c @@ -108,6 +108,8 @@ ralloc_size(const void *ctx, size_t size) { void *block = calloc(1, size + sizeof(ralloc_header)); + if (unlikely(block == NULL)) + return NULL; ralloc_header *info = (ralloc_header *) block; ralloc_header *parent = ctx != NULL ? get_header(ctx) : NULL; diff --git a/src/glx/Makefile.am b/src/glx/Makefile.am index 4aa900a538..f01709b3ad 100644 --- a/src/glx/Makefile.am +++ b/src/glx/Makefile.am @@ -39,6 +39,7 @@ AM_CFLAGS = \ -I$(top_srcdir)/src/mapi/glapi \ -I$(top_builddir)/src/mapi \ -I$(top_builddir)/src/mapi/glapi \ + $(VISIBILITY_CFLAGS) \ $(SHARED_GLAPI_CFLAGS) \ $(EXTRA_DEFINES_XF86VIDMODE) \ -D_REENTRANT \ diff --git a/src/glx/glxcmds.c b/src/glx/glxcmds.c index 8874e3bebf..c6f926d30b 100644 --- a/src/glx/glxcmds.c +++ b/src/glx/glxcmds.c @@ -912,8 +912,10 @@ init_fbconfig_for_chooser(struct glx_config * config, /* Test that all bits from a are contained in b */ #define MATCH_MASK(param) \ do { \ - if ((a->param & ~b->param) != 0) \ + if ( ((int) a-> param != (int) GLX_DONT_CARE) \ + && ((a->param & ~b->param) != 0) ) { \ return False; \ + } \ } while (0); /** diff --git a/src/mapi/glapi/gen/gl_x86-64_asm.py b/src/mapi/glapi/gen/gl_x86-64_asm.py index a3548c2951..19e0e15b06 100644 --- a/src/mapi/glapi/gen/gl_x86-64_asm.py +++ b/src/mapi/glapi/gen/gl_x86-64_asm.py @@ -181,19 +181,6 @@ class PrintGenericStubs(gl_XML.gl_print_base): def printRealFooter(self): print '' - print '#if defined(GLX_USE_TLS) && defined(__linux__)' - print ' .section ".note.ABI-tag", "a"' - print ' .p2align 2' - print ' .long 1f - 0f /* name length */' - print ' .long 3f - 2f /* data length */' - print ' .long 1 /* note length */' - print '0: .asciz "GNU" /* vendor name */' - print '1: .p2align 2' - print '2: .long 0 /* note data: the ABI tag */' - print ' .long 2,4,20 /* Minimum kernel version w/TLS */' - print '3: .p2align 2 /* pad out section */' - print '#endif /* GLX_USE_TLS */' - print '' print '#if defined (__ELF__) && defined (__linux__)' print ' .section .note.GNU-stack,"",%progbits' print '#endif' diff --git a/src/mapi/glapi/gen/gl_x86_asm.py b/src/mapi/glapi/gen/gl_x86_asm.py index 8b0f6ee240..919bbc0328 100644 --- a/src/mapi/glapi/gen/gl_x86_asm.py +++ b/src/mapi/glapi/gen/gl_x86_asm.py @@ -189,19 +189,6 @@ class PrintGenericStubs(gl_XML.gl_print_base): print '\t\tALIGNTEXT16' print 'GLNAME(gl_dispatch_functions_end):' print '' - print '#if defined(GLX_USE_TLS) && defined(__linux__)' - print ' .section ".note.ABI-tag", "a"' - print ' .p2align 2' - print ' .long 1f - 0f /* name length */' - print ' .long 3f - 2f /* data length */' - print ' .long 1 /* note length */' - print '0: .asciz "GNU" /* vendor name */' - print '1: .p2align 2' - print '2: .long 0 /* note data: the ABI tag */' - print ' .long 2,4,20 /* Minimum kernel version w/TLS */' - print '3: .p2align 2 /* pad out section */' - print '#endif /* GLX_USE_TLS */' - print '' print '#if defined (__ELF__) && defined (__linux__)' print ' .section .note.GNU-stack,"",%progbits' print '#endif' diff --git a/src/mapi/mapi/entry_x86-64_tls.h b/src/mapi/mapi/entry_x86-64_tls.h index 72d4125a69..36cad00c20 100644 --- a/src/mapi/mapi/entry_x86-64_tls.h +++ b/src/mapi/mapi/entry_x86-64_tls.h @@ -28,19 +28,6 @@ #include "u_macros.h" -#ifdef __linux__ -__asm__(".section .note.ABI-tag, \"a\"\n\t" - ".p2align 2\n\t" - ".long 1f - 0f\n\t" /* name length */ - ".long 3f - 2f\n\t" /* data length */ - ".long 1\n\t" /* note length */ - "0: .asciz \"GNU\"\n\t" /* vendor name */ - "1: .p2align 2\n\t" - "2: .long 0\n\t" /* note data: the ABI tag */ - ".long 2,4,20\n\t" /* Minimum kernel version w/TLS */ - "3: .p2align 2\n\t"); /* pad out section */ -#endif /* __linux__ */ - __asm__(".text\n" ".balign 32\n" "x86_64_entry_start:"); diff --git a/src/mapi/mapi/entry_x86_tls.h b/src/mapi/mapi/entry_x86_tls.h index de918128ee..58d09caa6d 100644 --- a/src/mapi/mapi/entry_x86_tls.h +++ b/src/mapi/mapi/entry_x86_tls.h @@ -29,19 +29,6 @@ #include <string.h> #include "u_macros.h" -#ifdef __linux__ -__asm__(".section .note.ABI-tag, \"a\"\n\t" - ".p2align 2\n\t" - ".long 1f - 0f\n\t" /* name length */ - ".long 3f - 2f\n\t" /* data length */ - ".long 1\n\t" /* note length */ - "0: .asciz \"GNU\"\n\t" /* vendor name */ - "1: .p2align 2\n\t" - "2: .long 0\n\t" /* note data: the ABI tag */ - ".long 2,4,20\n\t" /* Minimum kernel version w/TLS */ - "3: .p2align 2\n\t"); /* pad out section */ -#endif /* __linux__ */ - __asm__(".text"); __asm__("x86_current_tls:\n\t" diff --git a/src/mapi/mapi/u_compiler.h b/src/mapi/mapi/u_compiler.h index 2b019ed15b..f376e97a0f 100644 --- a/src/mapi/mapi/u_compiler.h +++ b/src/mapi/mapi/u_compiler.h @@ -1,28 +1,10 @@ #ifndef _U_COMPILER_H_ #define _U_COMPILER_H_ -/* Function inlining */ -#ifndef inline -# ifdef __cplusplus - /* C++ supports inline keyword */ -# elif defined(__GNUC__) -# define inline __inline__ -# elif defined(_MSC_VER) -# define inline __inline -# elif defined(__ICL) -# define inline __inline -# elif defined(__INTEL_COMPILER) - /* Intel compiler supports inline keyword */ -# elif defined(__WATCOMC__) && (__WATCOMC__ >= 1100) -# define inline __inline -# elif defined(__SUNPRO_C) && defined(__C99FEATURES__) - /* C99 supports inline keyword */ -# elif (__STDC_VERSION__ >= 199901L) - /* C99 supports inline keyword */ -# else -# define inline -# endif -#endif +#include "c99_compat.h" /* inline, __func__, etc. */ + + +/* XXX: Use standard `inline` keyword instead */ #ifndef INLINE # define INLINE inline #endif diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c index 53d8e5400e..cde1a06193 100644 --- a/src/mesa/drivers/dri/i965/brw_clear.c +++ b/src/mesa/drivers/dri/i965/brw_clear.c @@ -40,6 +40,8 @@ #include "intel_mipmap_tree.h" #include "intel_regions.h" +#include "brw_context.h" + #define FILE_DEBUG_FLAG DEBUG_BLIT static const char *buffer_names[] = { @@ -219,7 +221,8 @@ brw_fast_clear_depth(struct gl_context *ctx) static void brw_clear(struct gl_context *ctx, GLbitfield mask) { - struct intel_context *intel = intel_context(ctx); + struct brw_context *brw = brw_context(ctx); + struct intel_context *intel = &brw->intel; if (!_mesa_check_conditional_render(ctx)) return; @@ -229,6 +232,7 @@ brw_clear(struct gl_context *ctx, GLbitfield mask) } intel_prepare_render(intel); + brw_workaround_depthstencil_alignment(brw); if (mask & BUFFER_BIT_DEPTH) { if (brw_fast_clear_depth(ctx)) { diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 324bb1dfdd..d718c1590e 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -1310,7 +1310,8 @@ brw_program_reloc(struct brw_context *brw, uint32_t state_offset, } bool brw_do_cubemap_normalize(struct exec_list *instructions); -bool brw_lower_texture_gradients(struct exec_list *instructions); +bool brw_lower_texture_gradients(struct intel_context *intel, + struct exec_list *instructions); struct opcode_desc { char *name; @@ -1320,6 +1321,29 @@ struct opcode_desc { extern const struct opcode_desc opcode_descs[128]; +void +brw_emit_depthbuffer(struct brw_context *brw); + +void +brw_emit_depth_stencil_hiz(struct brw_context *brw, + struct intel_mipmap_tree *depth_mt, + uint32_t depth_offset, uint32_t depthbuffer_format, + uint32_t depth_surface_type, + struct intel_mipmap_tree *stencil_mt, + struct intel_mipmap_tree *hiz_mt, + bool separate_stencil, uint32_t width, + uint32_t height, uint32_t tile_x, uint32_t tile_y); + +void +gen7_emit_depth_stencil_hiz(struct brw_context *brw, + struct intel_mipmap_tree *depth_mt, + uint32_t depth_offset, uint32_t depthbuffer_format, + uint32_t depth_surface_type, + struct intel_mipmap_tree *stencil_mt, + struct intel_mipmap_tree *hiz_mt, + bool separate_stencil, uint32_t width, + uint32_t height, uint32_t tile_x, uint32_t tile_y); + #ifdef __cplusplus } #endif diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index 79cc12f0f6..4bcfb95c6b 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -437,6 +437,7 @@ #define BRW_SURFACEFORMAT_B10G10R10A2_SSCALED 0x1B9 #define BRW_SURFACEFORMAT_B10G10R10A2_UINT 0x1BA #define BRW_SURFACEFORMAT_B10G10R10A2_SINT 0x1BB +#define BRW_SURFACEFORMAT_RAW 0x1FF #define BRW_SURFACE_FORMAT_SHIFT 18 #define BRW_SURFACE_FORMAT_MASK INTEL_MASK(26, 18) @@ -857,6 +858,7 @@ enum brw_message_target { GEN6_SFID_DATAPORT_CONSTANT_CACHE = 9, GEN7_SFID_DATAPORT_DATA_CACHE = 10, + HSW_SFID_DATAPORT_DATA_CACHE_1 = 12, }; #define GEN7_MESSAGE_TARGET_DP_DATA_CACHE 10 @@ -965,7 +967,44 @@ enum brw_message_target { /* GEN7 */ #define GEN7_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 10 +#define GEN7_DATAPORT_DC_OWORD_BLOCK_READ 0 +#define GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ 1 +#define GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ 2 #define GEN7_DATAPORT_DC_DWORD_SCATTERED_READ 3 +#define GEN7_DATAPORT_DC_BYTE_SCATTERED_READ 4 +#define GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ 5 +#define GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP 6 +#define GEN7_DATAPORT_DC_MEMORY_FENCE 7 +#define GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE 8 +#define GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE 10 +#define GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE 11 +#define GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE 12 +#define GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE 13 + +/* HSW */ +#define HSW_DATAPORT_DC_PORT0_OWORD_BLOCK_READ 0 +#define HSW_DATAPORT_DC_PORT0_UNALIGNED_OWORD_BLOCK_READ 1 +#define HSW_DATAPORT_DC_PORT0_OWORD_DUAL_BLOCK_READ 2 +#define HSW_DATAPORT_DC_PORT0_DWORD_SCATTERED_READ 3 +#define HSW_DATAPORT_DC_PORT0_BYTE_SCATTERED_READ 4 +#define HSW_DATAPORT_DC_PORT0_MEMORY_FENCE 7 +#define HSW_DATAPORT_DC_PORT0_OWORD_BLOCK_WRITE 8 +#define HSW_DATAPORT_DC_PORT0_OWORD_DUAL_BLOCK_WRITE 10 +#define HSW_DATAPORT_DC_PORT0_DWORD_SCATTERED_WRITE 11 +#define HSW_DATAPORT_DC_PORT0_BYTE_SCATTERED_WRITE 12 + +#define HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ 1 +#define HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP 2 +#define HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2 3 +#define HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ 4 +#define HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ 5 +#define HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP 6 +#define HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2 7 +#define HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE 9 +#define HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE 10 +#define HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP 11 +#define HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2 12 +#define HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE 13 /* dataport atomic operations. */ #define BRW_AOP_AND 1 diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index b34754a9cf..40cae37f8a 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -2539,15 +2539,22 @@ void brw_shader_time_add(struct brw_compile *p, brw_set_src0(p, send, brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, base_mrf, 0)); + uint32_t sfid, msg_type; + if (intel->is_haswell) { + sfid = HSW_SFID_DATAPORT_DATA_CACHE_1; + msg_type = HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP; + } else { + sfid = GEN7_SFID_DATAPORT_DATA_CACHE; + msg_type = GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP; + } + bool header_present = false; bool eot = false; uint32_t mlen = 2; /* offset, value */ uint32_t rlen = 0; - brw_set_message_descriptor(p, send, - GEN7_SFID_DATAPORT_DATA_CACHE, - mlen, rlen, header_present, eot); + brw_set_message_descriptor(p, send, sfid, mlen, rlen, header_present, eot); - send->bits3.ud |= 6 << 14; /* untyped atomic op */ + send->bits3.ud |= msg_type << 14; send->bits3.ud |= 0 << 13; /* no return data */ send->bits3.ud |= 1 << 12; /* SIMD8 mode */ send->bits3.ud |= BRW_AOP_ADD << 8; diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index f80219e3d3..3c3b3a1bbe 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -221,11 +221,15 @@ fs_visitor::CMP(fs_reg dst, fs_reg src0, fs_reg src1, uint32_t condition) exec_list fs_visitor::VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index, - fs_reg offset) + fs_reg varying_offset, + uint32_t const_offset) { exec_list instructions; fs_inst *inst; + fs_reg offset = fs_reg(this, glsl_type::uint_type); + instructions.push_tail(ADD(offset, varying_offset, fs_reg(const_offset))); + if (intel->gen >= 7) { inst = new(mem_ctx) fs_inst(FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7, dst, surf_index, offset); @@ -245,7 +249,6 @@ fs_visitor::VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index, } else { instructions.push_tail(MUL(mrf, offset, fs_reg(4))); } - inst = MOV(mrf, offset); inst = new(mem_ctx) fs_inst(FS_OPCODE_VARYING_PULL_CONSTANT_LOAD, dst, surf_index); inst->header_present = header_present; @@ -959,16 +962,24 @@ fs_visitor::emit_linterp(const fs_reg &attr, const fs_reg &interp, bool is_centroid) { brw_wm_barycentric_interp_mode barycoord_mode; - if (is_centroid) { - if (interpolation_mode == INTERP_QUALIFIER_SMOOTH) - barycoord_mode = BRW_WM_PERSPECTIVE_CENTROID_BARYCENTRIC; - else - barycoord_mode = BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC; + if (intel->gen >= 6) { + if (is_centroid) { + if (interpolation_mode == INTERP_QUALIFIER_SMOOTH) + barycoord_mode = BRW_WM_PERSPECTIVE_CENTROID_BARYCENTRIC; + else + barycoord_mode = BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC; + } else { + if (interpolation_mode == INTERP_QUALIFIER_SMOOTH) + barycoord_mode = BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC; + else + barycoord_mode = BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC; + } } else { - if (interpolation_mode == INTERP_QUALIFIER_SMOOTH) - barycoord_mode = BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC; - else - barycoord_mode = BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC; + /* On Ironlake and below, there is only one interpolation mode. + * Centroid interpolation doesn't mean anything on this hardware -- + * there is no multisampling. + */ + barycoord_mode = BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC; } return emit(FS_OPCODE_LINTERP, attr, this->delta_x[barycoord_mode], @@ -1617,15 +1628,13 @@ fs_visitor::move_uniform_array_access_to_pull_constants() base_ir = inst->ir; current_annotation = inst->annotation; - fs_reg offset = fs_reg(this, glsl_type::int_type); - inst->insert_before(ADD(offset, *inst->src[i].reladdr, - fs_reg(pull_constant_loc[uniform] + - inst->src[i].reg_offset))); - fs_reg surf_index = fs_reg((unsigned)SURF_INDEX_FRAG_CONST_BUFFER); fs_reg temp = fs_reg(this, glsl_type::float_type); exec_list list = VARYING_PULL_CONSTANT_LOAD(temp, - surf_index, offset); + surf_index, + *inst->src[i].reladdr, + pull_constant_loc[uniform] + + inst->src[i].reg_offset); inst->insert_before(&list); inst->src[i].file = temp.file; @@ -2082,6 +2091,12 @@ fs_visitor::compute_to_mrf() break; } + /* Things returning more than one register would need us to + * understand coalescing out more than one MOV at a time. + */ + if (scan_inst->regs_written() > 1) + break; + /* SEND instructions can't have MRF as a destination. */ if (scan_inst->mlen) break; @@ -2295,7 +2310,8 @@ clear_deps_for_inst_src(fs_inst *inst, int dispatch_width, bool *deps, void fs_visitor::insert_gen4_pre_send_dependency_workarounds(fs_inst *inst) { - int write_len = inst->regs_written() * dispatch_width / 8; + int reg_size = dispatch_width / 8; + int write_len = inst->regs_written() * reg_size; int first_write_grf = inst->dst.reg; bool needs_dep[BRW_MAX_MRF]; assert(write_len < (int)sizeof(needs_dep) - 1); @@ -2334,14 +2350,19 @@ fs_visitor::insert_gen4_pre_send_dependency_workarounds(fs_inst *inst) * instruction but a MOV that might have left us an outstanding * dependency has more latency than a MOV. */ - if (scan_inst->dst.file == GRF && - scan_inst->dst.reg >= first_write_grf && - scan_inst->dst.reg < first_write_grf + write_len && - needs_dep[scan_inst->dst.reg - first_write_grf]) { - inst->insert_before(DEP_RESOLVE_MOV(scan_inst->dst.reg)); - needs_dep[scan_inst->dst.reg - first_write_grf] = false; - if (scan_inst_16wide) - needs_dep[scan_inst->dst.reg - first_write_grf + 1] = false; + if (scan_inst->dst.file == GRF) { + for (int i = 0; i < scan_inst->regs_written(); i++) { + int reg = scan_inst->dst.reg + i * reg_size; + + if (reg >= first_write_grf && + reg < first_write_grf + write_len && + needs_dep[reg - first_write_grf]) { + inst->insert_before(DEP_RESOLVE_MOV(reg)); + needs_dep[reg - first_write_grf] = false; + if (scan_inst_16wide) + needs_dep[reg - first_write_grf + 1] = false; + } + } } /* Clear the flag for registers that actually got read (as expected). */ @@ -2494,6 +2515,8 @@ fs_visitor::lower_uniform_pull_constant_loads() inst->insert_before(setup2); inst->opcode = FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD_GEN7; inst->src[1] = payload; + + this->live_intervals_valid = false; } else { /* Before register allocation, we didn't tell the scheduler about the * MRF we use. We know it's safe to use this MRF because nothing diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index d1bb111bf5..c776c77adf 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++ b/src/mesa/drivers/dri/i965/brw_fs.h @@ -293,7 +293,8 @@ public: fs_reg reg); exec_list VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index, - fs_reg offset); + fs_reg varying_offset, + uint32_t const_offset); bool run(); void setup_payload_gen4(); diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp index a13ca36269..ebdfa272ae 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp @@ -66,6 +66,7 @@ is_expression(const fs_inst *const inst) case BRW_OPCODE_LINE: case BRW_OPCODE_PLN: case BRW_OPCODE_MAD: + case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7: case FS_OPCODE_CINTERP: case FS_OPCODE_LINTERP: return true; @@ -126,19 +127,41 @@ fs_visitor::opt_cse_local(bblock_t *block, exec_list *aeb) */ bool no_existing_temp = entry->tmp.file == BAD_FILE; if (no_existing_temp) { - entry->tmp = fs_reg(this, glsl_type::float_type); - entry->tmp.type = inst->dst.type; - - fs_inst *copy = new(ralloc_parent(inst)) - fs_inst(BRW_OPCODE_MOV, entry->generator->dst, entry->tmp); - entry->generator->insert_after(copy); - entry->generator->dst = entry->tmp; + int written = entry->generator->regs_written(); + + fs_reg orig_dst = entry->generator->dst; + fs_reg tmp = fs_reg(GRF, virtual_grf_alloc(written), + orig_dst.type); + entry->tmp = tmp; + entry->generator->dst = tmp; + + for (int i = 0; i < written; i++) { + fs_inst *copy = MOV(orig_dst, tmp); + copy->force_writemask_all = + entry->generator->force_writemask_all; + entry->generator->insert_after(copy); + + orig_dst.reg_offset++; + tmp.reg_offset++; + } } /* dest <- temp */ - fs_inst *copy = new(ralloc_parent(inst)) - fs_inst(BRW_OPCODE_MOV, inst->dst, entry->tmp); - inst->replace_with(copy); + int written = inst->regs_written(); + assert(written == entry->generator->regs_written()); + assert(inst->dst.type == entry->tmp.type); + fs_reg dst = inst->dst; + fs_reg tmp = entry->tmp; + fs_inst *copy = NULL; + for (int i = 0; i < written; i++) { + copy = MOV(dst, tmp); + copy->force_writemask_all = inst->force_writemask_all; + inst->insert_before(copy); + + dst.reg_offset++; + tmp.reg_offset++; + } + inst->remove(); /* Appending an instruction may have changed our bblock end. */ if (inst == block->end) { diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp index 365a2ec354..aa3a616015 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp @@ -469,6 +469,7 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src */ if (inst->texture_offset) { brw_push_insn_state(p); + brw_set_mask_control(p, BRW_MASK_DISABLE); brw_set_compression_control(p, BRW_COMPRESSION_NONE); /* Explicitly set up the message header by copying g0 to the MRF. */ brw_MOV(p, retype(brw_message_reg(inst->base_mrf), BRW_REGISTER_TYPE_UD), diff --git a/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp b/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp index db8f39732d..4c7991dc54 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp @@ -190,6 +190,37 @@ fs_visitor::calculate_live_intervals() int reg = inst->src[i].reg; use[reg] = ip; + + /* In most cases, a register can be written over safely by the + * same instruction that is its last use. For a single + * instruction, the sources are dereferenced before writing of the + * destination starts (naturally). This gets more complicated for + * simd16, because the instruction: + * + * mov(16) g4<1>F g4<8,8,1>F g6<8,8,1>F + * + * is actually decoded in hardware as: + * + * mov(8) g4<1>F g4<8,8,1>F g6<8,8,1>F + * mov(8) g5<1>F g5<8,8,1>F g7<8,8,1>F + * + * Which is safe. However, if we have uniform accesses + * happening, we get into trouble: + * + * mov(8) g4<1>F g4<0,1,0>F g6<8,8,1>F + * mov(8) g5<1>F g4<0,1,0>F g7<8,8,1>F + * + * Now our destination for the first instruction overwrote the + * second instruction's src0, and we get garbage for those 8 + * pixels. There's a similar issue for the pre-gen6 + * pixel_x/pixel_y, which are registers of 16-bit values and thus + * would get stomped by the first decode as well. + */ + if (dispatch_width == 16 && (inst->src[i].smear || + (this->pixel_x.reg == reg || + this->pixel_y.reg == reg))) { + use[reg]++; + } } } @@ -264,28 +295,5 @@ fs_visitor::virtual_grf_interferes(int a, int b) int start = MAX2(a_def, b_def); int end = MIN2(a_use, b_use); - /* If the register is used to store 16 values of less than float - * size (only the case for pixel_[xy]), then we can't allocate - * another dword-sized thing to that register that would be used in - * the same instruction. This is because when the GPU decodes (for - * example): - * - * (declare (in ) vec4 gl_FragCoord@0x97766a0) - * add(16) g6<1>F g6<8,8,1>UW 0.5F { align1 compr }; - * - * it's actually processed as: - * add(8) g6<1>F g6<8,8,1>UW 0.5F { align1 }; - * add(8) g7<1>F g6.8<8,8,1>UW 0.5F { align1 sechalf }; - * - * so our second half values in g6 got overwritten in the first - * half. - */ - if (dispatch_width == 16 && (this->pixel_x.reg == a || - this->pixel_x.reg == b || - this->pixel_y.reg == a || - this->pixel_y.reg == b)) { - return start <= end; - } - return start < end; } diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index 573921cf8c..007c8efafa 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -626,9 +626,8 @@ fs_visitor::visit(ir_expression *ir) emit(SHR(base_offset, op[1], fs_reg(2))); for (int i = 0; i < ir->type->vector_elements; i++) { - fs_reg offset = fs_reg(this, glsl_type::int_type); - emit(ADD(offset, base_offset, fs_reg(i))); - emit(VARYING_PULL_CONSTANT_LOAD(result, surf_index, offset)); + emit(VARYING_PULL_CONSTANT_LOAD(result, surf_index, + base_offset, i)); if (ir->type->base_type == GLSL_TYPE_BOOL) emit(CMP(result, result, fs_reg(0), BRW_CONDITIONAL_NZ)); @@ -888,11 +887,10 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate, * this weirdness around to the expected layout. */ orig_dst = dst; - const glsl_type *vec_type = - glsl_type::get_instance(ir->type->base_type, 4, 1); - dst = fs_reg(this, glsl_type::get_array_instance(vec_type, 2)); - dst.type = intel->is_g4x ? brw_type_for_base_type(ir->type) - : BRW_REGISTER_TYPE_F; + dst = fs_reg(GRF, virtual_grf_alloc(8), + (intel->is_g4x ? + brw_type_for_base_type(ir->type) : + BRW_REGISTER_TYPE_F)); } fs_inst *inst = NULL; diff --git a/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp b/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp index 9e661a1b5a..a192d0e141 100644 --- a/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp +++ b/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp @@ -28,12 +28,14 @@ #include "glsl/ir.h" #include "glsl/ir_builder.h" #include "program/prog_instruction.h" +#include "brw_context.h" using namespace ir_builder; class lower_texture_grad_visitor : public ir_hierarchical_visitor { public: - lower_texture_grad_visitor() + lower_texture_grad_visitor(bool has_sample_d_c) + : has_sample_d_c(has_sample_d_c) { progress = false; } @@ -42,6 +44,7 @@ public: bool progress; + bool has_sample_d_c; private: void emit(ir_variable *, ir_rvalue *); @@ -90,6 +93,22 @@ lower_texture_grad_visitor::visit_leave(ir_texture *ir) if (ir->op != ir_txd || !ir->shadow_comparitor) return visit_continue; + /* Lower textureGrad() with samplerCubeShadow even if we have the sample_d_c + * message. GLSL provides gradients for the 'r' coordinate. Unfortunately: + * + * From the Ivybridge PRM, Volume 4, Part 1, sample_d message description: + * "The r coordinate contains the faceid, and the r gradients are ignored + * by hardware." + * + * We likely need to do a similar treatment for samplerCube and + * samplerCubeArray, but we have insufficient testing for that at the moment. + */ + bool need_lowering = !has_sample_d_c || + ir->sampler->type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE; + + if (!need_lowering) + return visit_continue; + void *mem_ctx = ralloc_parent(ir); const glsl_type *grad_type = ir->lod_info.grad.dPdx->type; @@ -145,9 +164,11 @@ lower_texture_grad_visitor::visit_leave(ir_texture *ir) extern "C" { bool -brw_lower_texture_gradients(struct exec_list *instructions) +brw_lower_texture_gradients(struct intel_context *intel, + struct exec_list *instructions) { - lower_texture_grad_visitor v; + bool has_sample_d_c = intel->gen >= 8 || intel->is_haswell; + lower_texture_grad_visitor v(has_sample_d_c); visit_list_elements(&v, instructions); diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 1024c4247f..0fd167e329 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -540,7 +540,8 @@ brw_workaround_depthstencil_alignment(struct brw_context *brw) } } -static void emit_depthbuffer(struct brw_context *brw) +void +brw_emit_depthbuffer(struct brw_context *brw) { struct intel_context *intel = &brw->intel; struct gl_context *ctx = &intel->ctx; @@ -553,18 +554,17 @@ static void emit_depthbuffer(struct brw_context *brw) struct intel_mipmap_tree *hiz_mt = brw->depthstencil.hiz_mt; uint32_t tile_x = brw->depthstencil.tile_x; uint32_t tile_y = brw->depthstencil.tile_y; - unsigned int len; bool separate_stencil = false; + uint32_t depth_surface_type = BRW_SURFACE_NULL; + uint32_t depthbuffer_format = BRW_DEPTHFORMAT_D32_FLOAT; + uint32_t depth_offset = 0; + uint32_t width = 1, height = 1; - if (stencil_mt && stencil_mt->format == MESA_FORMAT_S8) - separate_stencil = true; + if (stencil_mt) { + separate_stencil = stencil_mt->format == MESA_FORMAT_S8; - /* 3DSTATE_DEPTH_BUFFER, 3DSTATE_STENCIL_BUFFER are both - * non-pipelined state that will need the PIPE_CONTROL workaround. - */ - if (intel->gen == 6) { - intel_emit_post_sync_nonzero_flush(intel); - intel_emit_depth_stall_flushes(intel); + /* Gen7 supports only separate stencil */ + assert(separate_stencil || intel->gen < 7); } /* If there's a packed depth/stencil bound to stencil only, we need to @@ -575,31 +575,33 @@ static void emit_depthbuffer(struct brw_context *brw) depth_mt = stencil_mt; } - if (intel->gen >= 6) - len = 7; - else if (intel->is_g4x || intel->gen == 5) - len = 6; - else - len = 5; - - if (!depth_irb && !separate_stencil) { - BEGIN_BATCH(len); - OUT_BATCH(_3DSTATE_DEPTH_BUFFER << 16 | (len - 2)); - OUT_BATCH((BRW_DEPTHFORMAT_D32_FLOAT << 18) | - (BRW_SURFACE_NULL << 29)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); + if (depth_irb) { + struct intel_region *region = depth_mt->region; - if (intel->is_g4x || intel->gen >= 5) - OUT_BATCH(0); + /* When 3DSTATE_DEPTH_BUFFER.Separate_Stencil_Enable is set, then + * 3DSTATE_DEPTH_BUFFER.Surface_Format is not permitted to be a packed + * depthstencil format. + * + * Gens prior to 7 require that HiZ_Enable and Separate_Stencil_Enable be + * set to the same value. Gens after 7 implicitly always set + * Separate_Stencil_Enable; software cannot disable it. + */ + if ((intel->gen < 7 && depth_mt->hiz_mt) || intel->gen >= 7) { + assert(!_mesa_is_format_packed_depth_stencil(depth_mt->format)); + } - if (intel->gen >= 6) - OUT_BATCH(0); + /* Prior to Gen7, if using separate stencil, hiz must be enabled. */ + assert(intel->gen >= 7 || !separate_stencil || hiz_mt); - ADVANCE_BATCH(); + assert(intel->gen < 6 || region->tiling == I915_TILING_Y); + assert(!hiz_mt || region->tiling == I915_TILING_Y); - } else if (!depth_irb && separate_stencil) { + depthbuffer_format = brw_depthbuffer_format(brw); + depth_surface_type = BRW_SURFACE_2D; + depth_offset = brw->depthstencil.depth_offset; + width = depth_irb->Base.Base.Width; + height = depth_irb->Base.Base.Height; + } else if (separate_stencil) { /* * There exists a separate stencil buffer but no depth buffer. * @@ -607,80 +609,95 @@ static void emit_depthbuffer(struct brw_context *brw) * 3DSTATE_DEPTH_BUFFER: namely the tile walk, surface type, width, and * height. * - * Enable the hiz bit because it and the separate stencil bit must have - * the same value. From Section 2.11.5.6.1.1 3DSTATE_DEPTH_BUFFER, Bit - * 1.21 "Separate Stencil Enable": - * [DevIL]: If this field is enabled, Hierarchical Depth Buffer - * Enable must also be enabled. - * - * [DevGT]: This field must be set to the same value (enabled or - * disabled) as Hierarchical Depth Buffer Enable - * * The tiled bit must be set. From the Sandybridge PRM, Volume 2, Part 1, * Section 7.5.5.1.1 3DSTATE_DEPTH_BUFFER, Bit 1.27 Tiled Surface: * [DevGT+]: This field must be set to TRUE. */ assert(intel->has_separate_stencil); - BEGIN_BATCH(len); - OUT_BATCH(_3DSTATE_DEPTH_BUFFER << 16 | (len - 2)); - OUT_BATCH((BRW_DEPTHFORMAT_D32_FLOAT << 18) | - (1 << 21) | /* separate stencil enable */ - (1 << 22) | /* hiz enable */ - (BRW_TILEWALK_YMAJOR << 26) | - (1 << 27) | /* tiled surface */ - (BRW_SURFACE_2D << 29)); - OUT_BATCH(0); - OUT_BATCH(((stencil_irb->Base.Base.Width + tile_x - 1) << 6) | - (stencil_irb->Base.Base.Height + tile_y - 1) << 19); - OUT_BATCH(0); + depth_surface_type = BRW_SURFACE_2D; + width = stencil_irb->Base.Base.Width; + height = stencil_irb->Base.Base.Height; + } - if (intel->is_g4x || intel->gen >= 5) - OUT_BATCH(tile_x | (tile_y << 16)); - else - assert(tile_x == 0 && tile_y == 0); + intel->vtbl.emit_depth_stencil_hiz(brw, depth_mt, depth_offset, + depthbuffer_format, depth_surface_type, + stencil_mt, hiz_mt, separate_stencil, + width, height, tile_x, tile_y); +} - if (intel->gen >= 6) - OUT_BATCH(0); +void +brw_emit_depth_stencil_hiz(struct brw_context *brw, + struct intel_mipmap_tree *depth_mt, + uint32_t depth_offset, uint32_t depthbuffer_format, + uint32_t depth_surface_type, + struct intel_mipmap_tree *stencil_mt, + struct intel_mipmap_tree *hiz_mt, + bool separate_stencil, uint32_t width, + uint32_t height, uint32_t tile_x, uint32_t tile_y) +{ + struct intel_context *intel = &brw->intel; - ADVANCE_BATCH(); + /* Enable the hiz bit if we're doing separate stencil, because it and the + * separate stencil bit must have the same value. From Section 2.11.5.6.1.1 + * 3DSTATE_DEPTH_BUFFER, Bit 1.21 "Separate Stencil Enable": + * [DevIL]: If this field is enabled, Hierarchical Depth Buffer + * Enable must also be enabled. + * + * [DevGT]: This field must be set to the same value (enabled or + * disabled) as Hierarchical Depth Buffer Enable + */ + bool enable_hiz_ss = hiz_mt || separate_stencil; - } else { - struct intel_region *region = depth_mt->region; - /* If using separate stencil, hiz must be enabled. */ - assert(!separate_stencil || hiz_mt); + /* 3DSTATE_DEPTH_BUFFER, 3DSTATE_STENCIL_BUFFER are both + * non-pipelined state that will need the PIPE_CONTROL workaround. + */ + if (intel->gen == 6) { + intel_emit_post_sync_nonzero_flush(intel); + intel_emit_depth_stall_flushes(intel); + } - assert(intel->gen < 6 || region->tiling == I915_TILING_Y); - assert(!hiz_mt || region->tiling == I915_TILING_Y); + unsigned int len; + if (intel->gen >= 6) + len = 7; + else if (intel->is_g4x || intel->gen == 5) + len = 6; + else + len = 5; - BEGIN_BATCH(len); - OUT_BATCH(_3DSTATE_DEPTH_BUFFER << 16 | (len - 2)); - OUT_BATCH((region->pitch - 1) | - (brw_depthbuffer_format(brw) << 18) | - ((hiz_mt ? 1 : 0) << 21) | /* separate stencil enable */ - ((hiz_mt ? 1 : 0) << 22) | /* hiz enable */ - (BRW_TILEWALK_YMAJOR << 26) | - ((region->tiling != I915_TILING_NONE) << 27) | - (BRW_SURFACE_2D << 29)); - OUT_RELOC(region->bo, + BEGIN_BATCH(len); + OUT_BATCH(_3DSTATE_DEPTH_BUFFER << 16 | (len - 2)); + OUT_BATCH((depth_mt ? depth_mt->region->pitch - 1 : 0) | + (depthbuffer_format << 18) | + ((enable_hiz_ss ? 1 : 0) << 21) | /* separate stencil enable */ + ((enable_hiz_ss ? 1 : 0) << 22) | /* hiz enable */ + (BRW_TILEWALK_YMAJOR << 26) | + ((depth_mt ? depth_mt->region->tiling != I915_TILING_NONE : 1) + << 27) | + (depth_surface_type << 29)); + + if (depth_mt) { + OUT_RELOC(depth_mt->region->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, - brw->depthstencil.depth_offset); - OUT_BATCH((BRW_SURFACE_MIPMAPLAYOUT_BELOW << 1) | - (((depth_irb->Base.Base.Width + tile_x) - 1) << 6) | - (((depth_irb->Base.Base.Height + tile_y) - 1) << 19)); + depth_offset); + } else { OUT_BATCH(0); + } - if (intel->is_g4x || intel->gen >= 5) - OUT_BATCH(tile_x | (tile_y << 16)); - else - assert(tile_x == 0 && tile_y == 0); + OUT_BATCH(((width + tile_x - 1) << 6) | + ((height + tile_y - 1) << 19)); + OUT_BATCH(0); - if (intel->gen >= 6) - OUT_BATCH(0); + if (intel->is_g4x || intel->gen >= 5) + OUT_BATCH(tile_x | (tile_y << 16)); + else + assert(tile_x == 0 && tile_y == 0); - ADVANCE_BATCH(); - } + if (intel->gen >= 6) + OUT_BATCH(0); + + ADVANCE_BATCH(); if (hiz_mt || separate_stencil) { /* @@ -749,7 +766,7 @@ static void emit_depthbuffer(struct brw_context *brw) OUT_BATCH(_3DSTATE_CLEAR_PARAMS << 16 | GEN5_DEPTH_CLEAR_VALID | (2 - 2)); - OUT_BATCH(depth_irb ? depth_irb->mt->depth_clear_value : 0); + OUT_BATCH(depth_mt ? depth_mt->depth_clear_value : 0); ADVANCE_BATCH(); } } @@ -760,7 +777,7 @@ const struct brw_tracked_state brw_depthbuffer = { .brw = BRW_NEW_BATCH, .cache = 0, }, - .emit = emit_depthbuffer, + .emit = brw_emit_depthbuffer, }; diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index c71715ee51..ed2947e2b0 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.cpp +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp @@ -164,8 +164,7 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg) lower_if_to_cond_assign(shader->ir, 16); do_lower_texture_projection(shader->ir); - if (intel->gen < 8 && !intel->is_haswell) - brw_lower_texture_gradients(shader->ir); + brw_lower_texture_gradients(intel, shader->ir); do_vec_index_to_cond_assign(shader->ir); brw_do_cubemap_normalize(shader->ir); lower_noise(shader->ir); diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index ecc61c41ef..29ec2767e3 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -187,11 +187,6 @@ void *brw_state_batch(struct brw_context *brw, void gen4_init_vtable_surface_functions(struct brw_context *brw); uint32_t brw_get_surface_tiling_bits(uint32_t tiling); uint32_t brw_get_surface_num_multisamples(unsigned num_samples); -void brw_create_constant_surface(struct brw_context *brw, - drm_intel_bo *bo, - uint32_t offset, - int width, - uint32_t *out_offset); uint32_t brw_format_for_mesa_format(gl_format mesa_format); @@ -216,6 +211,8 @@ void gen7_set_surface_mcs_info(struct brw_context *brw, bool is_render_target); void gen7_check_surface_setup(uint32_t *surf, bool is_render_target); void gen7_init_vtable_surface_functions(struct brw_context *brw); +void gen7_create_shader_time_surface(struct brw_context *brw, + uint32_t *out_offset); /* brw_wm_sampler_state.c */ uint32_t translate_wrap_mode(GLenum wrap, bool using_nearest); diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp index e395ada5d8..863ff7ce02 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp @@ -335,6 +335,8 @@ vec4_generator::generate_tex(vec4_instruction *inst, */ if (inst->texture_offset) { /* Explicitly set up the message header by copying g0 to the MRF. */ + brw_push_insn_state(p); + brw_set_mask_control(p, BRW_MASK_DISABLE); brw_MOV(p, retype(brw_message_reg(inst->base_mrf), BRW_REGISTER_TYPE_UD), retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD)); @@ -344,7 +346,7 @@ vec4_generator::generate_tex(vec4_instruction *inst, retype(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, inst->base_mrf, 2), BRW_REGISTER_TYPE_UD), brw_imm_uw(inst->texture_offset)); - brw_set_access_mode(p, BRW_ALIGN_16); + brw_pop_insn_state(p); } else if (inst->header_present) { /* Set up an implied move from g0 to the MRF. */ src = brw_vec8_grf(0, 0); diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index ae4cf7d423..a0b5c8c181 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -2194,7 +2194,7 @@ vec4_visitor::visit(ir_texture *ir) emit(MOV(dst_reg(MRF, param_base, ir->coordinate->type, zero_mask), src_reg(0))); /* Load the shadow comparitor */ - if (ir->shadow_comparitor) { + if (ir->shadow_comparitor && ir->op != ir_txd) { emit(MOV(dst_reg(MRF, param_base + 1, ir->shadow_comparitor->type, WRITEMASK_X), shadow_comparitor)); @@ -2231,12 +2231,18 @@ vec4_visitor::visit(ir_texture *ir) emit(MOV(dst_reg(MRF, param_base + 1, type, WRITEMASK_YW), dPdy)); inst->mlen++; - if (ir->type->vector_elements == 3) { + if (ir->type->vector_elements == 3 || ir->shadow_comparitor) { dPdx.swizzle = BRW_SWIZZLE_ZZZZ; dPdy.swizzle = BRW_SWIZZLE_ZZZZ; emit(MOV(dst_reg(MRF, param_base + 2, type, WRITEMASK_X), dPdx)); emit(MOV(dst_reg(MRF, param_base + 2, type, WRITEMASK_Y), dPdy)); inst->mlen++; + + if (ir->shadow_comparitor) { + emit(MOV(dst_reg(MRF, param_base + 2, + ir->shadow_comparitor->type, WRITEMASK_Z), + shadow_comparitor)); + } } } else /* intel->gen == 4 */ { emit(MOV(dst_reg(MRF, param_base + 1, type, WRITEMASK_XYZ), dPdx)); diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c index 0810471778..0234ebb0ea 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.c +++ b/src/mesa/drivers/dri/i965/brw_vs.c @@ -62,9 +62,13 @@ brw_compute_vue_map(struct brw_context *brw, struct brw_vs_compile *c) { const struct intel_context *intel = &brw->intel; struct brw_vue_map *vue_map = &c->prog_data.vue_map; - GLbitfield64 outputs_written = c->prog_data.outputs_written; + GLbitfield64 outputs_written; int i; + if (intel->gen < 6) + c->prog_data.outputs_written &= ~BITFIELD64_BIT(VERT_RESULT_CLIP_VERTEX); + outputs_written = c->prog_data.outputs_written; + vue_map->num_slots = 0; for (i = 0; i < BRW_VERT_RESULT_MAX; ++i) { vue_map->vert_result_to_slot[i] = -1; @@ -150,8 +154,6 @@ brw_compute_vue_map(struct brw_context *brw, struct brw_vs_compile *c) * feedback is enabled or disabled, just go ahead and assign a slot for it. */ for (int i = 0; i < VERT_RESULT_MAX; ++i) { - if (intel->gen < 6 && i == VERT_RESULT_CLIP_VERTEX) - continue; if ((outputs_written & BITFIELD64_BIT(i)) && vue_map->vert_result_to_slot[i] == -1) { assign_vue_slot(vue_map, i); diff --git a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c index 4da7eaa51b..6c0b690818 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c @@ -68,9 +68,9 @@ brw_upload_vs_pull_constants(struct brw_context *brw) /* _NEW_PROGRAM_CONSTANTS */ drm_intel_bo_unreference(brw->vs.const_bo); + uint32_t size = brw->vs.prog_data->nr_pull_params * 4; brw->vs.const_bo = drm_intel_bo_alloc(intel->bufmgr, "vp_const_buffer", - brw->vs.prog_data->nr_pull_params * 4, - 64); + size, 64); drm_intel_gem_bo_map_gtt(brw->vs.const_bo); for (i = 0; i < brw->vs.prog_data->nr_pull_params; i++) { @@ -90,8 +90,7 @@ brw_upload_vs_pull_constants(struct brw_context *brw) drm_intel_gem_bo_unmap_gtt(brw->vs.const_bo); const int surf = SURF_INDEX_VERT_CONST_BUFFER; - intel->vtbl.create_constant_surface(brw, brw->vs.const_bo, 0, - ALIGN(brw->vs.prog_data->nr_pull_params, 4) / 4, + intel->vtbl.create_constant_surface(brw, brw->vs.const_bo, 0, size, &brw->vs.surf_offset[surf]); brw->state.dirty.brw |= BRW_NEW_VS_CONSTBUF; @@ -137,14 +136,11 @@ const struct brw_tracked_state brw_vs_ubo_surfaces = { static void brw_vs_upload_binding_table(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; uint32_t *bind; int i; if (INTEL_DEBUG & DEBUG_SHADER_TIME) { - intel->vtbl.create_constant_surface(brw, brw->shader_time.bo, 0, - brw->shader_time.bo->size, - &brw->vs.surf_offset[SURF_INDEX_VS_SHADER_TIME]); + gen7_create_shader_time_surface(brw, &brw->vs.surf_offset[SURF_INDEX_VS_SHADER_TIME]); assert(brw->vs.prog_data->num_surfaces <= SURF_INDEX_VS_SHADER_TIME); brw->vs.prog_data->num_surfaces = SURF_INDEX_VS_SHADER_TIME; diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c index cb25be9735..4ca83e4cc5 100644 --- a/src/mesa/drivers/dri/i965/brw_vtbl.c +++ b/src/mesa/drivers/dri/i965/brw_vtbl.c @@ -267,7 +267,9 @@ void brwInitVtbl( struct brw_context *brw ) assert(brw->intel.gen >= 4); if (brw->intel.gen >= 7) { gen7_init_vtable_surface_functions(brw); + brw->intel.vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz; } else if (brw->intel.gen >= 4) { gen4_init_vtable_surface_functions(brw); + brw->intel.vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz; } } diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 6ec7d7123c..b4369989ee 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -770,7 +770,8 @@ brw_get_texture_swizzle(const struct gl_context *ctx, case GL_RED: case GL_RG: case GL_RGB: - swizzles[3] = SWIZZLE_ONE; + if (_mesa_get_format_bits(img->TexFormat, GL_ALPHA_BITS) > 0) + swizzles[3] = SWIZZLE_ONE; break; } @@ -898,15 +899,17 @@ brw_update_texture_surface(struct gl_context *ctx, * Create the constant buffer surface. Vertex/fragment shader constants will be * read from this buffer with Data Port Read instructions/messages. */ -void +static void brw_create_constant_surface(struct brw_context *brw, drm_intel_bo *bo, uint32_t offset, - int width, + uint32_t size, uint32_t *out_offset) { struct intel_context *intel = &brw->intel; - const GLint w = width - 1; + uint32_t stride = 16; + uint32_t elements = ALIGN(size, stride) / stride; + const GLint w = elements - 1; uint32_t *surf; surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, @@ -925,7 +928,7 @@ brw_create_constant_surface(struct brw_context *brw, ((w >> 7) & 0x1fff) << BRW_SURFACE_HEIGHT_SHIFT); surf[3] = (((w >> 20) & 0x7f) << BRW_SURFACE_DEPTH_SHIFT | - (16 - 1) << BRW_SURFACE_PITCH_SHIFT); /* ignored */ + (stride - 1) << BRW_SURFACE_PITCH_SHIFT); surf[4] = 0; surf[5] = 0; @@ -1072,8 +1075,7 @@ brw_upload_wm_pull_constants(struct brw_context *brw) } drm_intel_gem_bo_unmap_gtt(brw->wm.const_bo); - intel->vtbl.create_constant_surface(brw, brw->wm.const_bo, 0, - ALIGN(brw->wm.prog_data->nr_pull_params, 4) / 4, + intel->vtbl.create_constant_surface(brw, brw->wm.const_bo, 0, size, &brw->wm.surf_offset[surf_index]); brw->state.dirty.brw |= BRW_NEW_SURFACES; @@ -1425,11 +1427,8 @@ brw_upload_ubo_surfaces(struct brw_context *brw, * glBindBufferRange case is undefined, we can just bind the whole buffer * glBindBufferBase wants and be a correct implementation. */ - int size = bo->size - binding->Offset; - size = ALIGN(size, 16) / 16; /* The interface takes a number of vec4s */ - intel->vtbl.create_constant_surface(brw, bo, binding->Offset, - size, + bo->size - binding->Offset, &surf_offsets[i]); } @@ -1468,14 +1467,11 @@ const struct brw_tracked_state brw_wm_ubo_surfaces = { static void brw_upload_wm_binding_table(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; uint32_t *bind; int i; if (INTEL_DEBUG & DEBUG_SHADER_TIME) { - intel->vtbl.create_constant_surface(brw, brw->shader_time.bo, 0, - brw->shader_time.bo->size, - &brw->wm.surf_offset[SURF_INDEX_WM_SHADER_TIME]); + gen7_create_shader_time_surface(brw, &brw->wm.surf_offset[SURF_INDEX_WM_SHADER_TIME]); } /* Might want to calculate nr_surfaces first, to avoid taking up so much diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index 3834ae230b..4fbcea434c 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -594,6 +594,15 @@ gen6_blorp_emit_vs_disable(struct brw_context *brw, intel_emit_post_sync_nonzero_flush(intel); } + /* Disable the push constant buffers. */ + BEGIN_BATCH(5); + OUT_BATCH(_3DSTATE_CONSTANT_VS << 16 | (5 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); + BEGIN_BATCH(6); OUT_BATCH(_3DSTATE_VS << 16 | (6 - 2)); OUT_BATCH(0); @@ -615,6 +624,15 @@ gen6_blorp_emit_gs_disable(struct brw_context *brw, { struct intel_context *intel = &brw->intel; + /* Disable all the constant buffers. */ + BEGIN_BATCH(5); + OUT_BATCH(_3DSTATE_CONSTANT_GS << 16 | (5 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); + BEGIN_BATCH(7); OUT_BATCH(_3DSTATE_GS << 16 | (7 - 2)); OUT_BATCH(0); @@ -797,6 +815,21 @@ gen6_blorp_emit_constant_ps(struct brw_context *brw, ADVANCE_BATCH(); } +static void +gen6_blorp_emit_constant_ps_disable(struct brw_context *brw, + const brw_blorp_params *params) +{ + struct intel_context *intel = &brw->intel; + + /* Disable the push constant buffers. */ + BEGIN_BATCH(5); + OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | (5 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); +} /** * 3DSTATE_BINDING_TABLE_POINTERS @@ -1074,6 +1107,8 @@ gen6_blorp_exec(struct intel_context *intel, gen6_blorp_emit_sf_config(brw, params); if (params->use_wm_prog) gen6_blorp_emit_constant_ps(brw, params, wm_push_const_offset); + else + gen6_blorp_emit_constant_ps_disable(brw, params); gen6_blorp_emit_wm_config(brw, params, prog_offset, prog_data); if (params->use_wm_prog) gen6_blorp_emit_binding_table_pointers(brw, params, wm_bind_bo_offset); diff --git a/src/mesa/drivers/dri/i965/gen6_cc.c b/src/mesa/drivers/dri/i965/gen6_cc.c index d32f6366b7..7ac5d5ff72 100644 --- a/src/mesa/drivers/dri/i965/gen6_cc.c +++ b/src/mesa/drivers/dri/i965/gen6_cc.c @@ -126,7 +126,7 @@ gen6_upload_blend_state(struct brw_context *brw) * not read the alpha channel, but will instead use the correct * implicit value for alpha. */ - if (!_mesa_base_format_has_channel(rb->_BaseFormat, GL_TEXTURE_ALPHA_TYPE)) + if (rb && !_mesa_base_format_has_channel(rb->_BaseFormat, GL_TEXTURE_ALPHA_TYPE)) { srcRGB = brw_fix_xRGB_alpha(srcRGB); srcA = brw_fix_xRGB_alpha(srcA); diff --git a/src/mesa/drivers/dri/i965/gen6_sol.c b/src/mesa/drivers/dri/i965/gen6_sol.c index 9c09adee00..cf7a60db6b 100644 --- a/src/mesa/drivers/dri/i965/gen6_sol.c +++ b/src/mesa/drivers/dri/i965/gen6_sol.c @@ -147,7 +147,7 @@ gen6_update_sol_indices(struct brw_context *brw) const struct brw_tracked_state gen6_sol_indices = { .dirty = { .mesa = 0, - .brw = (BRW_NEW_BATCH | + .brw = (BRW_NEW_CONTEXT | BRW_NEW_SOL_INDICES), .cache = 0 }, @@ -159,6 +159,7 @@ brw_begin_transform_feedback(struct gl_context *ctx, GLenum mode, struct gl_transform_feedback_object *obj) { struct brw_context *brw = brw_context(ctx); + struct intel_context *intel = &brw->intel; const struct gl_shader_program *vs_prog = ctx->Shader.CurrentVertexProgram; const struct gl_transform_feedback_info *linked_xfb_info = @@ -180,6 +181,14 @@ brw_begin_transform_feedback(struct gl_context *ctx, GLenum mode, brw->sol.svbi_0_starting_index = 0; brw->sol.svbi_0_max_index = max_index; brw->sol.offset_0_batch_start = 0; + + if (intel->gen >= 7) { + /* Ask the kernel to reset the SO offsets for any previous transform + * feedback, so we start at the start of the user's buffer. (note: these + * are not the query counters) + */ + intel->batch.needs_sol_reset = true; + } } void diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp index 21caa0afbc..64521699bf 100644 --- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp @@ -276,6 +276,37 @@ gen7_blorp_emit_sampler_state(struct brw_context *brw, } +/* 3DSTATE_VS + * + * Disable vertex shader. + */ +static void +gen7_blorp_emit_vs_disable(struct brw_context *brw, + const brw_blorp_params *params) +{ + struct intel_context *intel = &brw->intel; + + BEGIN_BATCH(7); + OUT_BATCH(_3DSTATE_CONSTANT_VS << 16 | (7 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); + + BEGIN_BATCH(6); + OUT_BATCH(_3DSTATE_VS << 16 | (6 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); +} + + /* 3DSTATE_HS * * Disable the hull shader. @@ -287,6 +318,16 @@ gen7_blorp_emit_hs_disable(struct brw_context *brw, struct intel_context *intel = &brw->intel; BEGIN_BATCH(7); + OUT_BATCH(_3DSTATE_CONSTANT_HS << 16 | (7 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); + + BEGIN_BATCH(7); OUT_BATCH(_3DSTATE_HS << 16 | (7 - 2)); OUT_BATCH(0); OUT_BATCH(0); @@ -327,6 +368,16 @@ gen7_blorp_emit_ds_disable(struct brw_context *brw, { struct intel_context *intel = &brw->intel; + BEGIN_BATCH(7); + OUT_BATCH(_3DSTATE_CONSTANT_DS << 16 | (7 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); + BEGIN_BATCH(6); OUT_BATCH(_3DSTATE_DS << 16 | (6 - 2)); OUT_BATCH(0); @@ -337,6 +388,36 @@ gen7_blorp_emit_ds_disable(struct brw_context *brw, ADVANCE_BATCH(); } +/* 3DSTATE_GS + * + * Disable the geometry shader. + */ +static void +gen7_blorp_emit_gs_disable(struct brw_context *brw, + const brw_blorp_params *params) +{ + struct intel_context *intel = &brw->intel; + + BEGIN_BATCH(7); + OUT_BATCH(_3DSTATE_CONSTANT_GS << 16 | (7 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); + + BEGIN_BATCH(7); + OUT_BATCH(_3DSTATE_GS << 16 | (7 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); +} /* 3DSTATE_STREAMOUT * @@ -573,6 +654,22 @@ gen7_blorp_emit_constant_ps(struct brw_context *brw, ADVANCE_BATCH(); } +static void +gen7_blorp_emit_constant_ps_disable(struct brw_context *brw, + const brw_blorp_params *params) +{ + struct intel_context *intel = &brw->intel; + + BEGIN_BATCH(7); + OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | (7 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); +} static void gen7_blorp_emit_depth_stencil_config(struct brw_context *brw, @@ -777,11 +874,11 @@ gen7_blorp_exec(struct intel_context *intel, wm_surf_offset_texture); sampler_offset = gen7_blorp_emit_sampler_state(brw, params); } - gen6_blorp_emit_vs_disable(brw, params); + gen7_blorp_emit_vs_disable(brw, params); gen7_blorp_emit_hs_disable(brw, params); gen7_blorp_emit_te_disable(brw, params); gen7_blorp_emit_ds_disable(brw, params); - gen6_blorp_emit_gs_disable(brw, params); + gen7_blorp_emit_gs_disable(brw, params); gen7_blorp_emit_streamout_disable(brw, params); gen6_blorp_emit_clip_disable(brw, params); gen7_blorp_emit_sf_config(brw, params); @@ -791,6 +888,8 @@ gen7_blorp_exec(struct intel_context *intel, wm_bind_bo_offset); gen7_blorp_emit_sampler_state_pointers_ps(brw, params, sampler_offset); gen7_blorp_emit_constant_ps(brw, params, wm_push_const_offset); + } else { + gen7_blorp_emit_constant_ps_disable(brw, params); } gen7_blorp_emit_ps_config(brw, params, prog_offset, prog_data); gen7_blorp_emit_cc_viewport(brw, params); diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c index 7e46398a8a..1d3677d38d 100644 --- a/src/mesa/drivers/dri/i965/gen7_misc_state.c +++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c @@ -29,77 +29,46 @@ #include "brw_state.h" #include "brw_defines.h" -static void emit_depthbuffer(struct brw_context *brw) +void +gen7_emit_depth_stencil_hiz(struct brw_context *brw, + struct intel_mipmap_tree *depth_mt, + uint32_t depth_offset, uint32_t depthbuffer_format, + uint32_t depth_surface_type, + struct intel_mipmap_tree *stencil_mt, + struct intel_mipmap_tree *hiz_mt, + bool separate_stencil, uint32_t width, + uint32_t height, uint32_t tile_x, uint32_t tile_y) { struct intel_context *intel = &brw->intel; struct gl_context *ctx = &intel->ctx; - struct gl_framebuffer *fb = ctx->DrawBuffer; - - /* _NEW_BUFFERS */ - struct intel_renderbuffer *drb = intel_get_renderbuffer(fb, BUFFER_DEPTH); - struct intel_renderbuffer *srb = intel_get_renderbuffer(fb, BUFFER_STENCIL); - struct intel_mipmap_tree *depth_mt = brw->depthstencil.depth_mt; - struct intel_mipmap_tree *stencil_mt = brw->depthstencil.stencil_mt; - struct intel_mipmap_tree *hiz_mt = brw->depthstencil.hiz_mt; - uint32_t tile_x = brw->depthstencil.tile_x; - uint32_t tile_y = brw->depthstencil.tile_y; - - /* Gen7 only supports separate stencil */ - assert(!stencil_mt || stencil_mt->format == MESA_FORMAT_S8); - assert(!depth_mt || !_mesa_is_format_packed_depth_stencil(depth_mt->format)); intel_emit_depth_stall_flushes(intel); - if (depth_mt == NULL) { - uint32_t dw1 = BRW_DEPTHFORMAT_D32_FLOAT << 18; - uint32_t dw3 = 0; - - if (stencil_mt == NULL) { - dw1 |= (BRW_SURFACE_NULL << 29); - } else { - /* _NEW_STENCIL: enable stencil buffer writes */ - dw1 |= ((ctx->Stencil.WriteMask != 0) << 27); - - /* 3DSTATE_STENCIL_BUFFER inherits surface type and dimensions. */ - dw1 |= (BRW_SURFACE_2D << 29); - dw3 = ((srb->Base.Base.Width + tile_x - 1) << 4) | - ((srb->Base.Base.Height + tile_y - 1) << 18); - } - - BEGIN_BATCH(7); - OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER << 16 | (7 - 2)); - OUT_BATCH(dw1); - OUT_BATCH(0); - OUT_BATCH(dw3); - OUT_BATCH(0); - OUT_BATCH(tile_x | (tile_y << 16)); - OUT_BATCH(0); - ADVANCE_BATCH(); - } else { - struct intel_region *region = depth_mt->region; - - assert(region->tiling == I915_TILING_Y); - - /* _NEW_DEPTH, _NEW_STENCIL */ - BEGIN_BATCH(7); - OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER << 16 | (7 - 2)); - OUT_BATCH((region->pitch - 1) | - (brw_depthbuffer_format(brw) << 18) | - ((hiz_mt ? 1 : 0) << 22) | /* hiz enable */ - ((stencil_mt != NULL && ctx->Stencil.WriteMask != 0) << 27) | - ((ctx->Depth.Mask != 0) << 28) | - (BRW_SURFACE_2D << 29)); - OUT_RELOC(region->bo, + /* _NEW_DEPTH, _NEW_STENCIL */ + BEGIN_BATCH(7); + OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER << 16 | (7 - 2)); + OUT_BATCH((depth_mt ? depth_mt->region->pitch - 1 : 0) | + (depthbuffer_format << 18) | + ((hiz_mt ? 1 : 0) << 22) | + ((stencil_mt != NULL && ctx->Stencil._WriteEnabled) << 27) | + ((ctx->Depth.Mask != 0) << 28) | + (depth_surface_type << 29)); + + if (depth_mt) { + OUT_RELOC(depth_mt->region->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, - brw->depthstencil.depth_offset); - OUT_BATCH((((drb->Base.Base.Width + tile_x) - 1) << 4) | - (((drb->Base.Base.Height + tile_y) - 1) << 18)); - OUT_BATCH(0); - OUT_BATCH(tile_x | (tile_y << 16)); + depth_offset); + } else { OUT_BATCH(0); - ADVANCE_BATCH(); } + OUT_BATCH(((width + tile_x - 1) << 4) | + ((height + tile_y - 1) << 18)); + OUT_BATCH(0); + OUT_BATCH(tile_x | (tile_y << 16)); + OUT_BATCH(0); + ADVANCE_BATCH(); + if (hiz_mt == NULL) { BEGIN_BATCH(3); OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (3 - 2)); @@ -166,5 +135,5 @@ const struct brw_tracked_state gen7_depthbuffer = { .brw = BRW_NEW_BATCH, .cache = 0, }, - .emit = emit_depthbuffer, + .emit = brw_emit_depthbuffer, }; diff --git a/src/mesa/drivers/dri/i965/gen7_sol_state.c b/src/mesa/drivers/dri/i965/gen7_sol_state.c index 28cecf2d5c..c725fb67b6 100644 --- a/src/mesa/drivers/dri/i965/gen7_sol_state.c +++ b/src/mesa/drivers/dri/i965/gen7_sol_state.c @@ -82,12 +82,14 @@ upload_3dstate_so_buffers(struct brw_context *brw) end = ALIGN(start + xfb_obj->Size[i], 4); assert(end <= bo->size); - /* Offset the starting offset by the current vertex index into the - * feedback buffer, offset register is always set to 0 at the start of the - * batchbuffer. + /* If we don't have hardware contexts, then we reset our offsets at the + * start of every batch, so we track the number of vertices written in + * software and increment our pointers by that many. */ - start += brw->sol.offset_0_batch_start * stride; - assert(start <= end); + if (!intel->hw_ctx) { + start += brw->sol.offset_0_batch_start * stride; + assert(start <= end); + } BEGIN_BATCH(4); OUT_BATCH(_3DSTATE_SO_BUFFER << 16 | (4 - 2)); @@ -244,7 +246,11 @@ upload_sol_state(struct brw_context *brw) /* CACHE_NEW_VS_PROG */ upload_3dstate_so_decl_list(brw, &brw->vs.prog_data->vue_map); - intel->batch.needs_sol_reset = true; + /* If we don't have hardware contexts, then some other client may have + * changed the SO write offsets, and we need to rewrite them. + */ + if (!intel->hw_ctx) + intel->batch.needs_sol_reset = true; } /* Finally, set up the SOL stage. This command must always follow updates to diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index 24f1b9cd48..4d02ad2db2 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c @@ -372,11 +372,13 @@ static void gen7_create_constant_surface(struct brw_context *brw, drm_intel_bo *bo, uint32_t offset, - int width, + uint32_t size, uint32_t *out_offset) { struct intel_context *intel = &brw->intel; - const GLint w = width - 1; + uint32_t stride = 16; + uint32_t elements = ALIGN(size, stride) / stride; + const GLint w = elements - 1; uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 8 * 4, 32, out_offset); @@ -392,7 +394,7 @@ gen7_create_constant_surface(struct brw_context *brw, surf[2] = SET_FIELD(w & 0x7f, GEN7_SURFACE_WIDTH) | SET_FIELD((w >> 7) & 0x1fff, GEN7_SURFACE_HEIGHT); surf[3] = SET_FIELD((w >> 20) & 0x7f, BRW_SURFACE_DEPTH) | - (16 - 1); /* stride between samples */ + (stride - 1); if (intel->is_haswell) { surf[7] = SET_FIELD(HSW_SCS_RED, GEN7_SURFACE_SCS_R) | @@ -413,6 +415,46 @@ gen7_create_constant_surface(struct brw_context *brw, gen7_check_surface_setup(surf, false /* is_render_target */); } +/** + * Create a surface for shader time. + */ +void +gen7_create_shader_time_surface(struct brw_context *brw, uint32_t *out_offset) +{ + struct intel_context *intel = &brw->intel; + const int w = brw->shader_time.bo->size - 1; + + uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, + 8 * 4, 32, out_offset); + memset(surf, 0, 8 * 4); + + surf[0] = BRW_SURFACE_BUFFER << BRW_SURFACE_TYPE_SHIFT | + BRW_SURFACEFORMAT_RAW << BRW_SURFACE_FORMAT_SHIFT | + BRW_SURFACE_RC_READ_WRITE; + + surf[1] = brw->shader_time.bo->offset; /* reloc */ + + surf[2] = SET_FIELD(w & 0x7f, GEN7_SURFACE_WIDTH) | + SET_FIELD((w >> 7) & 0x1fff, GEN7_SURFACE_HEIGHT); + surf[3] = SET_FIELD((w >> 20) & 0x7f, BRW_SURFACE_DEPTH); + + /* Unlike texture or renderbuffer surfaces, we only do untyped operations + * on the shader_time surface, so there's no need to set HSW channel + * overrides. + */ + + /* Emit relocation to surface contents. Section 5.1.1 of the gen4 + * bspec ("Data Cache") says that the data cache does not exist as + * a separate cache and is just the sampler cache. + */ + drm_intel_bo_emit_reloc(intel->batch.bo, + *out_offset + 4, + brw->shader_time.bo, 0, + I915_GEM_DOMAIN_SAMPLER, 0); + + gen7_check_surface_setup(surf, false /* is_render_target */); +} + static void gen7_update_null_renderbuffer_surface(struct brw_context *brw, unsigned unit) { diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h index 80e4cac131..7928f06d2d 100644 --- a/src/mesa/drivers/dri/intel/intel_context.h +++ b/src/mesa/drivers/dri/intel/intel_context.h @@ -201,9 +201,25 @@ struct intel_context void (*create_constant_surface)(struct brw_context *brw, drm_intel_bo *bo, uint32_t offset, - int width, + uint32_t size, uint32_t *out_offset); /** \} */ + + /** + * Send the appropriate state packets to configure depth, stencil, and + * HiZ buffers (i965+ only) + */ + void (*emit_depth_stencil_hiz)(struct brw_context *brw, + struct intel_mipmap_tree *depth_mt, + uint32_t depth_offset, + uint32_t depthbuffer_format, + uint32_t depth_surface_type, + struct intel_mipmap_tree *stencil_mt, + struct intel_mipmap_tree *hiz_mt, + bool separate_stencil, + uint32_t width, uint32_t height, + uint32_t tile_x, uint32_t tile_y); + } vtbl; GLbitfield Fallback; /**< mask of INTEL_FALLBACK_x bits */ diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c index 37ecbd1701..41412eeada 100644 --- a/src/mesa/drivers/dri/intel/intel_fbo.c +++ b/src/mesa/drivers/dri/intel/intel_fbo.c @@ -999,6 +999,10 @@ intel_renderbuffer_move_to_temp(struct intel_context *intel, irb->mt->num_samples, false /* force_y_tiling */); + if (intel->vtbl.is_hiz_depth_format(intel, new_mt->format)) { + intel_miptree_alloc_hiz(intel, new_mt, irb->mt->num_samples); + } + intel_miptree_copy_teximage(intel, intel_image, new_mt); intel_miptree_reference(&irb->mt, intel_image->mt); intel_renderbuffer_set_draw_offset(irb); diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c index a063f87d26..43f3779265 100644 --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c @@ -725,6 +725,12 @@ intel_miptree_copy_slice(struct intel_context *intel, dst_mt, dst_x, dst_y, dst_mt->region->pitch, width, height); + /* Since we are about to copy depth data using either the blitter or swrast + * (neither of which respect HiZ), we need to do a depth resolve first. + */ + intel_miptree_slice_resolve_depth(intel, src_mt, level, slice); + intel_miptree_slice_resolve_depth(intel, dst_mt, level, slice); + if (!intelEmitCopyBlit(intel, dst_mt->region->cpp, src_mt->region->pitch, src_mt->region->bo, diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index 5ec93f1cc3..4173c0fc48 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.c +++ b/src/mesa/drivers/dri/intel/intel_screen.c @@ -312,7 +312,7 @@ intel_create_image_from_name(__DRIscreen *screen, cpp = _mesa_get_format_bytes(image->format); image->region = intel_region_alloc_for_handle(intelScreen, cpp, width, height, - pitch, name, "image"); + pitch * cpp, name, "image"); if (image->region == NULL) { free(image); return NULL; diff --git a/src/mesa/drivers/dri/intel/intel_tex.c b/src/mesa/drivers/dri/intel/intel_tex.c index a2a3693749..f66aa237d8 100644 --- a/src/mesa/drivers/dri/intel/intel_tex.c +++ b/src/mesa/drivers/dri/intel/intel_tex.c @@ -34,6 +34,10 @@ intelNewTextureObject(struct gl_context * ctx, GLuint name, GLenum target) (void) ctx; DBG("%s\n", __FUNCTION__); + + if (obj == NULL) + return NULL; + _mesa_initialize_texture_object(&obj->base, name, target); obj->needs_validate = true; diff --git a/src/mesa/drivers/dri/nouveau/nouveau_driver.c b/src/mesa/drivers/dri/nouveau/nouveau_driver.c index f56b3b2807..6c119d564b 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_driver.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_driver.c @@ -69,7 +69,8 @@ nouveau_flush(struct gl_context *ctx) __DRIdri2LoaderExtension *dri2 = screen->dri2.loader; __DRIdrawable *drawable = nctx->dri_context->driDrawablePriv; - dri2->flushFrontBuffer(drawable, drawable->loaderPrivate); + if (drawable && drawable->loaderPrivate) + dri2->flushFrontBuffer(drawable, drawable->loaderPrivate); } } diff --git a/src/mesa/drivers/dri/nouveau/nv10_context.c b/src/mesa/drivers/dri/nouveau/nv10_context.c index 7eda4e0f91..4ffc4ef153 100644 --- a/src/mesa/drivers/dri/nouveau/nv10_context.c +++ b/src/mesa/drivers/dri/nouveau/nv10_context.c @@ -469,7 +469,7 @@ nv10_context_create(struct nouveau_screen *screen, const struct gl_config *visua goto fail; /* 3D engine. */ - if (context_chipset(ctx) >= 0x17) + if (context_chipset(ctx) >= 0x17 && context_chipset(ctx) != 0x1a) celsius_class = NV17_3D_CLASS; else if (context_chipset(ctx) >= 0x11) celsius_class = NV15_3D_CLASS; diff --git a/src/mesa/drivers/osmesa/Makefile.am b/src/mesa/drivers/osmesa/Makefile.am index c4b178b749..250340146c 100644 --- a/src/mesa/drivers/osmesa/Makefile.am +++ b/src/mesa/drivers/osmesa/Makefile.am @@ -24,6 +24,7 @@ AM_CPPFLAGS = \ -I$(top_srcdir)/include \ -I$(top_srcdir)/src/mapi \ + -I$(top_builddir)/src/mapi \ -I$(top_srcdir)/src/mesa/ \ $(DEFINES) \ $(API_DEFINES) diff --git a/src/mesa/main/compiler.h b/src/mesa/main/compiler.h index b22b994857..8b23665e68 100644 --- a/src/mesa/main/compiler.h +++ b/src/mesa/main/compiler.h @@ -48,6 +48,8 @@ #include <float.h> #include <stdarg.h> +#include "c99_compat.h" /* inline, __func__, etc. */ + #ifdef __cplusplus extern "C" { @@ -111,30 +113,7 @@ extern "C" { -/** - * Function inlining - */ -#ifndef inline -# ifdef __cplusplus - /* C++ supports inline keyword */ -# elif defined(__GNUC__) -# define inline __inline__ -# elif defined(_MSC_VER) -# define inline __inline -# elif defined(__ICL) -# define inline __inline -# elif defined(__INTEL_COMPILER) - /* Intel compiler supports inline keyword */ -# elif defined(__WATCOMC__) && (__WATCOMC__ >= 1100) -# define inline __inline -# elif defined(__SUNPRO_C) && defined(__C99FEATURES__) - /* C99 supports inline keyword */ -# elif (__STDC_VERSION__ >= 199901L) - /* C99 supports inline keyword */ -# else -# define inline -# endif -#endif +/* XXX: Use standard `inline` keyword instead */ #ifndef INLINE # define INLINE inline #endif @@ -177,35 +156,10 @@ extern "C" { # endif #endif -/** - * The __FUNCTION__ gcc variable is generally only used for debugging. - * If we're not using gcc, define __FUNCTION__ as a cpp symbol here. - * Don't define it if using a newer Windows compiler. - */ +/* XXX: Use standard `__func__` instead */ #ifndef __FUNCTION__ -# if !defined(__GNUC__) && !defined(__xlC__) && \ - (!defined(_MSC_VER) || _MSC_VER < 1300) -# if (__STDC_VERSION__ >= 199901L) /* C99 */ || \ - (defined(__SUNPRO_C) && defined(__C99FEATURES__)) -# define __FUNCTION__ __func__ -# else -# define __FUNCTION__ "<unknown>" -# endif -# endif +# define __FUNCTION__ __func__ #endif -#ifndef __func__ -# if (__STDC_VERSION__ >= 199901L) || \ - (defined(__SUNPRO_C) && defined(__C99FEATURES__)) - /* __func__ is part of C99 */ -# elif defined(_MSC_VER) -# if _MSC_VER >= 1300 -# define __func__ __FUNCTION__ -# else -# define __func__ "<unknown>" -# endif -# endif -#endif - /** * Either define MESA_BIG_ENDIAN or MESA_LITTLE_ENDIAN, and CPU_TO_LE32. @@ -353,8 +307,9 @@ static INLINE GLuint CPU_TO_LE32(GLuint x) * USE_IEEE: Determine if we're using IEEE floating point */ #if defined(__i386__) || defined(__386__) || defined(__sparc__) || \ - defined(__s390x__) || defined(__powerpc__) || \ + defined(__s390__) || defined(__s390x__) || defined(__powerpc__) || \ defined(__x86_64__) || \ + defined(__m68k__) || \ defined(ia64) || defined(__ia64__) || \ defined(__hppa__) || defined(hpux) || \ defined(__mips) || defined(_MIPS_ARCH) || \ diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c index df57b766e0..2d4ee60d8f 100644 --- a/src/mesa/main/context.c +++ b/src/mesa/main/context.c @@ -1080,6 +1080,7 @@ _mesa_initialize_context(struct gl_context *ctx, return GL_TRUE; fail: + _mesa_reference_shared_state(ctx, &ctx->Shared, NULL); free(ctx->BeginEnd); free(ctx->Exec); free(ctx->Save); @@ -1180,6 +1181,7 @@ _mesa_free_context_data( struct gl_context *ctx ) _mesa_reference_buffer_object(ctx, &ctx->Array.ArrayBufferObj, NULL); /* free dispatch tables */ + free(ctx->BeginEnd); free(ctx->Exec); free(ctx->Save); diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c index 4de09d85a7..a827832dec 100644 --- a/src/mesa/main/extensions.c +++ b/src/mesa/main/extensions.c @@ -394,7 +394,9 @@ _mesa_enable_sw_extensions(struct gl_context *ctx) ctx->Extensions.ARB_texture_env_combine = GL_TRUE; ctx->Extensions.ARB_texture_env_crossbar = GL_TRUE; ctx->Extensions.ARB_texture_env_dot3 = GL_TRUE; - /*ctx->Extensions.ARB_texture_float = GL_TRUE;*/ +#ifdef TEXTURE_FLOAT_ENABLED + ctx->Extensions.ARB_texture_float = GL_TRUE; +#endif ctx->Extensions.ARB_texture_non_power_of_two = GL_TRUE; ctx->Extensions.ARB_texture_rg = GL_TRUE; ctx->Extensions.ARB_texture_compression_rgtc = GL_TRUE; diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c index 257f839a66..61c1151cc2 100644 --- a/src/mesa/main/fbobject.c +++ b/src/mesa/main/fbobject.c @@ -3160,7 +3160,9 @@ _mesa_BlitFramebuffer(GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, } } - if (!mask) { + if (!mask || + (srcX1 - srcX0) == 0 || (srcY1 - srcY0) == 0 || + (dstX1 - dstX0) == 0 || (dstY1 - dstY0) == 0) { return; } diff --git a/src/mesa/main/format_unpack.c b/src/mesa/main/format_unpack.c index 92ce86908e..b2f640eff5 100644 --- a/src/mesa/main/format_unpack.c +++ b/src/mesa/main/format_unpack.c @@ -610,6 +610,20 @@ unpack_ARGB2101010(const void *src, GLfloat dst[][4], GLuint n) static void +unpack_ARGB2101010_UINT(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLuint *s = (const GLuint *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat)((s[i] >> 20) & 0x3ff); + dst[i][GCOMP] = (GLfloat)((s[i] >> 10) & 0x3ff); + dst[i][BCOMP] = (GLfloat)((s[i] >> 0) & 0x3ff); + dst[i][ACOMP] = (GLfloat)((s[i] >> 30) & 0x03); + } +} + + +static void unpack_ABGR2101010_UINT(const void *src, GLfloat dst[][4], GLuint n) { const GLuint *s = ((const GLuint *) src); @@ -1060,6 +1074,344 @@ unpack_RG_FLOAT16(const void *src, GLfloat dst[][4], GLuint n) } } +static void +unpack_ALPHA_UINT8(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLubyte *s = (const GLubyte *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = + dst[i][GCOMP] = + dst[i][BCOMP] = 0.0; + dst[i][ACOMP] = (GLfloat) s[i]; + } +} + +static void +unpack_ALPHA_UINT16(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLushort *s = (const GLushort *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = + dst[i][GCOMP] = + dst[i][BCOMP] = 0.0; + dst[i][ACOMP] = (GLfloat) s[i]; + } +} + +static void +unpack_ALPHA_UINT32(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLuint *s = (const GLuint *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = + dst[i][GCOMP] = + dst[i][BCOMP] = 0.0; + dst[i][ACOMP] = (GLfloat) s[i]; + } +} + +static void +unpack_ALPHA_INT8(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLbyte *s = (const GLbyte *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = + dst[i][GCOMP] = + dst[i][BCOMP] = 0.0; + dst[i][ACOMP] = (GLfloat) s[i]; + } +} + +static void +unpack_ALPHA_INT16(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLshort *s = (const GLshort *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = + dst[i][GCOMP] = + dst[i][BCOMP] = 0.0; + dst[i][ACOMP] = (GLfloat) s[i]; + } +} + +static void +unpack_ALPHA_INT32(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLint *s = (const GLint *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = + dst[i][GCOMP] = + dst[i][BCOMP] = 0.0; + dst[i][ACOMP] = (GLfloat) s[i]; + } +} + +static void +unpack_INTENSITY_UINT8(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLubyte *s = (const GLubyte *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = + dst[i][GCOMP] = + dst[i][BCOMP] = + dst[i][ACOMP] = (GLfloat) s[i]; + } +} + +static void +unpack_INTENSITY_UINT16(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLushort *s = (const GLushort *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = + dst[i][GCOMP] = + dst[i][BCOMP] = + dst[i][ACOMP] = (GLfloat) s[i]; + } +} + +static void +unpack_INTENSITY_UINT32(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLuint *s = (const GLuint *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = + dst[i][GCOMP] = + dst[i][BCOMP] = + dst[i][ACOMP] = (GLfloat) s[i]; + } +} + +static void +unpack_INTENSITY_INT8(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLbyte *s = (const GLbyte *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = + dst[i][GCOMP] = + dst[i][BCOMP] = + dst[i][ACOMP] = (GLfloat) s[i]; + } +} + +static void +unpack_INTENSITY_INT16(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLshort *s = (const GLshort *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = + dst[i][GCOMP] = + dst[i][BCOMP] = + dst[i][ACOMP] = (GLfloat) s[i]; + } +} + +static void +unpack_INTENSITY_INT32(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLint *s = (const GLint *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = + dst[i][GCOMP] = + dst[i][BCOMP] = + dst[i][ACOMP] = (GLfloat) s[i]; + } +} + +static void +unpack_LUMINANCE_UINT8(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLubyte *s = (const GLubyte *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = dst[i][GCOMP] = dst[i][BCOMP] = (GLfloat) s[i]; + dst[i][ACOMP] = 1.0; + } +} + +static void +unpack_LUMINANCE_UINT16(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLushort *s = (const GLushort *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = dst[i][GCOMP] = dst[i][BCOMP] = (GLfloat) s[i]; + dst[i][ACOMP] = 1.0; + } +} + +static void +unpack_LUMINANCE_UINT32(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLuint *s = (const GLuint *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = dst[i][GCOMP] = dst[i][BCOMP] = (GLfloat) s[i]; + dst[i][ACOMP] = 1.0; + } +} + +static void +unpack_LUMINANCE_INT8(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLbyte *s = (const GLbyte *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = dst[i][GCOMP] = dst[i][BCOMP] = (GLfloat) s[i]; + dst[i][ACOMP] = 1.0; + } +} + +static void +unpack_LUMINANCE_INT16(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLshort *s = (const GLshort *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = dst[i][GCOMP] = dst[i][BCOMP] = (GLfloat) s[i]; + dst[i][ACOMP] = 1.0; + } +} + +static void +unpack_LUMINANCE_INT32(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLint *s = (const GLint *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = dst[i][GCOMP] = dst[i][BCOMP] = (GLfloat) s[i]; + dst[i][ACOMP] = 1.0; + } +} + +static void +unpack_LUMINANCE_ALPHA_UINT8(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLubyte *s = (const GLubyte *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = + dst[i][GCOMP] = + dst[i][BCOMP] = (GLfloat) s[2*i+0]; + dst[i][ACOMP] = (GLfloat) s[2*i+1]; + } +} + +static void +unpack_LUMINANCE_ALPHA_UINT16(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLushort *s = (const GLushort *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = + dst[i][GCOMP] = + dst[i][BCOMP] = (GLfloat) s[2*i+0]; + dst[i][ACOMP] = (GLfloat) s[2*i+1]; + } +} + +static void +unpack_LUMINANCE_ALPHA_UINT32(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLuint *s = (const GLuint *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = + dst[i][GCOMP] = + dst[i][BCOMP] = (GLfloat) s[2*i+0]; + dst[i][ACOMP] = (GLfloat) s[2*i+1]; + } +} + +static void +unpack_LUMINANCE_ALPHA_INT8(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLbyte *s = (const GLbyte *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = + dst[i][GCOMP] = + dst[i][BCOMP] = (GLfloat) s[2*i+0]; + dst[i][ACOMP] = (GLfloat) s[2*i+1]; + } +} + +static void +unpack_LUMINANCE_ALPHA_INT16(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLshort *s = (const GLshort *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = + dst[i][GCOMP] = + dst[i][BCOMP] = (GLfloat) s[2*i+0]; + dst[i][ACOMP] = (GLfloat) s[2*i+1]; + } +} + +static void +unpack_LUMINANCE_ALPHA_INT32(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLint *s = (const GLint *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = + dst[i][GCOMP] = + dst[i][BCOMP] = (GLfloat) s[2*i+0]; + dst[i][ACOMP] = (GLfloat) s[2*i+1]; + } +} + +static void +unpack_R_INT8(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLbyte *s = (const GLbyte *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat) s[i]; + dst[i][GCOMP] = 0.0; + dst[i][BCOMP] = 0.0; + dst[i][ACOMP] = 1.0; + } +} + +static void +unpack_RG_INT8(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLbyte *s = (const GLbyte *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat) s[i*2+0]; + dst[i][GCOMP] = (GLfloat) s[i*2+1]; + dst[i][BCOMP] = 0.0; + dst[i][ACOMP] = 1.0; + } +} + +static void +unpack_RGB_INT8(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLbyte *s = (const GLbyte *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat) s[i*3+0]; + dst[i][GCOMP] = (GLfloat) s[i*3+1]; + dst[i][BCOMP] = (GLfloat) s[i*3+2]; + dst[i][ACOMP] = 1.0; + } +} static void unpack_RGBA_INT8(const void *src, GLfloat dst[][4], GLuint n) @@ -1075,6 +1427,45 @@ unpack_RGBA_INT8(const void *src, GLfloat dst[][4], GLuint n) } static void +unpack_R_INT16(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLshort *s = (const GLshort *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat) s[i]; + dst[i][GCOMP] = 0.0; + dst[i][BCOMP] = 0.0; + dst[i][ACOMP] = 1.0; + } +} + +static void +unpack_RG_INT16(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLshort *s = (const GLshort *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat) s[i*2+0]; + dst[i][GCOMP] = (GLfloat) s[i*2+1]; + dst[i][BCOMP] = 0.0; + dst[i][ACOMP] = 1.0; + } +} + +static void +unpack_RGB_INT16(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLshort *s = (const GLshort *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat) s[i*3+0]; + dst[i][GCOMP] = (GLfloat) s[i*3+1]; + dst[i][BCOMP] = (GLfloat) s[i*3+2]; + dst[i][ACOMP] = 1.0; + } +} + +static void unpack_RGBA_INT16(const void *src, GLfloat dst[][4], GLuint n) { const GLshort *s = (const GLshort *) src; @@ -1088,6 +1479,46 @@ unpack_RGBA_INT16(const void *src, GLfloat dst[][4], GLuint n) } static void +unpack_R_INT32(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLint *s = (const GLint *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat) s[i]; + dst[i][GCOMP] = 0.0; + dst[i][BCOMP] = 0.0; + dst[i][ACOMP] = 1.0; + } +} + +static void +unpack_RG_INT32(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLint *s = (const GLint *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat) s[i*2+0]; + dst[i][GCOMP] = (GLfloat) s[i*2+1]; + dst[i][BCOMP] = 0.0; + dst[i][ACOMP] = 1.0; + } +} + +static void +unpack_RGB_INT32(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLint *s = (const GLint *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat) s[i*3+0]; + dst[i][GCOMP] = (GLfloat) s[i*3+1]; + dst[i][BCOMP] = (GLfloat) s[i*3+2]; + dst[i][ACOMP] = 1.0; + } +} + + +static void unpack_RGBA_INT32(const void *src, GLfloat dst[][4], GLuint n) { const GLint *s = (const GLint *) src; @@ -1101,6 +1532,45 @@ unpack_RGBA_INT32(const void *src, GLfloat dst[][4], GLuint n) } static void +unpack_R_UINT8(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLubyte *s = (const GLubyte *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat) s[i]; + dst[i][GCOMP] = 0.0; + dst[i][BCOMP] = 0.0; + dst[i][ACOMP] = 1.0; + } +} + +static void +unpack_RG_UINT8(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLubyte *s = (const GLubyte *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat) s[i*2+0]; + dst[i][GCOMP] = (GLfloat) s[i*2+1]; + dst[i][BCOMP] = 0.0; + dst[i][ACOMP] = 1.0; + } +} + +static void +unpack_RGB_UINT8(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLubyte *s = (const GLubyte *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat) s[i*3+0]; + dst[i][GCOMP] = (GLfloat) s[i*3+1]; + dst[i][BCOMP] = (GLfloat) s[i*3+2]; + dst[i][ACOMP] = 1.0; + } +} + +static void unpack_RGBA_UINT8(const void *src, GLfloat dst[][4], GLuint n) { const GLubyte *s = (const GLubyte *) src; @@ -1114,6 +1584,45 @@ unpack_RGBA_UINT8(const void *src, GLfloat dst[][4], GLuint n) } static void +unpack_R_UINT16(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLushort *s = (const GLushort *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat) s[i]; + dst[i][GCOMP] = 0.0; + dst[i][BCOMP] = 0.0; + dst[i][ACOMP] = 1.0; + } +} + +static void +unpack_RG_UINT16(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLushort *s = (const GLushort *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat) s[i*2+0]; + dst[i][GCOMP] = (GLfloat) s[i*2+1]; + dst[i][BCOMP] = 0.0; + dst[i][ACOMP] = 1.0; + } +} + +static void +unpack_RGB_UINT16(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLushort *s = (const GLushort *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat) s[i*3+0]; + dst[i][GCOMP] = (GLfloat) s[i*3+1]; + dst[i][BCOMP] = (GLfloat) s[i*3+2]; + dst[i][ACOMP] = 1.0; + } +} + +static void unpack_RGBA_UINT16(const void *src, GLfloat dst[][4], GLuint n) { const GLushort *s = (const GLushort *) src; @@ -1127,6 +1636,45 @@ unpack_RGBA_UINT16(const void *src, GLfloat dst[][4], GLuint n) } static void +unpack_R_UINT32(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLuint *s = (const GLuint *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat) s[i]; + dst[i][GCOMP] = 0.0; + dst[i][BCOMP] = 0.0; + dst[i][ACOMP] = 1.0; + } +} + +static void +unpack_RG_UINT32(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLuint *s = (const GLuint *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat) s[i*2+0]; + dst[i][GCOMP] = (GLfloat) s[i*2+1]; + dst[i][BCOMP] = 0.0; + dst[i][ACOMP] = 1.0; + } +} + +static void +unpack_RGB_UINT32(const void *src, GLfloat dst[][4], GLuint n) +{ + const GLuint *s = (const GLuint *) src; + GLuint i; + for (i = 0; i < n; i++) { + dst[i][RCOMP] = (GLfloat) s[i*3+0]; + dst[i][GCOMP] = (GLfloat) s[i*3+1]; + dst[i][BCOMP] = (GLfloat) s[i*3+2]; + dst[i][ACOMP] = 1.0; + } +} + +static void unpack_RGBA_UINT32(const void *src, GLfloat dst[][4], GLuint n) { const GLuint *s = (const GLuint *) src; @@ -1575,6 +2123,7 @@ get_unpack_rgba_function(gl_format format) table[MESA_FORMAT_RG1616] = unpack_RG1616; table[MESA_FORMAT_RG1616_REV] = unpack_RG1616_REV; table[MESA_FORMAT_ARGB2101010] = unpack_ARGB2101010; + table[MESA_FORMAT_ARGB2101010_UINT] = unpack_ARGB2101010_UINT; table[MESA_FORMAT_ABGR2101010_UINT] = unpack_ABGR2101010_UINT; table[MESA_FORMAT_Z24_S8] = unpack_Z24_S8; table[MESA_FORMAT_S8_Z24] = unpack_S8_Z24; @@ -1617,11 +2166,57 @@ get_unpack_rgba_function(gl_format format) table[MESA_FORMAT_RG_FLOAT32] = unpack_RG_FLOAT32; table[MESA_FORMAT_RG_FLOAT16] = unpack_RG_FLOAT16; + table[MESA_FORMAT_ALPHA_UINT8] = unpack_ALPHA_UINT8; + table[MESA_FORMAT_ALPHA_UINT16] = unpack_ALPHA_UINT16; + table[MESA_FORMAT_ALPHA_UINT32] = unpack_ALPHA_UINT32; + table[MESA_FORMAT_ALPHA_INT8] = unpack_ALPHA_INT8; + table[MESA_FORMAT_ALPHA_INT16] = unpack_ALPHA_INT16; + table[MESA_FORMAT_ALPHA_INT32] = unpack_ALPHA_INT32; + + table[MESA_FORMAT_INTENSITY_UINT8] = unpack_INTENSITY_UINT8; + table[MESA_FORMAT_INTENSITY_UINT16] = unpack_INTENSITY_UINT16; + table[MESA_FORMAT_INTENSITY_UINT32] = unpack_INTENSITY_UINT32; + table[MESA_FORMAT_INTENSITY_INT8] = unpack_INTENSITY_INT8; + table[MESA_FORMAT_INTENSITY_INT16] = unpack_INTENSITY_INT16; + table[MESA_FORMAT_INTENSITY_INT32] = unpack_INTENSITY_INT32; + + table[MESA_FORMAT_LUMINANCE_UINT8] = unpack_LUMINANCE_UINT8; + table[MESA_FORMAT_LUMINANCE_UINT16] = unpack_LUMINANCE_UINT16; + table[MESA_FORMAT_LUMINANCE_UINT32] = unpack_LUMINANCE_UINT32; + table[MESA_FORMAT_LUMINANCE_INT8] = unpack_LUMINANCE_INT8; + table[MESA_FORMAT_LUMINANCE_INT16] = unpack_LUMINANCE_INT16; + table[MESA_FORMAT_LUMINANCE_INT32] = unpack_LUMINANCE_INT32; + + table[MESA_FORMAT_LUMINANCE_ALPHA_UINT8] = unpack_LUMINANCE_ALPHA_UINT8; + table[MESA_FORMAT_LUMINANCE_ALPHA_UINT16] = unpack_LUMINANCE_ALPHA_UINT16; + table[MESA_FORMAT_LUMINANCE_ALPHA_UINT32] = unpack_LUMINANCE_ALPHA_UINT32; + table[MESA_FORMAT_LUMINANCE_ALPHA_INT8] = unpack_LUMINANCE_ALPHA_INT8; + table[MESA_FORMAT_LUMINANCE_ALPHA_INT16] = unpack_LUMINANCE_ALPHA_INT16; + table[MESA_FORMAT_LUMINANCE_ALPHA_INT32] = unpack_LUMINANCE_ALPHA_INT32; + + table[MESA_FORMAT_R_INT8] = unpack_R_INT8; + table[MESA_FORMAT_RG_INT8] = unpack_RG_INT8; + table[MESA_FORMAT_RGB_INT8] = unpack_RGB_INT8; table[MESA_FORMAT_RGBA_INT8] = unpack_RGBA_INT8; + table[MESA_FORMAT_R_INT16] = unpack_R_INT16; + table[MESA_FORMAT_RG_INT16] = unpack_RG_INT16; + table[MESA_FORMAT_RGB_INT16] = unpack_RGB_INT16; table[MESA_FORMAT_RGBA_INT16] = unpack_RGBA_INT16; + table[MESA_FORMAT_R_INT32] = unpack_R_INT32; + table[MESA_FORMAT_RG_INT32] = unpack_RG_INT32; + table[MESA_FORMAT_RGB_INT32] = unpack_RGB_INT32; table[MESA_FORMAT_RGBA_INT32] = unpack_RGBA_INT32; + table[MESA_FORMAT_R_UINT8] = unpack_R_UINT8; + table[MESA_FORMAT_RG_UINT8] = unpack_RG_UINT8; + table[MESA_FORMAT_RGB_UINT8] = unpack_RGB_UINT8; table[MESA_FORMAT_RGBA_UINT8] = unpack_RGBA_UINT8; + table[MESA_FORMAT_R_UINT16] = unpack_R_UINT16; + table[MESA_FORMAT_RG_UINT16] = unpack_RG_UINT16; + table[MESA_FORMAT_RGB_UINT16] = unpack_RGB_UINT16; table[MESA_FORMAT_RGBA_UINT16] = unpack_RGBA_UINT16; + table[MESA_FORMAT_R_UINT32] = unpack_R_UINT32; + table[MESA_FORMAT_RG_UINT32] = unpack_RG_UINT32; + table[MESA_FORMAT_RGB_UINT32] = unpack_RGB_UINT32; table[MESA_FORMAT_RGBA_UINT32] = unpack_RGBA_UINT32; table[MESA_FORMAT_DUDV8] = unpack_DUDV8; @@ -1657,7 +2252,7 @@ get_unpack_rgba_function(gl_format format) table[MESA_FORMAT_ETC2_SIGNED_RG11_EAC] = unpack_ETC2_SIGNED_RG11_EAC; table[MESA_FORMAT_ETC2_RGB8_PUNCHTHROUGH_ALPHA1] = unpack_ETC2_RGB8_PUNCHTHROUGH_ALPHA1; - table[MESA_FORMAT_ETC2_RGB8_PUNCHTHROUGH_ALPHA1] = + table[MESA_FORMAT_ETC2_SRGB8_PUNCHTHROUGH_ALPHA1] = unpack_ETC2_SRGB8_PUNCHTHROUGH_ALPHA1; table[MESA_FORMAT_SIGNED_A8] = unpack_SIGNED_A8; table[MESA_FORMAT_SIGNED_L8] = unpack_SIGNED_L8; diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c index 5f4e2fa512..9b74c39df6 100644 --- a/src/mesa/main/get.c +++ b/src/mesa/main/get.c @@ -34,6 +34,7 @@ #include "state.h" #include "texcompress.h" #include "framebuffer.h" +#include "samplerobj.h" /* This is a table driven implemetation of the glGet*v() functions. * The basic idea is that most getters just look up an int somewhere @@ -279,6 +280,12 @@ static const int extra_EXT_texture_integer[] = { EXTRA_END }; +static const int extra_EXT_texture_integer_and_new_buffers[] = { + EXT(EXT_texture_integer), + EXTRA_NEW_BUFFERS, + EXTRA_END +}; + static const int extra_GLSL_130[] = { EXTRA_GLSL_130, EXTRA_END @@ -315,6 +322,12 @@ static const int extra_ARB_ES3_compatibility_api_es3[] = { EXTRA_END }; +static const int extra_EXT_framebuffer_sRGB_and_new_buffers[] = { + EXT(EXT_framebuffer_sRGB), + EXTRA_NEW_BUFFERS, + EXTRA_END +}; + EXTRA_EXT(ARB_texture_cube_map); EXTRA_EXT(MESA_texture_array); EXTRA_EXT2(EXT_secondary_color, ARB_vertex_program); @@ -386,6 +399,13 @@ extra_NV_read_buffer_api_gl[] = { EXTRA_END }; +static const int extra_core_ARB_color_buffer_float_and_new_buffers[] = { + EXTRA_API_GL_CORE, + EXT(ARB_color_buffer_float), + EXTRA_NEW_BUFFERS, + EXTRA_END +}; + /* This is the big table describing all the enums we accept in * glGet*v(). The table is partitioned into six parts: enums * understood by all GL APIs (OpenGL, GLES and GLES2), enums shared @@ -823,7 +843,16 @@ find_custom_value(struct gl_context *ctx, const struct value_desc *d, union valu { struct gl_sampler_object *samp = ctx->Texture.Unit[ctx->Texture.CurrentUnit].Sampler; - v->value_int = samp ? samp->Name : 0; + + /* + * The sampler object may have been deleted on another context, + * so we try to lookup the sampler object before returning its Name. + */ + if (samp && _mesa_lookup_samplerobj(ctx, samp->Name)) { + v->value_int = samp->Name; + } else { + v->value_int = 0; + } } break; /* GL_ARB_uniform_buffer_object */ diff --git a/src/mesa/main/get_hash_params.py b/src/mesa/main/get_hash_params.py index 9aab88933d..5d33ca85f2 100644 --- a/src/mesa/main/get_hash_params.py +++ b/src/mesa/main/get_hash_params.py @@ -8,7 +8,7 @@ descriptor=[ [ "COLOR_WRITEMASK", "LOC_CUSTOM, TYPE_INT_4, 0, NO_EXTRA" ], [ "CULL_FACE", "CONTEXT_BOOL(Polygon.CullFlag), NO_EXTRA" ], [ "CULL_FACE_MODE", "CONTEXT_ENUM(Polygon.CullFaceMode), NO_EXTRA" ], - [ "DEPTH_BITS", "BUFFER_INT(Visual.depthBits), NO_EXTRA" ], + [ "DEPTH_BITS", "BUFFER_INT(Visual.depthBits), extra_new_buffers" ], [ "DEPTH_CLEAR_VALUE", "CONTEXT_FIELD(Depth.Clear, TYPE_DOUBLEN), NO_EXTRA" ], [ "DEPTH_FUNC", "CONTEXT_ENUM(Depth.Func), NO_EXTRA" ], [ "DEPTH_RANGE", "CONTEXT_FIELD(Viewport.Near, TYPE_FLOATN_2), NO_EXTRA" ], @@ -31,7 +31,7 @@ descriptor=[ [ "RED_BITS", "BUFFER_INT(Visual.redBits), extra_new_buffers" ], [ "SCISSOR_BOX", "LOC_CUSTOM, TYPE_INT_4, 0, NO_EXTRA" ], [ "SCISSOR_TEST", "CONTEXT_BOOL(Scissor.Enabled), NO_EXTRA" ], - [ "STENCIL_BITS", "BUFFER_INT(Visual.stencilBits), NO_EXTRA" ], + [ "STENCIL_BITS", "BUFFER_INT(Visual.stencilBits), extra_new_buffers" ], [ "STENCIL_CLEAR_VALUE", "CONTEXT_INT(Stencil.Clear), NO_EXTRA" ], [ "STENCIL_FAIL", "LOC_CUSTOM, TYPE_ENUM, NO_OFFSET, NO_EXTRA" ], [ "STENCIL_FUNC", "LOC_CUSTOM, TYPE_ENUM, NO_OFFSET, NO_EXTRA" ], @@ -80,8 +80,8 @@ descriptor=[ [ "SAMPLE_COVERAGE_ARB", "CONTEXT_BOOL(Multisample.SampleCoverage), NO_EXTRA" ], [ "SAMPLE_COVERAGE_VALUE_ARB", "CONTEXT_FLOAT(Multisample.SampleCoverageValue), NO_EXTRA" ], [ "SAMPLE_COVERAGE_INVERT_ARB", "CONTEXT_BOOL(Multisample.SampleCoverageInvert), NO_EXTRA" ], - [ "SAMPLE_BUFFERS_ARB", "BUFFER_INT(Visual.sampleBuffers), NO_EXTRA" ], - [ "SAMPLES_ARB", "BUFFER_INT(Visual.samples), NO_EXTRA" ], + [ "SAMPLE_BUFFERS_ARB", "BUFFER_INT(Visual.sampleBuffers), extra_new_buffers" ], + [ "SAMPLES_ARB", "BUFFER_INT(Visual.samples), extra_new_buffers" ], # GL_SGIS_generate_mipmap [ "GENERATE_MIPMAP_HINT_SGIS", "CONTEXT_ENUM(Hint.GenerateMipmap), NO_EXTRA" ], @@ -412,7 +412,7 @@ descriptor=[ [ "DEPTH_SCALE", "CONTEXT_FLOAT(Pixel.DepthScale), NO_EXTRA" ], [ "DOUBLEBUFFER", "BUFFER_INT(Visual.doubleBufferMode), NO_EXTRA" ], [ "DRAW_BUFFER", "BUFFER_ENUM(ColorDrawBuffer[0]), NO_EXTRA" ], - [ "EDGE_FLAG", "LOC_CUSTOM, TYPE_BOOLEAN, 0, NO_EXTRA" ], + [ "EDGE_FLAG", "LOC_CUSTOM, TYPE_BOOLEAN, 0, extra_flush_current" ], [ "FEEDBACK_BUFFER_SIZE", "CONTEXT_INT(Feedback.BufferSize), NO_EXTRA" ], [ "FEEDBACK_BUFFER_TYPE", "CONTEXT_ENUM(Feedback.Type), NO_EXTRA" ], [ "FOG_INDEX", "CONTEXT_FLOAT(Fog.Index), NO_EXTRA" ], @@ -630,7 +630,7 @@ descriptor=[ [ "TEXTURE_CUBE_MAP_SEAMLESS", "CONTEXT_BOOL(Texture.CubeMapSeamless), extra_ARB_seamless_cube_map" ], # GL_EXT_texture_integer - [ "RGBA_INTEGER_MODE_EXT", "BUFFER_BOOL(_IntegerColor), extra_EXT_texture_integer" ], + [ "RGBA_INTEGER_MODE_EXT", "BUFFER_BOOL(_IntegerColor), extra_EXT_texture_integer_and_new_buffers" ], # GL_ARB_transform_feedback3 [ "MAX_TRANSFORM_FEEDBACK_BUFFERS", "CONTEXT_INT(Const.MaxTransformFeedbackBuffers), extra_ARB_transform_feedback3" ], @@ -645,7 +645,7 @@ descriptor=[ [ "MAX_VERTEX_VARYING_COMPONENTS_ARB", "CONTEXT_INT(Const.MaxVertexVaryingComponents), extra_ARB_geometry_shader4" ], # GL_ARB_color_buffer_float - [ "RGBA_FLOAT_MODE_ARB", "BUFFER_FIELD(Visual.floatMode, TYPE_BOOLEAN), 0" ], + [ "RGBA_FLOAT_MODE_ARB", "BUFFER_FIELD(Visual.floatMode, TYPE_BOOLEAN), extra_core_ARB_color_buffer_float_and_new_buffers" ], # GL_EXT_gpu_shader4 / GLSL 1.30 [ "MIN_PROGRAM_TEXEL_OFFSET", "CONTEXT_INT(Const.MinProgramTexelOffset), extra_GLSL_130" ], @@ -666,7 +666,7 @@ descriptor=[ # GL3.0 / GL_EXT_framebuffer_sRGB [ "FRAMEBUFFER_SRGB_EXT", "CONTEXT_BOOL(Color.sRGBEnabled), extra_EXT_framebuffer_sRGB" ], - [ "FRAMEBUFFER_SRGB_CAPABLE_EXT", "BUFFER_INT(Visual.sRGBCapable), extra_EXT_framebuffer_sRGB" ], + [ "FRAMEBUFFER_SRGB_CAPABLE_EXT", "BUFFER_INT(Visual.sRGBCapable), extra_EXT_framebuffer_sRGB_and_new_buffers" ], # GL 3.1 # NOTE: different enum values for GL_PRIMITIVE_RESTART_NV diff --git a/src/mesa/main/hash.c b/src/mesa/main/hash.c index 8c763e20a9..9b9fff808b 100644 --- a/src/mesa/main/hash.c +++ b/src/mesa/main/hash.c @@ -114,9 +114,9 @@ _mesa_NewHashTable(void) { struct _mesa_HashTable *table = CALLOC_STRUCT(_mesa_HashTable); - table->ht = _mesa_hash_table_create(NULL, uint_key_compare); - _mesa_hash_table_set_deleted_key(table->ht, uint_key(DELETED_KEY_VALUE)); if (table) { + table->ht = _mesa_hash_table_create(NULL, uint_key_compare); + _mesa_hash_table_set_deleted_key(table->ht, uint_key(DELETED_KEY_VALUE)); _glthread_INIT_MUTEX(table->Mutex); _glthread_INIT_MUTEX(table->WalkMutex); } diff --git a/src/mesa/main/imports.h b/src/mesa/main/imports.h index 4b783818b2..c4110ef10b 100644 --- a/src/mesa/main/imports.h +++ b/src/mesa/main/imports.h @@ -500,17 +500,11 @@ _mesa_realloc( void *oldBuffer, size_t oldSize, size_t newSize ); #ifndef FFS_DEFINED #define FFS_DEFINED 1 #ifdef __GNUC__ - -#if defined(__MINGW32__) || defined(__CYGWIN__) || defined(ANDROID) || defined(__APPLE__) #define ffs __builtin_ffs #define ffsll __builtin_ffsll -#endif - #else - extern int ffs(int i); extern int ffsll(long long int i); - #endif /*__ GNUC__ */ #endif /* FFS_DEFINED */ diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h index 3369623f70..df914184f6 100644 --- a/src/mesa/main/mtypes.h +++ b/src/mesa/main/mtypes.h @@ -1128,6 +1128,7 @@ struct gl_stencil_attrib GLboolean TestTwoSide; /**< GL_EXT_stencil_two_side */ GLubyte ActiveFace; /**< GL_EXT_stencil_two_side (0 or 2) */ GLboolean _Enabled; /**< Enabled and stencil buffer present */ + GLboolean _WriteEnabled; /**< _Enabled and non-zero writemasks */ GLboolean _TestTwoSide; GLubyte _BackFace; /**< Current back stencil state (1 or 2) */ GLenum Function[3]; /**< Stencil function */ @@ -1274,6 +1275,7 @@ struct gl_texture_object GLfloat Priority; /**< in [0,1] */ GLint BaseLevel; /**< min mipmap level, OpenGL 1.2 */ GLint MaxLevel; /**< max mipmap level, OpenGL 1.2 */ + GLint ImmutableLevels; /**< ES 3.0 / ARB_texture_view */ GLint _MaxLevel; /**< actual max mipmap level (q in the spec) */ GLfloat _MaxLambda; /**< = _MaxLevel - BaseLevel (q - b in spec) */ GLint CropRect[4]; /**< GL_OES_draw_texture */ diff --git a/src/mesa/main/samplerobj.c b/src/mesa/main/samplerobj.c index 319a444d7f..5cff329367 100644 --- a/src/mesa/main/samplerobj.c +++ b/src/mesa/main/samplerobj.c @@ -40,7 +40,7 @@ #include "main/samplerobj.h" -static struct gl_sampler_object * +struct gl_sampler_object * _mesa_lookup_samplerobj(struct gl_context *ctx, GLuint name) { if (name == 0) @@ -206,9 +206,19 @@ _mesa_DeleteSamplers(GLsizei count, const GLuint *samplers) for (i = 0; i < count; i++) { if (samplers[i]) { + GLuint j; struct gl_sampler_object *sampObj = _mesa_lookup_samplerobj(ctx, samplers[i]); + if (sampObj) { + /* If the sampler is currently bound, unbind it. */ + for (j = 0; j < ctx->Const.MaxCombinedTextureImageUnits; j++) { + if (ctx->Texture.Unit[j].Sampler == sampObj) { + FLUSH_VERTICES(ctx, _NEW_TEXTURE); + _mesa_reference_sampler_object(ctx, &ctx->Texture.Unit[j].Sampler, NULL); + } + } + /* The ID is immediately freed for re-use */ _mesa_HashRemove(ctx->Shared->SamplerObjects, samplers[i]); /* But the object exists until its reference count goes to zero */ diff --git a/src/mesa/main/samplerobj.h b/src/mesa/main/samplerobj.h index 311425701d..69e389949d 100644 --- a/src/mesa/main/samplerobj.h +++ b/src/mesa/main/samplerobj.h @@ -62,6 +62,8 @@ _mesa_reference_sampler_object(struct gl_context *ctx, _mesa_reference_sampler_object_(ctx, ptr, samp); } +extern struct gl_sampler_object * +_mesa_lookup_samplerobj(struct gl_context *ctx, GLuint name); extern struct gl_sampler_object * _mesa_new_sampler_object(struct gl_context *ctx, GLuint name); diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c index be69467986..2c307e79ce 100644 --- a/src/mesa/main/shaderapi.c +++ b/src/mesa/main/shaderapi.c @@ -518,9 +518,11 @@ get_programiv(struct gl_context *ctx, GLuint program, GLenum pname, GLint *param GLint max_len = 0; for (i = 0; i < shProg->NumUserUniformStorage; i++) { - /* Add one for the terminating NUL character. + /* Add one for the terminating NUL character for a non-array, and + * 4 for the "[0]" and the NUL for an array. */ - const GLint len = strlen(shProg->UniformStorage[i].name) + 1; + const GLint len = strlen(shProg->UniformStorage[i].name) + 1 + + ((shProg->UniformStorage[i].array_elements != 0) ? 3 : 0); if (len > max_len) max_len = len; diff --git a/src/mesa/main/stencil.c b/src/mesa/main/stencil.c index c161808e58..3308417313 100644 --- a/src/mesa/main/stencil.c +++ b/src/mesa/main/stencil.c @@ -551,6 +551,11 @@ _mesa_update_stencil(struct gl_context *ctx) ctx->Stencil.Ref[0] != ctx->Stencil.Ref[face] || ctx->Stencil.ValueMask[0] != ctx->Stencil.ValueMask[face] || ctx->Stencil.WriteMask[0] != ctx->Stencil.WriteMask[face]); + + ctx->Stencil._WriteEnabled = + ctx->Stencil._Enabled && + (ctx->Stencil.WriteMask[0] != 0 || + (ctx->Stencil._TestTwoSide && ctx->Stencil.WriteMask[face] != 0)); } diff --git a/src/mesa/main/tests/hash_table/Makefile.am b/src/mesa/main/tests/hash_table/Makefile.am index 272c63aa5e..f63841d221 100644 --- a/src/mesa/main/tests/hash_table/Makefile.am +++ b/src/mesa/main/tests/hash_table/Makefile.am @@ -19,6 +19,7 @@ # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. AM_CPPFLAGS = \ + -I$(top_srcdir)/include \ -I$(top_srcdir)/src/mesa/main \ $(API_DEFINES) $(DEFINES) $(INCLUDE_DIRS) diff --git a/src/mesa/main/texgetimage.c b/src/mesa/main/texgetimage.c index 7299a4b23e..74b09ef2c2 100644 --- a/src/mesa/main/texgetimage.c +++ b/src/mesa/main/texgetimage.c @@ -518,6 +518,7 @@ get_tex_rgba(struct gl_context *ctx, GLuint dimensions, if (type_needs_clamping(type)) { /* the returned image type can't have negative values */ if (dataType == GL_FLOAT || + dataType == GL_HALF_FLOAT || dataType == GL_SIGNED_NORMALIZED || format == GL_LUMINANCE || format == GL_LUMINANCE_ALPHA) { diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c index 1b9525b72d..1b91b89ab6 100644 --- a/src/mesa/main/teximage.c +++ b/src/mesa/main/teximage.c @@ -1362,6 +1362,7 @@ _mesa_legal_texture_dimensions(struct gl_context *ctx, GLenum target, return GL_FALSE; return GL_TRUE; + case GL_TEXTURE_CUBE_MAP: case GL_TEXTURE_CUBE_MAP_POSITIVE_X: case GL_TEXTURE_CUBE_MAP_NEGATIVE_X: case GL_TEXTURE_CUBE_MAP_POSITIVE_Y: @@ -3438,19 +3439,21 @@ copyteximage(struct gl_context *ctx, GLuint dims, _mesa_init_teximage_fields(ctx, texImage, width, height, 1, border, internalFormat, texFormat); - /* Allocate texture memory (no pixel data yet) */ - ctx->Driver.AllocTextureImageBuffer(ctx, texImage); + if (width && height) { + /* Allocate texture memory (no pixel data yet) */ + ctx->Driver.AllocTextureImageBuffer(ctx, texImage); - if (_mesa_clip_copytexsubimage(ctx, &dstX, &dstY, &srcX, &srcY, - &width, &height)) { - struct gl_renderbuffer *srcRb = - get_copy_tex_image_source(ctx, texImage->TexFormat); + if (_mesa_clip_copytexsubimage(ctx, &dstX, &dstY, &srcX, &srcY, + &width, &height)) { + struct gl_renderbuffer *srcRb = + get_copy_tex_image_source(ctx, texImage->TexFormat); - ctx->Driver.CopyTexSubImage(ctx, dims, texImage, dstX, dstY, dstZ, - srcRb, srcX, srcY, width, height); - } + ctx->Driver.CopyTexSubImage(ctx, dims, texImage, dstX, dstY, dstZ, + srcRb, srcX, srcY, width, height); + } - check_gen_mipmap(ctx, target, texObj, level); + check_gen_mipmap(ctx, target, texObj, level); + } _mesa_update_fbo_texture(ctx, texObj, face, level); diff --git a/src/mesa/main/texparam.c b/src/mesa/main/texparam.c index 6f18ec6dab..dd67baae96 100644 --- a/src/mesa/main/texparam.c +++ b/src/mesa/main/texparam.c @@ -1432,6 +1432,12 @@ _mesa_GetTexParameterfv( GLenum target, GLenum pname, GLfloat *params ) *params = (GLfloat) obj->Immutable; break; + case GL_TEXTURE_IMMUTABLE_LEVELS: + if (!_mesa_is_gles3(ctx)) + goto invalid_pname; + *params = (GLfloat) obj->ImmutableLevels; + break; + case GL_REQUIRED_TEXTURE_IMAGE_UNITS_OES: if (!_mesa_is_gles(ctx) || !ctx->Extensions.OES_EGL_image_external) goto invalid_pname; @@ -1609,6 +1615,12 @@ _mesa_GetTexParameteriv( GLenum target, GLenum pname, GLint *params ) *params = (GLint) obj->Immutable; break; + case GL_TEXTURE_IMMUTABLE_LEVELS: + if (!_mesa_is_gles3(ctx)) + goto invalid_pname; + *params = obj->ImmutableLevels; + break; + case GL_REQUIRED_TEXTURE_IMAGE_UNITS_OES: if (!_mesa_is_gles(ctx) || !ctx->Extensions.OES_EGL_image_external) goto invalid_pname; diff --git a/src/mesa/main/texstorage.c b/src/mesa/main/texstorage.c index 00f19bae51..675fd745b7 100644 --- a/src/mesa/main/texstorage.c +++ b/src/mesa/main/texstorage.c @@ -397,6 +397,7 @@ texstorage(GLuint dims, GLenum target, GLsizei levels, GLenum internalformat, } texObj->Immutable = GL_TRUE; + texObj->ImmutableLevels = levels; } } diff --git a/src/mesa/main/version.h b/src/mesa/main/version.h index a98aadfb1e..12e7409312 100644 --- a/src/mesa/main/version.h +++ b/src/mesa/main/version.h @@ -34,8 +34,8 @@ struct gl_context; /* Mesa version */ #define MESA_MAJOR 9 #define MESA_MINOR 1 -#define MESA_PATCH 0 -#define MESA_VERSION_STRING "9.1" +#define MESA_PATCH 3 +#define MESA_VERSION_STRING "9.1.3" /* To make version comparison easy */ #define MESA_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) diff --git a/src/mesa/program/prog_cache.c b/src/mesa/program/prog_cache.c index 47f926b1bc..1f1c6142df 100644 --- a/src/mesa/program/prog_cache.c +++ b/src/mesa/program/prog_cache.c @@ -37,6 +37,7 @@ struct cache_item { GLuint hash; + unsigned keysize; void *key; struct gl_program *program; struct cache_item *next; @@ -174,7 +175,8 @@ struct gl_program * _mesa_search_program_cache(struct gl_program_cache *cache, const void *key, GLuint keysize) { - if (cache->last && + if (cache->last && + cache->last->keysize == keysize && memcmp(cache->last->key, key, keysize) == 0) { return cache->last->program; } @@ -183,7 +185,10 @@ _mesa_search_program_cache(struct gl_program_cache *cache, struct cache_item *c; for (c = cache->items[hash % cache->size]; c; c = c->next) { - if (c->hash == hash && memcmp(c->key, key, keysize) == 0) { + if (c->hash == hash && + c->keysize == keysize && + memcmp(c->key, key, keysize) == 0) { + cache->last = c; return c->program; } @@ -207,6 +212,7 @@ _mesa_program_cache_insert(struct gl_context *ctx, c->key = malloc(keysize); memcpy(c->key, key, keysize); + c->keysize = keysize; c->program = program; /* no refcount change */ @@ -235,6 +241,7 @@ _mesa_shader_cache_insert(struct gl_context *ctx, c->key = malloc(keysize); memcpy(c->key, key, keysize); + c->keysize = keysize; c->program = (struct gl_program *)program; /* no refcount change */ diff --git a/src/mesa/state_tracker/st_atom_constbuf.c b/src/mesa/state_tracker/st_atom_constbuf.c index 961fb28a96..b92a24877a 100644 --- a/src/mesa/state_tracker/st_atom_constbuf.c +++ b/src/mesa/state_tracker/st_atom_constbuf.c @@ -195,6 +195,7 @@ static void st_bind_ubos(struct st_context *st, pipe_resource_reference(&cb.buffer, st_obj->buffer); cb.buffer_size = st_obj->buffer->width0 - binding->Offset; + cb.buffer_offset = binding->Offset; st->pipe->set_constant_buffer(st->pipe, shader_type, 1 + i, &cb); pipe_resource_reference(&cb.buffer, NULL); diff --git a/src/mesa/state_tracker/st_atom_depth.c b/src/mesa/state_tracker/st_atom_depth.c index c76a6d8c60..e351c764b0 100644 --- a/src/mesa/state_tracker/st_atom_depth.c +++ b/src/mesa/state_tracker/st_atom_depth.c @@ -153,7 +153,7 @@ update_depth_stencil_alpha(struct st_context *st) const struct st_tracked_state st_update_depth_stencil_alpha = { "st_update_depth_stencil", /* name */ { /* dirty */ - (_NEW_DEPTH|_NEW_STENCIL|_NEW_COLOR), /* mesa */ + (_NEW_DEPTH|_NEW_STENCIL|_NEW_COLOR|_NEW_BUFFERS),/* mesa */ 0, /* st */ }, update_depth_stencil_alpha /* update */ diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker/st_extensions.c index 5f03cec5e9..9854c03c82 100644 --- a/src/mesa/state_tracker/st_extensions.c +++ b/src/mesa/state_tracker/st_extensions.c @@ -676,6 +676,9 @@ void st_init_extensions(struct st_context *st) if (st->options.force_glsl_extensions_warn) ctx->Const.ForceGLSLExtensionsWarn = 1; + if (st->options.disable_glsl_line_continuations) + ctx->Const.DisableGLSLLineContinuations = 1; + ctx->Const.MinMapBufferAlignment = screen->get_param(screen, PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT); if (ctx->Const.MinMapBufferAlignment >= 64) { diff --git a/src/mesa/swrast/s_blit.c b/src/mesa/swrast/s_blit.c index 82fa43f1c7..8484e558ce 100644 --- a/src/mesa/swrast/s_blit.c +++ b/src/mesa/swrast/s_blit.c @@ -564,22 +564,10 @@ blit_linear(struct gl_context *ctx, * Keep two adjacent src rows around for bilinear sampling. */ srcBuffer0 = malloc(pixelSize * srcWidth); - if (!srcBuffer0) { - _mesa_error(ctx, GL_OUT_OF_MEMORY, "glBlitFrameBufferEXT"); - return; - } srcBuffer1 = malloc(pixelSize * srcWidth); - if (!srcBuffer1) { - free(srcBuffer0); - _mesa_error(ctx, GL_OUT_OF_MEMORY, "glBlitFrameBufferEXT"); - return; - } dstBuffer = malloc(pixelSize * dstWidth); - if (!dstBuffer) { - free(srcBuffer0); - free(srcBuffer1); - _mesa_error(ctx, GL_OUT_OF_MEMORY, "glBlitFrameBufferEXT"); - return; + if (!srcBuffer0 || !srcBuffer1 || !dstBuffer) { + goto fail_no_memory; } for (i = 0; i < drawFb->_NumColorDrawBuffers; i++) { @@ -610,11 +598,7 @@ blit_linear(struct gl_context *ctx, GL_MAP_READ_BIT | GL_MAP_WRITE_BIT, &srcMap, &srcRowStride); if (!srcMap) { - free(srcBuffer0); - free(srcBuffer1); - free(dstBuffer); - _mesa_error(ctx, GL_OUT_OF_MEMORY, "glBlitFramebuffer"); - return; + goto fail_no_memory; } dstMap = srcMap; @@ -629,22 +613,14 @@ blit_linear(struct gl_context *ctx, 0, 0, readRb->Width, readRb->Height, GL_MAP_READ_BIT, &srcMap, &srcRowStride); if (!srcMap) { - free(srcBuffer0); - free(srcBuffer1); - free(dstBuffer); - _mesa_error(ctx, GL_OUT_OF_MEMORY, "glBlitFramebuffer"); - return; + goto fail_no_memory; } ctx->Driver.MapRenderbuffer(ctx, drawRb, 0, 0, drawRb->Width, drawRb->Height, GL_MAP_WRITE_BIT, &dstMap, &dstRowStride); if (!dstMap) { ctx->Driver.UnmapRenderbuffer(ctx, readRb); - free(srcBuffer0); - free(srcBuffer1); - free(dstBuffer); - _mesa_error(ctx, GL_OUT_OF_MEMORY, "glBlitFramebuffer"); - return; + goto fail_no_memory; } } @@ -734,15 +710,22 @@ blit_linear(struct gl_context *ctx, } } - free(srcBuffer0); - free(srcBuffer1); - free(dstBuffer); - ctx->Driver.UnmapRenderbuffer(ctx, readRb); if (drawRb != readRb) { ctx->Driver.UnmapRenderbuffer(ctx, drawRb); } } + + free(srcBuffer0); + free(srcBuffer1); + free(dstBuffer); + return; + +fail_no_memory: + free(srcBuffer0); + free(srcBuffer1); + free(dstBuffer); + _mesa_error(ctx, GL_OUT_OF_MEMORY, "glBlitFramebuffer"); } diff --git a/src/mesa/vbo/vbo_save_draw.c b/src/mesa/vbo/vbo_save_draw.c index efb386e5c9..f5b5c411d4 100644 --- a/src/mesa/vbo/vbo_save_draw.c +++ b/src/mesa/vbo/vbo_save_draw.c @@ -253,7 +253,7 @@ vbo_save_playback_vertex_list(struct gl_context *ctx, void *data) struct vbo_save_context *save = &vbo_context(ctx)->save; GLboolean remap_vertex_store = GL_FALSE; - if (save->vertex_store->buffer) { + if (save->vertex_store && save->vertex_store->buffer) { /* The vertex store is currently mapped but we're about to replay * a display list. This can happen when a nested display list is * being build with GL_COMPILE_AND_EXECUTE. |