diff options
author | Jerome Glisse <jglisse@redhat.com> | 2010-01-14 11:24:16 +0100 |
---|---|---|
committer | Jerome Glisse <jglisse@redhat.com> | 2010-01-14 11:24:16 +0100 |
commit | 6bf1ed2979ca56d3e8dd8938fc08e3810887ae8a (patch) | |
tree | 0596c81c4076f485ebd7ca52df8f0d6153d475ef /radeon/radeon_cs_space.c | |
parent | b06cb754a1eee0746c40f62c51d4f0544c39c843 (diff) |
radeon: indentation & trailing space cleanup
Diffstat (limited to 'radeon/radeon_cs_space.c')
-rw-r--r-- | radeon/radeon_cs_space.c | 170 |
1 files changed, 84 insertions, 86 deletions
diff --git a/radeon/radeon_cs_space.c b/radeon/radeon_cs_space.c index b8054e13..208e1bbf 100644 --- a/radeon/radeon_cs_space.c +++ b/radeon/radeon_cs_space.c @@ -1,7 +1,7 @@ -/* +/* * Copyright © 2009 Red Hat Inc. * All Rights Reserved. - * + * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including @@ -9,14 +9,14 @@ * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. * * The above copyright notice and this permission notice (including the @@ -50,54 +50,54 @@ static inline int radeon_cs_setup_bo(struct radeon_cs_space_check *sc, struct ra /* legacy needs a static check */ if (radeon_bo_is_static((struct radeon_bo *)sc->bo)) { - bo->space_accounted = sc->new_accounted = (read_domains << 16) | write_domain; - return 0; + bo->space_accounted = sc->new_accounted = (read_domains << 16) | write_domain; + return 0; } /* already accounted this bo */ if (write_domain && (write_domain == bo->space_accounted)) { - sc->new_accounted = bo->space_accounted; - return 0; + sc->new_accounted = bo->space_accounted; + return 0; } if (read_domains && ((read_domains << 16) == bo->space_accounted)) { - sc->new_accounted = bo->space_accounted; - return 0; + sc->new_accounted = bo->space_accounted; + return 0; } if (bo->space_accounted == 0) { - if (write_domain == RADEON_GEM_DOMAIN_VRAM) - sizes->op_vram_write += bo->size; - else if (write_domain == RADEON_GEM_DOMAIN_GTT) - sizes->op_gart_write += bo->size; - else - sizes->op_read += bo->size; - sc->new_accounted = (read_domains << 16) | write_domain; + if (write_domain == RADEON_GEM_DOMAIN_VRAM) + sizes->op_vram_write += bo->size; + else if (write_domain == RADEON_GEM_DOMAIN_GTT) + sizes->op_gart_write += bo->size; + else + sizes->op_read += bo->size; + sc->new_accounted = (read_domains << 16) | write_domain; } else { - uint16_t old_read, old_write; - - old_read = bo->space_accounted >> 16; - old_write = bo->space_accounted & 0xffff; - - if (write_domain && (old_read & write_domain)) { - sc->new_accounted = write_domain; - /* moving from read to a write domain */ - if (write_domain == RADEON_GEM_DOMAIN_VRAM) { - sizes->op_read -= bo->size; - sizes->op_vram_write += bo->size; - } else if (write_domain == RADEON_GEM_DOMAIN_GTT) { - sizes->op_read -= bo->size; - sizes->op_gart_write += bo->size; - } - } else if (read_domains & old_write) { - sc->new_accounted = bo->space_accounted & 0xffff; - } else { - /* rewrite the domains */ - if (write_domain != old_write) - fprintf(stderr,"WRITE DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, write_domain, old_write); - if (read_domains != old_read) - fprintf(stderr,"READ DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, read_domains, old_read); - return RADEON_CS_SPACE_FLUSH; - } + uint16_t old_read, old_write; + + old_read = bo->space_accounted >> 16; + old_write = bo->space_accounted & 0xffff; + + if (write_domain && (old_read & write_domain)) { + sc->new_accounted = write_domain; + /* moving from read to a write domain */ + if (write_domain == RADEON_GEM_DOMAIN_VRAM) { + sizes->op_read -= bo->size; + sizes->op_vram_write += bo->size; + } else if (write_domain == RADEON_GEM_DOMAIN_GTT) { + sizes->op_read -= bo->size; + sizes->op_gart_write += bo->size; + } + } else if (read_domains & old_write) { + sc->new_accounted = bo->space_accounted & 0xffff; + } else { + /* rewrite the domains */ + if (write_domain != old_write) + fprintf(stderr,"WRITE DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, write_domain, old_write); + if (read_domains != old_read) + fprintf(stderr,"READ DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, read_domains, old_read); + return RADEON_CS_SPACE_FLUSH; + } } return 0; } @@ -113,48 +113,48 @@ static int radeon_cs_do_space_check(struct radeon_cs_int *cs, struct radeon_cs_s /* check the totals for this operation */ if (cs->bo_count == 0 && !new_tmp) - return 0; + return 0; memset(&sizes, 0, sizeof(struct rad_sizes)); /* prepare */ for (i = 0; i < cs->bo_count; i++) { - ret = radeon_cs_setup_bo(&cs->bos[i], &sizes); - if (ret) - return ret; + ret = radeon_cs_setup_bo(&cs->bos[i], &sizes); + if (ret) + return ret; } if (new_tmp) { - ret = radeon_cs_setup_bo(new_tmp, &sizes); - if (ret) - return ret; + ret = radeon_cs_setup_bo(new_tmp, &sizes); + if (ret) + return ret; } - + if (sizes.op_read < 0) - sizes.op_read = 0; + sizes.op_read = 0; /* check sizes - operation first */ if ((sizes.op_read + sizes.op_gart_write > csm->gart_limit) || - (sizes.op_vram_write > csm->vram_limit)) { - return RADEON_CS_SPACE_OP_TO_BIG; + (sizes.op_vram_write > csm->vram_limit)) { + return RADEON_CS_SPACE_OP_TO_BIG; } - + if (((csm->vram_write_used + sizes.op_vram_write) > csm->vram_limit) || - ((csm->read_used + csm->gart_write_used + sizes.op_gart_write + sizes.op_read) > csm->gart_limit)) { - return RADEON_CS_SPACE_FLUSH; + ((csm->read_used + csm->gart_write_used + sizes.op_gart_write + sizes.op_read) > csm->gart_limit)) { + return RADEON_CS_SPACE_FLUSH; } - + csm->gart_write_used += sizes.op_gart_write; csm->vram_write_used += sizes.op_vram_write; csm->read_used += sizes.op_read; /* commit */ for (i = 0; i < cs->bo_count; i++) { - bo = cs->bos[i].bo; - bo->space_accounted = cs->bos[i].new_accounted; + bo = cs->bos[i].bo; + bo->space_accounted = cs->bos[i].new_accounted; } if (new_tmp) - new_tmp->bo->space_accounted = new_tmp->new_accounted; - + new_tmp->bo->space_accounted = new_tmp->new_accounted; + return RADEON_CS_SPACE_OK; } @@ -164,10 +164,10 @@ void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs, struct radeon_bo *b struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; int i; for (i = 0; i < csi->bo_count; i++) { - if (csi->bos[i].bo == boi && - csi->bos[i].read_domains == read_domains && - csi->bos[i].write_domain == write_domain) - return; + if (csi->bos[i].bo == boi && + csi->bos[i].read_domains == read_domains && + csi->bos[i].write_domain == write_domain) + return; } radeon_bo_ref(bo); i = csi->bo_count; @@ -181,7 +181,7 @@ void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs, struct radeon_bo *b } static int radeon_cs_check_space_internal(struct radeon_cs_int *cs, - struct radeon_cs_space_check *tmp_bo) + struct radeon_cs_space_check *tmp_bo) { int ret; int flushed = 0; @@ -189,32 +189,32 @@ static int radeon_cs_check_space_internal(struct radeon_cs_int *cs, again: ret = radeon_cs_do_space_check(cs, tmp_bo); if (ret == RADEON_CS_SPACE_OP_TO_BIG) - return -1; + return -1; if (ret == RADEON_CS_SPACE_FLUSH) { - (*cs->space_flush_fn)(cs->space_flush_data); - if (flushed) - return -1; - flushed = 1; - goto again; + (*cs->space_flush_fn)(cs->space_flush_data); + if (flushed) + return -1; + flushed = 1; + goto again; } return 0; } int radeon_cs_space_check_with_bo(struct radeon_cs *cs, - struct radeon_bo *bo, - uint32_t read_domains, uint32_t write_domain) + struct radeon_bo *bo, + uint32_t read_domains, uint32_t write_domain) { struct radeon_cs_int *csi = (struct radeon_cs_int *)cs; struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; struct radeon_cs_space_check temp_bo; - + int ret = 0; if (bo) { - temp_bo.bo = boi; - temp_bo.read_domains = read_domains; - temp_bo.write_domain = write_domain; - temp_bo.new_accounted = 0; + temp_bo.bo = boi; + temp_bo.read_domains = read_domains; + temp_bo.write_domain = write_domain; + temp_bo.new_accounted = 0; } ret = radeon_cs_check_space_internal(csi, bo ? &temp_bo : NULL); @@ -232,13 +232,11 @@ void radeon_cs_space_reset_bos(struct radeon_cs *cs) struct radeon_cs_int *csi = (struct radeon_cs_int *)cs; int i; for (i = 0; i < csi->bo_count; i++) { - radeon_bo_unref((struct radeon_bo *)csi->bos[i].bo); - csi->bos[i].bo = NULL; - csi->bos[i].read_domains = 0; - csi->bos[i].write_domain = 0; - csi->bos[i].new_accounted = 0; + radeon_bo_unref((struct radeon_bo *)csi->bos[i].bo); + csi->bos[i].bo = NULL; + csi->bos[i].read_domains = 0; + csi->bos[i].write_domain = 0; + csi->bos[i].new_accounted = 0; } csi->bo_count = 0; } - - |