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BranchCommit messageAuthorAge
asm-shader-rework-3Merge branch 'master' into asm-shader-rework-3Ian Romanick15 years
dri2-swapbuffersRequire new DRI2 proto headers for buildingJesse Barnes15 years
gallium-0.1pipebuffer: is_texture/buffer_referenced helper.José Fonseca15 years
glsl-pp-rework-2glsl/pp: Expand macro actual arguments before pasting into its body.Michal Krol15 years
lp-binningllvmpipe: fix the worst of the depth regressions since switch to 4x4Keith Whitwell15 years
masterintel/DRI2: add DRI2flushExtension support with invalidate hookKristian Høgsberg15 years
mesa_7_5_branchdocs: 7.5.2 md5 sumsIan Romanick15 years
mesa_7_6_branchprogs/tests: fixes for drawbuffers.cBrian Paul15 years
outputswritten64Move vertex shader results above the 32-bit boundryIan Romanick15 years
texformat-reworkswrast: fix RGB, RGBA texturing codeBrian Paul15 years
[...]
 
TagDownloadAuthorAge
mesa_7_5_2commit 18f3afbe88...Ian Romanick15 years
mesa_7_6commit 86cd188f94...Ian Romanick15 years
mesa_7_5_2_rc1commit 126d62edd1...Eric Anholt15 years
mesa_7_6_rc1commit cc8084932c...Eric Anholt15 years
mesa_7_5_1commit 7d3af894d6...Brian Paul15 years
mesa_7_5commit cd10996d4f...Brian Paul15 years
intel_2009q2_rc3commit 022e8e582e...Ian Romanick15 years
mesa_7_5_rc4commit 418987ff05...Brian Paul15 years
mesa_7_4_4commit d0c391b6a2...Brian Paul15 years
mesa_7_4_3commit 5d387a35ff...Brian Paul15 years
[...]
 
AgeCommit messageAuthorFilesLines
2007-03-09i915tex: Wait for pending scheduled flips before switching vsync pipe.i915tex-pageflipMichel Dänzer1-0/+19
2007-03-09i915tex: Set intel_fb->vbl_waited to current instead of what we aimed for.Michel Dänzer1-1/+1
2007-03-09i915tex: Sync pages between pipes immediately again.Michel Dänzer1-2/+12
2007-03-09i915tex: Do not wait for pending flips on both pipes at the same time.Michel Dänzer1-9/+4
2007-03-07i915tex: Set framebuffer size to match window before calling _mesa_make_current.Michel Dänzer1-10/+10
2007-02-28i915tex: Sync pages differently when crossing pipe borders.Michel Dänzer1-12/+18
2007-02-28i915tex: Check that intel_rb is valid before trying to add it to an fbo.Michel Dänzer1-2/+4
2007-02-28i915tex: Also update intel_rb->vbl_pending when scheduled swap is not a flip.Michel Dänzer1-3/+3
2007-02-22i915tex: Schedule flips when possible.Michel Dänzer6-179/+228
2007-02-20i915tex: Triple buffering support, only effective with page flipping so far.Michel Dänzer7-63/+166
[...]
 
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