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115 files changed, 0 insertions, 57718 deletions
diff --git a/linux/Config.in b/linux/Config.in deleted file mode 100644 index 46ba48d6f..000000000 --- a/linux/Config.in +++ /dev/null @@ -1,17 +0,0 @@ -# -# Drm device configuration -# -# This driver provides support for the -# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. -# - -tristate ' 3dfx Banshee/Voodoo3+' CONFIG_DRM_TDFX -#tristate ' 3dlabs GMX 2000' CONFIG_DRM_GAMMA -tristate ' ATI Rage 128' CONFIG_DRM_R128 -tristate ' ATI Radeon' CONFIG_DRM_RADEON -dep_tristate ' Intel I810' CONFIG_DRM_I810 $CONFIG_AGP -dep_tristate ' Intel 830M/845G/852GM/855GM/865G' CONFIG_DRM_I830 $CONFIG_AGP -dep_tristate ' Matrox g200/g400' CONFIG_DRM_MGA $CONFIG_AGP -tristate ' SiS' CONFIG_DRM_SIS -tristate ' Via Unichrome' CONFIG_DRM_VIA - diff --git a/linux/Doxyfile b/linux/Doxyfile deleted file mode 100644 index ab4fda13a..000000000 --- a/linux/Doxyfile +++ /dev/null @@ -1,1171 +0,0 @@ -# Doxyfile 1.3.8 - -# This file describes the settings to be used by the documentation system -# doxygen (www.doxygen.org) for a project -# -# All text after a hash (#) is considered a comment and will be ignored -# The format is: -# TAG = value [value, ...] -# For lists items can also be appended using: -# TAG += value [value, ...] -# Values that contain spaces should be placed between quotes (" ") - -#--------------------------------------------------------------------------- -# Project related configuration options -#--------------------------------------------------------------------------- - -# The PROJECT_NAME tag is a single word (or a sequence of words surrounded -# by quotes) that should identify the project. - -PROJECT_NAME = "Direct Rendering Module" - -# The PROJECT_NUMBER tag can be used to enter a project or revision number. -# This could be handy for archiving the generated documentation or -# if some version control system is used. - -PROJECT_NUMBER = - -# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) -# base path where the generated documentation will be put. -# If a relative path is entered, it will be relative to the location -# where doxygen was started. If left blank the current directory will be used. - -OUTPUT_DIRECTORY = - -# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create -# 4096 sub-directories (in 2 levels) under the output directory of each output -# format and will distribute the generated files over these directories. -# Enabling this option can be useful when feeding doxygen a huge amount of source -# files, where putting all generated files in the same directory would otherwise -# cause performance problems for the file system. - -CREATE_SUBDIRS = NO - -# The OUTPUT_LANGUAGE tag is used to specify the language in which all -# documentation generated by doxygen is written. Doxygen will use this -# information to generate all constant output in the proper language. -# The default language is English, other supported languages are: -# Brazilian, Catalan, Chinese, Chinese-Traditional, Croatian, Czech, Danish, -# Dutch, Finnish, French, German, Greek, Hungarian, Italian, Japanese, -# Japanese-en (Japanese with English messages), Korean, Korean-en, Norwegian, -# Polish, Portuguese, Romanian, Russian, Serbian, Slovak, Slovene, Spanish, -# Swedish, and Ukrainian. - -OUTPUT_LANGUAGE = English - -# This tag can be used to specify the encoding used in the generated output. -# The encoding is not always determined by the language that is chosen, -# but also whether or not the output is meant for Windows or non-Windows users. -# In case there is a difference, setting the USE_WINDOWS_ENCODING tag to YES -# forces the Windows encoding (this is the default for the Windows binary), -# whereas setting the tag to NO uses a Unix-style encoding (the default for -# all platforms other than Windows). - -USE_WINDOWS_ENCODING = NO - -# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will -# include brief member descriptions after the members that are listed in -# the file and class documentation (similar to JavaDoc). -# Set to NO to disable this. - -BRIEF_MEMBER_DESC = YES - -# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend -# the brief description of a member or function before the detailed description. -# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the -# brief descriptions will be completely suppressed. - -REPEAT_BRIEF = YES - -# This tag implements a quasi-intelligent brief description abbreviator -# that is used to form the text in various listings. Each string -# in this list, if found as the leading text of the brief description, will be -# stripped from the text and the result after processing the whole list, is used -# as the annotated text. Otherwise, the brief description is used as-is. If left -# blank, the following values are used ("$name" is automatically replaced with the -# name of the entity): "The $name class" "The $name widget" "The $name file" -# "is" "provides" "specifies" "contains" "represents" "a" "an" "the" - -ABBREVIATE_BRIEF = - -# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then -# Doxygen will generate a detailed section even if there is only a brief -# description. - -ALWAYS_DETAILED_SEC = NO - -# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all inherited -# members of a class in the documentation of that class as if those members were -# ordinary class members. Constructors, destructors and assignment operators of -# the base classes will not be shown. - -INLINE_INHERITED_MEMB = NO - -# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full -# path before files name in the file list and in the header files. If set -# to NO the shortest path that makes the file name unique will be used. - -FULL_PATH_NAMES = NO - -# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag -# can be used to strip a user-defined part of the path. Stripping is -# only done if one of the specified strings matches the left-hand part of -# the path. The tag can be used to show relative paths in the file list. -# If left blank the directory from which doxygen is run is used as the -# path to strip. - -STRIP_FROM_PATH = - -# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of -# the path mentioned in the documentation of a class, which tells -# the reader which header file to include in order to use a class. -# If left blank only the name of the header file containing the class -# definition is used. Otherwise one should specify the include paths that -# are normally passed to the compiler using the -I flag. - -STRIP_FROM_INC_PATH = - -# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter -# (but less readable) file names. This can be useful is your file systems -# doesn't support long names like on DOS, Mac, or CD-ROM. - -SHORT_NAMES = NO - -# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen -# will interpret the first line (until the first dot) of a JavaDoc-style -# comment as the brief description. If set to NO, the JavaDoc -# comments will behave just like the Qt-style comments (thus requiring an -# explicit @brief command for a brief description. - -JAVADOC_AUTOBRIEF = YES - -# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make Doxygen -# treat a multi-line C++ special comment block (i.e. a block of //! or /// -# comments) as a brief description. This used to be the default behaviour. -# The new default is to treat a multi-line C++ comment block as a detailed -# description. Set this tag to YES if you prefer the old behaviour instead. - -MULTILINE_CPP_IS_BRIEF = NO - -# If the DETAILS_AT_TOP tag is set to YES then Doxygen -# will output the detailed description near the top, like JavaDoc. -# If set to NO, the detailed description appears after the member -# documentation. - -DETAILS_AT_TOP = YES - -# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented -# member inherits the documentation from any documented member that it -# re-implements. - -INHERIT_DOCS = YES - -# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC -# tag is set to YES, then doxygen will reuse the documentation of the first -# member in the group (if any) for the other members of the group. By default -# all members of a group must be documented explicitly. - -DISTRIBUTE_GROUP_DOC = NO - -# The TAB_SIZE tag can be used to set the number of spaces in a tab. -# Doxygen uses this value to replace tabs by spaces in code fragments. - -TAB_SIZE = 8 - -# This tag can be used to specify a number of aliases that acts -# as commands in the documentation. An alias has the form "name=value". -# For example adding "sideeffect=\par Side Effects:\n" will allow you to -# put the command \sideeffect (or @sideeffect) in the documentation, which -# will result in a user-defined paragraph with heading "Side Effects:". -# You can put \n's in the value part of an alias to insert newlines. - -ALIASES = - -# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources -# only. Doxygen will then generate output that is more tailored for C. -# For instance, some of the names that are used will be different. The list -# of all members will be omitted, etc. - -OPTIMIZE_OUTPUT_FOR_C = YES - -# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java sources -# only. Doxygen will then generate output that is more tailored for Java. -# For instance, namespaces will be presented as packages, qualified scopes -# will look different, etc. - -OPTIMIZE_OUTPUT_JAVA = NO - -# Set the SUBGROUPING tag to YES (the default) to allow class member groups of -# the same type (for instance a group of public functions) to be put as a -# subgroup of that type (e.g. under the Public Functions section). Set it to -# NO to prevent subgrouping. Alternatively, this can be done per class using -# the \nosubgrouping command. - -SUBGROUPING = YES - -#--------------------------------------------------------------------------- -# Build related configuration options -#--------------------------------------------------------------------------- - -# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in -# documentation are documented, even if no documentation was available. -# Private class members and static file members will be hidden unless -# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES - -EXTRACT_ALL = NO - -# If the EXTRACT_PRIVATE tag is set to YES all private members of a class -# will be included in the documentation. - -EXTRACT_PRIVATE = YES - -# If the EXTRACT_STATIC tag is set to YES all static members of a file -# will be included in the documentation. - -EXTRACT_STATIC = YES - -# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) -# defined locally in source files will be included in the documentation. -# If set to NO only classes defined in header files are included. - -EXTRACT_LOCAL_CLASSES = YES - -# This flag is only useful for Objective-C code. When set to YES local -# methods, which are defined in the implementation section but not in -# the interface are included in the documentation. -# If set to NO (the default) only methods in the interface are included. - -EXTRACT_LOCAL_METHODS = NO - -# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all -# undocumented members of documented classes, files or namespaces. -# If set to NO (the default) these members will be included in the -# various overviews, but no documentation section is generated. -# This option has no effect if EXTRACT_ALL is enabled. - -HIDE_UNDOC_MEMBERS = NO - -# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all -# undocumented classes that are normally visible in the class hierarchy. -# If set to NO (the default) these classes will be included in the various -# overviews. This option has no effect if EXTRACT_ALL is enabled. - -HIDE_UNDOC_CLASSES = NO - -# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all -# friend (class|struct|union) declarations. -# If set to NO (the default) these declarations will be included in the -# documentation. - -HIDE_FRIEND_COMPOUNDS = NO - -# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any -# documentation blocks found inside the body of a function. -# If set to NO (the default) these blocks will be appended to the -# function's detailed documentation block. - -HIDE_IN_BODY_DOCS = NO - -# The INTERNAL_DOCS tag determines if documentation -# that is typed after a \internal command is included. If the tag is set -# to NO (the default) then the documentation will be excluded. -# Set it to YES to include the internal documentation. - -INTERNAL_DOCS = NO - -# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate -# file names in lower-case letters. If set to YES upper-case letters are also -# allowed. This is useful if you have classes or files whose names only differ -# in case and if your file system supports case sensitive file names. Windows -# and Mac users are advised to set this option to NO. - -CASE_SENSE_NAMES = YES - -# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen -# will show members with their full class and namespace scopes in the -# documentation. If set to YES the scope will be hidden. - -HIDE_SCOPE_NAMES = NO - -# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen -# will put a list of the files that are included by a file in the documentation -# of that file. - -SHOW_INCLUDE_FILES = NO - -# If the INLINE_INFO tag is set to YES (the default) then a tag [inline] -# is inserted in the documentation for inline members. - -INLINE_INFO = YES - -# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen -# will sort the (detailed) documentation of file and class members -# alphabetically by member name. If set to NO the members will appear in -# declaration order. - -SORT_MEMBER_DOCS = NO - -# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the -# brief documentation of file, namespace and class members alphabetically -# by member name. If set to NO (the default) the members will appear in -# declaration order. - -SORT_BRIEF_DOCS = NO - -# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be -# sorted by fully-qualified names, including namespaces. If set to -# NO (the default), the class list will be sorted only by class name, -# not including the namespace part. -# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES. -# Note: This option applies only to the class list, not to the -# alphabetical list. - -SORT_BY_SCOPE_NAME = NO - -# The GENERATE_TODOLIST tag can be used to enable (YES) or -# disable (NO) the todo list. This list is created by putting \todo -# commands in the documentation. - -GENERATE_TODOLIST = YES - -# The GENERATE_TESTLIST tag can be used to enable (YES) or -# disable (NO) the test list. This list is created by putting \test -# commands in the documentation. - -GENERATE_TESTLIST = YES - -# The GENERATE_BUGLIST tag can be used to enable (YES) or -# disable (NO) the bug list. This list is created by putting \bug -# commands in the documentation. - -GENERATE_BUGLIST = YES - -# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or -# disable (NO) the deprecated list. This list is created by putting -# \deprecated commands in the documentation. - -GENERATE_DEPRECATEDLIST= YES - -# The ENABLED_SECTIONS tag can be used to enable conditional -# documentation sections, marked by \if sectionname ... \endif. - -ENABLED_SECTIONS = - -# The MAX_INITIALIZER_LINES tag determines the maximum number of lines -# the initial value of a variable or define consists of for it to appear in -# the documentation. If the initializer consists of more lines than specified -# here it will be hidden. Use a value of 0 to hide initializers completely. -# The appearance of the initializer of individual variables and defines in the -# documentation can be controlled using \showinitializer or \hideinitializer -# command in the documentation regardless of this setting. - -MAX_INITIALIZER_LINES = 30 - -# Set the SHOW_USED_FILES tag to NO to disable the list of files generated -# at the bottom of the documentation of classes and structs. If set to YES the -# list will mention the files that were used to generate the documentation. - -SHOW_USED_FILES = YES - -#--------------------------------------------------------------------------- -# configuration options related to warning and progress messages -#--------------------------------------------------------------------------- - -# The QUIET tag can be used to turn on/off the messages that are generated -# by doxygen. Possible values are YES and NO. If left blank NO is used. - -QUIET = YES - -# The WARNINGS tag can be used to turn on/off the warning messages that are -# generated by doxygen. Possible values are YES and NO. If left blank -# NO is used. - -WARNINGS = YES - -# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings -# for undocumented members. If EXTRACT_ALL is set to YES then this flag will -# automatically be disabled. - -WARN_IF_UNDOCUMENTED = NO - -# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for -# potential errors in the documentation, such as not documenting some -# parameters in a documented function, or documenting parameters that -# don't exist or using markup commands wrongly. - -WARN_IF_DOC_ERROR = YES - -# The WARN_FORMAT tag determines the format of the warning messages that -# doxygen can produce. The string should contain the $file, $line, and $text -# tags, which will be replaced by the file and line number from which the -# warning originated and the warning text. - -WARN_FORMAT = "$file:$line: $text" - -# The WARN_LOGFILE tag can be used to specify a file to which warning -# and error messages should be written. If left blank the output is written -# to stderr. - -WARN_LOGFILE = - -#--------------------------------------------------------------------------- -# configuration options related to the input files -#--------------------------------------------------------------------------- - -# The INPUT tag can be used to specify the files and/or directories that contain -# documented source files. You may enter file names like "myfile.cpp" or -# directories like "/usr/src/myproject". Separate the files or directories -# with spaces. - -INPUT = . \ - ../shared - -# If the value of the INPUT tag contains directories, you can use the -# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp -# and *.h) to filter out the source-files in the directories. If left -# blank the following patterns are tested: -# *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx *.hpp -# *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm - -FILE_PATTERNS = *.c \ - *.h - -# The RECURSIVE tag can be used to turn specify whether or not subdirectories -# should be searched for input files as well. Possible values are YES and NO. -# If left blank NO is used. - -RECURSIVE = NO - -# The EXCLUDE tag can be used to specify files and/or directories that should -# excluded from the INPUT source files. This way you can easily exclude a -# subdirectory from a directory tree whose root is specified with the INPUT tag. - -EXCLUDE = dristat.c \ - drmstat.c - -# The EXCLUDE_SYMLINKS tag can be used select whether or not files or directories -# that are symbolic links (a Unix filesystem feature) are excluded from the input. - -EXCLUDE_SYMLINKS = YES - -# If the value of the INPUT tag contains directories, you can use the -# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude -# certain files from those directories. - -EXCLUDE_PATTERNS = - -# The EXAMPLE_PATH tag can be used to specify one or more files or -# directories that contain example code fragments that are included (see -# the \include command). - -EXAMPLE_PATH = - -# If the value of the EXAMPLE_PATH tag contains directories, you can use the -# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp -# and *.h) to filter out the source-files in the directories. If left -# blank all files are included. - -EXAMPLE_PATTERNS = - -# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be -# searched for input files to be used with the \include or \dontinclude -# commands irrespective of the value of the RECURSIVE tag. -# Possible values are YES and NO. If left blank NO is used. - -EXAMPLE_RECURSIVE = NO - -# The IMAGE_PATH tag can be used to specify one or more files or -# directories that contain image that are included in the documentation (see -# the \image command). - -IMAGE_PATH = - -# The INPUT_FILTER tag can be used to specify a program that doxygen should -# invoke to filter for each input file. Doxygen will invoke the filter program -# by executing (via popen()) the command <filter> <input-file>, where <filter> -# is the value of the INPUT_FILTER tag, and <input-file> is the name of an -# input file. Doxygen will then use the output that the filter program writes -# to standard output. If FILTER_PATTERNS is specified, this tag will be -# ignored. - -INPUT_FILTER = - -# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern -# basis. Doxygen will compare the file name with each pattern and apply the -# filter if there is a match. The filters are a list of the form: -# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further -# info on how filters are used. If FILTER_PATTERNS is empty, INPUT_FILTER -# is applied to all files. - -FILTER_PATTERNS = - -# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using -# INPUT_FILTER) will be used to filter the input files when producing source -# files to browse (i.e. when SOURCE_BROWSER is set to YES). - -FILTER_SOURCE_FILES = NO - -#--------------------------------------------------------------------------- -# configuration options related to source browsing -#--------------------------------------------------------------------------- - -# If the SOURCE_BROWSER tag is set to YES then a list of source files will -# be generated. Documented entities will be cross-referenced with these sources. -# Note: To get rid of all source code in the generated output, make sure also -# VERBATIM_HEADERS is set to NO. - -SOURCE_BROWSER = NO - -# Setting the INLINE_SOURCES tag to YES will include the body -# of functions and classes directly in the documentation. - -INLINE_SOURCES = NO - -# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct -# doxygen to hide any special comment blocks from generated source code -# fragments. Normal C and C++ comments will always remain visible. - -STRIP_CODE_COMMENTS = YES - -# If the REFERENCED_BY_RELATION tag is set to YES (the default) -# then for each documented function all documented -# functions referencing it will be listed. - -REFERENCED_BY_RELATION = YES - -# If the REFERENCES_RELATION tag is set to YES (the default) -# then for each documented function all documented entities -# called/used by that function will be listed. - -REFERENCES_RELATION = YES - -# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen -# will generate a verbatim copy of the header file for each class for -# which an include is specified. Set to NO to disable this. - -VERBATIM_HEADERS = NO - -#--------------------------------------------------------------------------- -# configuration options related to the alphabetical class index -#--------------------------------------------------------------------------- - -# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index -# of all compounds will be generated. Enable this if the project -# contains a lot of classes, structs, unions or interfaces. - -ALPHABETICAL_INDEX = NO - -# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then -# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns -# in which this list will be split (can be a number in the range [1..20]) - -COLS_IN_ALPHA_INDEX = 5 - -# In case all classes in a project start with a common prefix, all -# classes will be put under the same header in the alphabetical index. -# The IGNORE_PREFIX tag can be used to specify one or more prefixes that -# should be ignored while generating the index headers. - -IGNORE_PREFIX = - -#--------------------------------------------------------------------------- -# configuration options related to the HTML output -#--------------------------------------------------------------------------- - -# If the GENERATE_HTML tag is set to YES (the default) Doxygen will -# generate HTML output. - -GENERATE_HTML = YES - -# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. -# If a relative path is entered the value of OUTPUT_DIRECTORY will be -# put in front of it. If left blank `html' will be used as the default path. - -HTML_OUTPUT = html - -# The HTML_FILE_EXTENSION tag can be used to specify the file extension for -# each generated HTML page (for example: .htm,.php,.asp). If it is left blank -# doxygen will generate files with .html extension. - -HTML_FILE_EXTENSION = .html - -# The HTML_HEADER tag can be used to specify a personal HTML header for -# each generated HTML page. If it is left blank doxygen will generate a -# standard header. - -HTML_HEADER = - -# The HTML_FOOTER tag can be used to specify a personal HTML footer for -# each generated HTML page. If it is left blank doxygen will generate a -# standard footer. - -HTML_FOOTER = - -# The HTML_STYLESHEET tag can be used to specify a user-defined cascading -# style sheet that is used by each HTML page. It can be used to -# fine-tune the look of the HTML output. If the tag is left blank doxygen -# will generate a default style sheet. Note that doxygen will try to copy -# the style sheet file to the HTML output directory, so don't put your own -# stylesheet in the HTML output directory as well, or it will be erased! - -HTML_STYLESHEET = - -# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes, -# files or namespaces will be aligned in HTML using tables. If set to -# NO a bullet list will be used. - -HTML_ALIGN_MEMBERS = YES - -# If the GENERATE_HTMLHELP tag is set to YES, additional index files -# will be generated that can be used as input for tools like the -# Microsoft HTML help workshop to generate a compressed HTML help file (.chm) -# of the generated HTML documentation. - -GENERATE_HTMLHELP = NO - -# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can -# be used to specify the file name of the resulting .chm file. You -# can add a path in front of the file if the result should not be -# written to the html output directory. - -CHM_FILE = - -# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can -# be used to specify the location (absolute path including file name) of -# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run -# the HTML help compiler on the generated index.hhp. - -HHC_LOCATION = - -# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag -# controls if a separate .chi index file is generated (YES) or that -# it should be included in the master .chm file (NO). - -GENERATE_CHI = NO - -# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag -# controls whether a binary table of contents is generated (YES) or a -# normal table of contents (NO) in the .chm file. - -BINARY_TOC = NO - -# The TOC_EXPAND flag can be set to YES to add extra items for group members -# to the contents of the HTML help documentation and to the tree view. - -TOC_EXPAND = NO - -# The DISABLE_INDEX tag can be used to turn on/off the condensed index at -# top of each HTML page. The value NO (the default) enables the index and -# the value YES disables it. - -DISABLE_INDEX = NO - -# This tag can be used to set the number of enum values (range [1..20]) -# that doxygen will group on one line in the generated HTML documentation. - -ENUM_VALUES_PER_LINE = 4 - -# If the GENERATE_TREEVIEW tag is set to YES, a side panel will be -# generated containing a tree-like index structure (just like the one that -# is generated for HTML Help). For this to work a browser that supports -# JavaScript, DHTML, CSS and frames is required (for instance Mozilla 1.0+, -# Netscape 6.0+, Internet explorer 5.0+, or Konqueror). Windows users are -# probably better off using the HTML help feature. - -GENERATE_TREEVIEW = NO - -# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be -# used to set the initial width (in pixels) of the frame in which the tree -# is shown. - -TREEVIEW_WIDTH = 250 - -#--------------------------------------------------------------------------- -# configuration options related to the LaTeX output -#--------------------------------------------------------------------------- - -# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will -# generate Latex output. - -GENERATE_LATEX = NO - -# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. -# If a relative path is entered the value of OUTPUT_DIRECTORY will be -# put in front of it. If left blank `latex' will be used as the default path. - -LATEX_OUTPUT = latex - -# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be -# invoked. If left blank `latex' will be used as the default command name. - -LATEX_CMD_NAME = latex - -# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to -# generate index for LaTeX. If left blank `makeindex' will be used as the -# default command name. - -MAKEINDEX_CMD_NAME = makeindex - -# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact -# LaTeX documents. This may be useful for small projects and may help to -# save some trees in general. - -COMPACT_LATEX = NO - -# The PAPER_TYPE tag can be used to set the paper type that is used -# by the printer. Possible values are: a4, a4wide, letter, legal and -# executive. If left blank a4wide will be used. - -PAPER_TYPE = a4wide - -# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX -# packages that should be included in the LaTeX output. - -EXTRA_PACKAGES = - -# The LATEX_HEADER tag can be used to specify a personal LaTeX header for -# the generated latex document. The header should contain everything until -# the first chapter. If it is left blank doxygen will generate a -# standard header. Notice: only use this tag if you know what you are doing! - -LATEX_HEADER = - -# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated -# is prepared for conversion to pdf (using ps2pdf). The pdf file will -# contain links (just like the HTML output) instead of page references -# This makes the output suitable for online browsing using a pdf viewer. - -PDF_HYPERLINKS = NO - -# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of -# plain latex in the generated Makefile. Set this option to YES to get a -# higher quality PDF documentation. - -USE_PDFLATEX = NO - -# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode. -# command to the generated LaTeX files. This will instruct LaTeX to keep -# running if errors occur, instead of asking the user for help. -# This option is also used when generating formulas in HTML. - -LATEX_BATCHMODE = NO - -# If LATEX_HIDE_INDICES is set to YES then doxygen will not -# include the index chapters (such as File Index, Compound Index, etc.) -# in the output. - -LATEX_HIDE_INDICES = NO - -#--------------------------------------------------------------------------- -# configuration options related to the RTF output -#--------------------------------------------------------------------------- - -# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output -# The RTF output is optimized for Word 97 and may not look very pretty with -# other RTF readers or editors. - -GENERATE_RTF = NO - -# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. -# If a relative path is entered the value of OUTPUT_DIRECTORY will be -# put in front of it. If left blank `rtf' will be used as the default path. - -RTF_OUTPUT = rtf - -# If the COMPACT_RTF tag is set to YES Doxygen generates more compact -# RTF documents. This may be useful for small projects and may help to -# save some trees in general. - -COMPACT_RTF = NO - -# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated -# will contain hyperlink fields. The RTF file will -# contain links (just like the HTML output) instead of page references. -# This makes the output suitable for online browsing using WORD or other -# programs which support those fields. -# Note: wordpad (write) and others do not support links. - -RTF_HYPERLINKS = NO - -# Load stylesheet definitions from file. Syntax is similar to doxygen's -# config file, i.e. a series of assignments. You only have to provide -# replacements, missing definitions are set to their default value. - -RTF_STYLESHEET_FILE = - -# Set optional variables used in the generation of an rtf document. -# Syntax is similar to doxygen's config file. - -RTF_EXTENSIONS_FILE = - -#--------------------------------------------------------------------------- -# configuration options related to the man page output -#--------------------------------------------------------------------------- - -# If the GENERATE_MAN tag is set to YES (the default) Doxygen will -# generate man pages - -GENERATE_MAN = NO - -# The MAN_OUTPUT tag is used to specify where the man pages will be put. -# If a relative path is entered the value of OUTPUT_DIRECTORY will be -# put in front of it. If left blank `man' will be used as the default path. - -MAN_OUTPUT = man - -# The MAN_EXTENSION tag determines the extension that is added to -# the generated man pages (default is the subroutine's section .3) - -MAN_EXTENSION = .3 - -# If the MAN_LINKS tag is set to YES and Doxygen generates man output, -# then it will generate one additional man file for each entity -# documented in the real man page(s). These additional files -# only source the real man page, but without them the man command -# would be unable to find the correct page. The default is NO. - -MAN_LINKS = NO - -#--------------------------------------------------------------------------- -# configuration options related to the XML output -#--------------------------------------------------------------------------- - -# If the GENERATE_XML tag is set to YES Doxygen will -# generate an XML file that captures the structure of -# the code including all documentation. - -GENERATE_XML = NO - -# The XML_OUTPUT tag is used to specify where the XML pages will be put. -# If a relative path is entered the value of OUTPUT_DIRECTORY will be -# put in front of it. If left blank `xml' will be used as the default path. - -XML_OUTPUT = xml - -# The XML_SCHEMA tag can be used to specify an XML schema, -# which can be used by a validating XML parser to check the -# syntax of the XML files. - -XML_SCHEMA = - -# The XML_DTD tag can be used to specify an XML DTD, -# which can be used by a validating XML parser to check the -# syntax of the XML files. - -XML_DTD = - -# If the XML_PROGRAMLISTING tag is set to YES Doxygen will -# dump the program listings (including syntax highlighting -# and cross-referencing information) to the XML output. Note that -# enabling this will significantly increase the size of the XML output. - -XML_PROGRAMLISTING = YES - -#--------------------------------------------------------------------------- -# configuration options for the AutoGen Definitions output -#--------------------------------------------------------------------------- - -# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will -# generate an AutoGen Definitions (see autogen.sf.net) file -# that captures the structure of the code including all -# documentation. Note that this feature is still experimental -# and incomplete at the moment. - -GENERATE_AUTOGEN_DEF = NO - -#--------------------------------------------------------------------------- -# configuration options related to the Perl module output -#--------------------------------------------------------------------------- - -# If the GENERATE_PERLMOD tag is set to YES Doxygen will -# generate a Perl module file that captures the structure of -# the code including all documentation. Note that this -# feature is still experimental and incomplete at the -# moment. - -GENERATE_PERLMOD = NO - -# If the PERLMOD_LATEX tag is set to YES Doxygen will generate -# the necessary Makefile rules, Perl scripts and LaTeX code to be able -# to generate PDF and DVI output from the Perl module output. - -PERLMOD_LATEX = NO - -# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be -# nicely formatted so it can be parsed by a human reader. This is useful -# if you want to understand what is going on. On the other hand, if this -# tag is set to NO the size of the Perl module output will be much smaller -# and Perl will parse it just the same. - -PERLMOD_PRETTY = YES - -# The names of the make variables in the generated doxyrules.make file -# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. -# This is useful so different doxyrules.make files included by the same -# Makefile don't overwrite each other's variables. - -PERLMOD_MAKEVAR_PREFIX = - -#--------------------------------------------------------------------------- -# Configuration options related to the preprocessor -#--------------------------------------------------------------------------- - -# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will -# evaluate all C-preprocessor directives found in the sources and include -# files. - -ENABLE_PREPROCESSING = YES - -# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro -# names in the source code. If set to NO (the default) only conditional -# compilation will be performed. Macro expansion can be done in a controlled -# way by setting EXPAND_ONLY_PREDEF to YES. - -MACRO_EXPANSION = YES - -# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES -# then the macro expansion is limited to the macros specified with the -# PREDEFINED and EXPAND_AS_PREDEFINED tags. - -EXPAND_ONLY_PREDEF = YES - -# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files -# in the INCLUDE_PATH (see below) will be search if a #include is found. - -SEARCH_INCLUDES = YES - -# The INCLUDE_PATH tag can be used to specify one or more directories that -# contain include files that are not input files but should be processed by -# the preprocessor. - -INCLUDE_PATH = - -# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard -# patterns (like *.h and *.hpp) to filter out the header-files in the -# directories. If left blank, the patterns specified with FILE_PATTERNS will -# be used. - -INCLUDE_FILE_PATTERNS = - -# The PREDEFINED tag can be used to specify one or more macro names that -# are defined before the preprocessor is started (similar to the -D option of -# gcc). The argument of the tag is a list of macros of the form: name -# or name=definition (no spaces). If the definition and the = are -# omitted =1 is assumed. - -PREDEFINED = __KERNEL__ \ - DRM(x)=x \ - __HAVE_AGP=1 \ - __REALLY_HAVE_AGP=1 \ - __MUST_HAVE_AGP=0 \ - __HAVE_MTRR=1 \ - __HAVE_CTX_BITMAP=1 \ - __HAVE_SG=0 \ - __HAVE_PCI_DMA=0 \ - __HAVE_DMA=1 \ - __HAVE_IRQ=1 \ - __HAVE_VBL_IRQ=1 \ - __HAVE_SHARED_IRQ=1 - -# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then -# this tag can be used to specify a list of macro names that should be expanded. -# The macro definition that is found in the sources will be used. -# Use the PREDEFINED tag if you want to use a different macro definition. - -EXPAND_AS_DEFINED = DRMFILE \ - DRM_IOCTL_ARGS \ - DRM_IRQ_ARGS \ - DRM_TASKQUEUE_ARGS - -# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then -# doxygen's preprocessor will remove all function-like macros that are alone -# on a line, have an all uppercase name, and do not end with a semicolon. Such -# function macros are typically used for boiler-plate code, and will confuse the -# parser if not removed. - -SKIP_FUNCTION_MACROS = YES - -#--------------------------------------------------------------------------- -# Configuration::additions related to external references -#--------------------------------------------------------------------------- - -# The TAGFILES option can be used to specify one or more tagfiles. -# Optionally an initial location of the external documentation -# can be added for each tagfile. The format of a tag file without -# this location is as follows: -# TAGFILES = file1 file2 ... -# Adding location for the tag files is done as follows: -# TAGFILES = file1=loc1 "file2 = loc2" ... -# where "loc1" and "loc2" can be relative or absolute paths or -# URLs. If a location is present for each tag, the installdox tool -# does not have to be run to correct the links. -# Note that each tag file must have a unique name -# (where the name does NOT include the path) -# If a tag file is not located in the directory in which doxygen -# is run, you must also specify the path to the tagfile here. - -TAGFILES = - -# When a file name is specified after GENERATE_TAGFILE, doxygen will create -# a tag file that is based on the input files it reads. - -GENERATE_TAGFILE = - -# If the ALLEXTERNALS tag is set to YES all external classes will be listed -# in the class index. If set to NO only the inherited external classes -# will be listed. - -ALLEXTERNALS = NO - -# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed -# in the modules index. If set to NO, only the current project's groups will -# be listed. - -EXTERNAL_GROUPS = YES - -# The PERL_PATH should be the absolute path and name of the perl script -# interpreter (i.e. the result of `which perl'). - -PERL_PATH = /usr/bin/perl - -#--------------------------------------------------------------------------- -# Configuration options related to the dot tool -#--------------------------------------------------------------------------- - -# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will -# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base or -# super classes. Setting the tag to NO turns the diagrams off. Note that this -# option is superseded by the HAVE_DOT option below. This is only a fallback. It is -# recommended to install and use dot, since it yields more powerful graphs. - -CLASS_DIAGRAMS = YES - -# If set to YES, the inheritance and collaboration graphs will hide -# inheritance and usage relations if the target is undocumented -# or is not a class. - -HIDE_UNDOC_RELATIONS = YES - -# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is -# available from the path. This tool is part of Graphviz, a graph visualization -# toolkit from AT&T and Lucent Bell Labs. The other options in this section -# have no effect if this option is set to NO (the default) - -HAVE_DOT = NO - -# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen -# will generate a graph for each documented class showing the direct and -# indirect inheritance relations. Setting this tag to YES will force the -# the CLASS_DIAGRAMS tag to NO. - -CLASS_GRAPH = YES - -# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen -# will generate a graph for each documented class showing the direct and -# indirect implementation dependencies (inheritance, containment, and -# class references variables) of the class with other documented classes. - -COLLABORATION_GRAPH = YES - -# If the UML_LOOK tag is set to YES doxygen will generate inheritance and -# collaboration diagrams in a style similar to the OMG's Unified Modeling -# Language. - -UML_LOOK = NO - -# If set to YES, the inheritance and collaboration graphs will show the -# relations between templates and their instances. - -TEMPLATE_RELATIONS = YES - -# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT -# tags are set to YES then doxygen will generate a graph for each documented -# file showing the direct and indirect include dependencies of the file with -# other documented files. - -INCLUDE_GRAPH = YES - -# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and -# HAVE_DOT tags are set to YES then doxygen will generate a graph for each -# documented header file showing the documented files that directly or -# indirectly include this file. - -INCLUDED_BY_GRAPH = YES - -# If the CALL_GRAPH and HAVE_DOT tags are set to YES then doxygen will -# generate a call dependency graph for every global function or class method. -# Note that enabling this option will significantly increase the time of a run. -# So in most cases it will be better to enable call graphs for selected -# functions only using the \callgraph command. - -CALL_GRAPH = NO - -# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen -# will graphical hierarchy of all classes instead of a textual one. - -GRAPHICAL_HIERARCHY = YES - -# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images -# generated by dot. Possible values are png, jpg, or gif -# If left blank png will be used. - -DOT_IMAGE_FORMAT = png - -# The tag DOT_PATH can be used to specify the path where the dot tool can be -# found. If left blank, it is assumed the dot tool can be found on the path. - -DOT_PATH = - -# The DOTFILE_DIRS tag can be used to specify one or more directories that -# contain dot files that are included in the documentation (see the -# \dotfile command). - -DOTFILE_DIRS = - -# The MAX_DOT_GRAPH_WIDTH tag can be used to set the maximum allowed width -# (in pixels) of the graphs generated by dot. If a graph becomes larger than -# this value, doxygen will try to truncate the graph, so that it fits within -# the specified constraint. Beware that most browsers cannot cope with very -# large images. - -MAX_DOT_GRAPH_WIDTH = 1024 - -# The MAX_DOT_GRAPH_HEIGHT tag can be used to set the maximum allows height -# (in pixels) of the graphs generated by dot. If a graph becomes larger than -# this value, doxygen will try to truncate the graph, so that it fits within -# the specified constraint. Beware that most browsers cannot cope with very -# large images. - -MAX_DOT_GRAPH_HEIGHT = 1024 - -# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the -# graphs generated by dot. A depth value of 3 means that only nodes reachable -# from the root by following a path via at most 3 edges will be shown. Nodes that -# lay further from the root node will be omitted. Note that setting this option to -# 1 or 2 may greatly reduce the computation time needed for large code bases. Also -# note that a graph may be further truncated if the graph's image dimensions are -# not sufficient to fit the graph (see MAX_DOT_GRAPH_WIDTH and MAX_DOT_GRAPH_HEIGHT). -# If 0 is used for the depth value (the default), the graph is not depth-constrained. - -MAX_DOT_GRAPH_DEPTH = 0 - -# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will -# generate a legend page explaining the meaning of the various boxes and -# arrows in the dot generated graphs. - -GENERATE_LEGEND = YES - -# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will -# remove the intermediate dot files that are used to generate -# the various graphs. - -DOT_CLEANUP = YES - -#--------------------------------------------------------------------------- -# Configuration::additions related to the search engine -#--------------------------------------------------------------------------- - -# The SEARCHENGINE tag specifies whether or not a search engine should be -# used. If set to NO the values of all tags below this one will be ignored. - -SEARCHENGINE = NO diff --git a/linux/Kconfig b/linux/Kconfig deleted file mode 100644 index 440e414b7..000000000 --- a/linux/Kconfig +++ /dev/null @@ -1,105 +0,0 @@ -# -# Drm device configuration -# -# This driver provides support for the -# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. -# -config DRM - bool "Direct Rendering Manager (XFree86 4.1.0 and higher DRI support)" - help - Kernel-level support for the Direct Rendering Infrastructure (DRI) - introduced in XFree86 4.0. If you say Y here, you need to select - the module that's right for your graphics card from the list below. - These modules provide support for synchronization, security, and - DMA transfers. Please see <http://dri.sourceforge.net/> for more - details. You should also select and configure AGP - (/dev/agpgart) support. - -config DRM_TDFX - tristate "3dfx Banshee/Voodoo3+" - depends on DRM - help - Choose this option if you have a 3dfx Banshee or Voodoo3 (or later), - graphics card. If M is selected, the module will be called tdfx. - -config DRM_R128 - tristate "ATI Rage 128" - depends on DRM && PCI - help - Choose this option if you have an ATI Rage 128 graphics card. If M - is selected, the module will be called r128. AGP support for - this card is strongly suggested (unless you have a PCI version). - -config DRM_RADEON - tristate "ATI Radeon" - depends on DRM && PCI - help - Choose this option if you have an ATI Radeon graphics card. There - are both PCI and AGP versions. You don't need to choose this to - run the Radeon in plain VGA mode. There is a product page at - <http://www.ati.com/na/pages/products/pc/radeon32/index.html>. - If M is selected, the module will be called radeon. - -config DRM_I810 - tristate "Intel I810" - depends on DRM && AGP && AGP_INTEL - help - Choose this option if you have an Intel I810 graphics card. If M is - selected, the module will be called i810. AGP support is required - for this driver to work. - -config DRM_I830 - tristate "Intel 830M, 845G, 852GM, 855GM, 865G" - depends on DRM && AGP && AGP_INTEL - help - Choose this option if you have a system that has Intel 830M, 845G, - 852GM, 855GM or 865G integrated graphics. If M is selected, the - module will be called i830. AGP support is required for this driver - to work. This driver will eventually be replaced by the i915 one. - -config DRM_I915 - tristate "Intel 830M, 845G, 852GM, 855GM, 865G, 915G" - depends on DRM && AGP && AGP_INTEL - help - Choose this option if you have a system that has Intel 830M, 845G, - 852GM, 855GM 865G or 915G integrated graphics. If M is selected, the - module will be called i915. AGP support is required for this driver - to work. This driver will eventually replace the I830 driver, when - later release of X start to use the new DDX and DRI. - - -config DRM_MGA - tristate "Matrox g200/g400" - depends on DRM && AGP && (!X86_64 || BROKEN) - help - Choose this option if you have a Matrox G200, G400 or G450 graphics - card. If M is selected, the module will be called mga. AGP - support is required for this driver to work. - -config DRM_SIS - tristate "SiS video cards" - depends on DRM && AGP - help - Choose this option if you have a SiS 630 or compatible video - chipset. If M is selected the module will be called sis. AGP - support is required for this driver to work. - -config DRM_VIA - tristate "Via unichrome video cards" - depends on DRM - help - Choose this option if you have a Via unichrome or compatible video - chipset. If M is selected the module will be called via. - -config DRM_MACH64 - tristate "ATI Rage Pro (Mach64)" - depends on DRM && PCI - help - Choose this option if you have an ATI Rage Pro (mach64 chipset) - graphics card. Example cards include: 3D Rage Pro, Xpert 98, - 3D Rage LT Pro, 3D Rage XL/XC, and 3D Rage Mobility (P/M, M1). - Cards earlier than ATI Rage Pro (e.g. Rage II) are not supported. - If M is selected, the module will be called mach64. AGP support for - this card is strongly suggested (unless you have a PCI version). - - diff --git a/linux/Makefile b/linux/Makefile deleted file mode 100644 index ac1d25c0e..000000000 --- a/linux/Makefile +++ /dev/null @@ -1,406 +0,0 @@ -# Makefile -- For the Direct Rendering Manager module (drm) -# -# Based on David Woodhouse's mtd build. -# -# Modified to handle the DRM requirements and builds on a wider range of -# platforms in a flexible way by David Dawes. It's not clear, however, -# that this approach is simpler than the old one. -# -# The purpose of this Makefile is to handle setting up everything -# needed for an out-of-kernel source build. Makefile.kernel contains -# everything required for in-kernel source builds. It is included into -# this file, so none of that should be duplicated here. -# -# $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux,v 1.40 2003/08/17 17:12:25 dawes Exp $ -# - -# -# By default, the build is done against the running linux kernel source. -# To build against a different kernel source tree, set LINUXDIR: -# -# make LINUXDIR=/path/to/kernel/source - -# -# To build only some modules, either set DRM_MODULES to the list of modules, -# or specify the modules as targets: -# -# make r128.o radeon.o -# -# or: -# -# make DRM_MODULES="r128 radeon" -# - -SHELL=/bin/sh - -.SUFFIXES: - -ifndef LINUXDIR -RUNNING_REL := $(shell uname -r) - -LINUXDIR := $(shell if [ -e /lib/modules/$(RUNNING_REL)/source ]; then \ - echo /lib/modules/$(RUNNING_REL)/source; \ - else echo /lib/modules/$(RUNNING_REL)/build; fi) -endif - -ifndef O -O := $(LINUXDIR) -endif - -MACHINE := $(shell uname -m) - -# Modules for all architectures -MODULE_LIST := tdfx.o r128.o radeon.o mga.o sis.o savage.o via.o mach64.o - -# Modules only for ix86 architectures -ifneq (,$(findstring 86,$(MACHINE))) -ARCHX86 := 1 -MODULE_LIST += i830.o i810.o i915.o -endif - -ifneq (,$(findstring sparc64,$(MACHINE))) -ARCHSPARC64 := 1 -MODULE_LIST += ffb.o -endif - -DRM_MODULES ?= $(MODULE_LIST) - -# These definitions are for handling dependencies in the out of kernel build. - -DRMTEMPLATES = drm_auth.h drm_bufs.h drm_context.h drm_dma.h drm_drawable.h \ - drm_drv.h drm_fops.h drm_init.h drm_ioctl.h drm_irq.h \ - drm_lock.h drm_memory.h drm_proc.h drm_stub.h drm_vm.h \ - drm_core.h - -DRMSHARED = drm.h drm_sarea.h -DRMHEADERS = drmP.h $(DRMSHARED) - -TDFXHEADERS = tdfx.h $(DRMHEADERS) $(DRMTEMPLATES) -TDFXSHARED = tdfx.h -R128HEADERS = r128.h r128_drv.h r128_drm.h $(DRMHEADERS) $(DRMTEMPLATES) -R128SHARED = r128.h r128_drv.h r128_drm.h r128_cce.c r128_state.c r128_irq.c -RADEONHEADERS = radeon.h radeon_drv.h radeon_drm.h $(DRMHEADERS) \ - $(DRMTEMPLATES) -RADEONSHARED = radeon.h radeon_drv.h radeon_drm.h radeon_cp.c radeon_irq.c \ - radeon_mem.c radeon_state.c -MGAHEADERS = mga.h mga_drv.h mga_drm.h mga_ucode.h $(DRMHEADERS) \ - $(DRMTEMPLATES) -MGASHARED = mga.h mga_dma.c mga_drm.h mga_drv.h mga_irq.c mga_state.c \ - mga_ucode.h mga_warp.c -I810HEADERS = i810.h i810_drv.h i810_drm.h $(DRMHEADERS) $(DRMTEMPLATES) -I830HEADERS = i830.h i830_drv.h i830_drm.h $(DRMHEADERS) $(DRMTEMPLATES) -I915HEADERS = i915.h i915_drv.h i915_drm.h $(DRMHEADERS) $(DRMTEMPLATES) -I915SHARED = i915.h i915_drv.h i915_drm.h i915_irq.c i915_mem.c i915_dma.c -SISHEADERS= sis.h sis_drv.h sis_drm.h $(DRMHEADERS) -SISSHARED= sis.h sis_drv.h sis_drm.h sis_ds.c sis_ds.h sis_mm.c -SAVAGEHEADERS= savage.h savage_drv.h savage_drm.h $(DRMHEADERS) \ - $(DRMTEMPLATES) -VIAHEADERS = via_drm.h via_drv.h via.h via_mm.h via_ds.h \ - via_3d_reg.h $(DRMHEADERS) $(DRMTEMPLATES) -VIASHARED = via_drm.h via_drv.h via.h via_mm.h via_ds.h \ - via_3d_reg.h via_drv.c via_ds.c via_irq.c via_map.c \ - via_mm.c via_dma.c via_verifier.c via_verifier.h via_video.c -MACH64HEADERS = mach64.h mach64_drv.h mach64_drm.h $(DRMHEADERS) \ - $(DRMTEMPLATES) -MACH64SHARED = mach64.h mach64_drv.h mach64_drm.h mach64_dma.c \ - mach64_irq.c mach64_state.c -FFBHEADERS = ffb.h ffb_drv.h $(DRMHEADERS) $(DRMTEMPLATES) - -SHAREDSRC = $(DRMSHARED) $(MGASHARED) $(R128SHARED) $(RADEONSHARED) \ - $(SISSHARED) $(TDFXSHARED) $(VIASHARED) $(MACH64SHARED) \ - $(I915SHARED) - -PROGS = dristat drmstat - -CLEANFILES = *.o *.ko $(PROGS) .depend .*.flags .*.d .*.cmd *.mod.c linux .tmp_versions - -# VERSION is not defined from the initial invocation. It is defined when -# this Makefile is invoked from the kernel's root Makefile. - -ifndef VERSION - -ifdef RUNNING_REL - -# SuSE has the version.h and autoconf.h headers for the current kernel -# in /boot as /boot/vmlinuz.version.h and /boot/vmlinuz.autoconf.h. -# Check these first to see if they match the running kernel. - -BOOTVERSION_PREFIX = /boot/vmlinuz. - -V := $(shell if [ -f $(BOOTVERSION_PREFIX)version.h ]; then \ - grep UTS_RELEASE $(BOOTVERSION_PREFIX)version.h | \ - cut -d' ' -f3; fi) - -ifeq ($(V),"$(RUNNING_REL)") -HEADERFROMBOOT := 1 -GETCONFIG := MAKEFILES=$(shell pwd)/.config -HAVECONFIG := y -endif - -# On Red Hat we need to check if there is a .config file in the kernel -# source directory. If there isn't, we need to check if there's a -# matching file in the configs subdirectory. - -ifneq ($(HAVECONFIG),y) -HAVECONFIG := $(shell if [ -e $(LINUXDIR)/.config ]; then echo y; fi) -endif - -ifneq ($(HAVECONFIG),y) -REL_BASE := $(shell echo $(RUNNING_REL) | sed 's/-.*//') -REL_TYPE := $(shell echo $(RUNNING_REL) | sed 's/[0-9.-]//g') -ifeq ($(REL_TYPE),) -RHCONFIG := configs/kernel-$(REL_BASE)-$(MACHINE).config -else -RHCONFIG := configs/kernel-$(REL_BASE)-$(MACHINE)-$(REL_TYPE).config -endif -HAVECONFIG := $(shell if [ -e $(LINUXDIR)/$(RHCONFIG) ]; then echo y; fi) -ifneq ($(HAVECONFIG),y) -RHCONFIG := -endif -endif - -ifneq ($(HAVECONFIG),y) -ifneq ($(0),$(LINUXDIR)) -GETCONFIG += O=$(O) -endif -HAVECONFIG := $(shell if [ -e $(O)/.config ]; then echo y; fi) -endif - -ifneq ($(HAVECONFIG),y) -$(error Cannot find a kernel config file) -endif - -endif - -ifneq ($(findstring 2.6,$(RUNNING_REL)),) -$(error Building 2.4 version on $(RUNNING_REL)) -endif - -CLEANCONFIG := $(shell if cmp -s $(LINUXDIR)/.config .config; then echo y; fi) -ifeq ($(CLEANCONFIG),y) -CLEANFILES += $(LINUXDIR)/.config .config $(LINUXDIR)/tmp_include_depends -endif - -all: modules - -modules: includes - make -C $(LINUXDIR) $(GETCONFIG) SUBDIRS=`pwd` DRMSRCDIR=`pwd` modules - -ifeq ($(HEADERFROMBOOT),1) - -BOOTHEADERS = version.h autoconf.h -BOOTCONFIG = .config - -CLEANFILES += $(BOOTHEADERS) $(BOOTCONFIG) - -includes:: $(BOOTHEADERS) $(BOOTCONFIG) - -version.h: $(BOOTVERSION_PREFIX)version.h - rm -f $@ - ln -s $< $@ - -autoconf.h: $(BOOTVERSION_PREFIX)autoconf.h - rm -f $@ - ln -s $< $@ - -.config: $(BOOTVERSION_PREFIX)config - rm -f $@ - ln -s $< $@ -endif - -# This prepares an unused Red Hat kernel tree for the build. -ifneq ($(RHCONFIG),) -includes:: $(LINUXDIR)/.config $(LINUXDIR)/tmp_include_depends .config - -$(LINUXDIR)/.config: $(LINUXDIR)/$(RHCONFIG) - rm -f $@ - ln -s $< $@ - -.config: $(LINUXDIR)/$(RHCONFIG) - rm -f $@ - ln -s $< $@ - -$(LINUXDIR)/tmp_include_depends: - echo all: > $@ -endif - -# Make sure that the shared source files are linked into this directory. - - -SHAREDDIR := ../shared - -HASSHARED := $(shell if [ -d $(SHAREDDIR) ]; then echo y; fi) - -ifeq ($(HASSHARED),y) -includes:: $(SHAREDSRC) drm_pciids.h - -drm_pciids.h: $(SHAREDDIR)/drm_pciids.txt - sh ../scripts/create_linux_pci_lists.sh < $(SHAREDDIR)/drm_pciids.txt - -$(SHAREDSRC): - @if [ -r $(SHAREDDIR)/$@ ]; then \ - (rm -f $@; set -x; ln -s $(SHAREDDIR)/$@ $@); fi - -CLEANFILES += $(SHAREDSRC) -endif - -includes:: linux - -linux: - rm -f linux - ln -s . linux - -clean cleandir: - rm -rf $(CLEANFILES) - -$(MODULE_LIST):: - make DRM_MODULES=$@ modules - -# Build test utilities - -PRGCFLAGS = $(CFLAGS) -g -ansi -pedantic -DPOSIX_C_SOURCE=199309L \ - -D_POSIX_SOURCE -D_XOPEN_SOURCE -D_BSD_SOURCE -D_SVID_SOURCE \ - -I. -I../../.. - -DRMSTATLIBS = -L../../.. -L.. -ldrm -lxf86_os \ - -L../../../../dummylib -ldummy -lm - -programs: $(PROGS) - -dristat: dristat.c - $(CC) $(PRGCFLAGS) $< -o $@ - -drmstat: drmstat.c - $(CC) $(PRGCFLAGS) $< -o $@ $(DRMSTATLIBS) - -else - -# Check for kernel versions that we don't support. - -BELOW24 := $(shell if [ $(VERSION) -lt 2 -o $(PATCHLEVEL) -lt 4 ]; then \ - echo y; fi) - -ifeq ($(BELOW24),y) -$(error Only 2.4.x and later kernels are supported \ - ($(VERSION).$(PATCHLEVEL).$(SUBLEVEL))) -endif - -ifdef ARCHX86 -ifndef CONFIG_X86_CMPXCHG -$(error CONFIG_X86_CMPXCHG needs to be enabled in the kernel) -endif -endif - -# This needs to go before all other include paths. -CC += -I$(DRMSRCDIR) - -# Check for Red Hat's 4-argument do_munmap(). -DOMUNMAP := $(shell grep do_munmap $(LINUXDIR)/include/linux/mm.h | \ - grep -c acct) - -ifneq ($(DOMUNMAP),0) -EXTRA_CFLAGS += -DDO_MUNMAP_4_ARGS -endif - -# Check for 5-argument remap_page_range() in RH9 kernel, and 2.5.x kernels -RPR := $(shell grep remap_page_range $(LINUXDIR)/include/linux/mm.h | \ - grep -c vma) - -ifneq ($(RPR),0) -EXTRA_CFLAGS += -DREMAP_PAGE_RANGE_5_ARGS -endif - -# Check for 4-argument vmap() in some 2.5.x and 2.4.x kernels -VMAP := $(shell grep -A1 'vmap.*count,$$' $(LINUXDIR)/include/linux/vmalloc.h | \ - grep -c prot) - -ifneq ($(VMAP),0) -EXTRA_CFLAGS += -DVMAP_4_ARGS -endif - -# Check for PAGE_AGP definition -PAGE_AGP := $(shell cat $(LINUXDIR)/include/asm/agp.h 2>/dev/null | \ - grep -c PAGE_AGP) - -ifneq ($(PAGE_AGP),0) -EXTRA_CFLAGS += -DHAVE_PAGE_AGP -endif - - -# Start with all modules turned off. -CONFIG_DRM_GAMMA := n -CONFIG_DRM_TDFX := n -CONFIG_DRM_MGA := n -CONFIG_DRM_I810 := n -CONFIG_DRM_R128 := n -CONFIG_DRM_RADEON := n -CONFIG_DRM_I830 := n -CONFIG_DRM_I915 := n -CONFIG_DRM_SIS := n -CONFIG_DRM_FFB := n -CONFIG_DRM_SAVAGE := n -CONFIG_DRM_VIA := n -CONFIG_DRM_MACH64 := n - -# Enable module builds for the modules requested/supported. - -ifneq (,$(findstring tdfx,$(DRM_MODULES))) -CONFIG_DRM_TDFX := m -endif -ifneq (,$(findstring r128,$(DRM_MODULES))) -CONFIG_DRM_R128 := m -endif -ifneq (,$(findstring radeon,$(DRM_MODULES))) -CONFIG_DRM_RADEON := m -endif -ifneq (,$(findstring sis,$(DRM_MODULES))) -CONFIG_DRM_SIS := m -endif -ifneq (,$(findstring via,$(DRM_MODULES))) -CONFIG_DRM_VIA := m -endif -ifneq (,$(findstring mach64,$(DRM_MODULES))) -CONFIG_DRM_MACH64 := m -endif -ifneq (,$(findstring ffb,$(DRM_MODULES))) -CONFIG_DRM_FFB := m -endif - -# These require AGP support - -ifdef CONFIG_AGP -ifneq (,$(findstring mga,$(DRM_MODULES))) -CONFIG_DRM_MGA := m -endif -ifneq (,$(findstring i810,$(DRM_MODULES))) -CONFIG_DRM_I810 := m -endif -ifneq (,$(findstring i830,$(DRM_MODULES))) -CONFIG_DRM_I830 := m -endif -ifneq (,$(findstring i915,$(DRM_MODULES))) -CONFIG_DRM_I915 := m -endif -ifneq (,$(findstring savage,$(DRM_MODULES))) -CONFIG_DRM_SAVAGE := m -endif -endif - -include $(DRMSRCDIR)/Makefile.kernel - -# Depencencies -$(tdfx-objs): $(TDFXHEADERS) -$(r128-objs): $(R128HEADERS) -$(mga-objs): $(MGAHEADERS) -$(i810-objs): $(I810HEADERS) -$(i830-objs): $(I830HEADERS) -$(i915-objs): $(I915HEADERS) -$(radeon-objs): $(RADEONHEADERS) -$(sis-objs): $(SISHEADERS) -$(ffb-objs): $(FFBHEADERS) -$(savage-objs): $(SAVAGEHEADERS) -$(via-objs): $(VIAHEADERS) -$(mach64-objs): $(MACH64HEADERS) - -endif - diff --git a/linux/Makefile.kernel b/linux/Makefile.kernel deleted file mode 100644 index 40b54e042..000000000 --- a/linux/Makefile.kernel +++ /dev/null @@ -1,100 +0,0 @@ -# -# Makefile for the drm device driver. This driver provides support for the -# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. -# -# Based on David Woodhouse's mtd build. -# -# $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel,v 1.18 2003/08/16 17:59:17 dawes Exp $ -# - -tdfx-objs := tdfx_drv.o -r128-objs := r128_drv.o r128_cce.o r128_state.o r128_irq.o -mga-objs := mga_drv.o mga_dma.o mga_state.o mga_warp.o mga_irq.o -i810-objs := i810_drv.o i810_dma.o -i830-objs := i830_drv.o i830_dma.o i830_irq.o -i915-objs := i915_drv.o i915_dma.o i915_irq.o i915_mem.o -radeon-objs := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o -sis-objs := sis_drv.o sis_ds.o sis_mm.o -ffb-objs := ffb_drv.o ffb_context.o -savage-objs := savage_drv.o savage_dma.o -via-objs := via_irq.o via_drv.o via_ds.o via_map.o via_mm.o via_dma.o via_verifier.o \ - via_video.o -mach64-objs := mach64_drv.o mach64_dma.o mach64_irq.o mach64_state.o - -# Kernel version checks - -BELOW25 := $(shell if [ $(PATCHLEVEL) -lt 5 ]; then echo y; fi) - -# There were major build changes starting with 2.5.52 -ifneq ($(BELOW25),y) -BELOW2552 := $(shell if [ $(PATCHLEVEL) -eq 5 -a $(SUBLEVEL) -lt 52 ]; then echo y; fi) -else -BELOW2552 := y -endif - -ifeq ($(BELOW25),y) -O_TARGET := drm.o -list-multi := tdfx.o r128.o mga.o i810.o i830.o ffb.o radeon.o \ - savage.o via.o mach64.o i915.o -obj-m := -obj-n := -obj- := -export-objs := via_mm.o -endif - -obj-$(CONFIG_DRM_TDFX) += tdfx.o -obj-$(CONFIG_DRM_R128) += r128.o -obj-$(CONFIG_DRM_RADEON)+= radeon.o -obj-$(CONFIG_DRM_MGA) += mga.o -obj-$(CONFIG_DRM_I810) += i810.o -obj-$(CONFIG_DRM_I830) += i830.o -obj-$(CONFIG_DRM_I915) += i915.o -obj-$(CONFIG_DRM_SIS) += sis.o -obj-$(CONFIG_DRM_FFB) += ffb.o -obj-$(CONFIG_DRM_SAVAGE)+= savage.o -obj-$(CONFIG_DRM_VIA) += via.o -obj-$(CONFIG_DRM_MACH64)+= mach64.o - -ifeq ($(BELOW2552),y) -include $(TOPDIR)/Rules.make -endif - -ifeq ($(BELOW25),y) -tdfx.o: $(tdfx-objs) $(lib) - $(LD) -r -o $@ $(tdfx-objs) $(lib) - -mga.o: $(mga-objs) $(lib) - $(LD) -r -o $@ $(mga-objs) $(lib) - -i810.o: $(i810-objs) $(lib) - $(LD) -r -o $@ $(i810-objs) $(lib) - -i830.o: $(i830-objs) $(lib) - $(LD) -r -o $@ $(i830-objs) $(lib) - -i915.o: $(i915-objs) $(lib) - $(LD) -r -o $@ $(i915-objs) $(lib) - -r128.o: $(r128-objs) $(lib) - $(LD) -r -o $@ $(r128-objs) $(lib) - -radeon.o: $(radeon-objs) $(lib) - $(LD) -r -o $@ $(radeon-objs) $(lib) - -sis.o: $(sis-objs) $(lib) - $(LD) -r -o $@ $(sis-objs) $(lib) - -ffb.o: $(ffb-objs) $(lib) - $(LD) -r -o $@ $(ffb-objs) $(lib) - -savage.o: $(savage-objs) $(lib) - $(LD) -r -o $@ $(savage-objs) $(lib) - -via.o: $(via-objs) $(lib) - $(LD) -r -o $@ $(via-objs) $(lib) - -mach64.o: $(mach64-objs) $(lib) - $(LD) -r -o $@ $(mach64-objs) $(lib) - -endif - diff --git a/linux/README.drm b/linux/README.drm deleted file mode 100644 index 6441e01e5..000000000 --- a/linux/README.drm +++ /dev/null @@ -1,46 +0,0 @@ -************************************************************ -* For the very latest on DRI development, please see: * -* http://dri.sourceforge.net/ * -************************************************************ - -The Direct Rendering Manager (drm) is a device-independent kernel-level -device driver that provides support for the XFree86 Direct Rendering -Infrastructure (DRI). - -The DRM supports the Direct Rendering Infrastructure (DRI) in four major -ways: - - 1. The DRM provides synchronized access to the graphics hardware via - the use of an optimized two-tiered lock. - - 2. The DRM enforces the DRI security policy for access to the graphics - hardware by only allowing authenticated X11 clients access to - restricted regions of memory. - - 3. The DRM provides a generic DMA engine, complete with multiple - queues and the ability to detect the need for an OpenGL context - switch. - - 4. The DRM is extensible via the use of small device-specific modules - that rely extensively on the API exported by the DRM module. - - -Documentation on the DRI is available from: - http://precisioninsight.com/piinsights.html - -For specific information about kernel-level support, see: - - The Direct Rendering Manager, Kernel Support for the Direct Rendering - Infrastructure - http://precisioninsight.com/dr/drm.html - - Hardware Locking for the Direct Rendering Infrastructure - http://precisioninsight.com/dr/locking.html - - A Security Analysis of the Direct Rendering Infrastructure - http://precisioninsight.com/dr/security.html - -************************************************************ -* For the very latest on DRI development, please see: * -* http://dri.sourceforge.net/ * -************************************************************ diff --git a/linux/ati_pcigart.h b/linux/ati_pcigart.h deleted file mode 100644 index 0d7df0f38..000000000 --- a/linux/ati_pcigart.h +++ /dev/null @@ -1,206 +0,0 @@ -/** - * \file ati_pcigart.h - * ATI PCI GART support - * - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Created: Wed Dec 13 21:52:19 2000 by gareth@valinux.com - * - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include "drmP.h" - -#if PAGE_SIZE == 65536 -# define ATI_PCIGART_TABLE_ORDER 0 -# define ATI_PCIGART_TABLE_PAGES (1 << 0) -#elif PAGE_SIZE == 16384 -# define ATI_PCIGART_TABLE_ORDER 1 -# define ATI_PCIGART_TABLE_PAGES (1 << 1) -#elif PAGE_SIZE == 8192 -# define ATI_PCIGART_TABLE_ORDER 2 -# define ATI_PCIGART_TABLE_PAGES (1 << 2) -#elif PAGE_SIZE == 4096 -# define ATI_PCIGART_TABLE_ORDER 3 -# define ATI_PCIGART_TABLE_PAGES (1 << 3) -#else -# error - PAGE_SIZE not 64K, 16K, 8K or 4K -#endif - -# define ATI_MAX_PCIGART_PAGES 8192 /**< 32 MB aperture, 4K pages */ -# define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */ - -static unsigned long DRM(ati_alloc_pcigart_table)( void ) -{ - unsigned long address; - struct page *page; - int i; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - address = __get_free_pages( GFP_KERNEL, ATI_PCIGART_TABLE_ORDER ); - if ( address == 0UL ) { - return 0; - } - - page = virt_to_page( address ); - - for ( i = 0 ; i < ATI_PCIGART_TABLE_PAGES ; i++, page++ ) { - get_page(page); - SetPageReserved( page ); - } - - DRM_DEBUG( "%s: returning 0x%08lx\n", __FUNCTION__, address ); - return address; -} - -static void DRM(ati_free_pcigart_table)( unsigned long address ) -{ - struct page *page; - int i; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - page = virt_to_page( address ); - - for ( i = 0 ; i < ATI_PCIGART_TABLE_PAGES ; i++, page++ ) { - __put_page(page); - ClearPageReserved( page ); - } - - free_pages( address, ATI_PCIGART_TABLE_ORDER ); -} - -int DRM(ati_pcigart_init)( drm_device_t *dev, - unsigned long *addr, - dma_addr_t *bus_addr) -{ - drm_sg_mem_t *entry = dev->sg; - unsigned long address = 0; - unsigned long pages; - u32 *pci_gart, page_base, bus_address = 0; - int i, j, ret = 0; - - if ( !entry ) { - DRM_ERROR( "no scatter/gather memory!\n" ); - goto done; - } - - address = DRM(ati_alloc_pcigart_table)(); - if ( !address ) { - DRM_ERROR( "cannot allocate PCI GART page!\n" ); - goto done; - } - - if ( !dev->pdev ) { - DRM_ERROR( "PCI device unknown!\n" ); - goto done; - } - - bus_address = pci_map_single(dev->pdev, (void *)address, - ATI_PCIGART_TABLE_PAGES * PAGE_SIZE, - PCI_DMA_TODEVICE); - if (bus_address == 0) { - DRM_ERROR( "unable to map PCIGART pages!\n" ); - DRM(ati_free_pcigart_table)( address ); - address = 0; - goto done; - } - - pci_gart = (u32 *)address; - - pages = ( entry->pages <= ATI_MAX_PCIGART_PAGES ) - ? entry->pages : ATI_MAX_PCIGART_PAGES; - - memset( pci_gart, 0, ATI_MAX_PCIGART_PAGES * sizeof(u32) ); - - for ( i = 0 ; i < pages ; i++ ) { - /* we need to support large memory configurations */ - entry->busaddr[i] = pci_map_single(dev->pdev, - page_address( entry->pagelist[i] ), - PAGE_SIZE, - PCI_DMA_TODEVICE); - if (entry->busaddr[i] == 0) { - DRM_ERROR( "unable to map PCIGART pages!\n" ); - DRM(ati_pcigart_cleanup)( dev, address, bus_address ); - address = 0; - bus_address = 0; - goto done; - } - page_base = (u32) entry->busaddr[i]; - - for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) { - *pci_gart++ = cpu_to_le32( page_base ); - page_base += ATI_PCIGART_PAGE_SIZE; - } - } - - ret = 1; - -#if defined(__i386__) || defined(__x86_64__) - asm volatile ( "wbinvd" ::: "memory" ); -#else - mb(); -#endif - -done: - *addr = address; - *bus_addr = bus_address; - return ret; -} - -int DRM(ati_pcigart_cleanup)( drm_device_t *dev, - unsigned long addr, - dma_addr_t bus_addr) -{ - drm_sg_mem_t *entry = dev->sg; - unsigned long pages; - int i; - - /* we need to support large memory configurations */ - if ( !entry ) { - DRM_ERROR( "no scatter/gather memory!\n" ); - return 0; - } - - if ( bus_addr ) { - pci_unmap_single(dev->pdev, bus_addr, - ATI_PCIGART_TABLE_PAGES * PAGE_SIZE, - PCI_DMA_TODEVICE); - - pages = ( entry->pages <= ATI_MAX_PCIGART_PAGES ) - ? entry->pages : ATI_MAX_PCIGART_PAGES; - - for ( i = 0 ; i < pages ; i++ ) { - if ( !entry->busaddr[i] ) break; - pci_unmap_single(dev->pdev, entry->busaddr[i], - PAGE_SIZE, PCI_DMA_TODEVICE); - } - } - - if ( addr ) { - DRM(ati_free_pcigart_table)( addr ); - } - - return 1; -} diff --git a/linux/drmP.h b/linux/drmP.h deleted file mode 100644 index fea3b2858..000000000 --- a/linux/drmP.h +++ /dev/null @@ -1,1012 +0,0 @@ -/** - * \file drmP.h - * Private header for Direct Rendering Manager - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _DRM_P_H_ -#define _DRM_P_H_ - - -#ifdef __KERNEL__ -#ifdef __alpha__ -/* add include of current.h so that "current" is defined - * before static inline funcs in wait.h. Doing this so we - * can build the DRM (part of PI DRI). 4/21/2000 S + B */ -#include <asm/current.h> -#endif /* __alpha__ */ -#include <linux/config.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/miscdevice.h> -#include <linux/fs.h> -#include <linux/proc_fs.h> -#include <linux/init.h> -#include <linux/file.h> -#include <linux/pci.h> -#include <linux/version.h> -#include <linux/sched.h> -#include <linux/smp_lock.h> /* For (un)lock_kernel */ -#include <linux/mm.h> -#include <linux/pagemap.h> -#if defined(__alpha__) || defined(__powerpc__) -#include <asm/pgtable.h> /* For pte_wrprotect */ -#endif -#include <asm/io.h> -#include <asm/mman.h> -#include <asm/uaccess.h> -#ifdef CONFIG_MTRR -#include <asm/mtrr.h> -#endif -#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE) -#include <linux/types.h> -#include <linux/agp_backend.h> -#endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,41) -#define HAS_WORKQUEUE 0 -#else -#define HAS_WORKQUEUE 1 -#endif -#if !HAS_WORKQUEUE -#include <linux/tqueue.h> -#else -#include <linux/workqueue.h> -#endif -#include <linux/poll.h> -#include <asm/pgalloc.h> -#include "drm.h" - -#define __OS_HAS_AGP (defined(CONFIG_AGP) || (defined(CONFIG_AGP_MODULE) && defined(MODULE))) -#define __OS_HAS_MTRR (defined(CONFIG_MTRR)) - -#include "drm_os_linux.h" - -/* If you want the memory alloc debug functionality, change define below */ -/* #define DEBUG_MEMORY */ - -/***********************************************************************/ -/** \name DRM template customization defaults */ -/*@{*/ - -/* driver capabilities and requirements mask */ -#define DRIVER_USE_AGP 0x1 -#define DRIVER_REQUIRE_AGP 0x2 -#define DRIVER_USE_MTRR 0x4 -#define DRIVER_PCI_DMA 0x8 -#define DRIVER_SG 0x10 -#define DRIVER_FB_DMA 0x20 -#define DRIVER_HAVE_DMA 0x40 -#define DRIVER_HAVE_IRQ 0x80 -#define DRIVER_IRQ_SHARED 0x100 -#define DRIVER_IRQ_VBL 0x200 -#define DRIVER_DMA_QUEUE 0x400 - -/*@}*/ - -/***********************************************************************/ -/** \name Begin the DRM... */ -/*@{*/ - -#define DRM_DEBUG_CODE 2 /**< Include debugging code if > 1, then - also include looping detection. */ - -#define DRM_HASH_SIZE 16 /**< Size of key hash table. Must be power of 2. */ -#define DRM_KERNEL_CONTEXT 0 /**< Change drm_resctx if changed */ -#define DRM_RESERVED_CONTEXTS 1 /**< Change drm_resctx if changed */ -#define DRM_LOOPING_LIMIT 5000000 -#define DRM_BSZ 1024 /**< Buffer size for /dev/drm? output */ -#define DRM_TIME_SLICE (HZ/20) /**< Time slice for GLXContexts */ -#define DRM_LOCK_SLICE 1 /**< Time slice for lock, in jiffies */ - -#define DRM_FLAG_DEBUG 0x01 - -#define DRM_MEM_DMA 0 -#define DRM_MEM_SAREA 1 -#define DRM_MEM_DRIVER 2 -#define DRM_MEM_MAGIC 3 -#define DRM_MEM_IOCTLS 4 -#define DRM_MEM_MAPS 5 -#define DRM_MEM_VMAS 6 -#define DRM_MEM_BUFS 7 -#define DRM_MEM_SEGS 8 -#define DRM_MEM_PAGES 9 -#define DRM_MEM_FILES 10 -#define DRM_MEM_QUEUES 11 -#define DRM_MEM_CMDS 12 -#define DRM_MEM_MAPPINGS 13 -#define DRM_MEM_BUFLISTS 14 -#define DRM_MEM_AGPLISTS 15 -#define DRM_MEM_TOTALAGP 16 -#define DRM_MEM_BOUNDAGP 17 -#define DRM_MEM_CTXBITMAP 18 -#define DRM_MEM_STUB 19 -#define DRM_MEM_SGLISTS 20 -#define DRM_MEM_CTXLIST 21 - -#define DRM_MAX_CTXBITMAP (PAGE_SIZE * 8) - -/*@}*/ - - -#include "drm_compat.h" - - -/***********************************************************************/ -/** \name Macros to make printk easier */ -/*@{*/ - -/** - * Error output. - * - * \param fmt printf() like format string. - * \param arg arguments - */ -#define DRM_ERROR(fmt, arg...) \ - printk(KERN_ERR "[" DRM_NAME ":%s] *ERROR* " fmt , __FUNCTION__ , ##arg) - -/** - * Memory error output. - * - * \param area memory area where the error occurred. - * \param fmt printf() like format string. - * \param arg arguments - */ -#define DRM_MEM_ERROR(area, fmt, arg...) \ - printk(KERN_ERR "[" DRM_NAME ":%s:%s] *ERROR* " fmt , __FUNCTION__, \ - DRM(mem_stats)[area].name , ##arg) -#define DRM_INFO(fmt, arg...) printk(KERN_INFO "[" DRM_NAME "] " fmt , ##arg) - -/** - * Debug output. - * - * \param fmt printf() like format string. - * \param arg arguments - */ -#if DRM_DEBUG_CODE -#define DRM_DEBUG(fmt, arg...) \ - do { \ - if ( DRM(flags) & DRM_FLAG_DEBUG ) \ - printk(KERN_DEBUG \ - "[" DRM_NAME ":%s] " fmt , \ - __FUNCTION__ , ##arg); \ - } while (0) -#else -#define DRM_DEBUG(fmt, arg...) do { } while (0) -#endif - -#define DRM_PROC_LIMIT (PAGE_SIZE-80) - -#define DRM_PROC_PRINT(fmt, arg...) \ - len += sprintf(&buf[len], fmt , ##arg); \ - if (len > DRM_PROC_LIMIT) { *eof = 1; return len - offset; } - -#define DRM_PROC_PRINT_RET(ret, fmt, arg...) \ - len += sprintf(&buf[len], fmt , ##arg); \ - if (len > DRM_PROC_LIMIT) { ret; *eof = 1; return len - offset; } - -/*@}*/ - - -/***********************************************************************/ -/** \name Internal types and structures */ -/*@{*/ - -#define DRM_ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0])) -#define DRM_MIN(a,b) ((a)<(b)?(a):(b)) -#define DRM_MAX(a,b) ((a)>(b)?(a):(b)) - -#define DRM_LEFTCOUNT(x) (((x)->rp + (x)->count - (x)->wp) % ((x)->count + 1)) -#define DRM_BUFCOUNT(x) ((x)->count - DRM_LEFTCOUNT(x)) -#define DRM_WAITCOUNT(dev,idx) DRM_BUFCOUNT(&dev->queuelist[idx]->waitlist) - -#define DRM_IF_VERSION(maj, min) (maj << 16 | min) -/** - * Get the private SAREA mapping. - * - * \param _dev DRM device. - * \param _ctx context number. - * \param _map output mapping. - */ -#define DRM_GET_PRIV_SAREA(_dev, _ctx, _map) do { \ - (_map) = (_dev)->context_sareas[_ctx]; \ -} while(0) - -/** - * Test that the hardware lock is held by the caller, returning otherwise. - * - * \param dev DRM device. - * \param filp file pointer of the caller. - */ -#define LOCK_TEST_WITH_RETURN( dev, filp ) \ -do { \ - if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) || \ - dev->lock.filp != filp ) { \ - DRM_ERROR( "%s called without lock held\n", \ - __FUNCTION__ ); \ - return -EINVAL; \ - } \ -} while (0) - -/** - * Ioctl function type. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg argument. - */ -typedef int drm_ioctl_t( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); - -typedef struct drm_ioctl_desc { - drm_ioctl_t *func; - int auth_needed; - int root_only; -} drm_ioctl_desc_t; - -typedef struct drm_devstate { - pid_t owner; /**< X server pid holding x_lock */ -} drm_devstate_t; - -typedef struct drm_magic_entry { - drm_magic_t magic; - struct drm_file *priv; - struct drm_magic_entry *next; -} drm_magic_entry_t; - -typedef struct drm_magic_head { - struct drm_magic_entry *head; - struct drm_magic_entry *tail; -} drm_magic_head_t; - -typedef struct drm_vma_entry { - struct vm_area_struct *vma; - struct drm_vma_entry *next; - pid_t pid; -} drm_vma_entry_t; - -/** - * DMA buffer. - */ -typedef struct drm_buf { - int idx; /**< Index into master buflist */ - int total; /**< Buffer size */ - int order; /**< log-base-2(total) */ - int used; /**< Amount of buffer in use (for DMA) */ - unsigned long offset; /**< Byte offset (used internally) */ - void *address; /**< Address of buffer */ - unsigned long bus_address; /**< Bus address of buffer */ - struct drm_buf *next; /**< Kernel-only: used for free list */ - __volatile__ int waiting; /**< On kernel DMA queue */ - __volatile__ int pending; /**< On hardware DMA queue */ - wait_queue_head_t dma_wait; /**< Processes waiting */ - struct file *filp; /**< Pointer to holding file descr */ - int context; /**< Kernel queue for this buffer */ - int while_locked;/**< Dispatch this buffer while locked */ - enum { - DRM_LIST_NONE = 0, - DRM_LIST_FREE = 1, - DRM_LIST_WAIT = 2, - DRM_LIST_PEND = 3, - DRM_LIST_PRIO = 4, - DRM_LIST_RECLAIM = 5 - } list; /**< Which list we're on */ - - int dev_priv_size; /**< Size of buffer private storage */ - void *dev_private; /**< Per-buffer private storage */ -} drm_buf_t; - - -/** bufs is one longer than it has to be */ -typedef struct drm_waitlist { - int count; /**< Number of possible buffers */ - drm_buf_t **bufs; /**< List of pointers to buffers */ - drm_buf_t **rp; /**< Read pointer */ - drm_buf_t **wp; /**< Write pointer */ - drm_buf_t **end; /**< End pointer */ - spinlock_t read_lock; - spinlock_t write_lock; -} drm_waitlist_t; - -typedef struct drm_freelist { - int initialized; /**< Freelist in use */ - atomic_t count; /**< Number of free buffers */ - drm_buf_t *next; /**< End pointer */ - - wait_queue_head_t waiting; /**< Processes waiting on free bufs */ - int low_mark; /**< Low water mark */ - int high_mark; /**< High water mark */ - atomic_t wfh; /**< If waiting for high mark */ - spinlock_t lock; -} drm_freelist_t; - -/** - * Buffer entry. There is one of this for each buffer size order. - */ -typedef struct drm_buf_entry { - int buf_size; /**< size */ - int buf_count; /**< number of buffers */ - drm_buf_t *buflist; /**< buffer list */ - int seg_count; - int page_order; - unsigned long *seglist; - - drm_freelist_t freelist; -} drm_buf_entry_t; - -/** File private data */ -typedef struct drm_file { - int authenticated; - int minor; - pid_t pid; - uid_t uid; - drm_magic_t magic; - unsigned long ioctl_count; - struct drm_file *next; - struct drm_file *prev; - struct drm_device *dev; - int remove_auth_on_close; - unsigned long lock_count; - void *driver_priv; -} drm_file_t; - -/** Wait queue */ -typedef struct drm_queue { - atomic_t use_count; /**< Outstanding uses (+1) */ - atomic_t finalization; /**< Finalization in progress */ - atomic_t block_count; /**< Count of processes waiting */ - atomic_t block_read; /**< Queue blocked for reads */ - wait_queue_head_t read_queue; /**< Processes waiting on block_read */ - atomic_t block_write; /**< Queue blocked for writes */ - wait_queue_head_t write_queue; /**< Processes waiting on block_write */ -#if 1 - atomic_t total_queued; /**< Total queued statistic */ - atomic_t total_flushed;/**< Total flushes statistic */ - atomic_t total_locks; /**< Total locks statistics */ -#endif - drm_ctx_flags_t flags; /**< Context preserving and 2D-only */ - drm_waitlist_t waitlist; /**< Pending buffers */ - wait_queue_head_t flush_queue; /**< Processes waiting until flush */ -} drm_queue_t; - -/** - * Lock data. - */ -typedef struct drm_lock_data { - drm_hw_lock_t *hw_lock; /**< Hardware lock */ - struct file *filp; /**< File descr of lock holder (0=kernel) */ - wait_queue_head_t lock_queue; /**< Queue of blocked processes */ - unsigned long lock_time; /**< Time of last lock in jiffies */ -} drm_lock_data_t; - -/** - * DMA data. - */ -typedef struct drm_device_dma { - - drm_buf_entry_t bufs[DRM_MAX_ORDER+1]; /**< buffers, grouped by their size order */ - int buf_count; /**< total number of buffers */ - drm_buf_t **buflist; /**< Vector of pointers into drm_device_dma::bufs */ - int seg_count; - int page_count; /**< number of pages */ - unsigned long *pagelist; /**< page list */ - unsigned long byte_count; - enum { - _DRM_DMA_USE_AGP = 0x01, - _DRM_DMA_USE_SG = 0x02, - _DRM_DMA_USE_FB = 0x04 - } flags; - -} drm_device_dma_t; - -/** - * AGP memory entry. Stored as a doubly linked list. - */ -typedef struct drm_agp_mem { - unsigned long handle; /**< handle */ - DRM_AGP_MEM *memory; - unsigned long bound; /**< address */ - int pages; - struct drm_agp_mem *prev; /**< previous entry */ - struct drm_agp_mem *next; /**< next entry */ -} drm_agp_mem_t; - -/** - * AGP data. - * - * \sa DRM(agp_init)() and drm_device::agp. - */ -typedef struct drm_agp_head { - DRM_AGP_KERN agp_info; /**< AGP device information */ - drm_agp_mem_t *memory; /**< memory entries */ - unsigned long mode; /**< AGP mode */ - int enabled; /**< whether the AGP bus as been enabled */ - int acquired; /**< whether the AGP device has been acquired */ - unsigned long base; - int agp_mtrr; - int cant_use_aperture; - unsigned long page_mask; -} drm_agp_head_t; - -/** - * Scatter-gather memory. - */ -typedef struct drm_sg_mem { - unsigned long handle; - void *virtual; - int pages; - struct page **pagelist; - dma_addr_t *busaddr; -} drm_sg_mem_t; - -typedef struct drm_sigdata { - int context; - drm_hw_lock_t *lock; -} drm_sigdata_t; - -/** - * Mappings list - */ -typedef struct drm_map_list { - struct list_head head; /**< list head */ - drm_map_t *map; /**< mapping */ -} drm_map_list_t; - -typedef drm_map_t drm_local_map_t; - -/** - * Context handle list - */ -typedef struct drm_ctx_list { - struct list_head head; /**< list head */ - drm_context_t handle; /**< context handle */ - drm_file_t *tag; /**< associated fd private data */ -} drm_ctx_list_t; - - -typedef struct drm_vbl_sig { - struct list_head head; - unsigned int sequence; - struct siginfo info; - struct task_struct *task; -} drm_vbl_sig_t; - - -/** - * DRM device functions structure - */ -struct drm_device; - -struct drm_driver_fn { - int (*preinit)(struct drm_device *, unsigned long flags); - int (*postinit)(struct drm_device *, unsigned long flags); - void (*prerelease)(struct drm_device *, struct file *filp); - void (*pretakedown)(struct drm_device *); - int (*postcleanup)(struct drm_device *); - int (*presetup)(struct drm_device *); - int (*postsetup)(struct drm_device *); - - /* these are opposites at the moment */ - int (*open_helper)(struct drm_device *, drm_file_t *); - void (*free_filp_priv)(struct drm_device *, drm_file_t *); - - void (*release)(struct drm_device *, struct file *filp); - void (*dma_ready)(struct drm_device *); - int (*dma_quiescent)(struct drm_device *); - int (*context_ctor)(struct drm_device *dev, int context); - int (*context_dtor)(struct drm_device *dev, int context); - int (*kernel_context_switch)(struct drm_device *dev, int old, int new); - int (*kernel_context_switch_unlock)(struct drm_device *dev); - int (*vblank_wait)(struct drm_device *dev, unsigned int *sequence); -/* these have to be filled in */ - irqreturn_t (*irq_handler)( DRM_IRQ_ARGS ); - void (*irq_preinstall)(struct drm_device *dev); - void (*irq_postinstall)(struct drm_device *dev); - void (*irq_uninstall)(struct drm_device *dev); - void (*reclaim_buffers)(struct drm_device *dev, struct file *filp); - unsigned long (*get_map_ofs)(drm_map_t *map); - unsigned long (*get_reg_ofs)(struct drm_device *dev); - void (*set_version)(struct drm_device *dev, drm_set_version_t *sv); -}; - -/** - * DRM device structure. - */ -typedef struct drm_device { - const char *name; /**< Simple driver name */ - char *unique; /**< Unique identifier: e.g., busid */ - int unique_len; /**< Length of unique field */ - dev_t device; /**< Device number for mknod */ - char *devname; /**< For /proc/interrupts */ - int minor; /**< Minor device number */ - int if_version; /**< Highest interface version set */ - - int blocked; /**< Blocked due to VC switch? */ - - /** \name Locks */ - /*@{*/ - spinlock_t count_lock; /**< For inuse, drm_device::open_count, drm_device::buf_use */ - struct semaphore struct_sem; /**< For others */ - /*@}*/ - - /** \name Usage Counters */ - /*@{*/ - int open_count; /**< Outstanding files open */ - atomic_t ioctl_count; /**< Outstanding IOCTLs pending */ - atomic_t vma_count; /**< Outstanding vma areas open */ - int buf_use; /**< Buffers in use -- cannot alloc */ - atomic_t buf_alloc; /**< Buffer allocation in progress */ - /*@}*/ - - /** \name Performance counters */ - /*@{*/ - unsigned long counters; - drm_stat_type_t types[15]; - atomic_t counts[15]; - /*@}*/ - - /** \name Authentication */ - /*@{*/ - drm_file_t *file_first; /**< file list head */ - drm_file_t *file_last; /**< file list tail */ - drm_magic_head_t magiclist[DRM_HASH_SIZE]; /**< magic hash table */ - /*@}*/ - - /** \name Memory management */ - /*@{*/ - drm_map_list_t *maplist; /**< Linked list of regions */ - int map_count; /**< Number of mappable regions */ - - /** \name Context handle management */ - /*@{*/ - drm_ctx_list_t *ctxlist; /**< Linked list of context handles */ - int ctx_count; /**< Number of context handles */ - struct semaphore ctxlist_sem; /**< For ctxlist */ - - drm_map_t **context_sareas; /**< per-context SAREA's */ - int max_context; - - drm_vma_entry_t *vmalist; /**< List of vmas (for debugging) */ - drm_lock_data_t lock; /**< Information on hardware lock */ - /*@}*/ - - /** \name DMA queues (contexts) */ - /*@{*/ - int queue_count; /**< Number of active DMA queues */ - int queue_reserved; /**< Number of reserved DMA queues */ - int queue_slots; /**< Actual length of queuelist */ - drm_queue_t **queuelist; /**< Vector of pointers to DMA queues */ - drm_device_dma_t *dma; /**< Optional pointer for DMA support */ - /*@}*/ - - /** \name Context support */ - /*@{*/ - int irq; /**< Interrupt used by board */ - int irq_enabled; /**< True if irq handler is enabled */ - __volatile__ long context_flag; /**< Context swapping flag */ - __volatile__ long interrupt_flag; /**< Interruption handler flag */ - __volatile__ long dma_flag; /**< DMA dispatch flag */ - struct timer_list timer; /**< Timer for delaying ctx switch */ - wait_queue_head_t context_wait; /**< Processes waiting on ctx switch */ - int last_checked; /**< Last context checked for DMA */ - int last_context; /**< Last current context */ - unsigned long last_switch; /**< jiffies at last context switch */ - /*@}*/ - -#if !HAS_WORKQUEUE - struct tq_struct tq; -#else - struct work_struct work; -#endif - /** \name VBLANK IRQ support */ - /*@{*/ - - wait_queue_head_t vbl_queue; /**< VBLANK wait queue */ - atomic_t vbl_received; - spinlock_t vbl_lock; - drm_vbl_sig_t vbl_sigs; /**< signal list to send on VBLANK */ - unsigned int vbl_pending; - - /*@}*/ - cycles_t ctx_start; - cycles_t lck_start; - - char buf[DRM_BSZ]; /**< Output buffer */ - char *buf_rp; /**< Read pointer */ - char *buf_wp; /**< Write pointer */ - char *buf_end; /**< End pointer */ - struct fasync_struct *buf_async;/**< Processes waiting for SIGIO */ - wait_queue_head_t buf_readers; /**< Processes waiting to read */ - wait_queue_head_t buf_writers; /**< Processes waiting to ctx switch */ - - drm_agp_head_t *agp; /**< AGP data */ - - struct pci_dev *pdev; /**< PCI device structure */ - int pci_domain; /**< PCI bus domain number */ - int pci_bus; /**< PCI bus number */ - int pci_slot; /**< PCI slot number */ - int pci_func; /**< PCI function number */ -#ifdef __alpha__ -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,3) - struct pci_controler *hose; -#else - struct pci_controller *hose; -#endif -#endif - drm_sg_mem_t *sg; /**< Scatter gather memory */ - unsigned long *ctx_bitmap; /**< context bitmap */ - void *dev_private; /**< device private data */ - drm_sigdata_t sigdata; /**< For block_all_signals */ - sigset_t sigmask; - - struct file_operations *fops; /**< file operations */ - - struct drm_driver_fn fn_tbl; - drm_local_map_t *agp_buffer_map; - int dev_priv_size; - u32 driver_features; -} drm_device_t; - -typedef struct drm_minor { - enum { - DRM_MINOR_FREE = 0, - DRM_MINOR_PRIMARY, - DRM_MINOR_SECONDARY, - } class; - drm_device_t *dev; - struct proc_dir_entry *dev_root; /**< proc directory entry */ -} drm_minor_t; - -typedef struct drm_global { - unsigned int cards_limit; - drm_minor_t *minors; - struct drm_sysfs_class *drm_class; - struct proc_dir_entry *proc_root; -} drm_global_t; - -static __inline__ int drm_core_check_feature(struct drm_device *dev, int feature) -{ - return ((dev->driver_features & feature) ? 1 : 0); -} - -#if __OS_HAS_AGP -static inline int drm_core_has_AGP(struct drm_device *dev) -{ - return drm_core_check_feature(dev, DRIVER_USE_AGP); -} -#else -#define drm_core_has_AGP(dev) (0) -#endif - -#if __OS_HAS_MTRR -static inline int drm_core_has_MTRR(struct drm_device *dev) -{ - return drm_core_check_feature(dev, DRIVER_USE_MTRR); -} -#else -#define drm_core_has_MTRR(dev) (0) -#endif - -extern void DRM(driver_register_fns)(struct drm_device *dev); - -/******************************************************************/ -/** \name Internal function definitions */ -/*@{*/ - - /* Misc. support (drm_init.h) */ -extern int DRM(flags); -extern void DRM(parse_options)( char *s ); -extern int DRM(cpu_valid)( void ); - - /* Driver support (drm_drv.h) */ -extern int DRM(version)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(open)(struct inode *inode, struct file *filp); -extern int DRM(release)(struct inode *inode, struct file *filp); -extern int DRM(ioctl)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(lock)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(unlock)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(fb_loaded); -extern struct file_operations DRM(fops); - - /* Device support (drm_fops.h) */ -extern int DRM(open_helper)(struct inode *inode, struct file *filp, - drm_device_t *dev); -extern int DRM(flush)(struct file *filp); -extern int DRM(fasync)(int fd, struct file *filp, int on); - - /* Mapping support (drm_vm.h) */ -extern void DRM(vm_open)(struct vm_area_struct *vma); -extern void DRM(vm_close)(struct vm_area_struct *vma); -extern void DRM(vm_shm_close)(struct vm_area_struct *vma); -extern int DRM(mmap_dma)(struct file *filp, - struct vm_area_struct *vma); -extern int DRM(mmap)(struct file *filp, struct vm_area_struct *vma); -extern unsigned int DRM(poll)(struct file *filp, struct poll_table_struct *wait); -extern ssize_t DRM(read)(struct file *filp, char __user *buf, size_t count, loff_t *off); - - /* Memory management support (drm_memory.h) */ -extern void DRM(mem_init)(void); -extern int DRM(mem_info)(char *buf, char **start, off_t offset, - int request, int *eof, void *data); -extern void *DRM(calloc)(size_t nmemb, size_t size, int area); -extern void *DRM(realloc)(void *oldpt, size_t oldsize, size_t size, - int area); -extern unsigned long DRM(alloc_pages)(int order, int area); -extern void DRM(free_pages)(unsigned long address, int order, - int area); -extern void *DRM(ioremap)(unsigned long offset, unsigned long size, drm_device_t *dev); -extern void *DRM(ioremap_nocache)(unsigned long offset, unsigned long size, - drm_device_t *dev); -extern void DRM(ioremapfree)(void *pt, unsigned long size, drm_device_t *dev); - -extern DRM_AGP_MEM *DRM(alloc_agp)(int pages, u32 type); -extern int DRM(free_agp)(DRM_AGP_MEM *handle, int pages); -extern int DRM(bind_agp)(DRM_AGP_MEM *handle, unsigned int start); -extern int DRM(unbind_agp)(DRM_AGP_MEM *handle); - - /* Misc. IOCTL support (drm_ioctl.h) */ -extern int DRM(irq_by_busid)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(getunique)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(setunique)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(getmap)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(getclient)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(getstats)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(setversion)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); - - /* Context IOCTL support (drm_context.h) */ -extern int DRM(resctx)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); -extern int DRM(addctx)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); -extern int DRM(modctx)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); -extern int DRM(getctx)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); -extern int DRM(switchctx)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); -extern int DRM(newctx)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); -extern int DRM(rmctx)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); - -extern int DRM(context_switch)(drm_device_t *dev, int old, int new); -extern int DRM(context_switch_complete)(drm_device_t *dev, int new); - -extern int DRM(ctxbitmap_init)( drm_device_t *dev ); -extern void DRM(ctxbitmap_cleanup)( drm_device_t *dev ); - -extern int DRM(setsareactx)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); -extern int DRM(getsareactx)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); - - /* Drawable IOCTL support (drm_drawable.h) */ -extern int DRM(adddraw)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(rmdraw)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); - - - /* Authentication IOCTL support (drm_auth.h) */ -extern int DRM(add_magic)(drm_device_t *dev, drm_file_t *priv, - drm_magic_t magic); -extern int DRM(remove_magic)(drm_device_t *dev, drm_magic_t magic); -extern int DRM(getmagic)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(authmagic)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); - - /* Placeholder for ioctls past */ -extern int DRM(noop)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); - - /* Locking IOCTL support (drm_lock.h) */ -extern int DRM(lock_take)(__volatile__ unsigned int *lock, - unsigned int context); -extern int DRM(lock_transfer)(drm_device_t *dev, - __volatile__ unsigned int *lock, - unsigned int context); -extern int DRM(lock_free)(drm_device_t *dev, - __volatile__ unsigned int *lock, - unsigned int context); -extern int DRM(notifier)(void *priv); - - /* Buffer management support (drm_bufs.h) */ -extern int DRM(order)( unsigned long size ); -extern int DRM(addmap)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); -extern int DRM(rmmap)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); -extern int DRM(initmap)( drm_device_t *dev, unsigned int offset, - unsigned int size, int type, int flags ); -extern int DRM(addbufs)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); -extern int DRM(infobufs)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); -extern int DRM(markbufs)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); -extern int DRM(freebufs)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); -extern int DRM(mapbufs)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); - - /* DMA support (drm_dma.h) */ -extern int DRM(dma_setup)(drm_device_t *dev); -extern void DRM(dma_takedown)(drm_device_t *dev); -extern void DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf); -extern void DRM(core_reclaim_buffers)(drm_device_t *dev, struct file *filp); - - /* IRQ support (drm_irq.h) */ -extern int DRM(control)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); -extern int DRM(irq_install)( drm_device_t *dev ); -extern int DRM(irq_uninstall)( drm_device_t *dev ); -extern irqreturn_t DRM(irq_handler)( DRM_IRQ_ARGS ); -extern void DRM(driver_irq_preinstall)( drm_device_t *dev ); -extern void DRM(driver_irq_postinstall)( drm_device_t *dev ); -extern void DRM(driver_irq_uninstall)( drm_device_t *dev ); - -extern int DRM(wait_vblank)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(vblank_wait)(drm_device_t *dev, unsigned int *vbl_seq); -extern void DRM(vbl_send_signals)( drm_device_t *dev ); - - - /* AGP/GART support (drm_agpsupport.h) */ -extern drm_agp_head_t *DRM(agp_init)(void); -extern void DRM(agp_uninit)(void); -extern int DRM(agp_acquire)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern void DRM(agp_do_release)(void); -extern int DRM(agp_release)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(agp_enable)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(agp_info)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(agp_alloc)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(agp_free)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(agp_unbind)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(agp_bind)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern DRM_AGP_MEM *DRM(agp_allocate_memory)(size_t pages, u32 type); -extern int DRM(agp_free_memory)(DRM_AGP_MEM *handle); -extern int DRM(agp_bind_memory)(DRM_AGP_MEM *handle, off_t start); -extern int DRM(agp_unbind_memory)(DRM_AGP_MEM *handle); - - /* Stub support (drm_stub.h) */ -extern int DRM(probe)(struct pci_dev *pdev, const struct pci_device_id *ent); -extern int DRM(put_minor)(drm_device_t *dev); -extern int DRM(get_secondary_minor)(drm_device_t *dev, drm_minor_t **sec_minor); -extern int DRM(put_secondary_minor)(drm_minor_t *sec_minor); -extern drm_global_t *DRM(global); - - /* Proc support (drm_proc.h) */ -extern int DRM(proc_init)(drm_device_t *dev, - int minor, - struct proc_dir_entry *root, - struct proc_dir_entry **dev_root); -extern int DRM(proc_cleanup)(int minor, - struct proc_dir_entry *root, - struct proc_dir_entry *dev_root); - - /* Scatter Gather Support (drm_scatter.h) */ -extern void DRM(sg_cleanup)(drm_sg_mem_t *entry); -extern int DRM(sg_alloc)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int DRM(sg_free)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); - - /* ATI PCIGART support (ati_pcigart.h) */ -extern int DRM(ati_pcigart_init)(drm_device_t *dev, - unsigned long *addr, - dma_addr_t *bus_addr); -extern int DRM(ati_pcigart_cleanup)(drm_device_t *dev, - unsigned long addr, - dma_addr_t bus_addr); - -extern void *DRM(pci_alloc)(drm_device_t *dev, size_t size, - size_t align, dma_addr_t maxaddr, - dma_addr_t *busaddr); -extern void DRM(pci_free)(drm_device_t *dev, size_t size, - void *vaddr, dma_addr_t busaddr); - - -/* Inline replacements for DRM_IOREMAP macros */ -static __inline__ void drm_core_ioremap(struct drm_map *map, struct drm_device *dev) -{ - map->handle = DRM(ioremap)( map->offset, map->size, dev ); -} - -static __inline__ void drm_core_ioremap_nocache(struct drm_map *map, struct drm_device *dev) -{ - map->handle = DRM(ioremap_nocache)(map->offset, map->size, dev); -} - -static __inline__ void drm_core_ioremapfree(struct drm_map *map, struct drm_device *dev) -{ - if ( map->handle && map->size ) - DRM(ioremapfree)( map->handle, map->size, dev ); -} - -static __inline__ struct drm_map *drm_core_findmap(struct drm_device *dev, unsigned long offset) -{ - struct list_head *_list; - list_for_each( _list, &dev->maplist->head ) { - drm_map_list_t *_entry = list_entry( _list, drm_map_list_t, head ); - if ( _entry->map && - _entry->map->offset == offset ) { - return _entry->map; - } - } - return NULL; -} - -static __inline__ void drm_core_dropmap(struct drm_map *map) -{ -} - -#ifndef DEBUG_MEMORY -/** Wrapper around kmalloc() */ -static __inline__ void *DRM(alloc)(size_t size, int area) -{ - return kmalloc(size, GFP_KERNEL); -} - -/** Wrapper around kfree() */ -static __inline__ void DRM(free)(void *pt, size_t size, int area) -{ - kfree(pt); -} -#else -extern void *DRM(alloc)(size_t size, int area); -extern void DRM(free)(void *pt, size_t size, int area); -#endif - -/*@}*/ - -extern unsigned long DRM(core_get_map_ofs)(drm_map_t *map); -extern unsigned long DRM(core_get_reg_ofs)(struct drm_device *dev); -#endif /* __KERNEL__ */ -#endif diff --git a/linux/drm_agpsupport.h b/linux/drm_agpsupport.h deleted file mode 100644 index 7d2f71257..000000000 --- a/linux/drm_agpsupport.h +++ /dev/null @@ -1,472 +0,0 @@ -/** - * \file drm_agpsupport.h - * DRM support for AGP/GART backend - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include "drmP.h" -#include <linux/module.h> - -#if __OS_HAS_AGP - -#define DRM_AGP_GET (drm_agp_t *)inter_module_get("drm_agp") -#define DRM_AGP_PUT inter_module_put("drm_agp") - -/** - * Pointer to the drm_agp_t structure made available by the agpgart module. - */ -static const drm_agp_t *drm_agp = NULL; - -/** - * AGP information ioctl. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg pointer to a (output) drm_agp_info structure. - * \return zero on success or a negative number on failure. - * - * Verifies the AGP device has been initialized and acquired and fills in the - * drm_agp_info structure with the information in drm_agp_head::agp_info. - */ -int DRM(agp_info)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - DRM_AGP_KERN *kern; - drm_agp_info_t info; - - if (!dev->agp || !dev->agp->acquired || !drm_agp->copy_info) - return -EINVAL; - - kern = &dev->agp->agp_info; - info.agp_version_major = kern->version.major; - info.agp_version_minor = kern->version.minor; - info.mode = kern->mode; - info.aperture_base = kern->aper_base; - info.aperture_size = kern->aper_size * 1024 * 1024; - info.memory_allowed = kern->max_memory << PAGE_SHIFT; - info.memory_used = kern->current_memory << PAGE_SHIFT; - info.id_vendor = kern->device->vendor; - info.id_device = kern->device->device; - - if (copy_to_user((drm_agp_info_t __user *)arg, &info, sizeof(info))) - return -EFAULT; - return 0; -} - -/** - * Acquire the AGP device (ioctl). - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument. - * \return zero on success or a negative number on failure. - * - * Verifies the AGP device hasn't been acquired before and calls - * drm_agp->acquire(). - */ -int DRM(agp_acquire)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - int retcode; - - if (!dev->agp) - return -ENODEV; - if (dev->agp->acquired) - return -EBUSY; - if (!drm_agp->acquire) - return -EINVAL; -#ifndef VMAP_4_ARGS - if ( dev->agp->cant_use_aperture ) - return -EINVAL; -#endif - if ((retcode = drm_agp->acquire())) - return retcode; - dev->agp->acquired = 1; - return 0; -} - -/** - * Release the AGP device (ioctl). - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument. - * \return zero on success or a negative number on failure. - * - * Verifies the AGP device has been acquired and calls drm_agp->release(). - */ -int DRM(agp_release)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - - if (!dev->agp || !dev->agp->acquired || !drm_agp->release) - return -EINVAL; - drm_agp->release(); - dev->agp->acquired = 0; - return 0; - -} - -/** - * Release the AGP device. - * - * Calls drm_agp->release(). - */ -void DRM(agp_do_release)(void) -{ - if (drm_agp->release) - drm_agp->release(); -} - -/** - * Enable the AGP bus. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg pointer to a drm_agp_mode structure. - * \return zero on success or a negative number on failure. - * - * Verifies the AGP device has been acquired but not enabled, and calls - * drm_agp->enable(). - */ -int DRM(agp_enable)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_agp_mode_t mode; - - if (!dev->agp || !dev->agp->acquired || !drm_agp->enable) - return -EINVAL; - - if (copy_from_user(&mode, (drm_agp_mode_t __user *)arg, sizeof(mode))) - return -EFAULT; - - dev->agp->mode = mode.mode; - drm_agp->enable(mode.mode); - dev->agp->base = dev->agp->agp_info.aper_base; - dev->agp->enabled = 1; - return 0; -} - -/** - * Allocate AGP memory. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg pointer to a drm_agp_buffer structure. - * \return zero on success or a negative number on failure. - * - * Verifies the AGP device is present and has been acquired, allocates the - * memory via alloc_agp() and creates a drm_agp_mem entry for it. - */ -int DRM(agp_alloc)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_agp_buffer_t request; - drm_agp_mem_t *entry; - DRM_AGP_MEM *memory; - unsigned long pages; - u32 type; - drm_agp_buffer_t __user *argp = (void __user *)arg; - - if (!dev->agp || !dev->agp->acquired) - return -EINVAL; - if (copy_from_user(&request, argp, sizeof(request))) - return -EFAULT; - if (!(entry = DRM(alloc)(sizeof(*entry), DRM_MEM_AGPLISTS))) - return -ENOMEM; - - memset(entry, 0, sizeof(*entry)); - - pages = (request.size + PAGE_SIZE - 1) / PAGE_SIZE; - type = (u32) request.type; - - if (!(memory = DRM(alloc_agp)(pages, type))) { - DRM(free)(entry, sizeof(*entry), DRM_MEM_AGPLISTS); - return -ENOMEM; - } - - entry->handle = (unsigned long)memory->key + 1; - entry->memory = memory; - entry->bound = 0; - entry->pages = pages; - entry->prev = NULL; - entry->next = dev->agp->memory; - if (dev->agp->memory) - dev->agp->memory->prev = entry; - dev->agp->memory = entry; - - request.handle = entry->handle; - request.physical = memory->physical; - - if (copy_to_user(argp, &request, sizeof(request))) { - dev->agp->memory = entry->next; - dev->agp->memory->prev = NULL; - DRM(free_agp)(memory, pages); - DRM(free)(entry, sizeof(*entry), DRM_MEM_AGPLISTS); - return -EFAULT; - } - return 0; -} - -/** - * Search for the AGP memory entry associated with a handle. - * - * \param dev DRM device structure. - * \param handle AGP memory handle. - * \return pointer to the drm_agp_mem structure associated with \p handle. - * - * Walks through drm_agp_head::memory until finding a matching handle. - */ -static drm_agp_mem_t *DRM(agp_lookup_entry)(drm_device_t *dev, - unsigned long handle) -{ - drm_agp_mem_t *entry; - - for (entry = dev->agp->memory; entry; entry = entry->next) { - if (entry->handle == handle) - return entry; - } - return NULL; -} - -/** - * Unbind AGP memory from the GATT (ioctl). - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg pointer to a drm_agp_binding structure. - * \return zero on success or a negative number on failure. - * - * Verifies the AGP device is present and acquired, looks-up the AGP memory - * entry and passes it to the unbind_agp() function. - */ -int DRM(agp_unbind)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_agp_binding_t request; - drm_agp_mem_t *entry; - int ret; - - if (!dev->agp || !dev->agp->acquired) - return -EINVAL; - if (copy_from_user(&request, (drm_agp_binding_t __user *)arg, sizeof(request))) - return -EFAULT; - if (!(entry = DRM(agp_lookup_entry)(dev, request.handle))) - return -EINVAL; - if (!entry->bound) - return -EINVAL; - ret = DRM(unbind_agp)(entry->memory); - if (ret == 0) - entry->bound = 0; - return ret; -} - -/** - * Bind AGP memory into the GATT (ioctl) - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg pointer to a drm_agp_binding structure. - * \return zero on success or a negative number on failure. - * - * Verifies the AGP device is present and has been acquired and that no memory - * is currently bound into the GATT. Looks-up the AGP memory entry and passes - * it to bind_agp() function. - */ -int DRM(agp_bind)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_agp_binding_t request; - drm_agp_mem_t *entry; - int retcode; - int page; - - if (!dev->agp || !dev->agp->acquired || !drm_agp->bind_memory) - return -EINVAL; - if (copy_from_user(&request, (drm_agp_binding_t __user *)arg, sizeof(request))) - return -EFAULT; - if (!(entry = DRM(agp_lookup_entry)(dev, request.handle))) - return -EINVAL; - if (entry->bound) - return -EINVAL; - page = (request.offset + PAGE_SIZE - 1) / PAGE_SIZE; - if ((retcode = DRM(bind_agp)(entry->memory, page))) - return retcode; - entry->bound = dev->agp->base + (page << PAGE_SHIFT); - DRM_DEBUG("base = 0x%lx entry->bound = 0x%lx\n", - dev->agp->base, entry->bound); - return 0; -} - -/** - * Free AGP memory (ioctl). - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg pointer to a drm_agp_buffer structure. - * \return zero on success or a negative number on failure. - * - * Verifies the AGP device is present and has been acquired and looks up the - * AGP memory entry. If the memory it's currently bound, unbind it via - * unbind_agp(). Frees it via free_agp() as well as the entry itself - * and unlinks from the doubly linked list it's inserted in. - */ -int DRM(agp_free)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_agp_buffer_t request; - drm_agp_mem_t *entry; - - if (!dev->agp || !dev->agp->acquired) - return -EINVAL; - if (copy_from_user(&request, (drm_agp_buffer_t __user *)arg, sizeof(request))) - return -EFAULT; - if (!(entry = DRM(agp_lookup_entry)(dev, request.handle))) - return -EINVAL; - if (entry->bound) - DRM(unbind_agp)(entry->memory); - - if (entry->prev) - entry->prev->next = entry->next; - else - dev->agp->memory = entry->next; - - if (entry->next) - entry->next->prev = entry->prev; - - DRM(free_agp)(entry->memory, entry->pages); - DRM(free)(entry, sizeof(*entry), DRM_MEM_AGPLISTS); - return 0; -} - -/** - * Initialize the AGP resources. - * - * \return pointer to a drm_agp_head structure. - * - * Gets the drm_agp_t structure which is made available by the agpgart module - * via the inter_module_* functions. Creates and initializes a drm_agp_head - * structure. - */ -drm_agp_head_t *DRM(agp_init)(void) -{ - drm_agp_head_t *head = NULL; - - drm_agp = DRM_AGP_GET; - if (drm_agp) { - if (!(head = DRM(alloc)(sizeof(*head), DRM_MEM_AGPLISTS))) - return NULL; - memset((void *)head, 0, sizeof(*head)); - drm_agp->copy_info(&head->agp_info); - if (head->agp_info.chipset == NOT_SUPPORTED) { - DRM(free)(head, sizeof(*head), DRM_MEM_AGPLISTS); - return NULL; - } - head->memory = NULL; -#if LINUX_VERSION_CODE <= 0x020408 - head->cant_use_aperture = 0; - head->page_mask = ~(0xfff); -#else - head->cant_use_aperture = head->agp_info.cant_use_aperture; - head->page_mask = head->agp_info.page_mask; -#endif - } - return head; -} - -/** - * Free the AGP resources. - * - * Releases the pointer in ::drm_agp. - */ -void DRM(agp_uninit)(void) -{ - DRM_AGP_PUT; - drm_agp = NULL; -} - -/** Calls drm_agp->allocate_memory() */ -DRM_AGP_MEM *DRM(agp_allocate_memory)(size_t pages, u32 type) -{ - if (!drm_agp->allocate_memory) - return NULL; - return drm_agp->allocate_memory(pages, type); -} - -/** Calls drm_agp->free_memory() */ -int DRM(agp_free_memory)(DRM_AGP_MEM *handle) -{ - if (!handle || !drm_agp->free_memory) - return 0; - drm_agp->free_memory(handle); - return 1; -} - -/** Calls drm_agp->bind_memory() */ -int DRM(agp_bind_memory)(DRM_AGP_MEM *handle, off_t start) -{ - if (!handle || !drm_agp->bind_memory) - return -EINVAL; - return drm_agp->bind_memory(handle, start); -} - -/** Calls drm_agp->unbind_memory() */ -int DRM(agp_unbind_memory)(DRM_AGP_MEM *handle) -{ - if (!handle || !drm_agp->unbind_memory) - return -EINVAL; - return drm_agp->unbind_memory(handle); -} - -#endif /* __OS_HAS_AGP */ diff --git a/linux/drm_auth.h b/linux/drm_auth.h deleted file mode 100644 index fe099871a..000000000 --- a/linux/drm_auth.h +++ /dev/null @@ -1,230 +0,0 @@ -/** - * \file drm_auth.h - * IOCTLs for authentication - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Created: Tue Feb 2 08:37:54 1999 by faith@valinux.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include "drmP.h" - -/** - * Generate a hash key from a magic. - * - * \param magic magic. - * \return hash key. - * - * The key is the modulus of the hash table size, #DRM_HASH_SIZE, which must be - * a power of 2. - */ -static int DRM(hash_magic)(drm_magic_t magic) -{ - return magic & (DRM_HASH_SIZE-1); -} - -/** - * Find the file with the given magic number. - * - * \param dev DRM device. - * \param magic magic number. - * - * Searches in drm_device::magiclist within all files with the same hash key - * the one with matching magic number, while holding the drm_device::struct_sem - * lock. - */ -static drm_file_t *DRM(find_file)(drm_device_t *dev, drm_magic_t magic) -{ - drm_file_t *retval = NULL; - drm_magic_entry_t *pt; - int hash = DRM(hash_magic)(magic); - - down(&dev->struct_sem); - for (pt = dev->magiclist[hash].head; pt; pt = pt->next) { - if (pt->magic == magic) { - retval = pt->priv; - break; - } - } - up(&dev->struct_sem); - return retval; -} - -/** - * Adds a magic number. - * - * \param dev DRM device. - * \param priv file private data. - * \param magic magic number. - * - * Creates a drm_magic_entry structure and appends to the linked list - * associated the magic number hash key in drm_device::magiclist, while holding - * the drm_device::struct_sem lock. - */ -int DRM(add_magic)(drm_device_t *dev, drm_file_t *priv, drm_magic_t magic) -{ - int hash; - drm_magic_entry_t *entry; - - DRM_DEBUG("%d\n", magic); - - hash = DRM(hash_magic)(magic); - entry = DRM(alloc)(sizeof(*entry), DRM_MEM_MAGIC); - if (!entry) return -ENOMEM; - memset(entry, 0, sizeof(*entry)); - entry->magic = magic; - entry->priv = priv; - entry->next = NULL; - - down(&dev->struct_sem); - if (dev->magiclist[hash].tail) { - dev->magiclist[hash].tail->next = entry; - dev->magiclist[hash].tail = entry; - } else { - dev->magiclist[hash].head = entry; - dev->magiclist[hash].tail = entry; - } - up(&dev->struct_sem); - - return 0; -} - -/** - * Remove a magic number. - * - * \param dev DRM device. - * \param magic magic number. - * - * Searches and unlinks the entry in drm_device::magiclist with the magic - * number hash key, while holding the drm_device::struct_sem lock. - */ -int DRM(remove_magic)(drm_device_t *dev, drm_magic_t magic) -{ - drm_magic_entry_t *prev = NULL; - drm_magic_entry_t *pt; - int hash; - - - DRM_DEBUG("%d\n", magic); - hash = DRM(hash_magic)(magic); - - down(&dev->struct_sem); - for (pt = dev->magiclist[hash].head; pt; prev = pt, pt = pt->next) { - if (pt->magic == magic) { - if (dev->magiclist[hash].head == pt) { - dev->magiclist[hash].head = pt->next; - } - if (dev->magiclist[hash].tail == pt) { - dev->magiclist[hash].tail = prev; - } - if (prev) { - prev->next = pt->next; - } - up(&dev->struct_sem); - return 0; - } - } - up(&dev->struct_sem); - - DRM(free)(pt, sizeof(*pt), DRM_MEM_MAGIC); - - return -EINVAL; -} - -/** - * Get a unique magic number (ioctl). - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg pointer to a resulting drm_auth structure. - * \return zero on success, or a negative number on failure. - * - * If there is a magic number in drm_file::magic then use it, otherwise - * searches an unique non-zero magic number and add it associating it with \p - * filp. - */ -int DRM(getmagic)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - static drm_magic_t sequence = 0; - static spinlock_t lock = SPIN_LOCK_UNLOCKED; - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_auth_t auth; - - /* Find unique magic */ - if (priv->magic) { - auth.magic = priv->magic; - } else { - do { - spin_lock(&lock); - if (!sequence) ++sequence; /* reserve 0 */ - auth.magic = sequence++; - spin_unlock(&lock); - } while (DRM(find_file)(dev, auth.magic)); - priv->magic = auth.magic; - DRM(add_magic)(dev, priv, auth.magic); - } - - DRM_DEBUG("%u\n", auth.magic); - if (copy_to_user((drm_auth_t __user *)arg, &auth, sizeof(auth))) - return -EFAULT; - return 0; -} - -/** - * Authenticate with a magic. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg pointer to a drm_auth structure. - * \return zero if authentication successed, or a negative number otherwise. - * - * Checks if \p filp is associated with the magic number passed in \arg. - */ -int DRM(authmagic)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_auth_t auth; - drm_file_t *file; - - if (copy_from_user(&auth, (drm_auth_t __user *)arg, sizeof(auth))) - return -EFAULT; - DRM_DEBUG("%u\n", auth.magic); - if ((file = DRM(find_file)(dev, auth.magic))) { - file->authenticated = 1; - DRM(remove_magic)(dev, auth.magic); - return 0; - } - return -EINVAL; -} diff --git a/linux/drm_bufs.h b/linux/drm_bufs.h deleted file mode 100644 index 03900d1b1..000000000 --- a/linux/drm_bufs.h +++ /dev/null @@ -1,1529 +0,0 @@ -/** - * \file drm_bufs.h - * Generic buffer template - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Created: Thu Nov 23 03:10:50 2000 by gareth@valinux.com - * - * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <linux/vmalloc.h> -#include "drmP.h" - -/** - * Compute size order. Returns the exponent of the smaller power of two which - * is greater or equal to given number. - * - * \param size size. - * \return order. - * - * \todo Can be made faster. - */ -int DRM(order)( unsigned long size ) -{ - int order; - unsigned long tmp; - - for (order = 0, tmp = size >> 1; tmp; tmp >>= 1, order++) - ; - - if (size & (size - 1)) - ++order; - - return order; -} - -static int permanent_maps = 0; - /** - * Adjusts the memory offset to its absolute value according to the mapping - * type. Adds the map to the map list drm_device::maplist. Adds MTRR's where - * applicable and if supported by the kernel. - */ -int DRM(initmap)( drm_device_t *dev, unsigned int offset, unsigned int size, int type, int flags ) -{ - drm_map_t *map; - drm_map_list_t *list; - - DRM_DEBUG("\n"); - - if ( (offset & (~PAGE_MASK)) || (size & (~PAGE_MASK)) ) - return -EINVAL; -#if !defined(__sparc__) && !defined(__alpha__) - if ( offset + size < offset || offset < virt_to_phys(high_memory) ) - return -EINVAL; -#endif - if ( !(list = DRM(alloc)( sizeof(*list), DRM_MEM_MAPS ))) - return -ENOMEM; - memset(list, 0, sizeof(*list)); - - if ( !(map = DRM(alloc)( sizeof(*map), DRM_MEM_MAPS ))) { - DRM(free)(list, sizeof(*list), DRM_MEM_MAPS); - return -ENOMEM; - } - - *map = (drm_map_t){ - .offset = offset, - .size = size, - .type = type, - .flags = flags, - .mtrr = -1, - .handle = 0, - }; - list->map = map; - - DRM_DEBUG( "initmap offset = 0x%08lx, size = 0x%08lx, type = %d\n", - map->offset, map->size, map->type ); - -#ifdef __alpha__ - map->offset += dev->hose->mem_space->start; -#endif - if (drm_core_has_MTRR(dev)) { - if ( map->type == _DRM_FRAME_BUFFER || - (map->flags & _DRM_WRITE_COMBINING) ) { - map->mtrr = mtrr_add( map->offset, map->size, - MTRR_TYPE_WRCOMB, 1 ); - } - } - - if (map->type == _DRM_REGISTERS) - map->handle = DRM(ioremap)( map->offset, map->size, dev ); - - down(&dev->struct_sem); - list_add(&list->head, &dev->maplist->head); - up(&dev->struct_sem); - - permanent_maps = 1; - DRM_DEBUG("finished\n"); - - return 0; -} - -/** - * Ioctl to specify a range of memory that is available for mapping by a non-root process. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg pointer to a drm_map structure. - * \return zero on success or a negative value on error. - * - * Adjusts the memory offset to its absolute value according to the mapping - * type. Adds the map to the map list drm_device::maplist. Adds MTRR's where - * applicable and if supported by the kernel. - */ -int DRM(addmap)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_map_t *map; - drm_map_t __user *argp = (void __user *)arg; - drm_map_list_t *list; - - if ( !(filp->f_mode & 3) ) return -EACCES; /* Require read/write */ - - map = DRM(alloc)( sizeof(*map), DRM_MEM_MAPS ); - if ( !map ) - return -ENOMEM; - - if ( copy_from_user( map, argp, sizeof(*map) ) ) { - DRM(free)( map, sizeof(*map), DRM_MEM_MAPS ); - return -EFAULT; - } - - /* Only allow shared memory to be removable since we only keep enough - * book keeping information about shared memory to allow for removal - * when processes fork. - */ - if ( (map->flags & _DRM_REMOVABLE) && map->type != _DRM_SHM ) { - DRM(free)( map, sizeof(*map), DRM_MEM_MAPS ); - return -EINVAL; - } - DRM_DEBUG( "offset = 0x%08lx, size = 0x%08lx, type = %d\n", - map->offset, map->size, map->type ); - if ( (map->offset & (~PAGE_MASK)) || (map->size & (~PAGE_MASK)) ) { - DRM(free)( map, sizeof(*map), DRM_MEM_MAPS ); - return -EINVAL; - } - map->mtrr = -1; - map->handle = NULL; - - switch ( map->type ) { - case _DRM_REGISTERS: - case _DRM_FRAME_BUFFER: { - /* after all the drivers switch to permanent mapping this should just return an error */ - struct list_head *_list; - - /* If permanent maps are implemented, maps must match */ - if (permanent_maps) { - DRM_DEBUG( "Looking for: offset = 0x%08lx, size = 0x%08lx, type = %d\n", - map->offset, map->size, map->type ); - list_for_each( _list, &dev->maplist->head ) { - drm_map_list_t *_entry = list_entry( _list, drm_map_list_t, head ); - DRM_DEBUG( "Checking: offset = 0x%08lx, size = 0x%08lx, type = %d\n", - _entry->map->offset, _entry->map->size, _entry->map->type ); - if ( _entry->map && map->type == _entry->map->type && - map->offset == _entry->map->offset ) { - _entry->map->size = map->size; - DRM(free)( map, sizeof(*map), DRM_MEM_MAPS ); - map = _entry->map; - DRM_DEBUG( "Found existing: offset = 0x%08lx, size = 0x%08lx, type = %d\n", - map->offset, map->size, map->type ); - goto found_it; - } - } - /* addmap didn't match an existing permanent map, that's an error */ - return -EINVAL; - } -#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) - if ( map->offset + map->size < map->offset || - map->offset < virt_to_phys(high_memory) ) { - DRM(free)( map, sizeof(*map), DRM_MEM_MAPS ); - return -EINVAL; - } -#endif -#ifdef __alpha__ - map->offset += dev->hose->mem_space->start; -#endif - if (drm_core_has_MTRR(dev)) { - if ( map->type == _DRM_FRAME_BUFFER || - (map->flags & _DRM_WRITE_COMBINING) ) { - map->mtrr = mtrr_add( map->offset, map->size, - MTRR_TYPE_WRCOMB, 1 ); - } - } - if (map->type == _DRM_REGISTERS) - map->handle = DRM(ioremap)( map->offset, map->size, - dev ); - break; - } - case _DRM_SHM: - map->handle = vmalloc_32(map->size); - DRM_DEBUG( "%lu %d %p\n", - map->size, DRM(order)( map->size ), map->handle ); - if ( !map->handle ) { - DRM(free)( map, sizeof(*map), DRM_MEM_MAPS ); - return -ENOMEM; - } - map->offset = (unsigned long)map->handle; - if ( map->flags & _DRM_CONTAINS_LOCK ) { - /* Prevent a 2nd X Server from creating a 2nd lock */ - if (dev->lock.hw_lock != NULL) { - vfree( map->handle ); - DRM(free)( map, sizeof(*map), DRM_MEM_MAPS ); - return -EBUSY; - } - dev->sigdata.lock = - dev->lock.hw_lock = map->handle; /* Pointer to lock */ - } - break; - case _DRM_AGP: - if (drm_core_has_AGP(dev)) { -#ifdef __alpha__ - map->offset += dev->hose->mem_space->start; -#endif - map->offset += dev->agp->base; - map->mtrr = dev->agp->agp_mtrr; /* for getmap */ - } - break; - case _DRM_SCATTER_GATHER: - if (!dev->sg) { - DRM(free)(map, sizeof(*map), DRM_MEM_MAPS); - return -EINVAL; - } - map->offset += dev->sg->handle; - break; - - default: - DRM(free)( map, sizeof(*map), DRM_MEM_MAPS ); - return -EINVAL; - } - - list = DRM(alloc)(sizeof(*list), DRM_MEM_MAPS); - if(!list) { - DRM(free)(map, sizeof(*map), DRM_MEM_MAPS); - return -EINVAL; - } - memset(list, 0, sizeof(*list)); - list->map = map; - - down(&dev->struct_sem); - list_add(&list->head, &dev->maplist->head); - up(&dev->struct_sem); -found_it: - if ( copy_to_user( argp, map, sizeof(*map) ) ) - return -EFAULT; - if ( map->type != _DRM_SHM ) { - if ( copy_to_user( &argp->handle, - &map->offset, - sizeof(map->offset) ) ) - return -EFAULT; - } - return 0; -} - - -/** - * Remove a map private from list and deallocate resources if the mapping - * isn't in use. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg pointer to a drm_map_t structure. - * \return zero on success or a negative value on error. - * - * Searches the map on drm_device::maplist, removes it from the list, see if - * its being used, and free any associate resource (such as MTRR's) if it's not - * being on use. - * - * \sa addmap(). - */ -int DRM(rmmap)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - struct list_head *list; - drm_map_list_t *r_list = NULL; - drm_vma_entry_t *pt, *prev; - drm_map_t *map; - drm_map_t request; - int found_maps = 0; - - if (copy_from_user(&request, (drm_map_t __user *)arg, - sizeof(request))) { - return -EFAULT; - } - - down(&dev->struct_sem); - list = &dev->maplist->head; - list_for_each(list, &dev->maplist->head) { - r_list = list_entry(list, drm_map_list_t, head); - - if(r_list->map && - r_list->map->handle == request.handle && - r_list->map->flags & _DRM_REMOVABLE) break; - } - - /* List has wrapped around to the head pointer, or its empty we didn't - * find anything. - */ - if(list == (&dev->maplist->head)) { - up(&dev->struct_sem); - return -EINVAL; - } - map = r_list->map; - - /* Register and framebuffer maps are permanent */ - if ((map->type == _DRM_REGISTERS) || (map->type == _DRM_FRAME_BUFFER)) { - up(&dev->struct_sem); - return 0; - } - list_del(list); - DRM(free)(list, sizeof(*list), DRM_MEM_MAPS); - - for (pt = dev->vmalist, prev = NULL; pt; prev = pt, pt = pt->next) { - if (pt->vma->vm_private_data == map) found_maps++; - } - - if(!found_maps) { - switch (map->type) { - case _DRM_REGISTERS: - case _DRM_FRAME_BUFFER: - break; /* Can't get here, make compiler happy */ - case _DRM_SHM: - vfree(map->handle); - break; - case _DRM_AGP: - case _DRM_SCATTER_GATHER: - break; - } - DRM(free)(map, sizeof(*map), DRM_MEM_MAPS); - } - up(&dev->struct_sem); - return 0; -} - -/** - * Cleanup after an error on one of the addbufs() functions. - * - * \param dev DRM device. - * \param entry buffer entry where the error occurred. - * - * Frees any pages and buffers associated with the given entry. - */ -static void DRM(cleanup_buf_error)(drm_device_t *dev, drm_buf_entry_t *entry) -{ - int i; - - if (entry->seg_count) { - for (i = 0; i < entry->seg_count; i++) { - if (entry->seglist[i]) { - DRM(free_pages)(entry->seglist[i], - entry->page_order, - DRM_MEM_DMA); - } - } - DRM(free)(entry->seglist, - entry->seg_count * - sizeof(*entry->seglist), - DRM_MEM_SEGS); - - entry->seg_count = 0; - } - - if (entry->buf_count) { - for (i = 0; i < entry->buf_count; i++) { - if (entry->buflist[i].dev_private) { - DRM(free)(entry->buflist[i].dev_private, - entry->buflist[i].dev_priv_size, - DRM_MEM_BUFS); - } - } - DRM(free)(entry->buflist, - entry->buf_count * - sizeof(*entry->buflist), - DRM_MEM_BUFS); - - entry->buf_count = 0; - } -} - -#if __OS_HAS_AGP -/** - * Add AGP buffers for DMA transfers (ioctl). - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg pointer to a drm_buf_desc_t request. - * \return zero on success or a negative number on failure. - * - * After some sanity checks creates a drm_buf structure for each buffer and - * reallocates the buffer list of the same size order to accommodate the new - * buffers. - */ -int DRM(addbufs_agp)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_device_dma_t *dma = dev->dma; - drm_buf_desc_t request; - drm_buf_entry_t *entry; - drm_buf_t *buf; - unsigned long offset; - unsigned long agp_offset; - int count; - int order; - int size; - int alignment; - int page_order; - int total; - int byte_count; - int i; - drm_buf_t **temp_buflist; - drm_buf_desc_t __user *argp = (void __user *)arg; - - if ( !dma ) return -EINVAL; - - if ( copy_from_user( &request, argp, - sizeof(request) ) ) - return -EFAULT; - - count = request.count; - order = DRM(order)( request.size ); - size = 1 << order; - - alignment = (request.flags & _DRM_PAGE_ALIGN) - ? PAGE_ALIGN(size) : size; - page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0; - total = PAGE_SIZE << page_order; - - byte_count = 0; - agp_offset = dev->agp->base + request.agp_start; - - DRM_DEBUG( "count: %d\n", count ); - DRM_DEBUG( "order: %d\n", order ); - DRM_DEBUG( "size: %d\n", size ); - DRM_DEBUG( "agp_offset: %lu\n", agp_offset ); - DRM_DEBUG( "alignment: %d\n", alignment ); - DRM_DEBUG( "page_order: %d\n", page_order ); - DRM_DEBUG( "total: %d\n", total ); - - if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) return -EINVAL; - if ( dev->queue_count ) return -EBUSY; /* Not while in use */ - - spin_lock( &dev->count_lock ); - if ( dev->buf_use ) { - spin_unlock( &dev->count_lock ); - return -EBUSY; - } - atomic_inc( &dev->buf_alloc ); - spin_unlock( &dev->count_lock ); - - down( &dev->struct_sem ); - entry = &dma->bufs[order]; - if ( entry->buf_count ) { - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; /* May only call once for each order */ - } - - if (count < 0 || count > 4096) { - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -EINVAL; - } - - entry->buflist = DRM(alloc)( count * sizeof(*entry->buflist), - DRM_MEM_BUFS ); - if ( !entry->buflist ) { - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; - } - memset( entry->buflist, 0, count * sizeof(*entry->buflist) ); - - entry->buf_size = size; - entry->page_order = page_order; - - offset = 0; - - while ( entry->buf_count < count ) { - buf = &entry->buflist[entry->buf_count]; - buf->idx = dma->buf_count + entry->buf_count; - buf->total = alignment; - buf->order = order; - buf->used = 0; - - buf->offset = (dma->byte_count + offset); - buf->bus_address = agp_offset + offset; - buf->address = (void *)(agp_offset + offset); - buf->next = NULL; - buf->waiting = 0; - buf->pending = 0; - init_waitqueue_head( &buf->dma_wait ); - buf->filp = NULL; - - buf->dev_priv_size = dev->dev_priv_size; - buf->dev_private = DRM(alloc)( buf->dev_priv_size, - DRM_MEM_BUFS ); - if(!buf->dev_private) { - /* Set count correctly so we free the proper amount. */ - entry->buf_count = count; - DRM(cleanup_buf_error)(dev,entry); - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; - } - memset( buf->dev_private, 0, buf->dev_priv_size ); - - DRM_DEBUG( "buffer %d @ %p\n", - entry->buf_count, buf->address ); - - offset += alignment; - entry->buf_count++; - byte_count += PAGE_SIZE << page_order; - } - - DRM_DEBUG( "byte_count: %d\n", byte_count ); - - temp_buflist = DRM(realloc)( dma->buflist, - dma->buf_count * sizeof(*dma->buflist), - (dma->buf_count + entry->buf_count) - * sizeof(*dma->buflist), - DRM_MEM_BUFS ); - if(!temp_buflist) { - /* Free the entry because it isn't valid */ - DRM(cleanup_buf_error)(dev,entry); - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; - } - dma->buflist = temp_buflist; - - for ( i = 0 ; i < entry->buf_count ; i++ ) { - dma->buflist[i + dma->buf_count] = &entry->buflist[i]; - } - - dma->buf_count += entry->buf_count; - dma->byte_count += byte_count; - - DRM_DEBUG( "dma->buf_count : %d\n", dma->buf_count ); - DRM_DEBUG( "entry->buf_count : %d\n", entry->buf_count ); - - up( &dev->struct_sem ); - - request.count = entry->buf_count; - request.size = size; - - if ( copy_to_user( argp, &request, sizeof(request) ) ) - return -EFAULT; - - dma->flags = _DRM_DMA_USE_AGP; - - atomic_dec( &dev->buf_alloc ); - return 0; -} -#endif /* __OS_HAS_AGP */ - -int DRM(addbufs_pci)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_device_dma_t *dma = dev->dma; - drm_buf_desc_t request; - int count; - int order; - int size; - int total; - int page_order; - drm_buf_entry_t *entry; - unsigned long page; - drm_buf_t *buf; - int alignment; - unsigned long offset; - int i; - int byte_count; - int page_count; - unsigned long *temp_pagelist; - drm_buf_t **temp_buflist; - drm_buf_desc_t __user *argp = (void __user *)arg; - - if (!drm_core_check_feature(dev, DRIVER_PCI_DMA)) return -EINVAL; - - if ( !dma ) return -EINVAL; - - if ( copy_from_user( &request, argp, sizeof(request) ) ) - return -EFAULT; - - count = request.count; - order = DRM(order)( request.size ); - size = 1 << order; - - DRM_DEBUG( "count=%d, size=%d (%d), order=%d, queue_count=%d\n", - request.count, request.size, size, - order, dev->queue_count ); - - if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) return -EINVAL; - if ( dev->queue_count ) return -EBUSY; /* Not while in use */ - - alignment = (request.flags & _DRM_PAGE_ALIGN) - ? PAGE_ALIGN(size) : size; - page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0; - total = PAGE_SIZE << page_order; - - spin_lock( &dev->count_lock ); - if ( dev->buf_use ) { - spin_unlock( &dev->count_lock ); - return -EBUSY; - } - atomic_inc( &dev->buf_alloc ); - spin_unlock( &dev->count_lock ); - - down( &dev->struct_sem ); - entry = &dma->bufs[order]; - if ( entry->buf_count ) { - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; /* May only call once for each order */ - } - - if (count < 0 || count > 4096) { - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -EINVAL; - } - - entry->buflist = DRM(alloc)( count * sizeof(*entry->buflist), - DRM_MEM_BUFS ); - if ( !entry->buflist ) { - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; - } - memset( entry->buflist, 0, count * sizeof(*entry->buflist) ); - - entry->seglist = DRM(alloc)( count * sizeof(*entry->seglist), - DRM_MEM_SEGS ); - if ( !entry->seglist ) { - DRM(free)( entry->buflist, - count * sizeof(*entry->buflist), - DRM_MEM_BUFS ); - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; - } - memset( entry->seglist, 0, count * sizeof(*entry->seglist) ); - - /* Keep the original pagelist until we know all the allocations - * have succeeded - */ - temp_pagelist = DRM(alloc)( (dma->page_count + (count << page_order)) - * sizeof(*dma->pagelist), - DRM_MEM_PAGES ); - if (!temp_pagelist) { - DRM(free)( entry->buflist, - count * sizeof(*entry->buflist), - DRM_MEM_BUFS ); - DRM(free)( entry->seglist, - count * sizeof(*entry->seglist), - DRM_MEM_SEGS ); - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; - } - memcpy(temp_pagelist, - dma->pagelist, - dma->page_count * sizeof(*dma->pagelist)); - DRM_DEBUG( "pagelist: %d entries\n", - dma->page_count + (count << page_order) ); - - entry->buf_size = size; - entry->page_order = page_order; - byte_count = 0; - page_count = 0; - - while ( entry->buf_count < count ) { - page = DRM(alloc_pages)( page_order, DRM_MEM_DMA ); - if ( !page ) { - /* Set count correctly so we free the proper amount. */ - entry->buf_count = count; - entry->seg_count = count; - DRM(cleanup_buf_error)(dev,entry); - DRM(free)( temp_pagelist, - (dma->page_count + (count << page_order)) - * sizeof(*dma->pagelist), - DRM_MEM_PAGES ); - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; - } - entry->seglist[entry->seg_count++] = page; - for ( i = 0 ; i < (1 << page_order) ; i++ ) { - DRM_DEBUG( "page %d @ 0x%08lx\n", - dma->page_count + page_count, - page + PAGE_SIZE * i ); - temp_pagelist[dma->page_count + page_count++] - = page + PAGE_SIZE * i; - } - for ( offset = 0 ; - offset + size <= total && entry->buf_count < count ; - offset += alignment, ++entry->buf_count ) { - buf = &entry->buflist[entry->buf_count]; - buf->idx = dma->buf_count + entry->buf_count; - buf->total = alignment; - buf->order = order; - buf->used = 0; - buf->offset = (dma->byte_count + byte_count + offset); - buf->address = (void *)(page + offset); - buf->bus_address = virt_to_bus(buf->address); - buf->next = NULL; - buf->waiting = 0; - buf->pending = 0; - init_waitqueue_head( &buf->dma_wait ); - buf->filp = NULL; - - buf->dev_priv_size = dev->dev_priv_size; - buf->dev_private = DRM(alloc)( dev->dev_priv_size, - DRM_MEM_BUFS ); - if(!buf->dev_private) { - /* Set count correctly so we free the proper amount. */ - entry->buf_count = count; - entry->seg_count = count; - DRM(cleanup_buf_error)(dev,entry); - DRM(free)( temp_pagelist, - (dma->page_count + (count << page_order)) - * sizeof(*dma->pagelist), - DRM_MEM_PAGES ); - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; - } - memset( buf->dev_private, 0, buf->dev_priv_size ); - - DRM_DEBUG( "buffer %d @ %p\n", - entry->buf_count, buf->address ); - } - byte_count += PAGE_SIZE << page_order; - } - - temp_buflist = DRM(realloc)( dma->buflist, - dma->buf_count * sizeof(*dma->buflist), - (dma->buf_count + entry->buf_count) - * sizeof(*dma->buflist), - DRM_MEM_BUFS ); - if (!temp_buflist) { - /* Free the entry because it isn't valid */ - DRM(cleanup_buf_error)(dev,entry); - DRM(free)( temp_pagelist, - (dma->page_count + (count << page_order)) - * sizeof(*dma->pagelist), - DRM_MEM_PAGES ); - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; - } - dma->buflist = temp_buflist; - - for ( i = 0 ; i < entry->buf_count ; i++ ) { - dma->buflist[i + dma->buf_count] = &entry->buflist[i]; - } - - /* No allocations failed, so now we can replace the orginal pagelist - * with the new one. - */ - if (dma->page_count) { - DRM(free)(dma->pagelist, - dma->page_count * sizeof(*dma->pagelist), - DRM_MEM_PAGES); - } - dma->pagelist = temp_pagelist; - - dma->buf_count += entry->buf_count; - dma->seg_count += entry->seg_count; - dma->page_count += entry->seg_count << page_order; - dma->byte_count += PAGE_SIZE * (entry->seg_count << page_order); - - up( &dev->struct_sem ); - - request.count = entry->buf_count; - request.size = size; - - if ( copy_to_user( argp, &request, sizeof(request) ) ) - return -EFAULT; - - atomic_dec( &dev->buf_alloc ); - return 0; - -} - -int DRM(addbufs_sg)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_device_dma_t *dma = dev->dma; - drm_buf_desc_t __user *argp = (void __user *)arg; - drm_buf_desc_t request; - drm_buf_entry_t *entry; - drm_buf_t *buf; - unsigned long offset; - unsigned long agp_offset; - int count; - int order; - int size; - int alignment; - int page_order; - int total; - int byte_count; - int i; - drm_buf_t **temp_buflist; - - if (!drm_core_check_feature(dev, DRIVER_SG)) return -EINVAL; - - if ( !dma ) return -EINVAL; - - if ( copy_from_user( &request, argp, sizeof(request) ) ) - return -EFAULT; - - count = request.count; - order = DRM(order)( request.size ); - size = 1 << order; - - alignment = (request.flags & _DRM_PAGE_ALIGN) - ? PAGE_ALIGN(size) : size; - page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0; - total = PAGE_SIZE << page_order; - - byte_count = 0; - agp_offset = request.agp_start; - - DRM_DEBUG( "count: %d\n", count ); - DRM_DEBUG( "order: %d\n", order ); - DRM_DEBUG( "size: %d\n", size ); - DRM_DEBUG( "agp_offset: %lu\n", agp_offset ); - DRM_DEBUG( "alignment: %d\n", alignment ); - DRM_DEBUG( "page_order: %d\n", page_order ); - DRM_DEBUG( "total: %d\n", total ); - - if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) return -EINVAL; - if ( dev->queue_count ) return -EBUSY; /* Not while in use */ - - spin_lock( &dev->count_lock ); - if ( dev->buf_use ) { - spin_unlock( &dev->count_lock ); - return -EBUSY; - } - atomic_inc( &dev->buf_alloc ); - spin_unlock( &dev->count_lock ); - - down( &dev->struct_sem ); - entry = &dma->bufs[order]; - if ( entry->buf_count ) { - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; /* May only call once for each order */ - } - - if (count < 0 || count > 4096) { - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -EINVAL; - } - - entry->buflist = DRM(alloc)( count * sizeof(*entry->buflist), - DRM_MEM_BUFS ); - if ( !entry->buflist ) { - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; - } - memset( entry->buflist, 0, count * sizeof(*entry->buflist) ); - - entry->buf_size = size; - entry->page_order = page_order; - - offset = 0; - - while ( entry->buf_count < count ) { - buf = &entry->buflist[entry->buf_count]; - buf->idx = dma->buf_count + entry->buf_count; - buf->total = alignment; - buf->order = order; - buf->used = 0; - - buf->offset = (dma->byte_count + offset); - buf->bus_address = agp_offset + offset; - buf->address = (void *)(agp_offset + offset + dev->sg->handle); - buf->next = NULL; - buf->waiting = 0; - buf->pending = 0; - init_waitqueue_head( &buf->dma_wait ); - buf->filp = NULL; - - buf->dev_priv_size = dev->dev_priv_size; - buf->dev_private = DRM(alloc)( dev->dev_priv_size, - DRM_MEM_BUFS ); - if(!buf->dev_private) { - /* Set count correctly so we free the proper amount. */ - entry->buf_count = count; - DRM(cleanup_buf_error)(dev,entry); - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; - } - - memset( buf->dev_private, 0, buf->dev_priv_size ); - - DRM_DEBUG( "buffer %d @ %p\n", - entry->buf_count, buf->address ); - - offset += alignment; - entry->buf_count++; - byte_count += PAGE_SIZE << page_order; - } - - DRM_DEBUG( "byte_count: %d\n", byte_count ); - - temp_buflist = DRM(realloc)( dma->buflist, - dma->buf_count * sizeof(*dma->buflist), - (dma->buf_count + entry->buf_count) - * sizeof(*dma->buflist), - DRM_MEM_BUFS ); - if(!temp_buflist) { - /* Free the entry because it isn't valid */ - DRM(cleanup_buf_error)(dev,entry); - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; - } - dma->buflist = temp_buflist; - - for ( i = 0 ; i < entry->buf_count ; i++ ) { - dma->buflist[i + dma->buf_count] = &entry->buflist[i]; - } - - dma->buf_count += entry->buf_count; - dma->byte_count += byte_count; - - DRM_DEBUG( "dma->buf_count : %d\n", dma->buf_count ); - DRM_DEBUG( "entry->buf_count : %d\n", entry->buf_count ); - - up( &dev->struct_sem ); - - request.count = entry->buf_count; - request.size = size; - - if ( copy_to_user( argp, &request, sizeof(request) ) ) - return -EFAULT; - - dma->flags = _DRM_DMA_USE_SG; - - atomic_dec( &dev->buf_alloc ); - return 0; -} - - -int DRM(addbufs_fb)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_device_dma_t *dma = dev->dma; - drm_buf_desc_t request; - drm_buf_entry_t *entry; - drm_buf_t *buf; - unsigned long offset; - unsigned long agp_offset; - int count; - int order; - int size; - int alignment; - int page_order; - int total; - int byte_count; - int i; - drm_buf_t **temp_buflist; - drm_buf_desc_t __user *argp = (void __user *)arg; - - if (!drm_core_check_feature(dev, DRIVER_FB_DMA)) return -EINVAL; - - if ( !dma ) return -EINVAL; - - if ( copy_from_user( &request, argp, - sizeof(request) ) ) - return -EFAULT; - - count = request.count; - order = DRM(order)( request.size ); - size = 1 << order; - - alignment = (request.flags & _DRM_PAGE_ALIGN) - ? PAGE_ALIGN(size) : size; - page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0; - total = PAGE_SIZE << page_order; - - byte_count = 0; - agp_offset = request.agp_start; - - DRM_DEBUG( "count: %d\n", count ); - DRM_DEBUG( "order: %d\n", order ); - DRM_DEBUG( "size: %d\n", size ); - DRM_DEBUG( "agp_offset: %lu\n", agp_offset ); - DRM_DEBUG( "alignment: %d\n", alignment ); - DRM_DEBUG( "page_order: %d\n", page_order ); - DRM_DEBUG( "total: %d\n", total ); - - if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) return -EINVAL; - if ( dev->queue_count ) return -EBUSY; /* Not while in use */ - - spin_lock( &dev->count_lock ); - if ( dev->buf_use ) { - spin_unlock( &dev->count_lock ); - return -EBUSY; - } - atomic_inc( &dev->buf_alloc ); - spin_unlock( &dev->count_lock ); - - down( &dev->struct_sem ); - entry = &dma->bufs[order]; - if ( entry->buf_count ) { - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; /* May only call once for each order */ - } - - if (count < 0 || count > 4096) { - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -EINVAL; - } - - entry->buflist = DRM(alloc)( count * sizeof(*entry->buflist), - DRM_MEM_BUFS ); - if ( !entry->buflist ) { - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; - } - memset( entry->buflist, 0, count * sizeof(*entry->buflist) ); - - entry->buf_size = size; - entry->page_order = page_order; - - offset = 0; - - while ( entry->buf_count < count ) { - buf = &entry->buflist[entry->buf_count]; - buf->idx = dma->buf_count + entry->buf_count; - buf->total = alignment; - buf->order = order; - buf->used = 0; - - buf->offset = (dma->byte_count + offset); - buf->bus_address = agp_offset + offset; - buf->address = (void *)(agp_offset + offset); - buf->next = NULL; - buf->waiting = 0; - buf->pending = 0; - init_waitqueue_head( &buf->dma_wait ); - buf->filp = NULL; - - buf->dev_priv_size = dev->dev_priv_size; - buf->dev_private = DRM(alloc)( buf->dev_priv_size, - DRM_MEM_BUFS ); - if(!buf->dev_private) { - /* Set count correctly so we free the proper amount. */ - entry->buf_count = count; - DRM(cleanup_buf_error)(dev,entry); - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; - } - memset( buf->dev_private, 0, buf->dev_priv_size ); - - DRM_DEBUG( "buffer %d @ %p\n", - entry->buf_count, buf->address ); - - offset += alignment; - entry->buf_count++; - byte_count += PAGE_SIZE << page_order; - } - - DRM_DEBUG( "byte_count: %d\n", byte_count ); - - temp_buflist = DRM(realloc)( dma->buflist, - dma->buf_count * sizeof(*dma->buflist), - (dma->buf_count + entry->buf_count) - * sizeof(*dma->buflist), - DRM_MEM_BUFS ); - if(!temp_buflist) { - /* Free the entry because it isn't valid */ - DRM(cleanup_buf_error)(dev,entry); - up( &dev->struct_sem ); - atomic_dec( &dev->buf_alloc ); - return -ENOMEM; - } - dma->buflist = temp_buflist; - - for ( i = 0 ; i < entry->buf_count ; i++ ) { - dma->buflist[i + dma->buf_count] = &entry->buflist[i]; - } - - dma->buf_count += entry->buf_count; - dma->byte_count += byte_count; - - DRM_DEBUG( "dma->buf_count : %d\n", dma->buf_count ); - DRM_DEBUG( "entry->buf_count : %d\n", entry->buf_count ); - - up( &dev->struct_sem ); - - request.count = entry->buf_count; - request.size = size; - - if ( copy_to_user( argp, &request, sizeof(request) ) ) - return -EFAULT; - - dma->flags = _DRM_DMA_USE_FB; - - atomic_dec( &dev->buf_alloc ); - return 0; -} - - - -/** - * Add buffers for DMA transfers (ioctl). - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg pointer to a drm_buf_desc_t request. - * \return zero on success or a negative number on failure. - * - * According with the memory type specified in drm_buf_desc::flags and the - * build options, it dispatches the call either to addbufs_agp(), - * addbufs_sg() or addbufs_pci() for AGP, scatter-gather or consistent - * PCI memory respectively. - */ -int DRM(addbufs)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_buf_desc_t request; - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - - if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA)) - return -EINVAL; - - if ( copy_from_user( &request, (drm_buf_desc_t __user *)arg, - sizeof(request) ) ) - return -EFAULT; - -#if __OS_HAS_AGP - if ( request.flags & _DRM_AGP_BUFFER ) - return DRM(addbufs_agp)( inode, filp, cmd, arg ); - else -#endif - if ( request.flags & _DRM_SG_BUFFER ) - return DRM(addbufs_sg)( inode, filp, cmd, arg ); - else if ( request.flags & _DRM_FB_BUFFER ) - return DRM(addbufs_fb)( inode, filp, cmd, arg ); - else - return DRM(addbufs_pci)( inode, filp, cmd, arg ); -} - - -/** - * Get information about the buffer mappings. - * - * This was originally mean for debugging purposes, or by a sophisticated - * client library to determine how best to use the available buffers (e.g., - * large buffers can be used for image transfer). - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg pointer to a drm_buf_info structure. - * \return zero on success or a negative number on failure. - * - * Increments drm_device::buf_use while holding the drm_device::count_lock - * lock, preventing of allocating more buffers after this call. Information - * about each requested buffer is then copied into user space. - */ -int DRM(infobufs)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_device_dma_t *dma = dev->dma; - drm_buf_info_t request; - drm_buf_info_t __user *argp = (void __user *)arg; - int i; - int count; - - if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA)) - return -EINVAL; - - if ( !dma ) return -EINVAL; - - spin_lock( &dev->count_lock ); - if ( atomic_read( &dev->buf_alloc ) ) { - spin_unlock( &dev->count_lock ); - return -EBUSY; - } - ++dev->buf_use; /* Can't allocate more after this call */ - spin_unlock( &dev->count_lock ); - - if ( copy_from_user( &request, argp, sizeof(request) ) ) - return -EFAULT; - - for ( i = 0, count = 0 ; i < DRM_MAX_ORDER + 1 ; i++ ) { - if ( dma->bufs[i].buf_count ) ++count; - } - - DRM_DEBUG( "count = %d\n", count ); - - if ( request.count >= count ) { - for ( i = 0, count = 0 ; i < DRM_MAX_ORDER + 1 ; i++ ) { - if ( dma->bufs[i].buf_count ) { - drm_buf_desc_t __user *to = &request.list[count]; - drm_buf_entry_t *from = &dma->bufs[i]; - drm_freelist_t *list = &dma->bufs[i].freelist; - if ( copy_to_user( &to->count, - &from->buf_count, - sizeof(from->buf_count) ) || - copy_to_user( &to->size, - &from->buf_size, - sizeof(from->buf_size) ) || - copy_to_user( &to->low_mark, - &list->low_mark, - sizeof(list->low_mark) ) || - copy_to_user( &to->high_mark, - &list->high_mark, - sizeof(list->high_mark) ) ) - return -EFAULT; - - DRM_DEBUG( "%d %d %d %d %d\n", - i, - dma->bufs[i].buf_count, - dma->bufs[i].buf_size, - dma->bufs[i].freelist.low_mark, - dma->bufs[i].freelist.high_mark ); - ++count; - } - } - } - request.count = count; - - if ( copy_to_user( argp, &request, sizeof(request) ) ) - return -EFAULT; - - return 0; -} - -/** - * Specifies a low and high water mark for buffer allocation - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg a pointer to a drm_buf_desc structure. - * \return zero on success or a negative number on failure. - * - * Verifies that the size order is bounded between the admissible orders and - * updates the respective drm_device_dma::bufs entry low and high water mark. - * - * \note This ioctl is deprecated and mostly never used. - */ -int DRM(markbufs)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_device_dma_t *dma = dev->dma; - drm_buf_desc_t request; - int order; - drm_buf_entry_t *entry; - - if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA)) - return -EINVAL; - - if ( !dma ) return -EINVAL; - - if ( copy_from_user( &request, - (drm_buf_desc_t __user *)arg, - sizeof(request) ) ) - return -EFAULT; - - DRM_DEBUG( "%d, %d, %d\n", - request.size, request.low_mark, request.high_mark ); - order = DRM(order)( request.size ); - if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) return -EINVAL; - entry = &dma->bufs[order]; - - if ( request.low_mark < 0 || request.low_mark > entry->buf_count ) - return -EINVAL; - if ( request.high_mark < 0 || request.high_mark > entry->buf_count ) - return -EINVAL; - - entry->freelist.low_mark = request.low_mark; - entry->freelist.high_mark = request.high_mark; - - return 0; -} - -/** - * Unreserve the buffers in list, previously reserved using drmDMA. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg pointer to a drm_buf_free structure. - * \return zero on success or a negative number on failure. - * - * Calls free_buffer() for each used buffer. - * This function is primarily used for debugging. - */ -int DRM(freebufs)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_device_dma_t *dma = dev->dma; - drm_buf_free_t request; - int i; - int idx; - drm_buf_t *buf; - - if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA)) - return -EINVAL; - - if ( !dma ) return -EINVAL; - - if ( copy_from_user( &request, - (drm_buf_free_t __user *)arg, - sizeof(request) ) ) - return -EFAULT; - - DRM_DEBUG( "%d\n", request.count ); - for ( i = 0 ; i < request.count ; i++ ) { - if ( copy_from_user( &idx, - &request.list[i], - sizeof(idx) ) ) - return -EFAULT; - if ( idx < 0 || idx >= dma->buf_count ) { - DRM_ERROR( "Index %d (of %d max)\n", - idx, dma->buf_count - 1 ); - return -EINVAL; - } - buf = dma->buflist[idx]; - if ( buf->filp != filp ) { - DRM_ERROR( "Process %d freeing buffer not owned\n", - current->pid ); - return -EINVAL; - } - DRM(free_buffer)( dev, buf ); - } - - return 0; -} - -/** - * Maps all of the DMA buffers into client-virtual space (ioctl). - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg pointer to a drm_buf_map structure. - * \return zero on success or a negative number on failure. - * - * Maps the AGP or SG buffer region with do_mmap(), and copies information - * about each buffer into user space. The PCI buffers are already mapped on the - * addbufs_pci() call. - */ -int DRM(mapbufs)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_device_dma_t *dma = dev->dma; - drm_buf_map_t __user *argp = (void __user *)arg; - int retcode = 0; - const int zero = 0; - unsigned long virtual; - unsigned long address; - drm_buf_map_t request; - int i; - - if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA)) - return -EINVAL; - - if ( !dma ) return -EINVAL; - - spin_lock( &dev->count_lock ); - if ( atomic_read( &dev->buf_alloc ) ) { - spin_unlock( &dev->count_lock ); - return -EBUSY; - } - dev->buf_use++; /* Can't allocate more after this call */ - spin_unlock( &dev->count_lock ); - - if ( copy_from_user( &request, argp, sizeof(request) ) ) - return -EFAULT; - - if ( request.count >= dma->buf_count ) { - if ((drm_core_has_AGP(dev) && (dma->flags & _DRM_DMA_USE_AGP)) || - (drm_core_check_feature(dev, DRIVER_SG) && (dma->flags & _DRM_DMA_USE_SG)) || - (drm_core_check_feature(dev, DRIVER_FB_DMA) && (dma->flags & _DRM_DMA_USE_FB))) { - drm_map_t *map = dev->agp_buffer_map; - - if ( !map ) { - retcode = -EINVAL; - goto done; - } - -#if LINUX_VERSION_CODE <= 0x020402 - down( ¤t->mm->mmap_sem ); -#else - down_write( ¤t->mm->mmap_sem ); -#endif - virtual = do_mmap( filp, 0, map->size, - PROT_READ | PROT_WRITE, - MAP_SHARED, - (unsigned long)map->offset ); -#if LINUX_VERSION_CODE <= 0x020402 - up( ¤t->mm->mmap_sem ); -#else - up_write( ¤t->mm->mmap_sem ); -#endif - } else { -#if LINUX_VERSION_CODE <= 0x020402 - down( ¤t->mm->mmap_sem ); -#else - down_write( ¤t->mm->mmap_sem ); -#endif - virtual = do_mmap( filp, 0, dma->byte_count, - PROT_READ | PROT_WRITE, - MAP_SHARED, 0 ); -#if LINUX_VERSION_CODE <= 0x020402 - up( ¤t->mm->mmap_sem ); -#else - up_write( ¤t->mm->mmap_sem ); -#endif - } - if ( virtual > -1024UL ) { - /* Real error */ - retcode = (signed long)virtual; - goto done; - } - request.virtual = (void __user *)virtual; - - for ( i = 0 ; i < dma->buf_count ; i++ ) { - if ( copy_to_user( &request.list[i].idx, - &dma->buflist[i]->idx, - sizeof(request.list[0].idx) ) ) { - retcode = -EFAULT; - goto done; - } - if ( copy_to_user( &request.list[i].total, - &dma->buflist[i]->total, - sizeof(request.list[0].total) ) ) { - retcode = -EFAULT; - goto done; - } - if ( copy_to_user( &request.list[i].used, - &zero, - sizeof(zero) ) ) { - retcode = -EFAULT; - goto done; - } - address = virtual + dma->buflist[i]->offset; /* *** */ - if ( copy_to_user( &request.list[i].address, - &address, - sizeof(address) ) ) { - retcode = -EFAULT; - goto done; - } - } - } - done: - request.count = dma->buf_count; - DRM_DEBUG( "%d buffers, retcode = %d\n", request.count, retcode ); - - if ( copy_to_user( argp, &request, sizeof(request) ) ) - return -EFAULT; - - return retcode; -} - diff --git a/linux/drm_compat.h b/linux/drm_compat.h deleted file mode 100644 index 90eb0be11..000000000 --- a/linux/drm_compat.h +++ /dev/null @@ -1,173 +0,0 @@ -/** - * \file drm_compat.h - * Backward compatability definitions for Direct Rendering Manager - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _DRM_COMPAT_H_ -#define _DRM_COMPAT_H_ - -#ifndef minor -#define minor(x) MINOR((x)) -#endif - -#ifndef MODULE_LICENSE -#define MODULE_LICENSE(x) -#endif - -#ifndef preempt_disable -#define preempt_disable() -#define preempt_enable() -#endif - -#ifndef pte_offset_map -#define pte_offset_map pte_offset -#define pte_unmap(pte) -#endif - -#ifndef module_param -#define module_param(name, type, perm) -#endif - -#ifndef list_for_each_safe -#define list_for_each_safe(pos, n, head) \ - for (pos = (head)->next, n = pos->next; pos != (head); \ - pos = n, n = pos->next) -#endif - -#ifndef list_for_each_entry -#define list_for_each_entry(pos, head, member) \ - for (pos = list_entry((head)->next, typeof(*pos), member), \ - prefetch(pos->member.next); \ - &pos->member != (head); \ - pos = list_entry(pos->member.next, typeof(*pos), member), \ - prefetch(pos->member.next)) -#endif - -#ifndef list_for_each_entry_safe -#define list_for_each_entry_safe(pos, n, head, member) \ - for (pos = list_entry((head)->next, typeof(*pos), member), \ - n = list_entry(pos->member.next, typeof(*pos), member); \ - &pos->member != (head); \ - pos = n, n = list_entry(n->member.next, typeof(*n), member)) -#endif - -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,19) -static inline struct page * vmalloc_to_page(void * vmalloc_addr) -{ - unsigned long addr = (unsigned long) vmalloc_addr; - struct page *page = NULL; - pgd_t *pgd = pgd_offset_k(addr); - pmd_t *pmd; - pte_t *ptep, pte; - - if (!pgd_none(*pgd)) { - pmd = pmd_offset(pgd, addr); - if (!pmd_none(*pmd)) { - preempt_disable(); - ptep = pte_offset_map(pmd, addr); - pte = *ptep; - if (pte_present(pte)) - page = pte_page(pte); - pte_unmap(ptep); - preempt_enable(); - } - } - return page; -} -#endif - -#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,4,2) -#define down_write down -#define up_write up -#endif - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) -#define DRM_PCI_DEV(pdev) &pdev->dev -#else -#define DRM_PCI_DEV(pdev) NULL -#endif - -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) -static inline unsigned iminor(struct inode *inode) -{ - return MINOR(inode->i_rdev); -} - -#define old_encode_dev(x) (x) - -struct drm_sysfs_class; -struct class_simple; -struct device; - -#define pci_dev_put(x) do {} while (0) -#define pci_dev_get(x) do {} while (0) -#define pci_get_subsys pci_find_subsys - -static inline struct class_device *DRM(sysfs_device_add)(struct drm_sysfs_class *cs, dev_t dev, struct device *device, const char *fmt, ...){return NULL;} - -static inline void DRM(sysfs_device_remove)(dev_t dev){} - -static inline void DRM(sysfs_destroy)(struct drm_sysfs_class *cs){} - -static inline struct drm_sysfs_class *DRM(sysfs_create)(struct module *owner, char *name) { return NULL; } - -#ifndef pci_pretty_name -#define pci_pretty_name(x) x->name -#endif - -struct drm_device; -static inline int radeon_create_i2c_busses(struct drm_device *dev){return 0;}; -static inline void radeon_delete_i2c_busses(struct drm_device *dev){}; - -#endif - -#ifndef __user -#define __user -#endif - -#ifndef __put_page -#define __put_page(p) atomic_dec(&(p)->count) -#endif - -#ifndef REMAP_PAGE_RANGE_5_ARGS -#define DRM_RPR_ARG(vma) -#else -#define DRM_RPR_ARG(vma) vma, -#endif - -#define VM_OFFSET(vma) ((vma)->vm_pgoff << PAGE_SHIFT) - -/* old architectures */ -#ifdef __AMD64__ -#define __x86_64__ -#endif - -#endif diff --git a/linux/drm_context.h b/linux/drm_context.h deleted file mode 100644 index b99c99475..000000000 --- a/linux/drm_context.h +++ /dev/null @@ -1,578 +0,0 @@ -/** - * \file drm_context.h - * IOCTLs for generic contexts - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Created: Fri Nov 24 18:31:37 2000 by gareth@valinux.com - * - * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/* - * ChangeLog: - * 2001-11-16 Torsten Duwe <duwe@caldera.de> - * added context constructor/destructor hooks, - * needed by SiS driver's memory management. - */ - -#include "drmP.h" - -/******************************************************************/ -/** \name Context bitmap support */ -/*@{*/ - -/** - * Free a handle from the context bitmap. - * - * \param dev DRM device. - * \param ctx_handle context handle. - * - * Clears the bit specified by \p ctx_handle in drm_device::ctx_bitmap and the entry - * in drm_device::context_sareas, while holding the drm_device::struct_sem - * lock. - */ -void DRM(ctxbitmap_free)( drm_device_t *dev, int ctx_handle ) -{ - if ( ctx_handle < 0 ) goto failed; - if ( !dev->ctx_bitmap ) goto failed; - - if ( ctx_handle < DRM_MAX_CTXBITMAP ) { - down(&dev->struct_sem); - clear_bit( ctx_handle, dev->ctx_bitmap ); - dev->context_sareas[ctx_handle] = NULL; - up(&dev->struct_sem); - return; - } -failed: - DRM_ERROR( "Attempt to free invalid context handle: %d\n", - ctx_handle ); - return; -} - -/** - * Context bitmap allocation. - * - * \param dev DRM device. - * \return (non-negative) context handle on success or a negative number on failure. - * - * Find the first zero bit in drm_device::ctx_bitmap and (re)allocates - * drm_device::context_sareas to accommodate the new entry while holding the - * drm_device::struct_sem lock. - */ -int DRM(ctxbitmap_next)( drm_device_t *dev ) -{ - int bit; - - if(!dev->ctx_bitmap) return -1; - - down(&dev->struct_sem); - bit = find_first_zero_bit( dev->ctx_bitmap, DRM_MAX_CTXBITMAP ); - if ( bit < DRM_MAX_CTXBITMAP ) { - set_bit( bit, dev->ctx_bitmap ); - DRM_DEBUG( "drm_ctxbitmap_next bit : %d\n", bit ); - if((bit+1) > dev->max_context) { - dev->max_context = (bit+1); - if(dev->context_sareas) { - drm_map_t **ctx_sareas; - - ctx_sareas = DRM(realloc)(dev->context_sareas, - (dev->max_context - 1) * - sizeof(*dev->context_sareas), - dev->max_context * - sizeof(*dev->context_sareas), - DRM_MEM_MAPS); - if(!ctx_sareas) { - clear_bit(bit, dev->ctx_bitmap); - up(&dev->struct_sem); - return -1; - } - dev->context_sareas = ctx_sareas; - dev->context_sareas[bit] = NULL; - } else { - /* max_context == 1 at this point */ - dev->context_sareas = DRM(alloc)( - dev->max_context * - sizeof(*dev->context_sareas), - DRM_MEM_MAPS); - if(!dev->context_sareas) { - clear_bit(bit, dev->ctx_bitmap); - up(&dev->struct_sem); - return -1; - } - dev->context_sareas[bit] = NULL; - } - } - up(&dev->struct_sem); - return bit; - } - up(&dev->struct_sem); - return -1; -} - -/** - * Context bitmap initialization. - * - * \param dev DRM device. - * - * Allocates and initialize drm_device::ctx_bitmap and drm_device::context_sareas, while holding - * the drm_device::struct_sem lock. - */ -int DRM(ctxbitmap_init)( drm_device_t *dev ) -{ - int i; - int temp; - - down(&dev->struct_sem); - dev->ctx_bitmap = (unsigned long *) DRM(alloc)( PAGE_SIZE, - DRM_MEM_CTXBITMAP ); - if ( dev->ctx_bitmap == NULL ) { - up(&dev->struct_sem); - return -ENOMEM; - } - memset( (void *)dev->ctx_bitmap, 0, PAGE_SIZE ); - dev->context_sareas = NULL; - dev->max_context = -1; - up(&dev->struct_sem); - - for ( i = 0 ; i < DRM_RESERVED_CONTEXTS ; i++ ) { - temp = DRM(ctxbitmap_next)( dev ); - DRM_DEBUG( "drm_ctxbitmap_init : %d\n", temp ); - } - - return 0; -} - -/** - * Context bitmap cleanup. - * - * \param dev DRM device. - * - * Frees drm_device::ctx_bitmap and drm_device::context_sareas, while holding - * the drm_device::struct_sem lock. - */ -void DRM(ctxbitmap_cleanup)( drm_device_t *dev ) -{ - down(&dev->struct_sem); - if( dev->context_sareas ) DRM(free)( dev->context_sareas, - sizeof(*dev->context_sareas) * - dev->max_context, - DRM_MEM_MAPS ); - DRM(free)( (void *)dev->ctx_bitmap, PAGE_SIZE, DRM_MEM_CTXBITMAP ); - up(&dev->struct_sem); -} - -/*@}*/ - -/******************************************************************/ -/** \name Per Context SAREA Support */ -/*@{*/ - -/** - * Get per-context SAREA. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument pointing to a drm_ctx_priv_map structure. - * \return zero on success or a negative number on failure. - * - * Gets the map from drm_device::context_sareas with the handle specified and - * returns its handle. - */ -int DRM(getsareactx)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_ctx_priv_map_t __user *argp = (void __user *)arg; - drm_ctx_priv_map_t request; - drm_map_t *map; - - if (copy_from_user(&request, argp, sizeof(request))) - return -EFAULT; - - down(&dev->struct_sem); - if (dev->max_context < 0 || request.ctx_id >= (unsigned) dev->max_context) { - up(&dev->struct_sem); - return -EINVAL; - } - - map = dev->context_sareas[request.ctx_id]; - up(&dev->struct_sem); - - request.handle = map->handle; - if (copy_to_user(argp, &request, sizeof(request))) - return -EFAULT; - return 0; -} - -/** - * Set per-context SAREA. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument pointing to a drm_ctx_priv_map structure. - * \return zero on success or a negative number on failure. - * - * Searches the mapping specified in \p arg and update the entry in - * drm_device::context_sareas with it. - */ -int DRM(setsareactx)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_ctx_priv_map_t request; - drm_map_t *map = NULL; - drm_map_list_t *r_list = NULL; - struct list_head *list; - - if (copy_from_user(&request, - (drm_ctx_priv_map_t __user *)arg, - sizeof(request))) - return -EFAULT; - - down(&dev->struct_sem); - list_for_each(list, &dev->maplist->head) { - r_list = list_entry(list, drm_map_list_t, head); - if(r_list->map && - r_list->map->handle == request.handle) - goto found; - } -bad: - up(&dev->struct_sem); - return -EINVAL; - -found: - map = r_list->map; - if (!map) goto bad; - if (dev->max_context < 0) - goto bad; - if (request.ctx_id >= (unsigned) dev->max_context) - goto bad; - dev->context_sareas[request.ctx_id] = map; - up(&dev->struct_sem); - return 0; -} - -/*@}*/ - -/******************************************************************/ -/** \name The actual DRM context handling routines */ -/*@{*/ - -/** - * Switch context. - * - * \param dev DRM device. - * \param old old context handle. - * \param new new context handle. - * \return zero on success or a negative number on failure. - * - * Attempt to set drm_device::context_flag. - */ -int DRM(context_switch)( drm_device_t *dev, int old, int new ) -{ - if ( test_and_set_bit( 0, &dev->context_flag ) ) { - DRM_ERROR( "Reentering -- FIXME\n" ); - return -EBUSY; - } - - - DRM_DEBUG( "Context switch from %d to %d\n", old, new ); - - if ( new == dev->last_context ) { - clear_bit( 0, &dev->context_flag ); - return 0; - } - - return 0; -} - -/** - * Complete context switch. - * - * \param dev DRM device. - * \param new new context handle. - * \return zero on success or a negative number on failure. - * - * Updates drm_device::last_context and drm_device::last_switch. Verifies the - * hardware lock is held, clears the drm_device::context_flag and wakes up - * drm_device::context_wait. - */ -int DRM(context_switch_complete)( drm_device_t *dev, int new ) -{ - dev->last_context = new; /* PRE/POST: This is the _only_ writer. */ - dev->last_switch = jiffies; - - if ( !_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) ) { - DRM_ERROR( "Lock isn't held after context switch\n" ); - } - - /* If a context switch is ever initiated - when the kernel holds the lock, release - that lock here. */ - clear_bit( 0, &dev->context_flag ); - wake_up( &dev->context_wait ); - - return 0; -} - -/** - * Reserve contexts. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument pointing to a drm_ctx_res structure. - * \return zero on success or a negative number on failure. - */ -int DRM(resctx)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_ctx_res_t res; - drm_ctx_t __user *argp = (void __user *)arg; - drm_ctx_t ctx; - int i; - - if ( copy_from_user( &res, argp, sizeof(res) ) ) - return -EFAULT; - - if ( res.count >= DRM_RESERVED_CONTEXTS ) { - memset( &ctx, 0, sizeof(ctx) ); - for ( i = 0 ; i < DRM_RESERVED_CONTEXTS ; i++ ) { - ctx.handle = i; - if ( copy_to_user( &res.contexts[i], - &i, sizeof(i) ) ) - return -EFAULT; - } - } - res.count = DRM_RESERVED_CONTEXTS; - - if ( copy_to_user( argp, &res, sizeof(res) ) ) - return -EFAULT; - return 0; -} - -/** - * Add context. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument pointing to a drm_ctx structure. - * \return zero on success or a negative number on failure. - * - * Get a new handle for the context and copy to userspace. - */ -int DRM(addctx)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_ctx_list_t * ctx_entry; - drm_ctx_t __user *argp = (void __user *)arg; - drm_ctx_t ctx; - - if ( copy_from_user( &ctx, argp, sizeof(ctx) ) ) - return -EFAULT; - - ctx.handle = DRM(ctxbitmap_next)( dev ); - if ( ctx.handle == DRM_KERNEL_CONTEXT ) { - /* Skip kernel's context and get a new one. */ - ctx.handle = DRM(ctxbitmap_next)( dev ); - } - DRM_DEBUG( "%d\n", ctx.handle ); - if ( ctx.handle == -1 ) { - DRM_DEBUG( "Not enough free contexts.\n" ); - /* Should this return -EBUSY instead? */ - return -ENOMEM; - } - - if ( ctx.handle != DRM_KERNEL_CONTEXT ) - { - if (dev->fn_tbl.context_ctor) - dev->fn_tbl.context_ctor(dev, ctx.handle); - } - - ctx_entry = DRM(alloc)( sizeof(*ctx_entry), DRM_MEM_CTXLIST ); - if ( !ctx_entry ) { - DRM_DEBUG("out of memory\n"); - return -ENOMEM; - } - - INIT_LIST_HEAD( &ctx_entry->head ); - ctx_entry->handle = ctx.handle; - ctx_entry->tag = priv; - - down( &dev->ctxlist_sem ); - list_add( &ctx_entry->head, &dev->ctxlist->head ); - ++dev->ctx_count; - up( &dev->ctxlist_sem ); - - if ( copy_to_user( argp, &ctx, sizeof(ctx) ) ) - return -EFAULT; - return 0; -} - -int DRM(modctx)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - /* This does nothing */ - return 0; -} - -/** - * Get context. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument pointing to a drm_ctx structure. - * \return zero on success or a negative number on failure. - */ -int DRM(getctx)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_ctx_t __user *argp = (void __user *)arg; - drm_ctx_t ctx; - - if ( copy_from_user( &ctx, argp, sizeof(ctx) ) ) - return -EFAULT; - - /* This is 0, because we don't handle any context flags */ - ctx.flags = 0; - - if ( copy_to_user( argp, &ctx, sizeof(ctx) ) ) - return -EFAULT; - return 0; -} - -/** - * Switch context. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument pointing to a drm_ctx structure. - * \return zero on success or a negative number on failure. - * - * Calls context_switch(). - */ -int DRM(switchctx)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_ctx_t ctx; - - if ( copy_from_user( &ctx, (drm_ctx_t __user *)arg, sizeof(ctx) ) ) - return -EFAULT; - - DRM_DEBUG( "%d\n", ctx.handle ); - return DRM(context_switch)( dev, dev->last_context, ctx.handle ); -} - -/** - * New context. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument pointing to a drm_ctx structure. - * \return zero on success or a negative number on failure. - * - * Calls context_switch_complete(). - */ -int DRM(newctx)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_ctx_t ctx; - - if ( copy_from_user( &ctx, (drm_ctx_t __user *)arg, sizeof(ctx) ) ) - return -EFAULT; - - DRM_DEBUG( "%d\n", ctx.handle ); - DRM(context_switch_complete)( dev, ctx.handle ); - - return 0; -} - -/** - * Remove context. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument pointing to a drm_ctx structure. - * \return zero on success or a negative number on failure. - * - * If not the special kernel context, calls ctxbitmap_free() to free the specified context. - */ -int DRM(rmctx)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_ctx_t ctx; - - if ( copy_from_user( &ctx, (drm_ctx_t __user *)arg, sizeof(ctx) ) ) - return -EFAULT; - - DRM_DEBUG( "%d\n", ctx.handle ); - if ( ctx.handle == DRM_KERNEL_CONTEXT + 1 ) { - priv->remove_auth_on_close = 1; - } - if ( ctx.handle != DRM_KERNEL_CONTEXT ) { - if (dev->fn_tbl.context_dtor) - dev->fn_tbl.context_dtor(dev, ctx.handle); - DRM(ctxbitmap_free)( dev, ctx.handle ); - } - - down( &dev->ctxlist_sem ); - if ( !list_empty( &dev->ctxlist->head ) ) { - drm_ctx_list_t *pos, *n; - - list_for_each_entry_safe( pos, n, &dev->ctxlist->head, head ) { - if ( pos->handle == ctx.handle ) { - list_del( &pos->head ); - DRM(free)( pos, sizeof(*pos), DRM_MEM_CTXLIST ); - --dev->ctx_count; - } - } - } - up( &dev->ctxlist_sem ); - - return 0; -} - -/*@}*/ - diff --git a/linux/drm_core.h b/linux/drm_core.h deleted file mode 100644 index adaf581b1..000000000 --- a/linux/drm_core.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright 2004 Jon Smirl <jonsmirl@gmail.com> - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include "drm_auth.h" -#include "drm_agpsupport.h" -#include "drm_bufs.h" -#include "drm_context.h" -#include "drm_dma.h" -#include "drm_irq.h" -#include "drm_drawable.h" -#include "drm_drv.h" -#include "drm_fops.h" -#include "drm_init.h" -#include "drm_ioctl.h" -#include "drm_lock.h" -#include "drm_memory.h" -#include "drm_pci.h" -#include "drm_proc.h" -#include "drm_vm.h" -#include "drm_stub.h" -#include "drm_scatter.h" diff --git a/linux/drm_dma.h b/linux/drm_dma.h deleted file mode 100644 index dbf38dbf9..000000000 --- a/linux/drm_dma.h +++ /dev/null @@ -1,179 +0,0 @@ -/** - * \file drm_dma.h - * DMA IOCTL and function support - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Created: Fri Mar 19 14:30:16 1999 by faith@valinux.com - * - * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include "drmP.h" - -/** - * Initialize the DMA data. - * - * \param dev DRM device. - * \return zero on success or a negative value on failure. - * - * Allocate and initialize a drm_device_dma structure. - */ -int DRM(dma_setup)( drm_device_t *dev ) -{ - int i; - - dev->dma = DRM(alloc)( sizeof(*dev->dma), DRM_MEM_DRIVER ); - if ( !dev->dma ) - return -ENOMEM; - - memset( dev->dma, 0, sizeof(*dev->dma) ); - - for ( i = 0 ; i <= DRM_MAX_ORDER ; i++ ) - memset(&dev->dma->bufs[i], 0, sizeof(dev->dma->bufs[0])); - - return 0; -} - -/** - * Cleanup the DMA resources. - * - * \param dev DRM device. - * - * Free all pages associated with DMA buffers, the buffers and pages lists, and - * finally the the drm_device::dma structure itself. - */ -void DRM(dma_takedown)(drm_device_t *dev) -{ - drm_device_dma_t *dma = dev->dma; - int i, j; - - if (!dma) return; - - /* Clear dma buffers */ - for (i = 0; i <= DRM_MAX_ORDER; i++) { - if (dma->bufs[i].seg_count) { - DRM_DEBUG("order %d: buf_count = %d," - " seg_count = %d\n", - i, - dma->bufs[i].buf_count, - dma->bufs[i].seg_count); - for (j = 0; j < dma->bufs[i].seg_count; j++) { - if (dma->bufs[i].seglist[j]) { - DRM(free_pages)(dma->bufs[i].seglist[j], - dma->bufs[i].page_order, - DRM_MEM_DMA); - } - } - DRM(free)(dma->bufs[i].seglist, - dma->bufs[i].seg_count - * sizeof(*dma->bufs[0].seglist), - DRM_MEM_SEGS); - } - if (dma->bufs[i].buf_count) { - for (j = 0; j < dma->bufs[i].buf_count; j++) { - if (dma->bufs[i].buflist[j].dev_private) { - DRM(free)(dma->bufs[i].buflist[j].dev_private, - dma->bufs[i].buflist[j].dev_priv_size, - DRM_MEM_BUFS); - } - } - DRM(free)(dma->bufs[i].buflist, - dma->bufs[i].buf_count * - sizeof(*dma->bufs[0].buflist), - DRM_MEM_BUFS); - } - } - - if (dma->buflist) { - DRM(free)(dma->buflist, - dma->buf_count * sizeof(*dma->buflist), - DRM_MEM_BUFS); - } - - if (dma->pagelist) { - DRM(free)(dma->pagelist, - dma->page_count * sizeof(*dma->pagelist), - DRM_MEM_PAGES); - } - DRM(free)(dev->dma, sizeof(*dev->dma), DRM_MEM_DRIVER); - dev->dma = NULL; -} - - -/** - * Free a buffer. - * - * \param dev DRM device. - * \param buf buffer to free. - * - * Resets the fields of \p buf. - */ -void DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf) -{ - if (!buf) return; - - buf->waiting = 0; - buf->pending = 0; - buf->filp = NULL; - buf->used = 0; - - if (drm_core_check_feature(dev, DRIVER_DMA_QUEUE) && waitqueue_active(&buf->dma_wait)) { - wake_up_interruptible(&buf->dma_wait); - } -} - -/** - * Reclaim the buffers. - * - * \param filp file pointer. - * - * Frees each buffer associated with \p filp not already on the hardware. - */ -void DRM(core_reclaim_buffers)( drm_device_t *dev, struct file *filp ) -{ - drm_device_dma_t *dma = dev->dma; - int i; - - if (!dma) return; - for (i = 0; i < dma->buf_count; i++) { - if (dma->buflist[i]->filp == filp) { - switch (dma->buflist[i]->list) { - case DRM_LIST_NONE: - DRM(free_buffer)(dev, dma->buflist[i]); - break; - case DRM_LIST_WAIT: - dma->buflist[i]->list = DRM_LIST_RECLAIM; - break; - default: - /* Buffer already on hardware. */ - break; - } - } - } -} - diff --git a/linux/drm_drawable.h b/linux/drm_drawable.h deleted file mode 100644 index 5f1562b6a..000000000 --- a/linux/drm_drawable.h +++ /dev/null @@ -1,56 +0,0 @@ -/** - * \file drm_drawable.h - * IOCTLs for drawables - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Created: Tue Feb 2 08:37:54 1999 by faith@valinux.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include "drmP.h" - -/** No-op. */ -int DRM(adddraw)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_draw_t draw; - - draw.handle = 0; /* NOOP */ - DRM_DEBUG("%d\n", draw.handle); - if (copy_to_user((drm_draw_t __user *)arg, &draw, sizeof(draw))) - return -EFAULT; - return 0; -} - -/** No-op. */ -int DRM(rmdraw)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - return 0; /* NOOP */ -} diff --git a/linux/drm_drv.h b/linux/drm_drv.h deleted file mode 100644 index 7bb87726c..000000000 --- a/linux/drm_drv.h +++ /dev/null @@ -1,1127 +0,0 @@ -/** - * \file drm_drv.h - * Generic driver template - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - * - * To use this template, you must at least define the following (samples - * given for the MGA driver): - * - * \code - * #define DRIVER_AUTHOR "VA Linux Systems, Inc." - * - * #define DRIVER_NAME "mga" - * #define DRIVER_DESC "Matrox G200/G400" - * #define DRIVER_DATE "20001127" - * - * #define DRIVER_MAJOR 2 - * #define DRIVER_MINOR 0 - * #define DRIVER_PATCHLEVEL 2 - * - * #define DRIVER_IOCTL_COUNT DRM_ARRAY_SIZE( mga_ioctls ) - * - * #define DRM(x) mga_##x - * \endcode - */ - -/* - * Created: Thu Nov 23 03:10:50 2000 by gareth@valinux.com - * - * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef DRIVER_IOCTLS -#define DRIVER_IOCTLS -#endif - -static void __exit drm_cleanup( drm_device_t *dev ); - -#ifndef MODULE -/** Use an additional macro to avoid preprocessor troubles */ -#define DRM_OPTIONS_FUNC DRM(options) -/** - * Called by the kernel to parse command-line options passed via the - * boot-loader (e.g., LILO). It calls the insmod option routine, - * parse_options(). - */ -static int __init DRM(options)( char *str ) -{ - DRM(parse_options)( str ); - return 1; -} - -__setup( DRIVER_NAME "=", DRM_OPTIONS_FUNC ); -#undef DRM_OPTIONS_FUNC -#endif - -int DRM(fb_loaded) = 0; - -struct file_operations DRM(fops) = { - .owner = THIS_MODULE, - .open = DRM(open), - .flush = DRM(flush), - .release = DRM(release), - .ioctl = DRM(ioctl), - .mmap = DRM(mmap), - .fasync = DRM(fasync), - .poll = DRM(poll), - .read = DRM(read), -}; - -/** Ioctl table */ -drm_ioctl_desc_t DRM(ioctls)[] = { - [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { DRM(version), 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { DRM(getunique), 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { DRM(getmagic), 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { DRM(irq_by_busid), 0, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_GET_MAP)] = { DRM(getmap), 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_GET_CLIENT)] = { DRM(getclient), 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_GET_STATS)] = { DRM(getstats), 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_SET_VERSION)] = { DRM(setversion), 0, 1 }, - - [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { DRM(setunique), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { DRM(noop), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { DRM(noop), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { DRM(authmagic), 1, 1 }, - - [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { DRM(addmap), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_RM_MAP)] = { DRM(rmmap), 1, 0 }, - - [DRM_IOCTL_NR(DRM_IOCTL_SET_SAREA_CTX)] = { DRM(setsareactx), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_GET_SAREA_CTX)] = { DRM(getsareactx), 1, 0 }, - - [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { DRM(addctx), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { DRM(rmctx), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { DRM(modctx), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { DRM(getctx), 1, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { DRM(switchctx), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { DRM(newctx), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { DRM(resctx), 1, 0 }, - - [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { DRM(adddraw), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { DRM(rmdraw), 1, 1 }, - - [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { DRM(lock), 1, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { DRM(unlock), 1, 0 }, - - [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { DRM(noop), 1, 0 }, - - [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { DRM(addbufs), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { DRM(markbufs), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { DRM(infobufs), 1, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { DRM(mapbufs), 1, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { DRM(freebufs), 1, 0 }, - /* The DRM_IOCTL_DMA ioctl should be defined by the driver. */ - - [DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { DRM(control), 1, 1 }, - -#if __OS_HAS_AGP - [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { DRM(agp_acquire), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { DRM(agp_release), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { DRM(agp_enable), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { DRM(agp_info), 1, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { DRM(agp_alloc), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { DRM(agp_free), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { DRM(agp_bind), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { DRM(agp_unbind), 1, 1 }, -#endif - - [DRM_IOCTL_NR(DRM_IOCTL_SG_ALLOC)] = { DRM(sg_alloc), 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_SG_FREE)] = { DRM(sg_free), 1, 1 }, - - [DRM_IOCTL_NR(DRM_IOCTL_WAIT_VBLANK)] = { DRM(wait_vblank), 0, 0 }, - - DRIVER_IOCTLS -}; - -#define DRIVER_IOCTL_COUNT DRM_ARRAY_SIZE( DRM(ioctls) ) - -static int DRM(setup)( drm_device_t *dev ) -{ - int i; - - if (dev->fn_tbl.presetup) - dev->fn_tbl.presetup(dev); - - atomic_set( &dev->ioctl_count, 0 ); - atomic_set( &dev->vma_count, 0 ); - dev->buf_use = 0; - atomic_set( &dev->buf_alloc, 0 ); - - if (drm_core_check_feature(dev, DRIVER_HAVE_DMA)) - { - i = DRM(dma_setup)( dev ); - if ( i < 0 ) - return i; - } - - for ( i = 0 ; i < DRM_ARRAY_SIZE(dev->counts) ; i++ ) - atomic_set( &dev->counts[i], 0 ); - - for ( i = 0 ; i < DRM_HASH_SIZE ; i++ ) { - dev->magiclist[i].head = NULL; - dev->magiclist[i].tail = NULL; - } - - dev->ctxlist = DRM(alloc)(sizeof(*dev->ctxlist), - DRM_MEM_CTXLIST); - if(dev->ctxlist == NULL) return -ENOMEM; - memset(dev->ctxlist, 0, sizeof(*dev->ctxlist)); - INIT_LIST_HEAD(&dev->ctxlist->head); - - dev->vmalist = NULL; - dev->sigdata.lock = dev->lock.hw_lock = NULL; - init_waitqueue_head( &dev->lock.lock_queue ); - dev->queue_count = 0; - dev->queue_reserved = 0; - dev->queue_slots = 0; - dev->queuelist = NULL; - dev->irq_enabled = 0; - dev->context_flag = 0; - dev->interrupt_flag = 0; - dev->dma_flag = 0; - dev->last_context = 0; - dev->last_switch = 0; - dev->last_checked = 0; - init_waitqueue_head( &dev->context_wait ); - dev->if_version = 0; - - dev->ctx_start = 0; - dev->lck_start = 0; - - dev->buf_rp = dev->buf; - dev->buf_wp = dev->buf; - dev->buf_end = dev->buf + DRM_BSZ; - dev->buf_async = NULL; - init_waitqueue_head( &dev->buf_readers ); - init_waitqueue_head( &dev->buf_writers ); - - DRM_DEBUG( "\n" ); - - /* - * The kernel's context could be created here, but is now created - * in drm_dma_enqueue. This is more resource-efficient for - * hardware that does not do DMA, but may mean that - * drm_select_queue fails between the time the interrupt is - * initialized and the time the queues are initialized. - */ - if (dev->fn_tbl.postsetup) - dev->fn_tbl.postsetup(dev); - - return 0; -} - - -/** - * Take down the DRM device. - * - * \param dev DRM device structure. - * - * Frees every resource in \p dev. - * - * \sa drm_device and setup(). - */ -static int DRM(takedown)( drm_device_t *dev ) -{ - drm_magic_entry_t *pt, *next; - drm_map_t *map; - drm_map_list_t *r_list; - struct list_head *list, *list_next; - drm_vma_entry_t *vma, *vma_next; - int i; - - DRM_DEBUG( "\n" ); - - if (dev->fn_tbl.pretakedown) - dev->fn_tbl.pretakedown(dev); - - if ( dev->irq_enabled ) DRM(irq_uninstall)( dev ); - - down( &dev->struct_sem ); - del_timer( &dev->timer ); - - if ( dev->devname ) { - DRM(free)( dev->devname, strlen( dev->devname ) + 1, - DRM_MEM_DRIVER ); - dev->devname = NULL; - } - - if ( dev->unique ) { - DRM(free)( dev->unique, strlen( dev->unique ) + 1, - DRM_MEM_DRIVER ); - dev->unique = NULL; - dev->unique_len = 0; - } - /* Clear pid list */ - for ( i = 0 ; i < DRM_HASH_SIZE ; i++ ) { - for ( pt = dev->magiclist[i].head ; pt ; pt = next ) { - next = pt->next; - DRM(free)( pt, sizeof(*pt), DRM_MEM_MAGIC ); - } - dev->magiclist[i].head = dev->magiclist[i].tail = NULL; - } - - /* Clear AGP information */ - if (drm_core_has_AGP(dev) && dev->agp) { - drm_agp_mem_t *entry; - drm_agp_mem_t *nexte; - - /* Remove AGP resources, but leave dev->agp - intact until drv_cleanup is called. */ - for ( entry = dev->agp->memory ; entry ; entry = nexte ) { - nexte = entry->next; - if ( entry->bound ) DRM(unbind_agp)( entry->memory ); - DRM(free_agp)( entry->memory, entry->pages ); - DRM(free)( entry, sizeof(*entry), DRM_MEM_AGPLISTS ); - } - dev->agp->memory = NULL; - - if ( dev->agp->acquired ) DRM(agp_do_release)(); - - dev->agp->acquired = 0; - dev->agp->enabled = 0; - } - - /* Clear vma list (only built for debugging) */ - if ( dev->vmalist ) { - for ( vma = dev->vmalist ; vma ; vma = vma_next ) { - vma_next = vma->next; - DRM(free)( vma, sizeof(*vma), DRM_MEM_VMAS ); - } - dev->vmalist = NULL; - } - - if( dev->maplist ) { - list_for_each_safe( list, list_next, &dev->maplist->head ) { - r_list = (drm_map_list_t *)list; - - if ( ( map = r_list->map ) ) { - switch ( map->type ) { - case _DRM_REGISTERS: - case _DRM_FRAME_BUFFER: - continue; - - case _DRM_SHM: - vfree(map->handle); - break; - - case _DRM_AGP: - /* Do nothing here, because this is all - * handled in the AGP/GART driver. - */ - break; - case _DRM_SCATTER_GATHER: - /* Handle it */ - if (drm_core_check_feature(dev, DRIVER_SG) && dev->sg) { - DRM(sg_cleanup)(dev->sg); - dev->sg = NULL; - } - break; - } - DRM(free)(map, sizeof(*map), DRM_MEM_MAPS); - } - list_del( list ); - DRM(free)(r_list, sizeof(*r_list), DRM_MEM_MAPS); - } - } - - - if (drm_core_check_feature(dev, DRIVER_DMA_QUEUE) && dev->queuelist) { - for ( i = 0 ; i < dev->queue_count ; i++ ) { - - if ( dev->queuelist[i] ) { - DRM(free)( dev->queuelist[i], - sizeof(*dev->queuelist[0]), - DRM_MEM_QUEUES ); - dev->queuelist[i] = NULL; - } - } - DRM(free)( dev->queuelist, - dev->queue_slots * sizeof(*dev->queuelist), - DRM_MEM_QUEUES ); - dev->queuelist = NULL; - } - dev->queue_count = 0; - - if (drm_core_check_feature(dev, DRIVER_HAVE_DMA)) - DRM(dma_takedown)( dev ); - - if ( dev->lock.hw_lock ) { - dev->sigdata.lock = dev->lock.hw_lock = NULL; /* SHM removed */ - dev->lock.filp = NULL; - wake_up_interruptible( &dev->lock.lock_queue ); - } - up( &dev->struct_sem ); - - return 0; -} - -static void DRM(init_fn_table)(struct drm_device *dev) -{ - dev->fn_tbl.reclaim_buffers = DRM(core_reclaim_buffers); - dev->fn_tbl.get_map_ofs = DRM(core_get_map_ofs); - dev->fn_tbl.get_reg_ofs = DRM(core_get_reg_ofs); -} - -#include "drm_pciids.h" - -static struct pci_device_id DRM(pciidlist)[] = { - DRM(PCI_IDS) -}; - -int DRM(fill_in_dev)(drm_device_t *dev, struct pci_dev *pdev, const struct pci_device_id *ent) -{ - int retcode; - - spin_lock_init(&dev->count_lock); - init_timer( &dev->timer ); - sema_init( &dev->struct_sem, 1 ); - sema_init( &dev->ctxlist_sem, 1 ); - - dev->name = DRIVER_NAME; - dev->fops = &DRM(fops); - dev->pdev = pdev; - -#ifdef __alpha__ - dev->hose = pdev->sysdata; - dev->pci_domain = dev->hose->bus->number; -#else - dev->pci_domain = 0; -#endif - dev->pci_bus = pdev->bus->number; - dev->pci_slot = PCI_SLOT(pdev->devfn); - dev->pci_func = PCI_FUNC(pdev->devfn); - dev->irq = pdev->irq; - - dev->maplist = DRM(calloc)(1, sizeof(*dev->maplist), DRM_MEM_MAPS); - if(dev->maplist == NULL) return -ENOMEM; - INIT_LIST_HEAD(&dev->maplist->head); - - /* dev_priv_size can be changed by a driver in driver_register_fns */ - dev->dev_priv_size = sizeof(u32); - - /* the DRM has 6 counters */ - dev->counters = 6; - dev->types[0] = _DRM_STAT_LOCK; - dev->types[1] = _DRM_STAT_OPENS; - dev->types[2] = _DRM_STAT_CLOSES; - dev->types[3] = _DRM_STAT_IOCTLS; - dev->types[4] = _DRM_STAT_LOCKS; - dev->types[5] = _DRM_STAT_UNLOCKS; - - DRM(init_fn_table)(dev); - - DRM(driver_register_fns)(dev); - - if (dev->fn_tbl.preinit) - if ((retcode = dev->fn_tbl.preinit(dev, ent->driver_data))) - goto error_out_unreg; - - if (drm_core_has_AGP(dev)) { - dev->agp = DRM(agp_init)(); - if (drm_core_check_feature(dev, DRIVER_REQUIRE_AGP) && (dev->agp == NULL)) { - DRM_ERROR( "Cannot initialize the agpgart module.\n" ); - retcode = -EINVAL; - goto error_out_unreg; - } - - - if (drm_core_has_MTRR(dev)) { - if (dev->agp) - dev->agp->agp_mtrr = mtrr_add( dev->agp->agp_info.aper_base, - dev->agp->agp_info.aper_size*1024*1024, - MTRR_TYPE_WRCOMB, - 1 ); - } - } - - retcode = DRM(ctxbitmap_init)( dev ); - if( retcode ) { - DRM_ERROR( "Cannot allocate memory for context bitmap.\n" ); - goto error_out_unreg; - } - - dev->device = MKDEV(DRM_MAJOR, dev->minor ); - - DRM_INFO( "Initialized %s %d.%d.%d %s on minor %d: %s\n", - DRIVER_NAME, - DRIVER_MAJOR, - DRIVER_MINOR, - DRIVER_PATCHLEVEL, - DRIVER_DATE, - dev->minor, - pci_pretty_name(pdev) - ); - - /* drivers add secondary heads here if needed */ - if (dev->fn_tbl.postinit) - if ((retcode = dev->fn_tbl.postinit(dev, ent->driver_data))) - goto error_out_unreg; - - return 0; - - error_out_unreg: - DRM(takedown)(dev); - return retcode; -} - -static void __exit drm_cleanup_pci(struct pci_dev *pdev) -{ - drm_device_t *dev = pci_get_drvdata(pdev); - - pci_set_drvdata(pdev, NULL); - pci_release_regions(pdev); - if (dev) - drm_cleanup(dev); -} - -static struct pci_driver drm_driver = { - .name = DRIVER_NAME, - .id_table = DRM(pciidlist), - .probe = DRM(probe), - .remove = __devexit_p(drm_cleanup_pci), -}; - -#ifdef MODULE -static char *drm_opts = NULL; -#endif -MODULE_PARM( drm_opts, "s" ); - -/** - * Module initialization. Called via init_module at module load time, or via - * linux/init/main.c (this is not currently supported). - * - * \return zero on success or a negative number on failure. - * - * Initializes an array of drm_device structures, and attempts to - * initialize all available devices, using consecutive minors, registering the - * stubs and initializing the AGP device. - * - * Expands the \c DRIVER_PREINIT and \c DRIVER_POST_INIT macros before and - * after the initialization for driver customization. - */ -static int __init drm_init( void ) -{ - struct pci_dev *pdev; - struct pci_device_id *pid; - int i; - - DRM_DEBUG( "\n" ); - -#ifdef MODULE - DRM(parse_options)( drm_opts ); -#endif - - DRM(mem_init)(); - - for (i=0; (DRM(pciidlist)[i].vendor != 0) && !DRM(fb_loaded); i++) { - pid = &DRM(pciidlist[i]); - - pdev = NULL; - /* pass back in pdev to account for multiple identical cards */ - while ((pdev = pci_get_subsys(pid->vendor, pid->device, pid->subvendor, pid->subdevice, pdev))) { - /* is there already a driver loaded, or (short circuit saves work) */ - /* does something like VesaFB have control of the memory region? */ - if (pci_dev_driver(pdev) || pci_request_regions(pdev, "DRM scan")) { - /* go into stealth mode */ - DRM(fb_loaded) = 1; - pci_dev_put(pdev); - break; - } - /* no fbdev or vesadev, put things back and wait for normal probe */ - pci_release_regions(pdev); - } - } - - if (DRM(fb_loaded) == 0) - pci_register_driver(&drm_driver); - else { - for (i=0; DRM(pciidlist)[i].vendor != 0; i++) { - pid = &DRM(pciidlist[i]); - - pdev = NULL; - /* pass back in pdev to account for multiple identical cards */ - while ((pdev = pci_get_subsys(pid->vendor, pid->device, pid->subvendor, pid->subdevice, pdev))) { - /* stealth mode requires a manual probe */ - pci_dev_get(pdev); - DRM(probe)(pdev, &DRM(pciidlist[i])); - } - } - DRM_INFO("Used old pci detect: framebuffer loaded\n"); - } - return 0; -} - -/** - * Called via cleanup_module() at module unload time. - * - * Cleans up all DRM device, calling takedown(). - * - * \sa drm_init(). - */ -static void __exit drm_cleanup( drm_device_t *dev ) -{ - drm_map_t *map; - drm_map_list_t *r_list; - struct list_head *list, *list_next; - - DRM_DEBUG( "\n" ); - if (!dev) { - DRM_ERROR("cleanup called no dev\n"); - return; - } - - DRM(takedown)(dev); - - if( dev->maplist ) { - list_for_each_safe( list, list_next, &dev->maplist->head ) { - r_list = (drm_map_list_t *)list; - - if ( ( map = r_list->map ) ) { - switch ( map->type ) { - case _DRM_REGISTERS: - DRM(ioremapfree)( map->handle, map->size, dev ); - break; - - case _DRM_FRAME_BUFFER: - if ( drm_core_has_MTRR(dev)) { - if ( map->mtrr >= 0 ) { - int retcode; - retcode = mtrr_del( map->mtrr, - map->offset, - map->size ); - DRM_DEBUG( "mtrr_del=%d\n", retcode ); - } - } - break; - - case _DRM_SHM: - case _DRM_AGP: - case _DRM_SCATTER_GATHER: - DRM_DEBUG("Extra maplist item\n"); - break; - } - DRM(free)(map, sizeof(*map), DRM_MEM_MAPS); - } - list_del( list ); - DRM(free)(r_list, sizeof(*r_list), DRM_MEM_MAPS); - } - DRM(free)(dev->maplist, sizeof(*dev->maplist), DRM_MEM_MAPS); - dev->maplist = NULL; - } - if (DRM(fb_loaded)==0) - pci_disable_device(dev->pdev); - - DRM(ctxbitmap_cleanup)( dev ); - - if (drm_core_has_MTRR(dev) && drm_core_has_AGP(dev) && dev->agp && dev->agp->agp_mtrr >= 0) { - int retval; - retval = mtrr_del( dev->agp->agp_mtrr, - dev->agp->agp_info.aper_base, - dev->agp->agp_info.aper_size*1024*1024 ); - DRM_DEBUG( "mtrr_del=%d\n", retval ); - } - - if (drm_core_has_AGP(dev) && dev->agp ) { - DRM(agp_uninit)(); - DRM(free)( dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS ); - dev->agp = NULL; - } - if (dev->fn_tbl.postcleanup) - dev->fn_tbl.postcleanup(dev); - - if ( DRM(put_minor)(dev) ) - DRM_ERROR( "Cannot unload module\n" ); -} - -static void __exit drm_exit (void) -{ - int i; - drm_device_t *dev; - drm_minor_t *minor; - - DRM_DEBUG( "\n" ); - if (DRM(fb_loaded)) { - if (DRM(global)) { - for (i = 0; DRM(global) && (i < DRM(global)->cards_limit); i++) { - minor = &DRM(global)->minors[i]; - dev = minor->dev; - DRM_DEBUG("fb loaded release minor %d\n", dev->minor); - if ((minor->class == DRM_MINOR_PRIMARY) && (dev->fops == &DRM(fops))) { - /* release the pci driver */ - if (dev->pdev) - pci_dev_put(dev->pdev); - drm_cleanup(dev); - } - } - } - } else - pci_unregister_driver(&drm_driver); - DRM_INFO( "Module unloaded\n" ); -} - - -module_init( drm_init ); -module_exit( drm_exit ); - - -/** - * Get version information - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument, pointing to a drm_version structure. - * \return zero on success or negative number on failure. - * - * Fills in the version information in \p arg. - */ -int DRM(version)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_version_t __user *argp = (void __user *)arg; - drm_version_t version; - int len; - - if ( copy_from_user( &version, argp, sizeof(version) ) ) - return -EFAULT; - -#define DRM_COPY( name, value ) \ - len = strlen( value ); \ - if ( len > name##_len ) len = name##_len; \ - name##_len = strlen( value ); \ - if ( len && name ) { \ - if ( copy_to_user( name, value, len ) ) \ - return -EFAULT; \ - } - - version.version_major = DRIVER_MAJOR; - version.version_minor = DRIVER_MINOR; - version.version_patchlevel = DRIVER_PATCHLEVEL; - - DRM_COPY( version.name, DRIVER_NAME ); - DRM_COPY( version.date, DRIVER_DATE ); - DRM_COPY( version.desc, DRIVER_DESC ); - - if ( copy_to_user( argp, &version, sizeof(version) ) ) - return -EFAULT; - return 0; -} - -/** - * Open file. - * - * \param inode device inode - * \param filp file pointer. - * \return zero on success or a negative number on failure. - * - * Searches the DRM device with the same minor number, calls open_helper(), and - * increments the device open count. If the open count was previous at zero, - * i.e., it's the first that the device is open, then calls setup(). - */ -int DRM(open)( struct inode *inode, struct file *filp ) -{ - drm_device_t *dev = NULL; - int minor = iminor(inode); - int retcode = 0; - - if (!((minor >= 0) && (minor < DRM(global)->cards_limit))) - return -ENODEV; - - dev = DRM(global)->minors[minor].dev; - if (!dev) - return -ENODEV; - - retcode = DRM(open_helper)( inode, filp, dev ); - if ( !retcode ) { - atomic_inc( &dev->counts[_DRM_STAT_OPENS] ); - spin_lock( &dev->count_lock ); - if ( !dev->open_count++ ) { - spin_unlock( &dev->count_lock ); - return DRM(setup)( dev ); - } - spin_unlock( &dev->count_lock ); - } - - return retcode; -} - -/** - * Release file. - * - * \param inode device inode - * \param filp file pointer. - * \return zero on success or a negative number on failure. - * - * If the hardware lock is held then free it, and take it again for the kernel - * context since it's necessary to reclaim buffers. Unlink the file private - * data from its list and free it. Decreases the open count and if it reaches - * zero calls takedown(). - */ -int DRM(release)( struct inode *inode, struct file *filp ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev; - int retcode = 0; - - lock_kernel(); - dev = priv->dev; - - DRM_DEBUG( "open_count = %d\n", dev->open_count ); - - if (dev->fn_tbl.prerelease) - dev->fn_tbl.prerelease(dev, filp); - - /* ======================================================== - * Begin inline drm_release - */ - - DRM_DEBUG( "pid = %d, device = 0x%lx, open_count = %d\n", - current->pid, (long)old_encode_dev(dev->device), dev->open_count ); - - if ( priv->lock_count && dev->lock.hw_lock && - _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) && - dev->lock.filp == filp ) { - DRM_DEBUG( "File %p released, freeing lock for context %d\n", - filp, - _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock) ); - - if (dev->fn_tbl.release) - dev->fn_tbl.release(dev, filp); - - DRM(lock_free)( dev, &dev->lock.hw_lock->lock, - _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock) ); - - /* FIXME: may require heavy-handed reset of - hardware at this point, possibly - processed via a callback to the X - server. */ - } - else if ( dev->fn_tbl.release && priv->lock_count && dev->lock.hw_lock ) { - /* The lock is required to reclaim buffers */ - DECLARE_WAITQUEUE( entry, current ); - - add_wait_queue( &dev->lock.lock_queue, &entry ); - for (;;) { - current->state = TASK_INTERRUPTIBLE; - if ( !dev->lock.hw_lock ) { - /* Device has been unregistered */ - retcode = -EINTR; - break; - } - if ( DRM(lock_take)( &dev->lock.hw_lock->lock, - DRM_KERNEL_CONTEXT ) ) { - dev->lock.filp = filp; - dev->lock.lock_time = jiffies; - atomic_inc( &dev->counts[_DRM_STAT_LOCKS] ); - break; /* Got lock */ - } - /* Contention */ - schedule(); - if ( signal_pending( current ) ) { - retcode = -ERESTARTSYS; - break; - } - } - current->state = TASK_RUNNING; - remove_wait_queue( &dev->lock.lock_queue, &entry ); - if( !retcode ) { - if (dev->fn_tbl.release) - dev->fn_tbl.release(dev, filp); - DRM(lock_free)( dev, &dev->lock.hw_lock->lock, - DRM_KERNEL_CONTEXT ); - } - } - - if (drm_core_check_feature(dev, DRIVER_HAVE_DMA)) - { - dev->fn_tbl.reclaim_buffers(dev, filp); - } - - DRM(fasync)( -1, filp, 0 ); - - down( &dev->ctxlist_sem ); - if ( !list_empty( &dev->ctxlist->head ) ) { - drm_ctx_list_t *pos, *n; - - list_for_each_entry_safe( pos, n, &dev->ctxlist->head, head ) { - if ( pos->tag == priv && - pos->handle != DRM_KERNEL_CONTEXT ) { - if (dev->fn_tbl.context_dtor) - dev->fn_tbl.context_dtor(dev, pos->handle); - - DRM(ctxbitmap_free)( dev, pos->handle ); - - list_del( &pos->head ); - DRM(free)( pos, sizeof(*pos), DRM_MEM_CTXLIST ); - --dev->ctx_count; - } - } - } - up( &dev->ctxlist_sem ); - - down( &dev->struct_sem ); - if ( priv->remove_auth_on_close == 1 ) { - drm_file_t *temp = dev->file_first; - while ( temp ) { - temp->authenticated = 0; - temp = temp->next; - } - } - if ( priv->prev ) { - priv->prev->next = priv->next; - } else { - dev->file_first = priv->next; - } - if ( priv->next ) { - priv->next->prev = priv->prev; - } else { - dev->file_last = priv->prev; - } - up( &dev->struct_sem ); - - if (dev->fn_tbl.free_filp_priv) - dev->fn_tbl.free_filp_priv( dev, priv ); - DRM(free)( priv, sizeof(*priv), DRM_MEM_FILES ); - - /* ======================================================== - * End inline drm_release - */ - - atomic_inc( &dev->counts[_DRM_STAT_CLOSES] ); - spin_lock( &dev->count_lock ); - if ( !--dev->open_count ) { - if ( atomic_read( &dev->ioctl_count ) || dev->blocked ) { - DRM_ERROR( "Device busy: %d %d\n", - atomic_read( &dev->ioctl_count ), - dev->blocked ); - spin_unlock( &dev->count_lock ); - unlock_kernel(); - return -EBUSY; - } - spin_unlock( &dev->count_lock ); - unlock_kernel(); - return DRM(takedown)( dev ); - } - spin_unlock( &dev->count_lock ); - - unlock_kernel(); - - return retcode; -} - -/** - * Called whenever a process performs an ioctl on /dev/drm. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument. - * \return zero on success or negative number on failure. - * - * Looks up the ioctl function in the ::ioctls table, checking for root - * previleges if so required, and dispatches to the respective function. - */ -int DRM(ioctl)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_ioctl_desc_t *ioctl; - drm_ioctl_t *func; - int nr = DRM_IOCTL_NR(cmd); - int retcode = 0; - - atomic_inc( &dev->ioctl_count ); - atomic_inc( &dev->counts[_DRM_STAT_IOCTLS] ); - ++priv->ioctl_count; - - DRM_DEBUG( "pid=%d, cmd=0x%02x, nr=0x%02x, dev 0x%lx, auth=%d\n", - current->pid, cmd, nr, (long)old_encode_dev(dev->device), - priv->authenticated ); - - if ( nr >= DRIVER_IOCTL_COUNT ) { - retcode = -EINVAL; - } else { - ioctl = &DRM(ioctls)[nr]; - func = ioctl->func; - - if ( !func ) { - DRM_DEBUG( "no function\n" ); - retcode = -EINVAL; - } else if ( ( ioctl->root_only && !capable( CAP_SYS_ADMIN ) )|| - ( ioctl->auth_needed && !priv->authenticated ) ) { - retcode = -EACCES; - } else { - retcode = func( inode, filp, cmd, arg ); - } - } - - atomic_dec( &dev->ioctl_count ); - if (retcode) DRM_DEBUG( "ret = %x\n", retcode); - return retcode; -} - -/** - * Lock ioctl. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument, pointing to a drm_lock structure. - * \return zero on success or negative number on failure. - * - * Add the current task to the lock wait queue, and attempt to take to lock. - */ -int DRM(lock)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - DECLARE_WAITQUEUE( entry, current ); - drm_lock_t lock; - int ret = 0; - - ++priv->lock_count; - - if ( copy_from_user( &lock, (drm_lock_t __user *)arg, sizeof(lock) ) ) - return -EFAULT; - - if ( lock.context == DRM_KERNEL_CONTEXT ) { - DRM_ERROR( "Process %d using kernel context %d\n", - current->pid, lock.context ); - return -EINVAL; - } - - DRM_DEBUG( "%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n", - lock.context, current->pid, - dev->lock.hw_lock->lock, lock.flags ); - - if (drm_core_check_feature(dev, DRIVER_DMA_QUEUE)) - if ( lock.context < 0 ) - return -EINVAL; - - add_wait_queue( &dev->lock.lock_queue, &entry ); - for (;;) { - current->state = TASK_INTERRUPTIBLE; - if ( !dev->lock.hw_lock ) { - /* Device has been unregistered */ - ret = -EINTR; - break; - } - if ( DRM(lock_take)( &dev->lock.hw_lock->lock, - lock.context ) ) { - dev->lock.filp = filp; - dev->lock.lock_time = jiffies; - atomic_inc( &dev->counts[_DRM_STAT_LOCKS] ); - break; /* Got lock */ - } - - /* Contention */ - schedule(); - if ( signal_pending( current ) ) { - ret = -ERESTARTSYS; - break; - } - } - current->state = TASK_RUNNING; - remove_wait_queue( &dev->lock.lock_queue, &entry ); - - DRM_DEBUG( "%d %s\n", lock.context, ret ? "interrupted" : "has lock" ); - if (ret) return ret; - - sigemptyset( &dev->sigmask ); - sigaddset( &dev->sigmask, SIGSTOP ); - sigaddset( &dev->sigmask, SIGTSTP ); - sigaddset( &dev->sigmask, SIGTTIN ); - sigaddset( &dev->sigmask, SIGTTOU ); - dev->sigdata.context = lock.context; - dev->sigdata.lock = dev->lock.hw_lock; - block_all_signals( DRM(notifier), - &dev->sigdata, &dev->sigmask ); - - if (dev->fn_tbl.dma_ready && (lock.flags & _DRM_LOCK_READY)) - dev->fn_tbl.dma_ready(dev); - - if (dev->fn_tbl.dma_quiescent && (lock.flags & _DRM_LOCK_QUIESCENT)) { - if (dev->fn_tbl.dma_quiescent(dev)) { - DRM_DEBUG( "%d waiting for DMA quiescent\n", lock.context); - return DRM_ERR(EBUSY); - } - } - - if ( dev->fn_tbl.kernel_context_switch && dev->last_context != lock.context ) { - dev->fn_tbl.kernel_context_switch(dev, dev->last_context, - lock.context); - } - - return 0; -} - -/** - * Unlock ioctl. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument, pointing to a drm_lock structure. - * \return zero on success or negative number on failure. - * - * Transfer and free the lock. - */ -int DRM(unlock)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_lock_t lock; - - if ( copy_from_user( &lock, (drm_lock_t __user *)arg, sizeof(lock) ) ) - return -EFAULT; - - if ( lock.context == DRM_KERNEL_CONTEXT ) { - DRM_ERROR( "Process %d using kernel context %d\n", - current->pid, lock.context ); - return -EINVAL; - } - - atomic_inc( &dev->counts[_DRM_STAT_UNLOCKS] ); - - if (dev->fn_tbl.kernel_context_switch_unlock) - dev->fn_tbl.kernel_context_switch_unlock(dev); - else - { - DRM(lock_transfer)( dev, &dev->lock.hw_lock->lock, - DRM_KERNEL_CONTEXT ); - - if ( DRM(lock_free)( dev, &dev->lock.hw_lock->lock, - DRM_KERNEL_CONTEXT ) ) { - DRM_ERROR( "\n" ); - } - } - - unblock_all_signals(); - return 0; -} diff --git a/linux/drm_fops.h b/linux/drm_fops.h deleted file mode 100644 index 0e91190a3..000000000 --- a/linux/drm_fops.h +++ /dev/null @@ -1,153 +0,0 @@ -/** - * \file drm_fops.h - * File operations for DRM - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Daryll Strauss <daryll@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Created: Mon Jan 4 08:58:31 1999 by faith@valinux.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include "drmP.h" -#include <linux/poll.h> - - -/** - * Called whenever a process opens /dev/drm. - * - * \param inode device inode. - * \param filp file pointer. - * \param dev device. - * \return zero on success or a negative number on failure. - * - * Creates and initializes a drm_file structure for the file private data in \p - * filp and add it into the double linked list in \p dev. - */ -int DRM(open_helper)(struct inode *inode, struct file *filp, drm_device_t *dev) -{ - int minor = iminor(inode); - drm_file_t *priv; - int ret; - - if (filp->f_flags & O_EXCL) return -EBUSY; /* No exclusive opens */ - if (!DRM(cpu_valid)()) return -EINVAL; - - DRM_DEBUG("pid = %d, minor = %d\n", current->pid, minor); - - priv = DRM(alloc)(sizeof(*priv), DRM_MEM_FILES); - if(!priv) return -ENOMEM; - - memset(priv, 0, sizeof(*priv)); - filp->private_data = priv; - priv->uid = current->euid; - priv->pid = current->pid; - priv->minor = minor; - priv->dev = dev; - priv->ioctl_count = 0; - priv->authenticated = capable(CAP_SYS_ADMIN); - priv->lock_count = 0; - - if (dev->fn_tbl.open_helper) { - ret=dev->fn_tbl.open_helper(dev, priv); - if (ret < 0) - goto out_free; - } - - down(&dev->struct_sem); - if (!dev->file_last) { - priv->next = NULL; - priv->prev = NULL; - dev->file_first = priv; - dev->file_last = priv; - } else { - priv->next = NULL; - priv->prev = dev->file_last; - dev->file_last->next = priv; - dev->file_last = priv; - } - up(&dev->struct_sem); - -#ifdef __alpha__ - /* - * Default the hose - */ - if (!dev->hose) { - struct pci_dev *pci_dev; - pci_dev = pci_find_class(PCI_CLASS_DISPLAY_VGA << 8, NULL); - if (pci_dev) dev->hose = pci_dev->sysdata; - if (!dev->hose) { - struct pci_bus *b = pci_bus_b(pci_root_buses.next); - if (b) dev->hose = b->sysdata; - } - } -#endif - - return 0; -out_free: - DRM(free)(priv, sizeof(*priv), DRM_MEM_FILES); - filp->private_data=NULL; - return ret; -} - -/** No-op. */ -int DRM(flush)(struct file *filp) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - - DRM_DEBUG("pid = %d, device = 0x%lx, open_count = %d\n", - current->pid, (long)old_encode_dev(dev->device), dev->open_count); - return 0; -} - -/** No-op. */ -int DRM(fasync)(int fd, struct file *filp, int on) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - int retcode; - - DRM_DEBUG("fd = %d, device = 0x%lx\n", fd, (long)old_encode_dev(dev->device)); - retcode = fasync_helper(fd, filp, on, &dev->buf_async); - if (retcode < 0) return retcode; - return 0; -} - -/** No-op. */ -unsigned int DRM(poll)(struct file *filp, struct poll_table_struct *wait) -{ - return 0; -} - - -/** No-op. */ -ssize_t DRM(read)(struct file *filp, char __user *buf, size_t count, loff_t *off) -{ - return 0; -} diff --git a/linux/drm_init.h b/linux/drm_init.h deleted file mode 100644 index ae6ecbf98..000000000 --- a/linux/drm_init.h +++ /dev/null @@ -1,128 +0,0 @@ -/** - * \file drm_init.h - * Setup/Cleanup for DRM - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Created: Mon Jan 4 08:58:31 1999 by faith@valinux.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include "drmP.h" - -/** Debug flags. Set by parse_option(). */ -#if 0 -int DRM(flags) = DRM_FLAG_DEBUG; -#else -int DRM(flags) = 0; -#endif - -/** - * Parse a single option. - * - * \param s option string. - * - * \sa See parse_options() for details. - */ -static void DRM(parse_option)(char *s) -{ - char *c, *r; - - DRM_DEBUG("\"%s\"\n", s); - if (!s || !*s) return; - for (c = s; *c && *c != ':'; c++); /* find : or \0 */ - if (*c) r = c + 1; else r = NULL; /* remember remainder */ - *c = '\0'; /* terminate */ - if (!strcmp(s, "debug")) { - DRM(flags) |= DRM_FLAG_DEBUG; - DRM_INFO("Debug messages ON\n"); - return; - } - DRM_ERROR("\"%s\" is not a valid option\n", s); - return; -} - -/** - * Parse the insmod "drm_opts=" options, or the command-line - * options passed to the kernel via LILO. - * - * \param s contains option_list without the 'drm_opts=' part. - * - * The grammar of the format is as - * follows: - * - * \code - * drm ::= 'drm_opts=' option_list - * option_list ::= option [ ';' option_list ] - * option ::= 'device:' major - * | 'debug' - * | 'noctx' - * major ::= INTEGER - * \endcode - * - * - device=major,minor specifies the device number used for /dev/drm - * - if major == 0 then the misc device is used - * - if major == 0 and minor == 0 then dynamic misc allocation is used - * - debug=on specifies that debugging messages will be printk'd - * - debug=trace specifies that each function call will be logged via printk - * - debug=off turns off all debugging options - * - * \todo Actually only the \e presence of the 'debug' option is currently - * checked. - */ - -void DRM(parse_options)(char *s) -{ - char *h, *t, *n; - - DRM_DEBUG("\"%s\"\n", s ?: ""); - if (!s || !*s) return; - - for (h = t = n = s; h && *h; h = n) { - for (; *t && *t != ';'; t++); /* find ; or \0 */ - if (*t) n = t + 1; else n = NULL; /* remember next */ - *t = '\0'; /* terminate */ - DRM(parse_option)(h); /* parse */ - } -} - -/** - * Check whether DRI will run on this CPU. - * - * \return non-zero if the DRI will run on this CPU, or zero otherwise. - */ -int DRM(cpu_valid)(void) -{ -#if defined(__i386__) - if (boot_cpu_data.x86 == 3) return 0; /* No cmpxchg on a 386 */ -#endif -#if defined(__sparc__) && !defined(__sparc_v9__) - return 0; /* No cmpxchg before v9 sparc. */ -#endif - return 1; -} diff --git a/linux/drm_ioctl.h b/linux/drm_ioctl.h deleted file mode 100644 index 336954402..000000000 --- a/linux/drm_ioctl.h +++ /dev/null @@ -1,349 +0,0 @@ -/** - * \file drm_ioctl.h - * IOCTL processing for DRM - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Created: Fri Jan 8 09:01:26 1999 by faith@valinux.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include "drmP.h" - -#include "linux/pci.h" - -/** - * Get the bus id. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument, pointing to a drm_unique structure. - * \return zero on success or a negative number on failure. - * - * Copies the bus id from drm_device::unique into user space. - */ -int DRM(getunique)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_unique_t __user *argp = (void __user *)arg; - drm_unique_t u; - - if (copy_from_user(&u, argp, sizeof(u))) - return -EFAULT; - if (u.unique_len >= dev->unique_len) { - if (copy_to_user(u.unique, dev->unique, dev->unique_len)) - return -EFAULT; - } - u.unique_len = dev->unique_len; - if (copy_to_user(argp, &u, sizeof(u))) - return -EFAULT; - return 0; -} - -/** - * Set the bus id. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument, pointing to a drm_unique structure. - * \return zero on success or a negative number on failure. - * - * Copies the bus id from userspace into drm_device::unique, and verifies that - * it matches the device this DRM is attached to (EINVAL otherwise). Deprecated - * in interface version 1.1 and will return EBUSY when setversion has requested - * version 1.1 or greater. - */ -int DRM(setunique)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_unique_t u; - int domain, bus, slot, func, ret; - - if (dev->unique_len || dev->unique) return -EBUSY; - - if (copy_from_user(&u, (drm_unique_t __user *)arg, sizeof(u))) - return -EFAULT; - - if (!u.unique_len || u.unique_len > 1024) return -EINVAL; - - dev->unique_len = u.unique_len; - dev->unique = DRM(alloc)(u.unique_len + 1, DRM_MEM_DRIVER); - if(!dev->unique) return -ENOMEM; - if (copy_from_user(dev->unique, u.unique, dev->unique_len)) - return -EFAULT; - - dev->unique[dev->unique_len] = '\0'; - - dev->devname = DRM(alloc)(strlen(dev->name) + strlen(dev->unique) + 2, - DRM_MEM_DRIVER); - if (!dev->devname) - return -ENOMEM; - - sprintf(dev->devname, "%s@%s", dev->name, dev->unique); - - /* Return error if the busid submitted doesn't match the device's actual - * busid. - */ - ret = sscanf(dev->unique, "PCI:%d:%d:%d", &bus, &slot, &func); - if (ret != 3) - return DRM_ERR(EINVAL); - domain = bus >> 8; - bus &= 0xff; - - if ((domain != dev->pci_domain) || - (bus != dev->pci_bus) || - (slot != dev->pci_slot) || - (func != dev->pci_func)) - return -EINVAL; - - return 0; -} - -static int -DRM(set_busid)(drm_device_t *dev) -{ - if (dev->unique != NULL) - return EBUSY; - - dev->unique_len = 20; - dev->unique = DRM(alloc)(dev->unique_len + 1, DRM_MEM_DRIVER); - if (dev->unique == NULL) - return ENOMEM; - - snprintf(dev->unique, dev->unique_len, "pci:%04x:%02x:%02x.%d", - dev->pci_domain, dev->pci_bus, dev->pci_slot, dev->pci_func); - - dev->devname = DRM(alloc)(strlen(dev->name) + dev->unique_len + 2, - DRM_MEM_DRIVER); - if (dev->devname == NULL) - return ENOMEM; - - sprintf(dev->devname, "%s@%s", dev->name, dev->unique); - - return 0; -} - - -/** - * Get a mapping information. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument, pointing to a drm_map structure. - * - * \return zero on success or a negative number on failure. - * - * Searches for the mapping with the specified offset and copies its information - * into userspace - */ -int DRM(getmap)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_map_t __user *argp = (void __user *)arg; - drm_map_t map; - drm_map_list_t *r_list = NULL; - struct list_head *list; - int idx; - int i; - - if (copy_from_user(&map, argp, sizeof(map))) - return -EFAULT; - idx = map.offset; - - down(&dev->struct_sem); - if (idx < 0) { - up(&dev->struct_sem); - return -EINVAL; - } - - i = 0; - list_for_each(list, &dev->maplist->head) { - if(i == idx) { - r_list = list_entry(list, drm_map_list_t, head); - break; - } - i++; - } - if(!r_list || !r_list->map) { - up(&dev->struct_sem); - return -EINVAL; - } - - map.offset = r_list->map->offset; - map.size = r_list->map->size; - map.type = r_list->map->type; - map.flags = r_list->map->flags; - map.handle = r_list->map->handle; - map.mtrr = r_list->map->mtrr; - up(&dev->struct_sem); - - if (copy_to_user(argp, &map, sizeof(map))) return -EFAULT; - return 0; -} - -/** - * Get client information. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument, pointing to a drm_client structure. - * - * \return zero on success or a negative number on failure. - * - * Searches for the client with the specified index and copies its information - * into userspace - */ -int DRM(getclient)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_client_t __user *argp = (void __user *)arg; - drm_client_t client; - drm_file_t *pt; - int idx; - int i; - - if (copy_from_user(&client, argp, sizeof(client))) - return -EFAULT; - idx = client.idx; - down(&dev->struct_sem); - for (i = 0, pt = dev->file_first; i < idx && pt; i++, pt = pt->next) - ; - - if (!pt) { - up(&dev->struct_sem); - return -EINVAL; - } - client.auth = pt->authenticated; - client.pid = pt->pid; - client.uid = pt->uid; - client.magic = pt->magic; - client.iocs = pt->ioctl_count; - up(&dev->struct_sem); - - if (copy_to_user(argp, &client, sizeof(client))) - return -EFAULT; - return 0; -} - -/** - * Get statistics information. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument, pointing to a drm_stats structure. - * - * \return zero on success or a negative number on failure. - */ -int DRM(getstats)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_stats_t stats; - int i; - - memset(&stats, 0, sizeof(stats)); - - down(&dev->struct_sem); - - for (i = 0; i < dev->counters; i++) { - if (dev->types[i] == _DRM_STAT_LOCK) - stats.data[i].value - = (dev->lock.hw_lock - ? dev->lock.hw_lock->lock : 0); - else - stats.data[i].value = atomic_read(&dev->counts[i]); - stats.data[i].type = dev->types[i]; - } - - stats.count = dev->counters; - - up(&dev->struct_sem); - - if (copy_to_user((drm_stats_t __user *)arg, &stats, sizeof(stats))) - return -EFAULT; - return 0; -} - -#define DRM_IF_MAJOR 1 -#define DRM_IF_MINOR 2 - -int DRM(setversion)(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - drm_set_version_t sv; - drm_set_version_t retv; - int if_version; - drm_set_version_t __user *argp = (void __user *)data; - - DRM_COPY_FROM_USER_IOCTL(sv, argp, sizeof(sv)); - - retv.drm_di_major = DRM_IF_MAJOR; - retv.drm_di_minor = DRM_IF_MINOR; - retv.drm_dd_major = DRIVER_MAJOR; - retv.drm_dd_minor = DRIVER_MINOR; - - DRM_COPY_TO_USER_IOCTL(argp, retv, sizeof(sv)); - - if (sv.drm_di_major != -1) { - if (sv.drm_di_major != DRM_IF_MAJOR || - sv.drm_di_minor < 0 || sv.drm_di_minor > DRM_IF_MINOR) - return EINVAL; - if_version = DRM_IF_VERSION(sv.drm_di_major, sv.drm_dd_minor); - dev->if_version = DRM_MAX(if_version, dev->if_version); - if (sv.drm_di_minor >= 1) { - /* - * Version 1.1 includes tying of DRM to specific device - */ - DRM(set_busid)(dev); - } - } - - if (sv.drm_dd_major != -1) { - if (sv.drm_dd_major != DRIVER_MAJOR || - sv.drm_dd_minor < 0 || sv.drm_dd_minor > DRIVER_MINOR) - return EINVAL; - - if (dev->fn_tbl.set_version) - dev->fn_tbl.set_version(dev, &sv); - } - return 0; -} diff --git a/linux/drm_irq.h b/linux/drm_irq.h deleted file mode 100644 index e0f803cf2..000000000 --- a/linux/drm_irq.h +++ /dev/null @@ -1,367 +0,0 @@ -/** - * \file drm_irq.h - * IRQ support - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Created: Fri Mar 19 14:30:16 1999 by faith@valinux.com - * - * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include "drmP.h" - -#include <linux/interrupt.h> /* For task queue support */ - -/** - * Get interrupt from bus id. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument, pointing to a drm_irq_busid structure. - * \return zero on success or a negative number on failure. - * - * Finds the PCI device with the specified bus id and gets its IRQ number. - * This IOCTL is deprecated, and will now return EINVAL for any busid not equal - * to that of the device that this DRM instance attached to. - */ -int DRM(irq_by_busid)(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_irq_busid_t __user *argp = (void __user *)arg; - drm_irq_busid_t p; - - if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ)) - return -EINVAL; - - if (copy_from_user(&p, argp, sizeof(p))) - return -EFAULT; - - if ((p.busnum >> 8) != dev->pci_domain || - (p.busnum & 0xff) != dev->pci_bus || - p.devnum != dev->pci_slot || - p.funcnum != dev->pci_func) - return -EINVAL; - - p.irq = dev->irq; - - DRM_DEBUG("%d:%d:%d => IRQ %d\n", - p.busnum, p.devnum, p.funcnum, p.irq); - if (copy_to_user(argp, &p, sizeof(p))) - return -EFAULT; - return 0; -} - -/** - * Install IRQ handler. - * - * \param dev DRM device. - * - * Initializes the IRQ related data, and setups drm_device::vbl_queue. Installs the handler, calling the driver - * \c DRM(driver_irq_preinstall)() and \c DRM(driver_irq_postinstall)() functions - * before and after the installation. - */ -int DRM(irq_install)( drm_device_t *dev ) -{ - int ret; - unsigned long sh_flags=0; - - if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ)) - return -EINVAL; - - if ( dev->irq == 0 ) - return -EINVAL; - - down( &dev->struct_sem ); - - /* Driver must have been initialized */ - if ( !dev->dev_private ) { - up( &dev->struct_sem ); - return -EINVAL; - } - - if ( dev->irq_enabled ) { - up( &dev->struct_sem ); - return -EBUSY; - } - dev->irq_enabled = 1; - up( &dev->struct_sem ); - - DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, dev->irq ); - - if (drm_core_check_feature(dev, DRIVER_IRQ_VBL)) { - init_waitqueue_head(&dev->vbl_queue); - - spin_lock_init( &dev->vbl_lock ); - - INIT_LIST_HEAD( &dev->vbl_sigs.head ); - - dev->vbl_pending = 0; - } - - /* Before installing handler */ - dev->fn_tbl.irq_preinstall(dev); - - /* Install handler */ - if (drm_core_check_feature(dev, DRIVER_IRQ_SHARED)) - sh_flags = SA_SHIRQ; - - ret = request_irq( dev->irq, dev->fn_tbl.irq_handler, - sh_flags, dev->devname, dev ); - if ( ret < 0 ) { - down( &dev->struct_sem ); - dev->irq_enabled = 0; - up( &dev->struct_sem ); - return ret; - } - - /* After installing handler */ - dev->fn_tbl.irq_postinstall(dev); - - return 0; -} - -/** - * Uninstall the IRQ handler. - * - * \param dev DRM device. - * - * Calls the driver's \c DRM(driver_irq_uninstall)() function, and stops the irq. - */ -int DRM(irq_uninstall)( drm_device_t *dev ) -{ - int irq_enabled; - - if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ)) - return -EINVAL; - - down( &dev->struct_sem ); - irq_enabled = dev->irq_enabled; - dev->irq_enabled = 0; - up( &dev->struct_sem ); - - if ( !irq_enabled ) - return -EINVAL; - - DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, dev->irq ); - - dev->fn_tbl.irq_uninstall(dev); - - free_irq( dev->irq, dev ); - - return 0; -} - -/** - * IRQ control ioctl. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param arg user argument, pointing to a drm_control structure. - * \return zero on success or a negative number on failure. - * - * Calls irq_install() or irq_uninstall() according to \p arg. - */ -int DRM(control)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_control_t ctl; - - /* if we haven't irq we fallback for compatibility reasons - this used to be a separate function in drm_dma.h */ - - if ( copy_from_user( &ctl, (drm_control_t __user *)arg, sizeof(ctl) ) ) - return -EFAULT; - - switch ( ctl.func ) { - case DRM_INST_HANDLER: - if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ)) - return 0; - if (dev->if_version < DRM_IF_VERSION(1, 2) && - ctl.irq != dev->irq) - return -EINVAL; - return DRM(irq_install)( dev ); - case DRM_UNINST_HANDLER: - if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ)) - return 0; - return DRM(irq_uninstall)( dev ); - default: - return -EINVAL; - } -} - -/** - * Wait for VBLANK. - * - * \param inode device inode. - * \param filp file pointer. - * \param cmd command. - * \param data user argument, pointing to a drm_wait_vblank structure. - * \return zero on success or a negative number on failure. - * - * Verifies the IRQ is installed. - * - * If a signal is requested checks if this task has already scheduled the same signal - * for the same vblank sequence number - nothing to be done in - * that case. If the number of tasks waiting for the interrupt exceeds 100 the - * function fails. Otherwise adds a new entry to drm_device::vbl_sigs for this - * task. - * - * If a signal is not requested, then calls vblank_wait(). - */ -int DRM(wait_vblank)( DRM_IOCTL_ARGS ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_wait_vblank_t __user *argp = (void __user *)data; - drm_wait_vblank_t vblwait; - struct timeval now; - int ret = 0; - unsigned int flags; - - if (!drm_core_check_feature(dev, DRIVER_IRQ_VBL)) - return -EINVAL; - - if (!dev->irq) - return -EINVAL; - - DRM_COPY_FROM_USER_IOCTL( vblwait, argp, sizeof(vblwait) ); - - switch ( vblwait.request.type & ~_DRM_VBLANK_FLAGS_MASK ) { - case _DRM_VBLANK_RELATIVE: - vblwait.request.sequence += atomic_read( &dev->vbl_received ); - vblwait.request.type &= ~_DRM_VBLANK_RELATIVE; - case _DRM_VBLANK_ABSOLUTE: - break; - default: - return -EINVAL; - } - - flags = vblwait.request.type & _DRM_VBLANK_FLAGS_MASK; - - if ( flags & _DRM_VBLANK_SIGNAL ) { - unsigned long irqflags; - drm_vbl_sig_t *vbl_sig; - - vblwait.reply.sequence = atomic_read( &dev->vbl_received ); - - spin_lock_irqsave( &dev->vbl_lock, irqflags ); - - /* Check if this task has already scheduled the same signal - * for the same vblank sequence number; nothing to be done in - * that case - */ - list_for_each_entry( vbl_sig, &dev->vbl_sigs.head, head ) { - if (vbl_sig->sequence == vblwait.request.sequence - && vbl_sig->info.si_signo == vblwait.request.signal - && vbl_sig->task == current) - { - spin_unlock_irqrestore( &dev->vbl_lock, irqflags ); - goto done; - } - } - - if ( dev->vbl_pending >= 100 ) { - spin_unlock_irqrestore( &dev->vbl_lock, irqflags ); - return -EBUSY; - } - - dev->vbl_pending++; - - spin_unlock_irqrestore( &dev->vbl_lock, irqflags ); - - if ( !( vbl_sig = DRM(alloc)( sizeof( drm_vbl_sig_t ), DRM_MEM_DRIVER ) ) ) { - return -ENOMEM; - } - - memset( (void *)vbl_sig, 0, sizeof(*vbl_sig) ); - - vbl_sig->sequence = vblwait.request.sequence; - vbl_sig->info.si_signo = vblwait.request.signal; - vbl_sig->task = current; - - spin_lock_irqsave( &dev->vbl_lock, irqflags ); - - list_add_tail( (struct list_head *) vbl_sig, &dev->vbl_sigs.head ); - - spin_unlock_irqrestore( &dev->vbl_lock, irqflags ); - } else { - if (dev->fn_tbl.vblank_wait) - ret = dev->fn_tbl.vblank_wait( dev, &vblwait.request.sequence ); - - do_gettimeofday( &now ); - vblwait.reply.tval_sec = now.tv_sec; - vblwait.reply.tval_usec = now.tv_usec; - } - -done: - DRM_COPY_TO_USER_IOCTL( argp, vblwait, sizeof(vblwait) ); - - return ret; -} - -/** - * Send the VBLANK signals. - * - * \param dev DRM device. - * - * Sends a signal for each task in drm_device::vbl_sigs and empties the list. - * - * If a signal is not requested, then calls vblank_wait(). - */ -void DRM(vbl_send_signals)( drm_device_t *dev ) -{ - struct list_head *list, *tmp; - drm_vbl_sig_t *vbl_sig; - unsigned int vbl_seq = atomic_read( &dev->vbl_received ); - unsigned long flags; - - spin_lock_irqsave( &dev->vbl_lock, flags ); - - list_for_each_safe( list, tmp, &dev->vbl_sigs.head ) { - vbl_sig = list_entry( list, drm_vbl_sig_t, head ); - if ( ( vbl_seq - vbl_sig->sequence ) <= (1<<23) ) { - vbl_sig->info.si_code = vbl_seq; - send_sig_info( vbl_sig->info.si_signo, &vbl_sig->info, vbl_sig->task ); - - list_del( list ); - - DRM(free)( vbl_sig, sizeof(*vbl_sig), DRM_MEM_DRIVER ); - - dev->vbl_pending--; - } - } - - spin_unlock_irqrestore( &dev->vbl_lock, flags ); -} - - diff --git a/linux/drm_lock.h b/linux/drm_lock.h deleted file mode 100644 index 55fb29f39..000000000 --- a/linux/drm_lock.h +++ /dev/null @@ -1,168 +0,0 @@ -/** - * \file drm_lock.h - * IOCTLs for locking - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Created: Tue Feb 2 08:37:54 1999 by faith@valinux.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include "drmP.h" - -/** No-op ioctl. */ -int DRM(noop)(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - DRM_DEBUG("\n"); - return 0; -} - -/** - * Take the heavyweight lock. - * - * \param lock lock pointer. - * \param context locking context. - * \return one if the lock is held, or zero otherwise. - * - * Attempt to mark the lock as held by the given context, via the \p cmpxchg instruction. - */ -int DRM(lock_take)(__volatile__ unsigned int *lock, unsigned int context) -{ - unsigned int old, new, prev; - - do { - old = *lock; - if (old & _DRM_LOCK_HELD) new = old | _DRM_LOCK_CONT; - else new = context | _DRM_LOCK_HELD; - prev = cmpxchg(lock, old, new); - } while (prev != old); - if (_DRM_LOCKING_CONTEXT(old) == context) { - if (old & _DRM_LOCK_HELD) { - if (context != DRM_KERNEL_CONTEXT) { - DRM_ERROR("%d holds heavyweight lock\n", - context); - } - return 0; - } - } - if (new == (context | _DRM_LOCK_HELD)) { - /* Have lock */ - return 1; - } - return 0; -} - -/** - * This takes a lock forcibly and hands it to context. Should ONLY be used - * inside *_unlock to give lock to kernel before calling *_dma_schedule. - * - * \param dev DRM device. - * \param lock lock pointer. - * \param context locking context. - * \return always one. - * - * Resets the lock file pointer. - * Marks the lock as held by the given context, via the \p cmpxchg instruction. - */ -int DRM(lock_transfer)(drm_device_t *dev, - __volatile__ unsigned int *lock, unsigned int context) -{ - unsigned int old, new, prev; - - dev->lock.filp = NULL; - do { - old = *lock; - new = context | _DRM_LOCK_HELD; - prev = cmpxchg(lock, old, new); - } while (prev != old); - return 1; -} - -/** - * Free lock. - * - * \param dev DRM device. - * \param lock lock. - * \param context context. - * - * Resets the lock file pointer. - * Marks the lock as not held, via the \p cmpxchg instruction. Wakes any task - * waiting on the lock queue. - */ -int DRM(lock_free)(drm_device_t *dev, - __volatile__ unsigned int *lock, unsigned int context) -{ - unsigned int old, new, prev; - - dev->lock.filp = NULL; - do { - old = *lock; - new = 0; - prev = cmpxchg(lock, old, new); - } while (prev != old); - if (_DRM_LOCK_IS_HELD(old) && _DRM_LOCKING_CONTEXT(old) != context) { - DRM_ERROR("%d freed heavyweight lock held by %d\n", - context, - _DRM_LOCKING_CONTEXT(old)); - return 1; - } - wake_up_interruptible(&dev->lock.lock_queue); - return 0; -} - -/** - * If we get here, it means that the process has called DRM_IOCTL_LOCK - * without calling DRM_IOCTL_UNLOCK. - * - * If the lock is not held, then let the signal proceed as usual. If the lock - * is held, then set the contended flag and keep the signal blocked. - * - * \param priv pointer to a drm_sigdata structure. - * \return one if the signal should be delivered normally, or zero if the - * signal should be blocked. - */ -int DRM(notifier)(void *priv) -{ - drm_sigdata_t *s = (drm_sigdata_t *)priv; - unsigned int old, new, prev; - - - /* Allow signal delivery if lock isn't held */ - if (!s->lock || !_DRM_LOCK_IS_HELD(s->lock->lock) - || _DRM_LOCKING_CONTEXT(s->lock->lock) != s->context) return 1; - - /* Otherwise, set flag to force call to - drmUnlock */ - do { - old = s->lock->lock; - new = old | _DRM_LOCK_CONT; - prev = cmpxchg(&s->lock->lock, old, new); - } while (prev != old); - return 0; -} diff --git a/linux/drm_memory.h b/linux/drm_memory.h deleted file mode 100644 index 9674cef0b..000000000 --- a/linux/drm_memory.h +++ /dev/null @@ -1,374 +0,0 @@ -/** - * \file drm_memory.h - * Memory management wrappers for DRM - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Created: Thu Feb 4 14:00:34 1999 by faith@valinux.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <linux/config.h> -#include <linux/highmem.h> -#include "drmP.h" - -/** - * Cut down version of drm_memory_debug.h, which used to be called - * drm_memory.h. - */ - -/* Need the 4-argument version of vmap(). */ -#if __OS_HAS_AGP && defined(VMAP_4_ARGS) - -#include <linux/vmalloc.h> - -#ifdef HAVE_PAGE_AGP -#include <asm/agp.h> -#else -# ifdef __powerpc__ -# define PAGE_AGP __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE) -# else -# define PAGE_AGP PAGE_KERNEL -# endif -#endif - -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) -#ifndef pte_offset_kernel -# define pte_offset_kernel(dir, address) pte_offset(dir, address) -#endif -#ifndef pte_pfn -# define pte_pfn(pte) (pte_page(pte) - mem_map) -#endif -#ifndef pfn_to_page -# define pfn_to_page(pfn) (mem_map + (pfn)) -#endif -#endif - -/* - * Find the drm_map that covers the range [offset, offset+size). - */ -static inline drm_map_t * -drm_lookup_map (unsigned long offset, unsigned long size, drm_device_t *dev) -{ - struct list_head *list; - drm_map_list_t *r_list; - drm_map_t *map; - - list_for_each(list, &dev->maplist->head) { - r_list = (drm_map_list_t *) list; - map = r_list->map; - if (!map) - continue; - if (map->offset <= offset && (offset + size) <= (map->offset + map->size)) - return map; - } - return NULL; -} - -static inline void * -agp_remap (unsigned long offset, unsigned long size, drm_device_t *dev) -{ - unsigned long *phys_addr_map, i, num_pages = PAGE_ALIGN(size) / PAGE_SIZE; - struct drm_agp_mem *agpmem; - struct page **page_map; - void *addr; - - size = PAGE_ALIGN(size); - -#ifdef __alpha__ - offset -= dev->hose->mem_space->start; -#endif - - for (agpmem = dev->agp->memory; agpmem; agpmem = agpmem->next) - if (agpmem->bound <= offset - && (agpmem->bound + (agpmem->pages << PAGE_SHIFT)) >= (offset + size)) - break; - if (!agpmem) - return NULL; - - /* - * OK, we're mapping AGP space on a chipset/platform on which memory accesses by - * the CPU do not get remapped by the GART. We fix this by using the kernel's - * page-table instead (that's probably faster anyhow...). - */ - /* note: use vmalloc() because num_pages could be large... */ - page_map = vmalloc(num_pages * sizeof(struct page *)); - if (!page_map) - return NULL; - - phys_addr_map = agpmem->memory->memory + (offset - agpmem->bound) / PAGE_SIZE; - for (i = 0; i < num_pages; ++i) - page_map[i] = pfn_to_page(phys_addr_map[i] >> PAGE_SHIFT); - addr = vmap(page_map, num_pages, VM_IOREMAP, PAGE_AGP); - vfree(page_map); - - return addr; -} - -static inline unsigned long -drm_follow_page (void *vaddr) -{ - pgd_t *pgd = pgd_offset_k((unsigned long) vaddr); - pmd_t *pmd = pmd_offset(pgd, (unsigned long) vaddr); - pte_t *ptep = pte_offset_kernel(pmd, (unsigned long) vaddr); - return pte_pfn(*ptep) << PAGE_SHIFT; -} - -#else /* __OS_HAS_AGP */ - -static inline drm_map_t *drm_lookup_map(unsigned long offset, unsigned long size, drm_device_t *dev) -{ - return NULL; -} - -static inline void *agp_remap(unsigned long offset, unsigned long size, drm_device_t *dev) -{ - return NULL; -} - -static inline unsigned long drm_follow_page (void *vaddr) -{ - return 0; -} - -#endif - -static inline void *drm_ioremap(unsigned long offset, unsigned long size, drm_device_t *dev) -{ -#if defined(VMAP_4_ARGS) - if (drm_core_has_AGP(dev) && dev->agp && dev->agp->cant_use_aperture) { - drm_map_t *map = drm_lookup_map(offset, size, dev); - - if (map && map->type == _DRM_AGP) - return agp_remap(offset, size, dev); - } -#endif - - return ioremap(offset, size); -} - -static inline void *drm_ioremap_nocache(unsigned long offset, unsigned long size, - drm_device_t *dev) -{ -#if defined(VMAP_4_ARGS) - if (drm_core_has_AGP(dev) && dev->agp && dev->agp->cant_use_aperture) { - drm_map_t *map = drm_lookup_map(offset, size, dev); - - if (map && map->type == _DRM_AGP) - return agp_remap(offset, size, dev); - } -#endif - - return ioremap_nocache(offset, size); -} - -static inline void drm_ioremapfree(void *pt, unsigned long size, drm_device_t *dev) -{ -#if defined(VMAP_4_ARGS) - /* - * This is a bit ugly. It would be much cleaner if the DRM API would use separate - * routines for handling mappings in the AGP space. Hopefully this can be done in - * a future revision of the interface... - */ - if (drm_core_has_AGP(dev) && dev->agp && dev->agp->cant_use_aperture - && ((unsigned long) pt >= VMALLOC_START && (unsigned long) pt < VMALLOC_END)) - { - unsigned long offset; - drm_map_t *map; - - offset = drm_follow_page(pt) | ((unsigned long) pt & ~PAGE_MASK); - map = drm_lookup_map(offset, size, dev); - if (map && map->type == _DRM_AGP) { - vunmap(pt); - return; - } - } -#endif - - iounmap(pt); -} - - -#ifdef DEBUG_MEMORY -#include "drm_memory_debug.h" -#else - -/** No-op. */ -void DRM(mem_init)(void) -{ -} - -/** - * Called when "/proc/dri/%dev%/mem" is read. - * - * \param buf output buffer. - * \param start start of output data. - * \param offset requested start offset. - * \param len requested number of bytes. - * \param eof whether there is no more data to return. - * \param data private data. - * \return number of written bytes. - * - * No-op. - */ -int DRM(mem_info)(char *buf, char **start, off_t offset, - int len, int *eof, void *data) -{ - return 0; -} - -/** Wrapper around kmalloc() */ -void *DRM(calloc)(size_t nmemb, size_t size, int area) -{ - void *addr; - - addr = kmalloc(size * nmemb, GFP_KERNEL); - if (addr != NULL) - memset((void *)addr, 0, size * nmemb); - - return addr; -} - -/** Wrapper around kmalloc() and kfree() */ -void *DRM(realloc)(void *oldpt, size_t oldsize, size_t size, int area) -{ - void *pt; - - if (!(pt = kmalloc(size, GFP_KERNEL))) return NULL; - if (oldpt && oldsize) { - memcpy(pt, oldpt, oldsize); - kfree(oldpt); - } - return pt; -} - -/** - * Allocate pages. - * - * \param order size order. - * \param area memory area. (Not used.) - * \return page address on success, or zero on failure. - * - * Allocate and reserve free pages. - */ -unsigned long DRM(alloc_pages)(int order, int area) -{ - unsigned long address; - unsigned long bytes = PAGE_SIZE << order; - unsigned long addr; - unsigned int sz; - - address = __get_free_pages(GFP_KERNEL, order); - if (!address) - return 0; - - /* Zero */ - memset((void *)address, 0, bytes); - - /* Reserve */ - for (addr = address, sz = bytes; - sz > 0; - addr += PAGE_SIZE, sz -= PAGE_SIZE) { - SetPageReserved(virt_to_page(addr)); - } - - return address; -} - -/** - * Free pages. - * - * \param address address of the pages to free. - * \param order size order. - * \param area memory area. (Not used.) - * - * Unreserve and free pages allocated by alloc_pages(). - */ -void DRM(free_pages)(unsigned long address, int order, int area) -{ - unsigned long bytes = PAGE_SIZE << order; - unsigned long addr; - unsigned int sz; - - if (!address) - return; - - /* Unreserve */ - for (addr = address, sz = bytes; - sz > 0; - addr += PAGE_SIZE, sz -= PAGE_SIZE) { - ClearPageReserved(virt_to_page(addr)); - } - - free_pages(address, order); -} - -/** Wrapper around drm_ioremap() */ -void *DRM(ioremap)(unsigned long offset, unsigned long size, drm_device_t *dev) -{ - return drm_ioremap(offset, size, dev); -} - -/** Wrapper around drm_ioremap_nocache() */ -void *DRM(ioremap_nocache)(unsigned long offset, unsigned long size, drm_device_t *dev) -{ - return drm_ioremap_nocache(offset, size, dev); -} - -/** Wrapper around drm_iounmap() */ -void DRM(ioremapfree)(void *pt, unsigned long size, drm_device_t *dev) -{ - drm_ioremapfree(pt, size, dev); -} - -#if __OS_HAS_AGP -/** Wrapper around agp_allocate_memory() */ -DRM_AGP_MEM *DRM(alloc_agp)(int pages, u32 type) -{ - return DRM(agp_allocate_memory)(pages, type); -} - -/** Wrapper around agp_free_memory() */ -int DRM(free_agp)(DRM_AGP_MEM *handle, int pages) -{ - return DRM(agp_free_memory)(handle) ? 0 : -EINVAL; -} - -/** Wrapper around agp_bind_memory() */ -int DRM(bind_agp)(DRM_AGP_MEM *handle, unsigned int start) -{ - return DRM(agp_bind_memory)(handle, start); -} - -/** Wrapper around agp_unbind_memory() */ -int DRM(unbind_agp)(DRM_AGP_MEM *handle) -{ - return DRM(agp_unbind_memory)(handle); -} -#endif /* agp */ -#endif /* debug_memory */ diff --git a/linux/drm_memory_debug.h b/linux/drm_memory_debug.h deleted file mode 100644 index fb0469656..000000000 --- a/linux/drm_memory_debug.h +++ /dev/null @@ -1,459 +0,0 @@ -/** - * \file drm_memory_debug.h - * Memory management wrappers for DRM. - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <linux/config.h> -#include "drmP.h" - -typedef struct drm_mem_stats { - const char *name; - int succeed_count; - int free_count; - int fail_count; - unsigned long bytes_allocated; - unsigned long bytes_freed; -} drm_mem_stats_t; - -static spinlock_t DRM(mem_lock) = SPIN_LOCK_UNLOCKED; -static unsigned long DRM(ram_available) = 0; /* In pages */ -static unsigned long DRM(ram_used) = 0; -static drm_mem_stats_t DRM(mem_stats)[] = { - [DRM_MEM_DMA] = { "dmabufs" }, - [DRM_MEM_SAREA] = { "sareas" }, - [DRM_MEM_DRIVER] = { "driver" }, - [DRM_MEM_MAGIC] = { "magic" }, - [DRM_MEM_IOCTLS] = { "ioctltab" }, - [DRM_MEM_MAPS] = { "maplist" }, - [DRM_MEM_VMAS] = { "vmalist" }, - [DRM_MEM_BUFS] = { "buflist" }, - [DRM_MEM_SEGS] = { "seglist" }, - [DRM_MEM_PAGES] = { "pagelist" }, - [DRM_MEM_FILES] = { "files" }, - [DRM_MEM_QUEUES] = { "queues" }, - [DRM_MEM_CMDS] = { "commands" }, - [DRM_MEM_MAPPINGS] = { "mappings" }, - [DRM_MEM_BUFLISTS] = { "buflists" }, - [DRM_MEM_AGPLISTS] = { "agplist" }, - [DRM_MEM_SGLISTS] = { "sglist" }, - [DRM_MEM_TOTALAGP] = { "totalagp" }, - [DRM_MEM_BOUNDAGP] = { "boundagp" }, - [DRM_MEM_CTXBITMAP] = { "ctxbitmap"}, - [DRM_MEM_CTXLIST] = { "ctxlist" }, - [DRM_MEM_STUB] = { "stub" }, - { NULL, 0, } /* Last entry must be null */ -}; - -void DRM(mem_init)(void) -{ - drm_mem_stats_t *mem; - struct sysinfo si; - - for (mem = DRM(mem_stats); mem->name; ++mem) { - mem->succeed_count = 0; - mem->free_count = 0; - mem->fail_count = 0; - mem->bytes_allocated = 0; - mem->bytes_freed = 0; - } - - si_meminfo(&si); - DRM(ram_available) = si.totalram; - DRM(ram_used) = 0; -} - -/* drm_mem_info is called whenever a process reads /dev/drm/mem. */ - -static int DRM(_mem_info)(char *buf, char **start, off_t offset, - int request, int *eof, void *data) -{ - drm_mem_stats_t *pt; - int len = 0; - - if (offset > DRM_PROC_LIMIT) { - *eof = 1; - return 0; - } - - *eof = 0; - *start = &buf[offset]; - - DRM_PROC_PRINT(" total counts " - " | outstanding \n"); - DRM_PROC_PRINT("type alloc freed fail bytes freed" - " | allocs bytes\n\n"); - DRM_PROC_PRINT("%-9.9s %5d %5d %4d %10lu kB |\n", - "system", 0, 0, 0, - DRM(ram_available) << (PAGE_SHIFT - 10)); - DRM_PROC_PRINT("%-9.9s %5d %5d %4d %10lu kB |\n", - "locked", 0, 0, 0, DRM(ram_used) >> 10); - DRM_PROC_PRINT("\n"); - for (pt = DRM(mem_stats); pt->name; pt++) { - DRM_PROC_PRINT("%-9.9s %5d %5d %4d %10lu %10lu | %6d %10ld\n", - pt->name, - pt->succeed_count, - pt->free_count, - pt->fail_count, - pt->bytes_allocated, - pt->bytes_freed, - pt->succeed_count - pt->free_count, - (long)pt->bytes_allocated - - (long)pt->bytes_freed); - } - - if (len > request + offset) return request; - *eof = 1; - return len - offset; -} - -int DRM(mem_info)(char *buf, char **start, off_t offset, - int len, int *eof, void *data) -{ - int ret; - - spin_lock(&DRM(mem_lock)); - ret = DRM(_mem_info)(buf, start, offset, len, eof, data); - spin_unlock(&DRM(mem_lock)); - return ret; -} - -void *DRM(alloc)(size_t size, int area) -{ - void *pt; - - if (!size) { - DRM_MEM_ERROR(area, "Allocating 0 bytes\n"); - return NULL; - } - - if (!(pt = kmalloc(size, GFP_KERNEL))) { - spin_lock(&DRM(mem_lock)); - ++DRM(mem_stats)[area].fail_count; - spin_unlock(&DRM(mem_lock)); - return NULL; - } - spin_lock(&DRM(mem_lock)); - ++DRM(mem_stats)[area].succeed_count; - DRM(mem_stats)[area].bytes_allocated += size; - spin_unlock(&DRM(mem_lock)); - return pt; -} - -void *DRM(calloc)(size_t nmemb, size_t size, int area) -{ - void *addr; - - addr = DRM(alloc)(nmemb * size, area); - if (addr != NULL) - memset((void *)addr, 0, size * nmemb); - - return addr; -} - -void *DRM(realloc)(void *oldpt, size_t oldsize, size_t size, int area) -{ - void *pt; - - if (!(pt = DRM(alloc)(size, area))) return NULL; - if (oldpt && oldsize) { - memcpy(pt, oldpt, oldsize); - DRM(free)(oldpt, oldsize, area); - } - return pt; -} - -void DRM(free)(void *pt, size_t size, int area) -{ - int alloc_count; - int free_count; - - if (!pt) DRM_MEM_ERROR(area, "Attempt to free NULL pointer\n"); - else kfree(pt); - spin_lock(&DRM(mem_lock)); - DRM(mem_stats)[area].bytes_freed += size; - free_count = ++DRM(mem_stats)[area].free_count; - alloc_count = DRM(mem_stats)[area].succeed_count; - spin_unlock(&DRM(mem_lock)); - if (free_count > alloc_count) { - DRM_MEM_ERROR(area, "Excess frees: %d frees, %d allocs\n", - free_count, alloc_count); - } -} - -unsigned long DRM(alloc_pages)(int order, int area) -{ - unsigned long address; - unsigned long bytes = PAGE_SIZE << order; - unsigned long addr; - unsigned int sz; - - spin_lock(&DRM(mem_lock)); - if ((DRM(ram_used) >> PAGE_SHIFT) - > (DRM_RAM_PERCENT * DRM(ram_available)) / 100) { - spin_unlock(&DRM(mem_lock)); - return 0; - } - spin_unlock(&DRM(mem_lock)); - - address = __get_free_pages(GFP_KERNEL, order); - if (!address) { - spin_lock(&DRM(mem_lock)); - ++DRM(mem_stats)[area].fail_count; - spin_unlock(&DRM(mem_lock)); - return 0; - } - spin_lock(&DRM(mem_lock)); - ++DRM(mem_stats)[area].succeed_count; - DRM(mem_stats)[area].bytes_allocated += bytes; - DRM(ram_used) += bytes; - spin_unlock(&DRM(mem_lock)); - - - /* Zero outside the lock */ - memset((void *)address, 0, bytes); - - /* Reserve */ - for (addr = address, sz = bytes; - sz > 0; - addr += PAGE_SIZE, sz -= PAGE_SIZE) { - SetPageReserved(virt_to_page(addr)); - } - - return address; -} - -void DRM(free_pages)(unsigned long address, int order, int area) -{ - unsigned long bytes = PAGE_SIZE << order; - int alloc_count; - int free_count; - unsigned long addr; - unsigned int sz; - - if (!address) { - DRM_MEM_ERROR(area, "Attempt to free address 0\n"); - } else { - /* Unreserve */ - for (addr = address, sz = bytes; - sz > 0; - addr += PAGE_SIZE, sz -= PAGE_SIZE) { - ClearPageReserved(virt_to_page(addr)); - } - free_pages(address, order); - } - - spin_lock(&DRM(mem_lock)); - free_count = ++DRM(mem_stats)[area].free_count; - alloc_count = DRM(mem_stats)[area].succeed_count; - DRM(mem_stats)[area].bytes_freed += bytes; - DRM(ram_used) -= bytes; - spin_unlock(&DRM(mem_lock)); - if (free_count > alloc_count) { - DRM_MEM_ERROR(area, - "Excess frees: %d frees, %d allocs\n", - free_count, alloc_count); - } -} - -void *DRM(ioremap)(unsigned long offset, unsigned long size, drm_device_t *dev) -{ - void *pt; - - if (!size) { - DRM_MEM_ERROR(DRM_MEM_MAPPINGS, - "Mapping 0 bytes at 0x%08lx\n", offset); - return NULL; - } - - if (!(pt = drm_ioremap(offset, size, dev))) { - spin_lock(&DRM(mem_lock)); - ++DRM(mem_stats)[DRM_MEM_MAPPINGS].fail_count; - spin_unlock(&DRM(mem_lock)); - return NULL; - } - spin_lock(&DRM(mem_lock)); - ++DRM(mem_stats)[DRM_MEM_MAPPINGS].succeed_count; - DRM(mem_stats)[DRM_MEM_MAPPINGS].bytes_allocated += size; - spin_unlock(&DRM(mem_lock)); - return pt; -} - -void *DRM(ioremap_nocache)(unsigned long offset, unsigned long size, drm_device_t *dev) -{ - void *pt; - - if (!size) { - DRM_MEM_ERROR(DRM_MEM_MAPPINGS, - "Mapping 0 bytes at 0x%08lx\n", offset); - return NULL; - } - - if (!(pt = drm_ioremap_nocache(offset, size, dev))) { - spin_lock(&DRM(mem_lock)); - ++DRM(mem_stats)[DRM_MEM_MAPPINGS].fail_count; - spin_unlock(&DRM(mem_lock)); - return NULL; - } - spin_lock(&DRM(mem_lock)); - ++DRM(mem_stats)[DRM_MEM_MAPPINGS].succeed_count; - DRM(mem_stats)[DRM_MEM_MAPPINGS].bytes_allocated += size; - spin_unlock(&DRM(mem_lock)); - return pt; -} - -void DRM(ioremapfree)(void *pt, unsigned long size, drm_device_t *dev) -{ - int alloc_count; - int free_count; - - if (!pt) - DRM_MEM_ERROR(DRM_MEM_MAPPINGS, - "Attempt to free NULL pointer\n"); - else - drm_ioremapfree(pt, size, dev); - - spin_lock(&DRM(mem_lock)); - DRM(mem_stats)[DRM_MEM_MAPPINGS].bytes_freed += size; - free_count = ++DRM(mem_stats)[DRM_MEM_MAPPINGS].free_count; - alloc_count = DRM(mem_stats)[DRM_MEM_MAPPINGS].succeed_count; - spin_unlock(&DRM(mem_lock)); - if (free_count > alloc_count) { - DRM_MEM_ERROR(DRM_MEM_MAPPINGS, - "Excess frees: %d frees, %d allocs\n", - free_count, alloc_count); - } -} - -#if __OS_HAS_AGP - -DRM_AGP_MEM *DRM(alloc_agp)(int pages, u32 type) -{ - DRM_AGP_MEM *handle; - - if (!pages) { - DRM_MEM_ERROR(DRM_MEM_TOTALAGP, "Allocating 0 pages\n"); - return NULL; - } - - if ((handle = DRM(agp_allocate_memory)(pages, type))) { - spin_lock(&DRM(mem_lock)); - ++DRM(mem_stats)[DRM_MEM_TOTALAGP].succeed_count; - DRM(mem_stats)[DRM_MEM_TOTALAGP].bytes_allocated - += pages << PAGE_SHIFT; - spin_unlock(&DRM(mem_lock)); - return handle; - } - spin_lock(&DRM(mem_lock)); - ++DRM(mem_stats)[DRM_MEM_TOTALAGP].fail_count; - spin_unlock(&DRM(mem_lock)); - return NULL; -} - -int DRM(free_agp)(DRM_AGP_MEM *handle, int pages) -{ - int alloc_count; - int free_count; - int retval = -EINVAL; - - if (!handle) { - DRM_MEM_ERROR(DRM_MEM_TOTALAGP, - "Attempt to free NULL AGP handle\n"); - return retval; - } - - if (DRM(agp_free_memory)(handle)) { - spin_lock(&DRM(mem_lock)); - free_count = ++DRM(mem_stats)[DRM_MEM_TOTALAGP].free_count; - alloc_count = DRM(mem_stats)[DRM_MEM_TOTALAGP].succeed_count; - DRM(mem_stats)[DRM_MEM_TOTALAGP].bytes_freed - += pages << PAGE_SHIFT; - spin_unlock(&DRM(mem_lock)); - if (free_count > alloc_count) { - DRM_MEM_ERROR(DRM_MEM_TOTALAGP, - "Excess frees: %d frees, %d allocs\n", - free_count, alloc_count); - } - return 0; - } - return retval; -} - -int DRM(bind_agp)(DRM_AGP_MEM *handle, unsigned int start) -{ - int retcode = -EINVAL; - - if (!handle) { - DRM_MEM_ERROR(DRM_MEM_BOUNDAGP, - "Attempt to bind NULL AGP handle\n"); - return retcode; - } - - if (!(retcode = DRM(agp_bind_memory)(handle, start))) { - spin_lock(&DRM(mem_lock)); - ++DRM(mem_stats)[DRM_MEM_BOUNDAGP].succeed_count; - DRM(mem_stats)[DRM_MEM_BOUNDAGP].bytes_allocated - += handle->page_count << PAGE_SHIFT; - spin_unlock(&DRM(mem_lock)); - return retcode; - } - spin_lock(&DRM(mem_lock)); - ++DRM(mem_stats)[DRM_MEM_BOUNDAGP].fail_count; - spin_unlock(&DRM(mem_lock)); - return retcode; -} - -int DRM(unbind_agp)(DRM_AGP_MEM *handle) -{ - int alloc_count; - int free_count; - int retcode = -EINVAL; - - if (!handle) { - DRM_MEM_ERROR(DRM_MEM_BOUNDAGP, - "Attempt to unbind NULL AGP handle\n"); - return retcode; - } - - if ((retcode = DRM(agp_unbind_memory)(handle))) return retcode; - spin_lock(&DRM(mem_lock)); - free_count = ++DRM(mem_stats)[DRM_MEM_BOUNDAGP].free_count; - alloc_count = DRM(mem_stats)[DRM_MEM_BOUNDAGP].succeed_count; - DRM(mem_stats)[DRM_MEM_BOUNDAGP].bytes_freed - += handle->page_count << PAGE_SHIFT; - spin_unlock(&DRM(mem_lock)); - if (free_count > alloc_count) { - DRM_MEM_ERROR(DRM_MEM_BOUNDAGP, - "Excess frees: %d frees, %d allocs\n", - free_count, alloc_count); - } - return retcode; -} -#endif diff --git a/linux/drm_os_linux.h b/linux/drm_os_linux.h deleted file mode 100644 index c3f8ec0e0..000000000 --- a/linux/drm_os_linux.h +++ /dev/null @@ -1,177 +0,0 @@ -/** - * \file drm_os_linux.h - * OS abstraction macros. - */ - - -#include <linux/interrupt.h> /* For task queue support */ -#include <linux/delay.h> - -/** File pointer type */ -#define DRMFILE struct file * -/** Ioctl arguments */ -#define DRM_IOCTL_ARGS struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data -#define DRM_ERR(d) -(d) -/** Current process ID */ -#define DRM_CURRENTPID current->pid -#define DRM_UDELAY(d) udelay(d) -#if LINUX_VERSION_CODE <= 0x020608 /* KERNEL_VERSION(2,6,8) */ -/** Read a byte from a MMIO region */ -#define DRM_READ8(map, offset) readb(((unsigned long)(map)->handle) + (offset)) -/** Read a word from a MMIO region */ -#define DRM_READ16(map, offset) readw(((unsigned long)(map)->handle) + (offset)) -/** Read a dword from a MMIO region */ -#define DRM_READ32(map, offset) readl(((unsigned long)(map)->handle) + (offset)) -/** Write a byte into a MMIO region */ -#define DRM_WRITE8(map, offset, val) writeb(val, ((unsigned long)(map)->handle) + (offset)) -/** Write a word into a MMIO region */ -#define DRM_WRITE16(map, offset, val) writew(val, ((unsigned long)(map)->handle) + (offset)) -/** Write a dword into a MMIO region */ -#define DRM_WRITE32(map, offset, val) writel(val, ((unsigned long)(map)->handle) + (offset)) -#else -/** Read a byte from a MMIO region */ -#define DRM_READ8(map, offset) readb((map)->handle + (offset)) -/** Read a word from a MMIO region */ -#define DRM_READ16(map, offset) readw((map)->handle + (offset)) -/** Read a dword from a MMIO region */ -#define DRM_READ32(map, offset) readl((map)->handle + (offset)) -/** Write a byte into a MMIO region */ -#define DRM_WRITE8(map, offset, val) writeb(val, (map)->handle + (offset)) -/** Write a word into a MMIO region */ -#define DRM_WRITE16(map, offset, val) writew(val, (map)->handle + (offset)) -/** Write a dword into a MMIO region */ -#define DRM_WRITE32(map, offset, val) writel(val, (map)->handle + (offset)) -#endif -/** Read memory barrier */ -#define DRM_READMEMORYBARRIER() rmb() -/** Write memory barrier */ -#define DRM_WRITEMEMORYBARRIER() wmb() -/** Read/write memory barrier */ -#define DRM_MEMORYBARRIER() mb() -/** DRM device local declaration */ -#define DRM_DEVICE drm_file_t *priv = filp->private_data; \ - drm_device_t *dev = priv->dev - -/** IRQ handler arguments and return type and values */ -#define DRM_IRQ_ARGS int irq, void *arg, struct pt_regs *regs -/** backwards compatibility with old irq return values */ -#ifndef IRQ_HANDLED -typedef void irqreturn_t; -#define IRQ_HANDLED /* nothing */ -#define IRQ_NONE /* nothing */ -#endif - -/** AGP types */ -#if __OS_HAS_AGP -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,70) -#define DRM_AGP_MEM agp_memory -#define DRM_AGP_KERN agp_kern_info -#else -#define DRM_AGP_MEM struct agp_memory -#define DRM_AGP_KERN struct agp_kern_info -#endif -#else -/* define some dummy types for non AGP supporting kernels */ -struct no_agp_kern { - unsigned long aper_base; - unsigned long aper_size; -}; -#define DRM_AGP_MEM int -#define DRM_AGP_KERN struct no_agp_kern -#endif - -#if !(__OS_HAS_MTRR) -static __inline__ int mtrr_add (unsigned long base, unsigned long size, - unsigned int type, char increment) -{ - return -ENODEV; -} - -static __inline__ int mtrr_del (int reg, unsigned long base, - unsigned long size) -{ - return -ENODEV; -} -#define MTRR_TYPE_WRCOMB 1 -#endif - -/** Task queue handler arguments */ -#define DRM_TASKQUEUE_ARGS void *arg - -/** For data going into the kernel through the ioctl argument */ -#define DRM_COPY_FROM_USER_IOCTL(arg1, arg2, arg3) \ - if ( copy_from_user(&arg1, arg2, arg3) ) \ - return -EFAULT -/** For data going from the kernel through the ioctl argument */ -#define DRM_COPY_TO_USER_IOCTL(arg1, arg2, arg3) \ - if ( copy_to_user(arg1, &arg2, arg3) ) \ - return -EFAULT -/** Other copying of data to kernel space */ -#define DRM_COPY_FROM_USER(arg1, arg2, arg3) \ - copy_from_user(arg1, arg2, arg3) -/** Other copying of data from kernel space */ -#define DRM_COPY_TO_USER(arg1, arg2, arg3) \ - copy_to_user(arg1, arg2, arg3) -/* Macros for copyfrom user, but checking readability only once */ -#define DRM_VERIFYAREA_READ( uaddr, size ) \ - verify_area( VERIFY_READ, uaddr, size ) -#define DRM_COPY_FROM_USER_UNCHECKED(arg1, arg2, arg3) \ - __copy_from_user(arg1, arg2, arg3) -#define DRM_COPY_TO_USER_UNCHECKED(arg1, arg2, arg3) \ - __copy_to_user(arg1, arg2, arg3) -#define DRM_GET_USER_UNCHECKED(val, uaddr) \ - __get_user(val, uaddr) -#define DRM_PUT_USER_UNCHECKED(uaddr, val) \ - __put_user(val, uaddr) - - -#define DRM_GET_PRIV_WITH_RETURN(_priv, _filp) _priv = _filp->private_data - -/** - * Get the pointer to the SAREA. - * - * Searches the SAREA on the mapping lists and points drm_device::sarea to it. - */ -#define DRM_GETSAREA() \ -do { \ - drm_map_list_t *entry; \ - list_for_each_entry( entry, &dev->maplist->head, head ) { \ - if ( entry->map && \ - entry->map->type == _DRM_SHM && \ - (entry->map->flags & _DRM_CONTAINS_LOCK) ) { \ - dev_priv->sarea = entry->map; \ - break; \ - } \ - } \ -} while (0) - -#define DRM_HZ HZ - -#define DRM_WAIT_ON( ret, queue, timeout, condition ) \ -do { \ - DECLARE_WAITQUEUE(entry, current); \ - unsigned long end = jiffies + (timeout); \ - add_wait_queue(&(queue), &entry); \ - \ - for (;;) { \ - __set_current_state(TASK_INTERRUPTIBLE); \ - if (condition) \ - break; \ - if (time_after_eq(jiffies, end)) { \ - ret = -EBUSY; \ - break; \ - } \ - schedule_timeout((HZ/100 > 1) ? HZ/100 : 1); \ - if (signal_pending(current)) { \ - ret = -EINTR; \ - break; \ - } \ - } \ - __set_current_state(TASK_RUNNING); \ - remove_wait_queue(&(queue), &entry); \ -} while (0) - - -#define DRM_WAKEUP( queue ) wake_up_interruptible( queue ) -#define DRM_INIT_WAITQUEUE( queue ) init_waitqueue_head( queue ) - diff --git a/linux/drm_pci.h b/linux/drm_pci.h deleted file mode 100644 index b9d54c452..000000000 --- a/linux/drm_pci.h +++ /dev/null @@ -1,169 +0,0 @@ -/* drm_pci.h -- PCI DMA memory management wrappers for DRM -*- linux-c -*- */ -/** - * \file drm_pci.h - * \brief Functions and ioctls to manage PCI memory - * - * \warning These interfaces aren't stable yet. - * - * \todo Implement the remaining ioctl's for the PCI pools. - * \todo Add support to map these buffers. - * \todo The wrappers here are so thin that they would be better off inlined.. - * - * \author José Fonseca <jrfonseca@tungstengraphics.com> - * \author Leif Delgass <ldelgass@retinalburn.net> - */ - -/* - * Copyright 2003 José Fonseca. - * Copyright 2003 Leif Delgass. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - - -#include <linux/pci.h> -#include "drmP.h" - -/**********************************************************************/ -/** \name PCI memory */ -/*@{*/ - - -/** - * \brief Allocate a PCI consistent memory block, for DMA. - */ -void * -DRM(pci_alloc)(drm_device_t *dev, size_t size, size_t align, - dma_addr_t maxaddr, dma_addr_t *busaddr) -{ - void *address; -#if 0 - unsigned long addr; - size_t sz; -#endif -#if DRM_DEBUG_MEMORY - int area = DRM_MEM_DMA; - - spin_lock(&DRM(mem_lock)); - if ((DRM(ram_used) >> PAGE_SHIFT) - > (DRM_RAM_PERCENT * DRM(ram_available)) / 100) { - spin_unlock(&DRM(mem_lock)); - return 0; - } - spin_unlock(&DRM(mem_lock)); -#endif - - /* pci_alloc_consistent only guarantees alignment to the smallest - * PAGE_SIZE order which is greater than or equal to the requested size. - * Return NULL here for now to make sure nobody tries for larger alignment - */ - if (align > size) - return NULL; - - if (pci_set_dma_mask( dev->pdev, maxaddr ) != 0) { - DRM_ERROR( "Setting pci dma mask failed\n" ); - return NULL; - } - - address = pci_alloc_consistent( dev->pdev, size, busaddr ); - -#if DRM_DEBUG_MEMORY - if (address == NULL) { - spin_lock(&DRM(mem_lock)); - ++DRM(mem_stats)[area].fail_count; - spin_unlock(&DRM(mem_lock)); - return NULL; - } - - spin_lock(&DRM(mem_lock)); - ++DRM(mem_stats)[area].succeed_count; - DRM(mem_stats)[area].bytes_allocated += size; - DRM(ram_used) += size; - spin_unlock(&DRM(mem_lock)); -#else - if (address == NULL) - return NULL; -#endif - - memset(address, 0, size); - -#if 0 - /* XXX - Is virt_to_page() legal for consistent mem? */ - /* Reserve */ - for (addr = (unsigned long)address, sz = size; - sz > 0; - addr += PAGE_SIZE, sz -= PAGE_SIZE) { - SetPageReserved(virt_to_page(addr)); - } -#endif - - return address; -} - -/** - * \brief Free a PCI consistent memory block. - */ -void -DRM(pci_free)(drm_device_t *dev, size_t size, void *vaddr, dma_addr_t busaddr) -{ -#if 0 - unsigned long addr; - size_t sz; -#endif -#if DRM_DEBUG_MEMORY - int area = DRM_MEM_DMA; - int alloc_count; - int free_count; -#endif - - if (!vaddr) { -#if DRM_DEBUG_MEMORY - DRM_MEM_ERROR(area, "Attempt to free address 0\n"); -#endif - } else { -#if 0 - /* XXX - Is virt_to_page() legal for consistent mem? */ - /* Unreserve */ - for (addr = (unsigned long)vaddr, sz = size; - sz > 0; - addr += PAGE_SIZE, sz -= PAGE_SIZE) { - ClearPageReserved(virt_to_page(addr)); - } -#endif - pci_free_consistent( dev->pdev, size, vaddr, busaddr ); - } - -#if DRM_DEBUG_MEMORY - spin_lock(&DRM(mem_lock)); - free_count = ++DRM(mem_stats)[area].free_count; - alloc_count = DRM(mem_stats)[area].succeed_count; - DRM(mem_stats)[area].bytes_freed += size; - DRM(ram_used) -= size; - spin_unlock(&DRM(mem_lock)); - if (free_count > alloc_count) { - DRM_MEM_ERROR(area, - "Excess frees: %d frees, %d allocs\n", - free_count, alloc_count); - } -#endif - -} - -/*@}*/ diff --git a/linux/drm_proc.h b/linux/drm_proc.h deleted file mode 100644 index 7df63fbd5..000000000 --- a/linux/drm_proc.h +++ /dev/null @@ -1,538 +0,0 @@ -/** - * \file drm_proc.h - * /proc support for DRM - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - * - * \par Acknowledgements: - * Matthew J Sottek <matthew.j.sottek@intel.com> sent in a patch to fix - * the problem with the proc files not outputting all their information. - */ - -/* - * Created: Mon Jan 11 09:48:47 1999 by faith@valinux.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include "drmP.h" - -static int DRM(name_info)(char *buf, char **start, off_t offset, - int request, int *eof, void *data); -static int DRM(vm_info)(char *buf, char **start, off_t offset, - int request, int *eof, void *data); -static int DRM(clients_info)(char *buf, char **start, off_t offset, - int request, int *eof, void *data); -static int DRM(queues_info)(char *buf, char **start, off_t offset, - int request, int *eof, void *data); -static int DRM(bufs_info)(char *buf, char **start, off_t offset, - int request, int *eof, void *data); -#if DRM_DEBUG_CODE -static int DRM(vma_info)(char *buf, char **start, off_t offset, - int request, int *eof, void *data); -#endif - -/** - * Proc file list. - */ -struct drm_proc_list { - const char *name; /**< file name */ - int (*f)(char *, char **, off_t, int, int *, void *); /**< proc callback*/ -} DRM(proc_list)[] = { - { "name", DRM(name_info) }, - { "mem", DRM(mem_info) }, - { "vm", DRM(vm_info) }, - { "clients", DRM(clients_info) }, - { "queues", DRM(queues_info) }, - { "bufs", DRM(bufs_info) }, -#if DRM_DEBUG_CODE - { "vma", DRM(vma_info) }, -#endif -}; -#define DRM_PROC_ENTRIES (sizeof(DRM(proc_list))/sizeof(DRM(proc_list)[0])) - -/** - * Initialize the DRI proc filesystem for a device. - * - * \param dev DRM device. - * \param minor device minor number. - * \param root DRI proc dir entry. - * \param dev_root resulting DRI device proc dir entry. - * \return root entry pointer on success, or NULL on failure. - * - * Create the DRI proc root entry "/proc/dri", the device proc root entry - * "/proc/dri/%minor%/", and each entry in proc_list as - * "/proc/dri/%minor%/%name%". - */ -int DRM(proc_init)(drm_device_t *dev, int minor, - struct proc_dir_entry *root, - struct proc_dir_entry **dev_root) -{ - struct proc_dir_entry *ent; - int i, j; - char name[64]; - - sprintf(name, "%d", minor); - *dev_root = create_proc_entry(name, S_IFDIR, root); - if (!*dev_root) { - DRM_ERROR("Cannot create /proc/dri/%s\n", name); - return -1; - } - - for (i = 0; i < DRM_PROC_ENTRIES; i++) { - ent = create_proc_entry(DRM(proc_list)[i].name, - S_IFREG|S_IRUGO, *dev_root); - if (!ent) { - DRM_ERROR("Cannot create /proc/dri/%s/%s\n", - name, DRM(proc_list)[i].name); - for (j = 0; j < i; j++) - remove_proc_entry(DRM(proc_list)[i].name, - *dev_root); - remove_proc_entry(name, root); - return -1; - } - ent->read_proc = DRM(proc_list)[i].f; - ent->data = dev; - } - return 0; -} - - -/** - * Cleanup the proc filesystem resources. - * - * \param minor device minor number. - * \param root DRI proc dir entry. - * \param dev_root DRI device proc dir entry. - * \return always zero. - * - * Remove all proc entries created by proc_init(). - */ -int DRM(proc_cleanup)(int minor, struct proc_dir_entry *root, - struct proc_dir_entry *dev_root) -{ - int i; - char name[64]; - - if (!root || !dev_root) return 0; - - for (i = 0; i < DRM_PROC_ENTRIES; i++) - remove_proc_entry(DRM(proc_list)[i].name, dev_root); - sprintf(name, "%d", minor); - remove_proc_entry(name, root); - - return 0; -} - -/** - * Called when "/proc/dri/.../name" is read. - * - * \param buf output buffer. - * \param start start of output data. - * \param offset requested start offset. - * \param request requested number of bytes. - * \param eof whether there is no more data to return. - * \param data private data. - * \return number of written bytes. - * - * Prints the device name together with the bus id if available. - */ -static int DRM(name_info)(char *buf, char **start, off_t offset, int request, - int *eof, void *data) -{ - drm_device_t *dev = (drm_device_t *)data; - int len = 0; - - if (offset > DRM_PROC_LIMIT) { - *eof = 1; - return 0; - } - - *start = &buf[offset]; - *eof = 0; - - if (dev->unique) { - DRM_PROC_PRINT("%s 0x%lx %s\n", - dev->name, (long)old_encode_dev(dev->device), dev->unique); - } else { - DRM_PROC_PRINT("%s 0x%lx\n", dev->name, (long)old_encode_dev(dev->device)); - } - - if (len > request + offset) return request; - *eof = 1; - return len - offset; -} - -/** - * Called when "/proc/dri/.../vm" is read. - * - * \param buf output buffer. - * \param start start of output data. - * \param offset requested start offset. - * \param request requested number of bytes. - * \param eof whether there is no more data to return. - * \param data private data. - * \return number of written bytes. - * - * Prints information about all mappings in drm_device::maplist. - */ -static int DRM(_vm_info)(char *buf, char **start, off_t offset, int request, - int *eof, void *data) -{ - drm_device_t *dev = (drm_device_t *)data; - int len = 0; - drm_map_t *map; - drm_map_list_t *r_list; - struct list_head *list; - - /* Hardcoded from _DRM_FRAME_BUFFER, - _DRM_REGISTERS, _DRM_SHM, _DRM_AGP, and - _DRM_SCATTER_GATHER. */ - const char *types[] = { "FB", "REG", "SHM", "AGP", "SG" }; - const char *type; - int i; - - if (offset > DRM_PROC_LIMIT) { - *eof = 1; - return 0; - } - - *start = &buf[offset]; - *eof = 0; - - DRM_PROC_PRINT("slot offset size type flags " - "address mtrr\n\n"); - i = 0; - if (dev->maplist != NULL) list_for_each(list, &dev->maplist->head) { - r_list = list_entry(list, drm_map_list_t, head); - map = r_list->map; - if(!map) continue; - if (map->type < 0 || map->type > 4) type = "??"; - else type = types[map->type]; - DRM_PROC_PRINT("%4d 0x%08lx 0x%08lx %4.4s 0x%02x 0x%08lx ", - i, - map->offset, - map->size, - type, - map->flags, - (unsigned long)map->handle); - if (map->mtrr < 0) { - DRM_PROC_PRINT("none\n"); - } else { - DRM_PROC_PRINT("%4d\n", map->mtrr); - } - i++; - } - - if (len > request + offset) return request; - *eof = 1; - return len - offset; -} - -/** - * Simply calls _vm_info() while holding the drm_device::struct_sem lock. - */ -static int DRM(vm_info)(char *buf, char **start, off_t offset, int request, - int *eof, void *data) -{ - drm_device_t *dev = (drm_device_t *)data; - int ret; - - down(&dev->struct_sem); - ret = DRM(_vm_info)(buf, start, offset, request, eof, data); - up(&dev->struct_sem); - return ret; -} - -/** - * Called when "/proc/dri/.../queues" is read. - * - * \param buf output buffer. - * \param start start of output data. - * \param offset requested start offset. - * \param request requested number of bytes. - * \param eof whether there is no more data to return. - * \param data private data. - * \return number of written bytes. - */ -static int DRM(_queues_info)(char *buf, char **start, off_t offset, - int request, int *eof, void *data) -{ - drm_device_t *dev = (drm_device_t *)data; - int len = 0; - int i; - drm_queue_t *q; - - if (offset > DRM_PROC_LIMIT) { - *eof = 1; - return 0; - } - - *start = &buf[offset]; - *eof = 0; - - DRM_PROC_PRINT(" ctx/flags use fin" - " blk/rw/rwf wait flushed queued" - " locks\n\n"); - for (i = 0; i < dev->queue_count; i++) { - q = dev->queuelist[i]; - atomic_inc(&q->use_count); - DRM_PROC_PRINT_RET(atomic_dec(&q->use_count), - "%5d/0x%03x %5d %5d" - " %5d/%c%c/%c%c%c %5Zd\n", - i, - q->flags, - atomic_read(&q->use_count), - atomic_read(&q->finalization), - atomic_read(&q->block_count), - atomic_read(&q->block_read) ? 'r' : '-', - atomic_read(&q->block_write) ? 'w' : '-', - waitqueue_active(&q->read_queue) ? 'r':'-', - waitqueue_active(&q->write_queue) ? 'w':'-', - waitqueue_active(&q->flush_queue) ? 'f':'-', - DRM_BUFCOUNT(&q->waitlist)); - atomic_dec(&q->use_count); - } - - if (len > request + offset) return request; - *eof = 1; - return len - offset; -} - -/** - * Simply calls _queues_info() while holding the drm_device::struct_sem lock. - */ -static int DRM(queues_info)(char *buf, char **start, off_t offset, int request, - int *eof, void *data) -{ - drm_device_t *dev = (drm_device_t *)data; - int ret; - - down(&dev->struct_sem); - ret = DRM(_queues_info)(buf, start, offset, request, eof, data); - up(&dev->struct_sem); - return ret; -} - -/** - * Called when "/proc/dri/.../bufs" is read. - * - * \param buf output buffer. - * \param start start of output data. - * \param offset requested start offset. - * \param request requested number of bytes. - * \param eof whether there is no more data to return. - * \param data private data. - * \return number of written bytes. - */ -static int DRM(_bufs_info)(char *buf, char **start, off_t offset, int request, - int *eof, void *data) -{ - drm_device_t *dev = (drm_device_t *)data; - int len = 0; - drm_device_dma_t *dma = dev->dma; - int i; - - if (!dma || offset > DRM_PROC_LIMIT) { - *eof = 1; - return 0; - } - - *start = &buf[offset]; - *eof = 0; - - DRM_PROC_PRINT(" o size count free segs pages kB\n\n"); - for (i = 0; i <= DRM_MAX_ORDER; i++) { - if (dma->bufs[i].buf_count) - DRM_PROC_PRINT("%2d %8d %5d %5d %5d %5d %5ld\n", - i, - dma->bufs[i].buf_size, - dma->bufs[i].buf_count, - atomic_read(&dma->bufs[i] - .freelist.count), - dma->bufs[i].seg_count, - dma->bufs[i].seg_count - *(1 << dma->bufs[i].page_order), - (dma->bufs[i].seg_count - * (1 << dma->bufs[i].page_order)) - * PAGE_SIZE / 1024); - } - DRM_PROC_PRINT("\n"); - for (i = 0; i < dma->buf_count; i++) { - if (i && !(i%32)) DRM_PROC_PRINT("\n"); - DRM_PROC_PRINT(" %d", dma->buflist[i]->list); - } - DRM_PROC_PRINT("\n"); - - if (len > request + offset) return request; - *eof = 1; - return len - offset; -} - -/** - * Simply calls _bufs_info() while holding the drm_device::struct_sem lock. - */ -static int DRM(bufs_info)(char *buf, char **start, off_t offset, int request, - int *eof, void *data) -{ - drm_device_t *dev = (drm_device_t *)data; - int ret; - - down(&dev->struct_sem); - ret = DRM(_bufs_info)(buf, start, offset, request, eof, data); - up(&dev->struct_sem); - return ret; -} - -/** - * Called when "/proc/dri/.../clients" is read. - * - * \param buf output buffer. - * \param start start of output data. - * \param offset requested start offset. - * \param request requested number of bytes. - * \param eof whether there is no more data to return. - * \param data private data. - * \return number of written bytes. - */ -static int DRM(_clients_info)(char *buf, char **start, off_t offset, - int request, int *eof, void *data) -{ - drm_device_t *dev = (drm_device_t *)data; - int len = 0; - drm_file_t *priv; - - if (offset > DRM_PROC_LIMIT) { - *eof = 1; - return 0; - } - - *start = &buf[offset]; - *eof = 0; - - DRM_PROC_PRINT("a dev pid uid magic ioctls\n\n"); - for (priv = dev->file_first; priv; priv = priv->next) { - DRM_PROC_PRINT("%c %3d %5d %5d %10u %10lu\n", - priv->authenticated ? 'y' : 'n', - priv->minor, - priv->pid, - priv->uid, - priv->magic, - priv->ioctl_count); - } - - if (len > request + offset) return request; - *eof = 1; - return len - offset; -} - -/** - * Simply calls _clients_info() while holding the drm_device::struct_sem lock. - */ -static int DRM(clients_info)(char *buf, char **start, off_t offset, - int request, int *eof, void *data) -{ - drm_device_t *dev = (drm_device_t *)data; - int ret; - - down(&dev->struct_sem); - ret = DRM(_clients_info)(buf, start, offset, request, eof, data); - up(&dev->struct_sem); - return ret; -} - -#if DRM_DEBUG_CODE - -static int DRM(_vma_info)(char *buf, char **start, off_t offset, int request, - int *eof, void *data) -{ - drm_device_t *dev = (drm_device_t *)data; - int len = 0; - drm_vma_entry_t *pt; - struct vm_area_struct *vma; -#if defined(__i386__) - unsigned int pgprot; -#endif - - if (offset > DRM_PROC_LIMIT) { - *eof = 1; - return 0; - } - - *start = &buf[offset]; - *eof = 0; - - DRM_PROC_PRINT("vma use count: %d, high_memory = %p, 0x%08lx\n", - atomic_read(&dev->vma_count), - high_memory, virt_to_phys(high_memory)); - for (pt = dev->vmalist; pt; pt = pt->next) { - if (!(vma = pt->vma)) continue; - DRM_PROC_PRINT("\n%5d 0x%08lx-0x%08lx %c%c%c%c%c%c 0x%08lx", - pt->pid, - vma->vm_start, - vma->vm_end, - vma->vm_flags & VM_READ ? 'r' : '-', - vma->vm_flags & VM_WRITE ? 'w' : '-', - vma->vm_flags & VM_EXEC ? 'x' : '-', - vma->vm_flags & VM_MAYSHARE ? 's' : 'p', - vma->vm_flags & VM_LOCKED ? 'l' : '-', - vma->vm_flags & VM_IO ? 'i' : '-', - VM_OFFSET(vma)); - -#if defined(__i386__) - pgprot = pgprot_val(vma->vm_page_prot); - DRM_PROC_PRINT(" %c%c%c%c%c%c%c%c%c", - pgprot & _PAGE_PRESENT ? 'p' : '-', - pgprot & _PAGE_RW ? 'w' : 'r', - pgprot & _PAGE_USER ? 'u' : 's', - pgprot & _PAGE_PWT ? 't' : 'b', - pgprot & _PAGE_PCD ? 'u' : 'c', - pgprot & _PAGE_ACCESSED ? 'a' : '-', - pgprot & _PAGE_DIRTY ? 'd' : '-', - pgprot & _PAGE_PSE ? 'm' : 'k', - pgprot & _PAGE_GLOBAL ? 'g' : 'l' ); -#endif - DRM_PROC_PRINT("\n"); - } - - if (len > request + offset) return request; - *eof = 1; - return len - offset; -} - -static int DRM(vma_info)(char *buf, char **start, off_t offset, int request, - int *eof, void *data) -{ - drm_device_t *dev = (drm_device_t *)data; - int ret; - - down(&dev->struct_sem); - ret = DRM(_vma_info)(buf, start, offset, request, eof, data); - up(&dev->struct_sem); - return ret; -} -#endif - - diff --git a/linux/drm_scatter.h b/linux/drm_scatter.h deleted file mode 100644 index 436a0170e..000000000 --- a/linux/drm_scatter.h +++ /dev/null @@ -1,231 +0,0 @@ -/** - * \file drm_scatter.h - * IOCTLs to manage scatter/gather memory - * - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Created: Mon Dec 18 23:20:54 2000 by gareth@valinux.com - * - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include <linux/config.h> -#include <linux/vmalloc.h> -#include "drmP.h" - -#define DEBUG_SCATTER 0 - -void DRM(sg_cleanup)( drm_sg_mem_t *entry ) -{ - struct page *page; - int i; - - for ( i = 0 ; i < entry->pages ; i++ ) { - page = entry->pagelist[i]; - if ( page ) - ClearPageReserved( page ); - } - - vfree( entry->virtual ); - - DRM(free)( entry->busaddr, - entry->pages * sizeof(*entry->busaddr), - DRM_MEM_PAGES ); - DRM(free)( entry->pagelist, - entry->pages * sizeof(*entry->pagelist), - DRM_MEM_PAGES ); - DRM(free)( entry, - sizeof(*entry), - DRM_MEM_SGLISTS ); -} - -int DRM(sg_alloc)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_scatter_gather_t __user *argp = (void __user *)arg; - drm_scatter_gather_t request; - drm_sg_mem_t *entry; - unsigned long pages, i, j; - - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - if (!drm_core_check_feature(dev, DRIVER_SG)) - return -EINVAL; - - if ( dev->sg ) - return -EINVAL; - - if ( copy_from_user( &request, argp, sizeof(request) ) ) - return -EFAULT; - - entry = DRM(alloc)( sizeof(*entry), DRM_MEM_SGLISTS ); - if ( !entry ) - return -ENOMEM; - - memset( entry, 0, sizeof(*entry) ); - - pages = (request.size + PAGE_SIZE - 1) / PAGE_SIZE; - DRM_DEBUG( "sg size=%ld pages=%ld\n", request.size, pages ); - - entry->pages = pages; - entry->pagelist = DRM(alloc)( pages * sizeof(*entry->pagelist), - DRM_MEM_PAGES ); - if ( !entry->pagelist ) { - DRM(free)( entry, sizeof(*entry), DRM_MEM_SGLISTS ); - return -ENOMEM; - } - - memset(entry->pagelist, 0, pages * sizeof(*entry->pagelist)); - - entry->busaddr = DRM(alloc)( pages * sizeof(*entry->busaddr), - DRM_MEM_PAGES ); - if ( !entry->busaddr ) { - DRM(free)( entry->pagelist, - entry->pages * sizeof(*entry->pagelist), - DRM_MEM_PAGES ); - DRM(free)( entry, - sizeof(*entry), - DRM_MEM_SGLISTS ); - return -ENOMEM; - } - memset( (void *)entry->busaddr, 0, pages * sizeof(*entry->busaddr) ); - - entry->virtual = vmalloc_32( pages << PAGE_SHIFT ); - if ( !entry->virtual ) { - DRM(free)( entry->busaddr, - entry->pages * sizeof(*entry->busaddr), - DRM_MEM_PAGES ); - DRM(free)( entry->pagelist, - entry->pages * sizeof(*entry->pagelist), - DRM_MEM_PAGES ); - DRM(free)( entry, - sizeof(*entry), - DRM_MEM_SGLISTS ); - return -ENOMEM; - } - - /* This also forces the mapping of COW pages, so our page list - * will be valid. Please don't remove it... - */ - memset( entry->virtual, 0, pages << PAGE_SHIFT ); - - entry->handle = (unsigned long)entry->virtual; - - DRM_DEBUG( "sg alloc handle = %08lx\n", entry->handle ); - DRM_DEBUG( "sg alloc virtual = %p\n", entry->virtual ); - - for ( i = entry->handle, j = 0 ; j < pages ; i += PAGE_SIZE, j++ ) { - entry->pagelist[j] = vmalloc_to_page((void *)i); - if (!entry->pagelist[j]) - goto failed; - SetPageReserved(entry->pagelist[j]); - } - - request.handle = entry->handle; - - if ( copy_to_user( argp, &request, sizeof(request) ) ) { - DRM(sg_cleanup)( entry ); - return -EFAULT; - } - - dev->sg = entry; - -#if DEBUG_SCATTER - /* Verify that each page points to its virtual address, and vice - * versa. - */ - { - int error = 0; - - for ( i = 0 ; i < pages ; i++ ) { - unsigned long *tmp; - - tmp = page_address( entry->pagelist[i] ); - for ( j = 0 ; - j < PAGE_SIZE / sizeof(unsigned long) ; - j++, tmp++ ) { - *tmp = 0xcafebabe; - } - tmp = (unsigned long *)((u8 *)entry->virtual + - (PAGE_SIZE * i)); - for( j = 0 ; - j < PAGE_SIZE / sizeof(unsigned long) ; - j++, tmp++ ) { - if ( *tmp != 0xcafebabe && error == 0 ) { - error = 1; - DRM_ERROR( "Scatter allocation error, " - "pagelist does not match " - "virtual mapping\n" ); - } - } - tmp = page_address( entry->pagelist[i] ); - for(j = 0 ; - j < PAGE_SIZE / sizeof(unsigned long) ; - j++, tmp++) { - *tmp = 0; - } - } - if (error == 0) - DRM_ERROR( "Scatter allocation matches pagelist\n" ); - } -#endif - - return 0; - - failed: - DRM(sg_cleanup)( entry ); - return -ENOMEM; -} - -int DRM(sg_free)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_scatter_gather_t request; - drm_sg_mem_t *entry; - - if (!drm_core_check_feature(dev, DRIVER_SG)) - return -EINVAL; - - if ( copy_from_user( &request, - (drm_scatter_gather_t __user *)arg, - sizeof(request) ) ) - return -EFAULT; - - entry = dev->sg; - dev->sg = NULL; - - if ( !entry || entry->handle != request.handle ) - return -EINVAL; - - DRM_DEBUG( "sg free virtual = %p\n", entry->virtual ); - - DRM(sg_cleanup)( entry ); - - return 0; -} diff --git a/linux/drm_stub.h b/linux/drm_stub.h deleted file mode 100644 index a09f08b89..000000000 --- a/linux/drm_stub.h +++ /dev/null @@ -1,358 +0,0 @@ -/** - * \file drm_stub.h - * Stub support - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - */ - -/* - * Created: Fri Jan 19 10:48:35 2001 by faith@acm.org - * - * Copyright 2001 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include "drmP.h" - -static unsigned int cards_limit = 16; /* Enough for one machine */ -static unsigned int debug = 0; /* 1 to enable debug output */ - -MODULE_AUTHOR( DRIVER_AUTHOR ); -MODULE_DESCRIPTION( DRIVER_DESC ); -MODULE_LICENSE("GPL and additional rights"); -MODULE_PARM_DESC(cards_limit, "Maximum number of graphics cards"); -MODULE_PARM_DESC(debug, "Enable debug output"); - -module_param(cards_limit, int, 0444); -module_param(debug, int, 0666); - -drm_global_t *DRM(global); - -/** - * File \c open operation. - * - * \param inode device inode. - * \param filp file pointer. - * - * Puts the dev->fops corresponding to the device minor number into - * \p filp, call the \c open method, and restore the file operations. - */ -static int stub_open(struct inode *inode, struct file *filp) -{ - drm_device_t *dev = NULL; - int minor = iminor(inode); - int err = -ENODEV; - struct file_operations *old_fops; - - DRM_DEBUG("\n"); - - if (!((minor >= 0) && (minor < DRM(global)->cards_limit))) - return -ENODEV; - - dev = DRM(global)->minors[minor].dev; - if (!dev) - return -ENODEV; - - old_fops = filp->f_op; - filp->f_op = fops_get(dev->fops); - if (filp->f_op->open && (err = filp->f_op->open(inode, filp))) { - fops_put(filp->f_op); - filp->f_op = fops_get(old_fops); - } - fops_put(old_fops); - - return err; -} - -/** File operations structure */ -static struct file_operations DRM(stub_fops) = { - .owner = THIS_MODULE, - .open = stub_open -}; - - -/** - * Get a device minor number. - * - * \param pdev PCI device structure - * \param ent entry from the PCI ID table with device type flags - * \return negative number on failure. - * - * Search an empty entry and initialize it to the given parameters, and - * create the proc init entry via proc_init(). - */ -static int get_minor(struct pci_dev *pdev, const struct pci_device_id *ent) -{ - struct class_device *dev_class; - drm_device_t *dev; - int ret; - int minor; - drm_minor_t *minors = &DRM(global)->minors[0]; - - DRM_DEBUG("\n"); - - for (minor = 0; minor < DRM(global)->cards_limit; minor++, minors++) { - if (minors->class == DRM_MINOR_FREE) { - - DRM_DEBUG("assigning minor %d\n", minor); - dev = DRM(calloc)(1, sizeof(*dev), DRM_MEM_STUB); - if(!dev) - return -ENOMEM; - - *minors = (drm_minor_t){.dev = dev, .class = DRM_MINOR_PRIMARY}; - dev->minor = minor; - if ((ret = DRM(fill_in_dev)(dev, pdev, ent))) { - printk (KERN_ERR "DRM: Fill_in_dev failed.\n"); - goto err_g1; - } - if ((ret = DRM(proc_init)(dev, minor, DRM(global)->proc_root, &minors->dev_root))) { - printk (KERN_ERR "DRM: Failed to initialize /proc/dri.\n"); - goto err_g1; - } - if (!DRM(fb_loaded)) { - pci_set_drvdata(pdev, dev); - pci_request_regions(pdev, DRIVER_NAME); - pci_enable_device(pdev); - } - dev_class = DRM(sysfs_device_add)(DRM(global)->drm_class, - MKDEV(DRM_MAJOR, minor), DRM_PCI_DEV(pdev), "card%d", minor); - if (IS_ERR(dev_class)) { - printk (KERN_ERR "DRM: Error sysfs_device_add.\n"); - ret = PTR_ERR(dev_class); - goto err_g2; - } - - DRM_DEBUG("new primary minor assigned %d\n", minor); - return 0; - } - } - DRM_ERROR("out of minors\n"); - return -ENOMEM; -err_g2: - if (!DRM(fb_loaded)) { - pci_set_drvdata(pdev, NULL); - pci_release_regions(pdev); - pci_disable_device(pdev); - } - DRM(proc_cleanup)(minor, DRM(global)->proc_root, minors->dev_root); -err_g1: - *minors = (drm_minor_t){.dev = NULL, .class = DRM_MINOR_FREE}; - DRM(free)(dev, sizeof(*dev), DRM_MEM_STUB); - return ret; -} - -/** - * Get a secondary minor number. - * - * \param dev device data structure - * \param sec-minor structure to hold the assigned minor - * \return negative number on failure. - * - * Search an empty entry and initialize it to the given parameters, and - * create the proc init entry via proc_init(). This routines assigns - * minor numbers to secondary heads of multi-headed cards - */ -int DRM(get_secondary_minor)(drm_device_t *dev, drm_minor_t **sec_minor) -{ - drm_minor_t *minors = &DRM(global)->minors[0]; - struct class_device *dev_class; - int ret; - int minor; - - DRM_DEBUG("\n"); - - for (minor = 0; minor < DRM(global)->cards_limit; minor++, minors++) { - if (minors->class == DRM_MINOR_FREE) { - - *minors = (drm_minor_t){.dev = dev, .class = DRM_MINOR_SECONDARY}; - if ((ret = DRM(proc_init)(dev, minor, DRM(global)->proc_root, &minors->dev_root))) { - printk (KERN_ERR "DRM: Failed to initialize /proc/dri.\n"); - goto err_g1; - } - - dev_class = DRM(sysfs_device_add)(DRM(global)->drm_class, - MKDEV(DRM_MAJOR, minor), DRM_PCI_DEV(dev->pdev), "card%d", minor); - if (IS_ERR(dev_class)) { - printk (KERN_ERR "DRM: Error sysfs_device_add.\n"); - ret = PTR_ERR(dev_class); - goto err_g2; - } - *sec_minor = minors; - - DRM_DEBUG("new secondary minor assigned %d\n", minor); - return 0; - } - } - DRM_ERROR("out of minors\n"); - return -ENOMEM; -err_g2: - DRM(proc_cleanup)(minor, DRM(global)->proc_root, minors->dev_root); -err_g1: - *minors = (drm_minor_t){.dev = NULL, .class = DRM_MINOR_FREE}; - DRM(free)(dev, sizeof(*dev), DRM_MEM_STUB); - return ret; -} - -/** - * Put a device minor number. - * - * \param dev device data structure - * \return always zero - * - * Cleans up the proc resources. If it is the last minor then release the foreign - * "drm" data, otherwise unregisters the "drm" data, frees the dev list and - * unregisters the character device. - */ -int DRM(put_minor)(drm_device_t *dev) -{ - drm_minor_t *minors = &DRM(global)->minors[dev->minor]; - int i; - - DRM_DEBUG("release primary minor %d\n", dev->minor); - - DRM(proc_cleanup)(dev->minor, DRM(global)->proc_root, minors->dev_root); - DRM(sysfs_device_remove)(MKDEV(DRM_MAJOR, dev->minor)); - - *minors = (drm_minor_t){.dev = NULL, .class = DRM_MINOR_FREE}; - DRM(free)(dev, sizeof(*dev), DRM_MEM_STUB); - - /* if any device pointers are non-NULL we are not the last module */ - for (i = 0; i < DRM(global)->cards_limit; i++) { - if (DRM(global)->minors[i].class != DRM_MINOR_FREE) { - DRM_DEBUG("inter_module_put called\n"); - inter_module_put("drm"); - return 0; - } - } - DRM_DEBUG("unregistering inter_module \n"); - inter_module_unregister("drm"); - remove_proc_entry("dri", NULL); - DRM(sysfs_destroy)(DRM(global)->drm_class); - - unregister_chrdev(DRM_MAJOR, "drm"); - - DRM(free)(DRM(global)->minors, sizeof(*DRM(global)->minors) * - DRM(global)->cards_limit, DRM_MEM_STUB); - DRM(free)(DRM(global), sizeof(*DRM(global)), DRM_MEM_STUB); - DRM(global) = NULL; - - return 0; -} - -/** - * Put a secondary minor number. - * - * \param sec_minor - structure to be released - * \return always zero - * - * Cleans up the proc resources. Not legal for this to be the - * last minor released. - * - */ -int DRM(put_secondary_minor)(drm_minor_t *sec_minor) -{ - int minor = sec_minor - &DRM(global)->minors[0]; - - DRM_DEBUG("release secondary minor %d\n", minor); - - DRM(proc_cleanup)(minor, DRM(global)->proc_root, sec_minor->dev_root); - DRM(sysfs_device_remove)(MKDEV(DRM_MAJOR, minor)); - - *sec_minor = (drm_minor_t){.dev = NULL, .class = DRM_MINOR_FREE}; - - return 0; -} - -/** - * Register. - * - * \param pdev - PCI device structure - * \param ent entry from the PCI ID table with device type flags - * \return zero on success or a negative number on failure. - * - * Attempt to gets inter module "drm" information. If we are first - * then register the character device and inter module information. - * Try and register, if we fail to register, backout previous work. - */ -int DRM(probe)(struct pci_dev *pdev, const struct pci_device_id *ent) -{ - drm_global_t *global; - int ret = -ENOMEM; - - DRM_DEBUG("\n"); - - /* use the inter_module_get to check - as if the same module - registers chrdev twice it succeeds */ - global = (drm_global_t *)inter_module_get("drm"); - if (global) { - DRM(global) = global; - global = NULL; - } else { - DRM_DEBUG("first probe\n"); - - global = DRM(calloc)(1, sizeof(*global), DRM_MEM_STUB); - if(!global) - return -ENOMEM; - - global->cards_limit = (cards_limit < DRM_MAX_MINOR + 1 ? cards_limit : DRM_MAX_MINOR + 1); - global->minors = DRM(calloc)(global->cards_limit, - sizeof(*global->minors), DRM_MEM_STUB); - if(!global->minors) - goto err_p1; - - if (register_chrdev(DRM_MAJOR, "drm", &DRM(stub_fops))) - goto err_p1; - - global->drm_class = DRM(sysfs_create)(THIS_MODULE, "drm"); - if (IS_ERR(global->drm_class)) { - printk (KERN_ERR "DRM: Error creating drm class.\n"); - ret = PTR_ERR(global->drm_class); - goto err_p2; - } - - global->proc_root = create_proc_entry("dri", S_IFDIR, NULL); - if (!global->proc_root) { - DRM_ERROR("Cannot create /proc/dri\n"); - ret = -1; - goto err_p3; - } - DRM_DEBUG("calling inter_module_register\n"); - inter_module_register("drm", THIS_MODULE, global); - - DRM(global) = global; - } - if ((ret = get_minor(pdev, ent))) { - if (global) - goto err_p3; - return ret; - } - return 0; -err_p3: - DRM(sysfs_destroy)(global->drm_class); -err_p2: - unregister_chrdev(DRM_MAJOR, "drm"); - DRM(free)(global->minors, sizeof(*global->minors) * global->cards_limit, DRM_MEM_STUB); -err_p1: - DRM(free)(global, sizeof(*global), DRM_MEM_STUB); - DRM(global) = NULL; - return ret; -} diff --git a/linux/drm_vm.h b/linux/drm_vm.h deleted file mode 100644 index 30b0e73ea..000000000 --- a/linux/drm_vm.h +++ /dev/null @@ -1,670 +0,0 @@ -/** - * \file drm_vm.h - * Memory mapping for DRM - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Created: Mon Jan 4 08:58:31 1999 by faith@valinux.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include "drmP.h" - - -/** - * \c nopage method for AGP virtual memory. - * - * \param vma virtual memory area. - * \param address access address. - * \return pointer to the page structure. - * - * Find the right map and if it's AGP memory find the real physical page to - * map, get the page, increment the use count and return it. - */ -#if __OS_HAS_AGP -static __inline__ struct page *DRM(do_vm_nopage)(struct vm_area_struct *vma, - unsigned long address) -{ - drm_file_t *priv = vma->vm_file->private_data; - drm_device_t *dev = priv->dev; - drm_map_t *map = NULL; - drm_map_list_t *r_list; - struct list_head *list; - - /* - * Find the right map - */ - if (!drm_core_has_AGP(dev)) - goto vm_nopage_error; - - if(!dev->agp || !dev->agp->cant_use_aperture) goto vm_nopage_error; - - list_for_each(list, &dev->maplist->head) { - r_list = list_entry(list, drm_map_list_t, head); - map = r_list->map; - if (!map) continue; - if (map->offset == VM_OFFSET(vma)) break; - } - - if (map && map->type == _DRM_AGP) { - unsigned long offset = address - vma->vm_start; - unsigned long baddr = VM_OFFSET(vma) + offset; - struct drm_agp_mem *agpmem; - struct page *page; - -#ifdef __alpha__ - /* - * Adjust to a bus-relative address - */ - baddr -= dev->hose->mem_space->start; -#endif - - /* - * It's AGP memory - find the real physical page to map - */ - for(agpmem = dev->agp->memory; agpmem; agpmem = agpmem->next) { - if (agpmem->bound <= baddr && - agpmem->bound + agpmem->pages * PAGE_SIZE > baddr) - break; - } - - if (!agpmem) goto vm_nopage_error; - - /* - * Get the page, inc the use count, and return it - */ - offset = (baddr - agpmem->bound) >> PAGE_SHIFT; - page = virt_to_page(__va(agpmem->memory->memory[offset])); - get_page(page); - -#if 0 - /* page_count() not defined everywhere */ - DRM_DEBUG("baddr = 0x%lx page = 0x%p, offset = 0x%lx, count=%d\n", - baddr, __va(agpmem->memory->memory[offset]), offset, - page_count(page)); -#endif - - return page; - } -vm_nopage_error: - return NOPAGE_SIGBUS; /* Disallow mremap */ -} -#else /* __OS_HAS_AGP */ -static __inline__ struct page *DRM(do_vm_nopage)(struct vm_area_struct *vma, - unsigned long address) -{ - return NOPAGE_SIGBUS; -} -#endif /* __OS_HAS_AGP */ - -/** - * \c nopage method for shared virtual memory. - * - * \param vma virtual memory area. - * \param address access address. - * \return pointer to the page structure. - * - * Get the the mapping, find the real physical page to map, get the page, and - * return it. - */ -static __inline__ struct page *DRM(do_vm_shm_nopage)(struct vm_area_struct *vma, - unsigned long address) -{ - drm_map_t *map = (drm_map_t *)vma->vm_private_data; - unsigned long offset; - unsigned long i; - struct page *page; - - if (address > vma->vm_end) return NOPAGE_SIGBUS; /* Disallow mremap */ - if (!map) return NOPAGE_OOM; /* Nothing allocated */ - - offset = address - vma->vm_start; - i = (unsigned long)map->handle + offset; - page = vmalloc_to_page((void *)i); - if (!page) - return NOPAGE_OOM; - get_page(page); - - DRM_DEBUG("shm_nopage 0x%lx\n", address); - return page; -} - - -/** - * \c close method for shared virtual memory. - * - * \param vma virtual memory area. - * - * Deletes map information if we are the last - * person to close a mapping and it's not in the global maplist. - */ -void DRM(vm_shm_close)(struct vm_area_struct *vma) -{ - drm_file_t *priv = vma->vm_file->private_data; - drm_device_t *dev = priv->dev; - drm_vma_entry_t *pt, *prev, *next; - drm_map_t *map; - drm_map_list_t *r_list; - struct list_head *list; - int found_maps = 0; - - DRM_DEBUG("0x%08lx,0x%08lx\n", - vma->vm_start, vma->vm_end - vma->vm_start); - atomic_dec(&dev->vma_count); - - map = vma->vm_private_data; - - down(&dev->struct_sem); - for (pt = dev->vmalist, prev = NULL; pt; pt = next) { - next = pt->next; - if (pt->vma->vm_private_data == map) found_maps++; - if (pt->vma == vma) { - if (prev) { - prev->next = pt->next; - } else { - dev->vmalist = pt->next; - } - DRM(free)(pt, sizeof(*pt), DRM_MEM_VMAS); - } else { - prev = pt; - } - } - /* We were the only map that was found */ - if(found_maps == 1 && - map->flags & _DRM_REMOVABLE) { - /* Check to see if we are in the maplist, if we are not, then - * we delete this mappings information. - */ - found_maps = 0; - list = &dev->maplist->head; - list_for_each(list, &dev->maplist->head) { - r_list = list_entry(list, drm_map_list_t, head); - if (r_list->map == map) found_maps++; - } - - if(!found_maps) { - switch (map->type) { - case _DRM_REGISTERS: - case _DRM_FRAME_BUFFER: - if (drm_core_has_MTRR(dev) && map->mtrr >= 0) { - int retcode; - retcode = mtrr_del(map->mtrr, - map->offset, - map->size); - DRM_DEBUG("mtrr_del = %d\n", retcode); - } - DRM(ioremapfree)(map->handle, map->size, dev); - break; - case _DRM_SHM: - vfree(map->handle); - break; - case _DRM_AGP: - case _DRM_SCATTER_GATHER: - break; - } - DRM(free)(map, sizeof(*map), DRM_MEM_MAPS); - } - } - up(&dev->struct_sem); -} - -/** - * \c nopage method for DMA virtual memory. - * - * \param vma virtual memory area. - * \param address access address. - * \return pointer to the page structure. - * - * Determine the page number from the page offset and get it from drm_device_dma::pagelist. - */ -static __inline__ struct page *DRM(do_vm_dma_nopage)(struct vm_area_struct *vma, - unsigned long address) -{ - drm_file_t *priv = vma->vm_file->private_data; - drm_device_t *dev = priv->dev; - drm_device_dma_t *dma = dev->dma; - unsigned long offset; - unsigned long page_nr; - struct page *page; - - if (!dma) return NOPAGE_SIGBUS; /* Error */ - if (address > vma->vm_end) return NOPAGE_SIGBUS; /* Disallow mremap */ - if (!dma->pagelist) return NOPAGE_OOM ; /* Nothing allocated */ - - offset = address - vma->vm_start; /* vm_[pg]off[set] should be 0 */ - page_nr = offset >> PAGE_SHIFT; - page = virt_to_page((dma->pagelist[page_nr] + - (offset & (~PAGE_MASK)))); - - get_page(page); - - DRM_DEBUG("dma_nopage 0x%lx (page %lu)\n", address, page_nr); - return page; -} - -/** - * \c nopage method for scatter-gather virtual memory. - * - * \param vma virtual memory area. - * \param address access address. - * \return pointer to the page structure. - * - * Determine the map offset from the page offset and get it from drm_sg_mem::pagelist. - */ -static __inline__ struct page *DRM(do_vm_sg_nopage)(struct vm_area_struct *vma, - unsigned long address) -{ - drm_map_t *map = (drm_map_t *)vma->vm_private_data; - drm_file_t *priv = vma->vm_file->private_data; - drm_device_t *dev = priv->dev; - drm_sg_mem_t *entry = dev->sg; - unsigned long offset; - unsigned long map_offset; - unsigned long page_offset; - struct page *page; - - if (!entry) return NOPAGE_SIGBUS; /* Error */ - if (address > vma->vm_end) return NOPAGE_SIGBUS; /* Disallow mremap */ - if (!entry->pagelist) return NOPAGE_OOM ; /* Nothing allocated */ - - - offset = address - vma->vm_start; - map_offset = map->offset - dev->sg->handle; - page_offset = (offset >> PAGE_SHIFT) + (map_offset >> PAGE_SHIFT); - page = entry->pagelist[page_offset]; - get_page(page); - - return page; -} - - -#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) - -static struct page *DRM(vm_nopage)(struct vm_area_struct *vma, - unsigned long address, - int *type) { - if (type) *type = VM_FAULT_MINOR; - return DRM(do_vm_nopage)(vma, address); -} - -static struct page *DRM(vm_shm_nopage)(struct vm_area_struct *vma, - unsigned long address, - int *type) { - if (type) *type = VM_FAULT_MINOR; - return DRM(do_vm_shm_nopage)(vma, address); -} - -static struct page *DRM(vm_dma_nopage)(struct vm_area_struct *vma, - unsigned long address, - int *type) { - if (type) *type = VM_FAULT_MINOR; - return DRM(do_vm_dma_nopage)(vma, address); -} - -static struct page *DRM(vm_sg_nopage)(struct vm_area_struct *vma, - unsigned long address, - int *type) { - if (type) *type = VM_FAULT_MINOR; - return DRM(do_vm_sg_nopage)(vma, address); -} - -#else /* LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,0) */ - -static struct page *DRM(vm_nopage)(struct vm_area_struct *vma, - unsigned long address, - int unused) { - return DRM(do_vm_nopage)(vma, address); -} - -static struct page *DRM(vm_shm_nopage)(struct vm_area_struct *vma, - unsigned long address, - int unused) { - return DRM(do_vm_shm_nopage)(vma, address); -} - -static struct page *DRM(vm_dma_nopage)(struct vm_area_struct *vma, - unsigned long address, - int unused) { - return DRM(do_vm_dma_nopage)(vma, address); -} - -static struct page *DRM(vm_sg_nopage)(struct vm_area_struct *vma, - unsigned long address, - int unused) { - return DRM(do_vm_sg_nopage)(vma, address); -} - -#endif - - -/** AGP virtual memory operations */ -static struct vm_operations_struct DRM(vm_ops) = { - .nopage = DRM(vm_nopage), - .open = DRM(vm_open), - .close = DRM(vm_close), -}; - -/** Shared virtual memory operations */ -static struct vm_operations_struct DRM(vm_shm_ops) = { - .nopage = DRM(vm_shm_nopage), - .open = DRM(vm_open), - .close = DRM(vm_shm_close), -}; - -/** DMA virtual memory operations */ -static struct vm_operations_struct DRM(vm_dma_ops) = { - .nopage = DRM(vm_dma_nopage), - .open = DRM(vm_open), - .close = DRM(vm_close), -}; - -/** Scatter-gather virtual memory operations */ -static struct vm_operations_struct DRM(vm_sg_ops) = { - .nopage = DRM(vm_sg_nopage), - .open = DRM(vm_open), - .close = DRM(vm_close), -}; - - -/** - * \c open method for shared virtual memory. - * - * \param vma virtual memory area. - * - * Create a new drm_vma_entry structure as the \p vma private data entry and - * add it to drm_device::vmalist. - */ -void DRM(vm_open)(struct vm_area_struct *vma) -{ - drm_file_t *priv = vma->vm_file->private_data; - drm_device_t *dev = priv->dev; - drm_vma_entry_t *vma_entry; - - DRM_DEBUG("0x%08lx,0x%08lx\n", - vma->vm_start, vma->vm_end - vma->vm_start); - atomic_inc(&dev->vma_count); - - vma_entry = DRM(alloc)(sizeof(*vma_entry), DRM_MEM_VMAS); - if (vma_entry) { - down(&dev->struct_sem); - vma_entry->vma = vma; - vma_entry->next = dev->vmalist; - vma_entry->pid = current->pid; - dev->vmalist = vma_entry; - up(&dev->struct_sem); - } -} - -/** - * \c close method for all virtual memory types. - * - * \param vma virtual memory area. - * - * Search the \p vma private data entry in drm_device::vmalist, unlink it, and - * free it. - */ -void DRM(vm_close)(struct vm_area_struct *vma) -{ - drm_file_t *priv = vma->vm_file->private_data; - drm_device_t *dev = priv->dev; - drm_vma_entry_t *pt, *prev; - - DRM_DEBUG("0x%08lx,0x%08lx\n", - vma->vm_start, vma->vm_end - vma->vm_start); - atomic_dec(&dev->vma_count); - - down(&dev->struct_sem); - for (pt = dev->vmalist, prev = NULL; pt; prev = pt, pt = pt->next) { - if (pt->vma == vma) { - if (prev) { - prev->next = pt->next; - } else { - dev->vmalist = pt->next; - } - DRM(free)(pt, sizeof(*pt), DRM_MEM_VMAS); - break; - } - } - up(&dev->struct_sem); -} - -/** - * mmap DMA memory. - * - * \param filp file pointer. - * \param vma virtual memory area. - * \return zero on success or a negative number on failure. - * - * Sets the virtual memory area operations structure to vm_dma_ops, the file - * pointer, and calls vm_open(). - */ -int DRM(mmap_dma)(struct file *filp, struct vm_area_struct *vma) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev; - drm_device_dma_t *dma; - unsigned long length = vma->vm_end - vma->vm_start; - - lock_kernel(); - dev = priv->dev; - dma = dev->dma; - DRM_DEBUG("start = 0x%lx, end = 0x%lx, offset = 0x%lx\n", - vma->vm_start, vma->vm_end, VM_OFFSET(vma)); - - /* Length must match exact page count */ - if (!dma || (length >> PAGE_SHIFT) != dma->page_count) { - unlock_kernel(); - return -EINVAL; - } - unlock_kernel(); - - vma->vm_ops = &DRM(vm_dma_ops); - -#if LINUX_VERSION_CODE <= 0x02040e /* KERNEL_VERSION(2,4,14) */ - vma->vm_flags |= VM_LOCKED | VM_SHM; /* Don't swap */ -#else - vma->vm_flags |= VM_RESERVED; /* Don't swap */ -#endif - - vma->vm_file = filp; /* Needed for drm_vm_open() */ - DRM(vm_open)(vma); - return 0; -} - -unsigned long DRM(core_get_map_ofs)(drm_map_t *map) -{ - return map->offset; -} - -unsigned long DRM(core_get_reg_ofs)(struct drm_device *dev) -{ -#ifdef __alpha__ - return dev->hose->dense_mem_base - dev->hose->mem_space->start; -#else - return 0; -#endif -} - -/** - * mmap DMA memory. - * - * \param filp file pointer. - * \param vma virtual memory area. - * \return zero on success or a negative number on failure. - * - * If the virtual memory area has no offset associated with it then it's a DMA - * area, so calls mmap_dma(). Otherwise searches the map in drm_device::maplist, - * checks that the restricted flag is not set, sets the virtual memory operations - * according to the mapping type and remaps the pages. Finally sets the file - * pointer and calls vm_open(). - */ -int DRM(mmap)(struct file *filp, struct vm_area_struct *vma) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_map_t *map = NULL; - drm_map_list_t *r_list; - unsigned long offset = 0; - struct list_head *list; - - DRM_DEBUG("start = 0x%lx, end = 0x%lx, offset = 0x%lx\n", - vma->vm_start, vma->vm_end, VM_OFFSET(vma)); - - if ( !priv->authenticated ) return -EACCES; - - /* We check for "dma". On Apple's UniNorth, it's valid to have - * the AGP mapped at physical address 0 - * --BenH. - */ - if (!VM_OFFSET(vma) -#if __OS_HAS_AGP - && (!dev->agp || dev->agp->agp_info.device->vendor != PCI_VENDOR_ID_APPLE) -#endif - ) - return DRM(mmap_dma)(filp, vma); - - /* A sequential search of a linked list is - fine here because: 1) there will only be - about 5-10 entries in the list and, 2) a - DRI client only has to do this mapping - once, so it doesn't have to be optimized - for performance, even if the list was a - bit longer. */ - list_for_each(list, &dev->maplist->head) { - unsigned long off; - - r_list = list_entry(list, drm_map_list_t, head); - map = r_list->map; - if (!map) continue; - off = dev->fn_tbl.get_map_ofs(map); - if (off == VM_OFFSET(vma)) break; - } - - if (!map || ((map->flags&_DRM_RESTRICTED) && !capable(CAP_SYS_ADMIN))) - return -EPERM; - - /* Check for valid size. */ - if (map->size < vma->vm_end - vma->vm_start) return -EINVAL; - - if (!capable(CAP_SYS_ADMIN) && (map->flags & _DRM_READ_ONLY)) { - vma->vm_flags &= ~(VM_WRITE | VM_MAYWRITE); -#if defined(__i386__) || defined(__x86_64__) - pgprot_val(vma->vm_page_prot) &= ~_PAGE_RW; -#else - /* Ye gads this is ugly. With more thought - we could move this up higher and use - `protection_map' instead. */ - vma->vm_page_prot = __pgprot(pte_val(pte_wrprotect( - __pte(pgprot_val(vma->vm_page_prot))))); -#endif - } - - switch (map->type) { - case _DRM_AGP: - if (drm_core_has_AGP(dev) && dev->agp->cant_use_aperture) { - /* - * On some platforms we can't talk to bus dma address from the CPU, so for - * memory of type DRM_AGP, we'll deal with sorting out the real physical - * pages and mappings in nopage() - */ -#if defined(__powerpc__) - pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE; -#endif - vma->vm_ops = &DRM(vm_ops); - break; - } - /* fall through to _DRM_FRAME_BUFFER... */ - case _DRM_FRAME_BUFFER: - case _DRM_REGISTERS: - if (VM_OFFSET(vma) >= __pa(high_memory)) { -#if defined(__i386__) || defined(__x86_64__) - if (boot_cpu_data.x86 > 3 && map->type != _DRM_AGP) { - pgprot_val(vma->vm_page_prot) |= _PAGE_PCD; - pgprot_val(vma->vm_page_prot) &= ~_PAGE_PWT; - } -#elif defined(__powerpc__) - pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE | _PAGE_GUARDED; -#endif - vma->vm_flags |= VM_IO; /* not in core dump */ - } -#if defined(__ia64__) - if (map->type != _DRM_AGP) - vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); -#endif - offset = dev->fn_tbl.get_reg_ofs(dev); -#ifdef __sparc__ - if (io_remap_page_range(DRM_RPR_ARG(vma) vma->vm_start, - VM_OFFSET(vma) + offset, - vma->vm_end - vma->vm_start, - vma->vm_page_prot, 0)) -#else - if (remap_page_range(DRM_RPR_ARG(vma) vma->vm_start, - VM_OFFSET(vma) + offset, - vma->vm_end - vma->vm_start, - vma->vm_page_prot)) -#endif - return -EAGAIN; - DRM_DEBUG(" Type = %d; start = 0x%lx, end = 0x%lx," - " offset = 0x%lx\n", - map->type, - vma->vm_start, vma->vm_end, VM_OFFSET(vma) + offset); - vma->vm_ops = &DRM(vm_ops); - break; - case _DRM_SHM: - vma->vm_ops = &DRM(vm_shm_ops); - vma->vm_private_data = (void *)map; - /* Don't let this area swap. Change when - DRM_KERNEL advisory is supported. */ -#if LINUX_VERSION_CODE <= 0x02040e /* KERNEL_VERSION(2,4,14) */ - vma->vm_flags |= VM_LOCKED; -#else - vma->vm_flags |= VM_RESERVED; -#endif - break; - case _DRM_SCATTER_GATHER: - vma->vm_ops = &DRM(vm_sg_ops); - vma->vm_private_data = (void *)map; -#if LINUX_VERSION_CODE <= 0x02040e /* KERNEL_VERSION(2,4,14) */ - vma->vm_flags |= VM_LOCKED; -#else - vma->vm_flags |= VM_RESERVED; -#endif - break; - default: - return -EINVAL; /* This should never happen. */ - } -#if LINUX_VERSION_CODE <= 0x02040e /* KERNEL_VERSION(2,4,14) */ - vma->vm_flags |= VM_LOCKED | VM_SHM; /* Don't swap */ -#else - vma->vm_flags |= VM_RESERVED; /* Don't swap */ -#endif - - vma->vm_file = filp; /* Needed for drm_vm_open() */ - DRM(vm_open)(vma); - return 0; -} diff --git a/linux/ffb.h b/linux/ffb.h deleted file mode 100644 index 3691c8652..000000000 --- a/linux/ffb.h +++ /dev/null @@ -1,12 +0,0 @@ -/* ffb.h -- ffb DRM template customization -*- linux-c -*- - */ - -#ifndef __FFB_H__ -#define __FFB_H__ - -/* This remains constant for all DRM template files. - */ -#define DRM(x) ffb_##x - -#endif - diff --git a/linux/ffb_context.c b/linux/ffb_context.c deleted file mode 100644 index 718ae93f4..000000000 --- a/linux/ffb_context.c +++ /dev/null @@ -1,616 +0,0 @@ -/* $Id$ - * ffb_context.c: Creator/Creator3D DRI/DRM context switching. - * - * Copyright (C) 2000 David S. Miller (davem@redhat.com) - * - * Almost entirely stolen from tdfx_context.c, see there - * for authors. - */ - -#include <linux/sched.h> -#include <asm/upa.h> - -#include "ffb.h" -#include "drmP.h" - -#include "ffb_drv.h" - -static int DRM(alloc_queue)(drm_device_t *dev, int is_2d_only) -{ - ffb_dev_priv_t *fpriv = (ffb_dev_priv_t *) dev->dev_private; - int i; - - for (i = 0; i < FFB_MAX_CTXS; i++) { - if (fpriv->hw_state[i] == NULL) - break; - } - if (i == FFB_MAX_CTXS) - return -1; - - fpriv->hw_state[i] = kmalloc(sizeof(struct ffb_hw_context), GFP_KERNEL); - if (fpriv->hw_state[i] == NULL) - return -1; - - fpriv->hw_state[i]->is_2d_only = is_2d_only; - - /* Plus one because 0 is the special DRM_KERNEL_CONTEXT. */ - return i + 1; -} - -static void ffb_save_context(ffb_dev_priv_t *fpriv, int idx) -{ - ffb_fbcPtr ffb = fpriv->regs; - struct ffb_hw_context *ctx; - int i; - - ctx = fpriv->hw_state[idx - 1]; - if (idx == 0 || ctx == NULL) - return; - - if (ctx->is_2d_only) { - /* 2D applications only care about certain pieces - * of state. - */ - ctx->drawop = upa_readl(&ffb->drawop); - ctx->ppc = upa_readl(&ffb->ppc); - ctx->wid = upa_readl(&ffb->wid); - ctx->fg = upa_readl(&ffb->fg); - ctx->bg = upa_readl(&ffb->bg); - ctx->xclip = upa_readl(&ffb->xclip); - ctx->fbc = upa_readl(&ffb->fbc); - ctx->rop = upa_readl(&ffb->rop); - ctx->cmp = upa_readl(&ffb->cmp); - ctx->matchab = upa_readl(&ffb->matchab); - ctx->magnab = upa_readl(&ffb->magnab); - ctx->pmask = upa_readl(&ffb->pmask); - ctx->xpmask = upa_readl(&ffb->xpmask); - ctx->lpat = upa_readl(&ffb->lpat); - ctx->fontxy = upa_readl(&ffb->fontxy); - ctx->fontw = upa_readl(&ffb->fontw); - ctx->fontinc = upa_readl(&ffb->fontinc); - - /* stencil/stencilctl only exists on FFB2+ and later - * due to the introduction of 3DRAM-III. - */ - if (fpriv->ffb_type == ffb2_vertical_plus || - fpriv->ffb_type == ffb2_horizontal_plus) { - ctx->stencil = upa_readl(&ffb->stencil); - ctx->stencilctl = upa_readl(&ffb->stencilctl); - } - - for (i = 0; i < 32; i++) - ctx->area_pattern[i] = upa_readl(&ffb->pattern[i]); - ctx->ucsr = upa_readl(&ffb->ucsr); - return; - } - - /* Fetch drawop. */ - ctx->drawop = upa_readl(&ffb->drawop); - - /* If we were saving the vertex registers, this is where - * we would do it. We would save 32 32-bit words starting - * at ffb->suvtx. - */ - - /* Capture rendering attributes. */ - - ctx->ppc = upa_readl(&ffb->ppc); /* Pixel Processor Control */ - ctx->wid = upa_readl(&ffb->wid); /* Current WID */ - ctx->fg = upa_readl(&ffb->fg); /* Constant FG color */ - ctx->bg = upa_readl(&ffb->bg); /* Constant BG color */ - ctx->consty = upa_readl(&ffb->consty); /* Constant Y */ - ctx->constz = upa_readl(&ffb->constz); /* Constant Z */ - ctx->xclip = upa_readl(&ffb->xclip); /* X plane clip */ - ctx->dcss = upa_readl(&ffb->dcss); /* Depth Cue Scale Slope */ - ctx->vclipmin = upa_readl(&ffb->vclipmin); /* Primary XY clip, minimum */ - ctx->vclipmax = upa_readl(&ffb->vclipmax); /* Primary XY clip, maximum */ - ctx->vclipzmin = upa_readl(&ffb->vclipzmin); /* Primary Z clip, minimum */ - ctx->vclipzmax = upa_readl(&ffb->vclipzmax); /* Primary Z clip, maximum */ - ctx->dcsf = upa_readl(&ffb->dcsf); /* Depth Cue Scale Front Bound */ - ctx->dcsb = upa_readl(&ffb->dcsb); /* Depth Cue Scale Back Bound */ - ctx->dczf = upa_readl(&ffb->dczf); /* Depth Cue Scale Z Front */ - ctx->dczb = upa_readl(&ffb->dczb); /* Depth Cue Scale Z Back */ - ctx->blendc = upa_readl(&ffb->blendc); /* Alpha Blend Control */ - ctx->blendc1 = upa_readl(&ffb->blendc1); /* Alpha Blend Color 1 */ - ctx->blendc2 = upa_readl(&ffb->blendc2); /* Alpha Blend Color 2 */ - ctx->fbc = upa_readl(&ffb->fbc); /* Frame Buffer Control */ - ctx->rop = upa_readl(&ffb->rop); /* Raster Operation */ - ctx->cmp = upa_readl(&ffb->cmp); /* Compare Controls */ - ctx->matchab = upa_readl(&ffb->matchab); /* Buffer A/B Match Ops */ - ctx->matchc = upa_readl(&ffb->matchc); /* Buffer C Match Ops */ - ctx->magnab = upa_readl(&ffb->magnab); /* Buffer A/B Magnitude Ops */ - ctx->magnc = upa_readl(&ffb->magnc); /* Buffer C Magnitude Ops */ - ctx->pmask = upa_readl(&ffb->pmask); /* RGB Plane Mask */ - ctx->xpmask = upa_readl(&ffb->xpmask); /* X Plane Mask */ - ctx->ypmask = upa_readl(&ffb->ypmask); /* Y Plane Mask */ - ctx->zpmask = upa_readl(&ffb->zpmask); /* Z Plane Mask */ - - /* Auxiliary Clips. */ - ctx->auxclip0min = upa_readl(&ffb->auxclip[0].min); - ctx->auxclip0max = upa_readl(&ffb->auxclip[0].max); - ctx->auxclip1min = upa_readl(&ffb->auxclip[1].min); - ctx->auxclip1max = upa_readl(&ffb->auxclip[1].max); - ctx->auxclip2min = upa_readl(&ffb->auxclip[2].min); - ctx->auxclip2max = upa_readl(&ffb->auxclip[2].max); - ctx->auxclip3min = upa_readl(&ffb->auxclip[3].min); - ctx->auxclip3max = upa_readl(&ffb->auxclip[3].max); - - ctx->lpat = upa_readl(&ffb->lpat); /* Line Pattern */ - ctx->fontxy = upa_readl(&ffb->fontxy); /* XY Font Coordinate */ - ctx->fontw = upa_readl(&ffb->fontw); /* Font Width */ - ctx->fontinc = upa_readl(&ffb->fontinc); /* Font X/Y Increment */ - - /* These registers/features only exist on FFB2 and later chips. */ - if (fpriv->ffb_type >= ffb2_prototype) { - ctx->dcss1 = upa_readl(&ffb->dcss1); /* Depth Cue Scale Slope 1 */ - ctx->dcss2 = upa_readl(&ffb->dcss2); /* Depth Cue Scale Slope 2 */ - ctx->dcss2 = upa_readl(&ffb->dcss3); /* Depth Cue Scale Slope 3 */ - ctx->dcs2 = upa_readl(&ffb->dcs2); /* Depth Cue Scale 2 */ - ctx->dcs3 = upa_readl(&ffb->dcs3); /* Depth Cue Scale 3 */ - ctx->dcs4 = upa_readl(&ffb->dcs4); /* Depth Cue Scale 4 */ - ctx->dcd2 = upa_readl(&ffb->dcd2); /* Depth Cue Depth 2 */ - ctx->dcd3 = upa_readl(&ffb->dcd3); /* Depth Cue Depth 3 */ - ctx->dcd4 = upa_readl(&ffb->dcd4); /* Depth Cue Depth 4 */ - - /* And stencil/stencilctl only exists on FFB2+ and later - * due to the introduction of 3DRAM-III. - */ - if (fpriv->ffb_type == ffb2_vertical_plus || - fpriv->ffb_type == ffb2_horizontal_plus) { - ctx->stencil = upa_readl(&ffb->stencil); - ctx->stencilctl = upa_readl(&ffb->stencilctl); - } - } - - /* Save the 32x32 area pattern. */ - for (i = 0; i < 32; i++) - ctx->area_pattern[i] = upa_readl(&ffb->pattern[i]); - - /* Finally, stash away the User Constol/Status Register. */ - ctx->ucsr = upa_readl(&ffb->ucsr); -} - -static void ffb_restore_context(ffb_dev_priv_t *fpriv, int old, int idx) -{ - ffb_fbcPtr ffb = fpriv->regs; - struct ffb_hw_context *ctx; - int i; - - ctx = fpriv->hw_state[idx - 1]; - if (idx == 0 || ctx == NULL) - return; - - if (ctx->is_2d_only) { - /* 2D applications only care about certain pieces - * of state. - */ - upa_writel(ctx->drawop, &ffb->drawop); - - /* If we were restoring the vertex registers, this is where - * we would do it. We would restore 32 32-bit words starting - * at ffb->suvtx. - */ - - upa_writel(ctx->ppc, &ffb->ppc); - upa_writel(ctx->wid, &ffb->wid); - upa_writel(ctx->fg, &ffb->fg); - upa_writel(ctx->bg, &ffb->bg); - upa_writel(ctx->xclip, &ffb->xclip); - upa_writel(ctx->fbc, &ffb->fbc); - upa_writel(ctx->rop, &ffb->rop); - upa_writel(ctx->cmp, &ffb->cmp); - upa_writel(ctx->matchab, &ffb->matchab); - upa_writel(ctx->magnab, &ffb->magnab); - upa_writel(ctx->pmask, &ffb->pmask); - upa_writel(ctx->xpmask, &ffb->xpmask); - upa_writel(ctx->lpat, &ffb->lpat); - upa_writel(ctx->fontxy, &ffb->fontxy); - upa_writel(ctx->fontw, &ffb->fontw); - upa_writel(ctx->fontinc, &ffb->fontinc); - - /* stencil/stencilctl only exists on FFB2+ and later - * due to the introduction of 3DRAM-III. - */ - if (fpriv->ffb_type == ffb2_vertical_plus || - fpriv->ffb_type == ffb2_horizontal_plus) { - upa_writel(ctx->stencil, &ffb->stencil); - upa_writel(ctx->stencilctl, &ffb->stencilctl); - upa_writel(0x80000000, &ffb->fbc); - upa_writel((ctx->stencilctl | 0x80000), - &ffb->rawstencilctl); - upa_writel(ctx->fbc, &ffb->fbc); - } - - for (i = 0; i < 32; i++) - upa_writel(ctx->area_pattern[i], &ffb->pattern[i]); - upa_writel((ctx->ucsr & 0xf0000), &ffb->ucsr); - return; - } - - /* Restore drawop. */ - upa_writel(ctx->drawop, &ffb->drawop); - - /* If we were restoring the vertex registers, this is where - * we would do it. We would restore 32 32-bit words starting - * at ffb->suvtx. - */ - - /* Restore rendering attributes. */ - - upa_writel(ctx->ppc, &ffb->ppc); /* Pixel Processor Control */ - upa_writel(ctx->wid, &ffb->wid); /* Current WID */ - upa_writel(ctx->fg, &ffb->fg); /* Constant FG color */ - upa_writel(ctx->bg, &ffb->bg); /* Constant BG color */ - upa_writel(ctx->consty, &ffb->consty); /* Constant Y */ - upa_writel(ctx->constz, &ffb->constz); /* Constant Z */ - upa_writel(ctx->xclip, &ffb->xclip); /* X plane clip */ - upa_writel(ctx->dcss, &ffb->dcss); /* Depth Cue Scale Slope */ - upa_writel(ctx->vclipmin, &ffb->vclipmin); /* Primary XY clip, minimum */ - upa_writel(ctx->vclipmax, &ffb->vclipmax); /* Primary XY clip, maximum */ - upa_writel(ctx->vclipzmin, &ffb->vclipzmin); /* Primary Z clip, minimum */ - upa_writel(ctx->vclipzmax, &ffb->vclipzmax); /* Primary Z clip, maximum */ - upa_writel(ctx->dcsf, &ffb->dcsf); /* Depth Cue Scale Front Bound */ - upa_writel(ctx->dcsb, &ffb->dcsb); /* Depth Cue Scale Back Bound */ - upa_writel(ctx->dczf, &ffb->dczf); /* Depth Cue Scale Z Front */ - upa_writel(ctx->dczb, &ffb->dczb); /* Depth Cue Scale Z Back */ - upa_writel(ctx->blendc, &ffb->blendc); /* Alpha Blend Control */ - upa_writel(ctx->blendc1, &ffb->blendc1); /* Alpha Blend Color 1 */ - upa_writel(ctx->blendc2, &ffb->blendc2); /* Alpha Blend Color 2 */ - upa_writel(ctx->fbc, &ffb->fbc); /* Frame Buffer Control */ - upa_writel(ctx->rop, &ffb->rop); /* Raster Operation */ - upa_writel(ctx->cmp, &ffb->cmp); /* Compare Controls */ - upa_writel(ctx->matchab, &ffb->matchab); /* Buffer A/B Match Ops */ - upa_writel(ctx->matchc, &ffb->matchc); /* Buffer C Match Ops */ - upa_writel(ctx->magnab, &ffb->magnab); /* Buffer A/B Magnitude Ops */ - upa_writel(ctx->magnc, &ffb->magnc); /* Buffer C Magnitude Ops */ - upa_writel(ctx->pmask, &ffb->pmask); /* RGB Plane Mask */ - upa_writel(ctx->xpmask, &ffb->xpmask); /* X Plane Mask */ - upa_writel(ctx->ypmask, &ffb->ypmask); /* Y Plane Mask */ - upa_writel(ctx->zpmask, &ffb->zpmask); /* Z Plane Mask */ - - /* Auxiliary Clips. */ - upa_writel(ctx->auxclip0min, &ffb->auxclip[0].min); - upa_writel(ctx->auxclip0max, &ffb->auxclip[0].max); - upa_writel(ctx->auxclip1min, &ffb->auxclip[1].min); - upa_writel(ctx->auxclip1max, &ffb->auxclip[1].max); - upa_writel(ctx->auxclip2min, &ffb->auxclip[2].min); - upa_writel(ctx->auxclip2max, &ffb->auxclip[2].max); - upa_writel(ctx->auxclip3min, &ffb->auxclip[3].min); - upa_writel(ctx->auxclip3max, &ffb->auxclip[3].max); - - upa_writel(ctx->lpat, &ffb->lpat); /* Line Pattern */ - upa_writel(ctx->fontxy, &ffb->fontxy); /* XY Font Coordinate */ - upa_writel(ctx->fontw, &ffb->fontw); /* Font Width */ - upa_writel(ctx->fontinc, &ffb->fontinc); /* Font X/Y Increment */ - - /* These registers/features only exist on FFB2 and later chips. */ - if (fpriv->ffb_type >= ffb2_prototype) { - upa_writel(ctx->dcss1, &ffb->dcss1); /* Depth Cue Scale Slope 1 */ - upa_writel(ctx->dcss2, &ffb->dcss2); /* Depth Cue Scale Slope 2 */ - upa_writel(ctx->dcss3, &ffb->dcss2); /* Depth Cue Scale Slope 3 */ - upa_writel(ctx->dcs2, &ffb->dcs2); /* Depth Cue Scale 2 */ - upa_writel(ctx->dcs3, &ffb->dcs3); /* Depth Cue Scale 3 */ - upa_writel(ctx->dcs4, &ffb->dcs4); /* Depth Cue Scale 4 */ - upa_writel(ctx->dcd2, &ffb->dcd2); /* Depth Cue Depth 2 */ - upa_writel(ctx->dcd3, &ffb->dcd3); /* Depth Cue Depth 3 */ - upa_writel(ctx->dcd4, &ffb->dcd4); /* Depth Cue Depth 4 */ - - /* And stencil/stencilctl only exists on FFB2+ and later - * due to the introduction of 3DRAM-III. - */ - if (fpriv->ffb_type == ffb2_vertical_plus || - fpriv->ffb_type == ffb2_horizontal_plus) { - /* Unfortunately, there is a hardware bug on - * the FFB2+ chips which prevents a normal write - * to the stencil control register from working - * as it should. - * - * The state controlled by the FFB stencilctl register - * really gets transferred to the per-buffer instances - * of the stencilctl register in the 3DRAM chips. - * - * The bug is that FFB does not update buffer C correctly, - * so we have to do it by hand for them. - */ - - /* This will update buffers A and B. */ - upa_writel(ctx->stencil, &ffb->stencil); - upa_writel(ctx->stencilctl, &ffb->stencilctl); - - /* Force FFB to use buffer C 3dram regs. */ - upa_writel(0x80000000, &ffb->fbc); - upa_writel((ctx->stencilctl | 0x80000), - &ffb->rawstencilctl); - - /* Now restore the correct FBC controls. */ - upa_writel(ctx->fbc, &ffb->fbc); - } - } - - /* Restore the 32x32 area pattern. */ - for (i = 0; i < 32; i++) - upa_writel(ctx->area_pattern[i], &ffb->pattern[i]); - - /* Finally, stash away the User Constol/Status Register. - * The only state we really preserve here is the picking - * control. - */ - upa_writel((ctx->ucsr & 0xf0000), &ffb->ucsr); -} - -#define FFB_UCSR_FB_BUSY 0x01000000 -#define FFB_UCSR_RP_BUSY 0x02000000 -#define FFB_UCSR_ALL_BUSY (FFB_UCSR_RP_BUSY|FFB_UCSR_FB_BUSY) - -static void FFBWait(ffb_fbcPtr ffb) -{ - int limit = 100000; - - do { - u32 regval = upa_readl(&ffb->ucsr); - - if ((regval & FFB_UCSR_ALL_BUSY) == 0) - break; - } while (--limit); -} - -int DRM(context_switch)(drm_device_t *dev, int old, int new) -{ - ffb_dev_priv_t *fpriv = (ffb_dev_priv_t *) dev->dev_private; - -#if DRM_DMA_HISTOGRAM - dev->ctx_start = get_cycles(); -#endif - - DRM_DEBUG("Context switch from %d to %d\n", old, new); - - if (new == dev->last_context || - dev->last_context == 0) { - dev->last_context = new; - return 0; - } - - FFBWait(fpriv->regs); - ffb_save_context(fpriv, old); - ffb_restore_context(fpriv, old, new); - FFBWait(fpriv->regs); - - dev->last_context = new; - - return 0; -} - -int DRM(resctx)(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - drm_ctx_res_t res; - drm_ctx_t ctx; - int i; - - DRM_DEBUG("%d\n", DRM_RESERVED_CONTEXTS); - if (copy_from_user(&res, (drm_ctx_res_t __user *)arg, sizeof(res))) - return -EFAULT; - if (res.count >= DRM_RESERVED_CONTEXTS) { - memset(&ctx, 0, sizeof(ctx)); - for (i = 0; i < DRM_RESERVED_CONTEXTS; i++) { - ctx.handle = i; - if (copy_to_user(&res.contexts[i], - &i, - sizeof(i))) - return -EFAULT; - } - } - res.count = DRM_RESERVED_CONTEXTS; - if (copy_to_user((drm_ctx_res_t __user *)arg, &res, sizeof(res))) - return -EFAULT; - return 0; -} - - -int DRM(addctx)(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_ctx_t ctx; - int idx; - - if (copy_from_user(&ctx, (drm_ctx_t __user *)arg, sizeof(ctx))) - return -EFAULT; - idx = DRM(alloc_queue)(dev, (ctx.flags & _DRM_CONTEXT_2DONLY)); - if (idx < 0) - return -ENFILE; - - DRM_DEBUG("%d\n", ctx.handle); - ctx.handle = idx; - if (copy_to_user((drm_ctx_t __user *)arg, &ctx, sizeof(ctx))) - return -EFAULT; - return 0; -} - -int DRM(modctx)(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - ffb_dev_priv_t *fpriv = (ffb_dev_priv_t *) dev->dev_private; - struct ffb_hw_context *hwctx; - drm_ctx_t ctx; - int idx; - - if (copy_from_user(&ctx, (drm_ctx_t __user *)arg, sizeof(ctx))) - return -EFAULT; - - idx = ctx.handle; - if (idx <= 0 || idx >= FFB_MAX_CTXS) - return -EINVAL; - - hwctx = fpriv->hw_state[idx - 1]; - if (hwctx == NULL) - return -EINVAL; - - if ((ctx.flags & _DRM_CONTEXT_2DONLY) == 0) - hwctx->is_2d_only = 0; - else - hwctx->is_2d_only = 1; - - return 0; -} - -int DRM(getctx)(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - ffb_dev_priv_t *fpriv = (ffb_dev_priv_t *) dev->dev_private; - struct ffb_hw_context *hwctx; - drm_ctx_t ctx; - int idx; - - if (copy_from_user(&ctx, (drm_ctx_t __user *)arg, sizeof(ctx))) - return -EFAULT; - - idx = ctx.handle; - if (idx <= 0 || idx >= FFB_MAX_CTXS) - return -EINVAL; - - hwctx = fpriv->hw_state[idx - 1]; - if (hwctx == NULL) - return -EINVAL; - - if (hwctx->is_2d_only != 0) - ctx.flags = _DRM_CONTEXT_2DONLY; - else - ctx.flags = 0; - - if (copy_to_user((drm_ctx_t __user *)arg, &ctx, sizeof(ctx))) - return -EFAULT; - - return 0; -} - -int DRM(switchctx)(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_ctx_t ctx; - - if (copy_from_user(&ctx, (drm_ctx_t __user *)arg, sizeof(ctx))) - return -EFAULT; - DRM_DEBUG("%d\n", ctx.handle); - return DRM(context_switch)(dev, dev->last_context, ctx.handle); -} - -int DRM(newctx)(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - drm_ctx_t ctx; - - if (copy_from_user(&ctx, (drm_ctx_t __user *)arg, sizeof(ctx))) - return -EFAULT; - DRM_DEBUG("%d\n", ctx.handle); - - return 0; -} - -int DRM(rmctx)(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - drm_ctx_t ctx; - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - ffb_dev_priv_t *fpriv = (ffb_dev_priv_t *) dev->dev_private; - int idx; - - if (copy_from_user(&ctx, (drm_ctx_t __user *)arg, sizeof(ctx))) - return -EFAULT; - DRM_DEBUG("%d\n", ctx.handle); - - idx = ctx.handle - 1; - if (idx < 0 || idx >= FFB_MAX_CTXS) - return -EINVAL; - - if (fpriv->hw_state[idx] != NULL) { - kfree(fpriv->hw_state[idx]); - fpriv->hw_state[idx] = NULL; - } - return 0; -} - -static void ffb_driver_release(drm_device_t *dev) -{ - ffb_dev_priv_t *fpriv = (ffb_dev_priv_t *) dev->dev_private; - int context = _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock); - int idx; - - idx = context - 1; - if (fpriv && - context != DRM_KERNEL_CONTEXT && - fpriv->hw_state[idx] != NULL) { - kfree(fpriv->hw_state[idx]); - fpriv->hw_state[idx] = NULL; - } -} - -static int ffb_driver_presetup(drm_device_t *dev) -{ - int ret; - ret = ffb_presetup(dev); - if (_ret != 0) return ret; -} - -static void ffb_driver_pretakedown(drm_device_t *dev) -{ - if (dev->dev_private) kfree(dev->dev_private); -} - -static void ffb_driver_postcleanup(drm_device_t *dev) -{ - if (ffb_position != NULL) kfree(ffb_position); -} - -static int ffb_driver_kernel_context_switch_unlock(struct drm_device *dev) -{ - dev->lock.filp = 0; - { - __volatile__ unsigned int *plock = &dev->lock.hw_lock->lock; - unsigned int old, new, prev, ctx; - - ctx = lock.context; - do { - old = *plock; - new = ctx; - prev = cmpxchg(plock, old, new); - } while (prev != old); - } - wake_up_interruptible(&dev->lock.lock_queue); -} - -static unsigned long ffb_driver_get_map_ofs(drm_map_t *map) -{ - return (map->offset & 0xffffffff); -} - -static unsigned long ffb_driver_get_reg_ofs(drm_device_t *dev) -{ - ffb_dev_priv_t *ffb_priv = (ffb_dev_priv_t *)dev->dev_private; - - if (ffb_priv) - return ffb_priv->card_phys_base; - - return 0; -} - -static void ffb_driver_register_fns(drm_device_t *dev) -{ - DRM(fops).get_unmapped_area = ffb_get_unmapped_area; - dev->fn_tbl.release = ffb_driver_release; - dev->fn_tbl.presetup = ffb_driver_presetup; - dev->fn_tbl.pretakedown = ffb_driver_pretakedown; - dev->fn_tbl.postcleanup = ffb_driver_postcleanup; - dev->fn_tbl.kernel_context_switch = ffb_context_switch; - dev->fn_tbl.kernel_context_switch_unlock = ffb_driver_kernel_context_switch_unlock; - dev->fn_tbl.get_map_ofs = ffb_driver_get_map_ofs; - dev->fn_tbl.get_reg_ofs = ffb_driver_get_reg_ofs; -} diff --git a/linux/ffb_drv.c b/linux/ffb_drv.c deleted file mode 100644 index 1d78cbda6..000000000 --- a/linux/ffb_drv.c +++ /dev/null @@ -1,278 +0,0 @@ -/* $Id$ - * ffb_drv.c: Creator/Creator3D direct rendering driver. - * - * Copyright (C) 2000 David S. Miller (davem@redhat.com) - */ - -#include <linux/config.h> -#include "ffb.h" -#include "drmP.h" - -#include "ffb_drv.h" - -#include <linux/sched.h> -#include <linux/smp_lock.h> -#include <asm/shmparam.h> -#include <asm/oplib.h> -#include <asm/upa.h> - -#define DRIVER_AUTHOR "David S. Miller" - -#define DRIVER_NAME "ffb" -#define DRIVER_DESC "Creator/Creator3D" -#define DRIVER_DATE "20000517" - -#define DRIVER_MAJOR 0 -#define DRIVER_MINOR 0 -#define DRIVER_PATCHLEVEL 1 - -typedef struct _ffb_position_t { - int node; - int root; -} ffb_position_t; - -static ffb_position_t *ffb_position; - -static void get_ffb_type(ffb_dev_priv_t *ffb_priv, int instance) -{ - volatile unsigned char *strap_bits; - unsigned char val; - - strap_bits = (volatile unsigned char *) - (ffb_priv->card_phys_base + 0x00200000UL); - - /* Don't ask, you have to read the value twice for whatever - * reason to get correct contents. - */ - val = upa_readb(strap_bits); - val = upa_readb(strap_bits); - switch (val & 0x78) { - case (0x0 << 5) | (0x0 << 3): - ffb_priv->ffb_type = ffb1_prototype; - printk("ffb%d: Detected FFB1 pre-FCS prototype\n", instance); - break; - case (0x0 << 5) | (0x1 << 3): - ffb_priv->ffb_type = ffb1_standard; - printk("ffb%d: Detected FFB1\n", instance); - break; - case (0x0 << 5) | (0x3 << 3): - ffb_priv->ffb_type = ffb1_speedsort; - printk("ffb%d: Detected FFB1-SpeedSort\n", instance); - break; - case (0x1 << 5) | (0x0 << 3): - ffb_priv->ffb_type = ffb2_prototype; - printk("ffb%d: Detected FFB2/vertical pre-FCS prototype\n", instance); - break; - case (0x1 << 5) | (0x1 << 3): - ffb_priv->ffb_type = ffb2_vertical; - printk("ffb%d: Detected FFB2/vertical\n", instance); - break; - case (0x1 << 5) | (0x2 << 3): - ffb_priv->ffb_type = ffb2_vertical_plus; - printk("ffb%d: Detected FFB2+/vertical\n", instance); - break; - case (0x2 << 5) | (0x0 << 3): - ffb_priv->ffb_type = ffb2_horizontal; - printk("ffb%d: Detected FFB2/horizontal\n", instance); - break; - case (0x2 << 5) | (0x2 << 3): - ffb_priv->ffb_type = ffb2_horizontal; - printk("ffb%d: Detected FFB2+/horizontal\n", instance); - break; - default: - ffb_priv->ffb_type = ffb2_vertical; - printk("ffb%d: Unknown boardID[%08x], assuming FFB2\n", instance, val); - break; - }; -} - -static void ffb_apply_upa_parent_ranges(int parent, - struct linux_prom64_registers *regs) -{ - struct linux_prom64_ranges ranges[PROMREG_MAX]; - char name[128]; - int len, i; - - prom_getproperty(parent, "name", name, sizeof(name)); - if (strcmp(name, "upa") != 0) - return; - - len = prom_getproperty(parent, "ranges", (void *) ranges, sizeof(ranges)); - if (len <= 0) - return; - - len /= sizeof(struct linux_prom64_ranges); - for (i = 0; i < len; i++) { - struct linux_prom64_ranges *rng = &ranges[i]; - u64 phys_addr = regs->phys_addr; - - if (phys_addr >= rng->ot_child_base && - phys_addr < (rng->ot_child_base + rng->or_size)) { - regs->phys_addr -= rng->ot_child_base; - regs->phys_addr += rng->ot_parent_base; - return; - } - } - - return; -} - -static int ffb_init_one(drm_device_t *dev, int prom_node, int parent_node, - int instance) -{ - struct linux_prom64_registers regs[2*PROMREG_MAX]; - ffb_dev_priv_t *ffb_priv = (ffb_dev_priv_t *)dev->dev_private; - int i; - - ffb_priv->prom_node = prom_node; - if (prom_getproperty(ffb_priv->prom_node, "reg", - (void *)regs, sizeof(regs)) <= 0) { - return -EINVAL; - } - ffb_apply_upa_parent_ranges(parent_node, ®s[0]); - ffb_priv->card_phys_base = regs[0].phys_addr; - ffb_priv->regs = (ffb_fbcPtr) - (regs[0].phys_addr + 0x00600000UL); - get_ffb_type(ffb_priv, instance); - for (i = 0; i < FFB_MAX_CTXS; i++) - ffb_priv->hw_state[i] = NULL; - - return 0; -} - -static int __init ffb_count_siblings(int root) -{ - int node, child, count = 0; - - child = prom_getchild(root); - for (node = prom_searchsiblings(child, "SUNW,ffb"); node; - node = prom_searchsiblings(prom_getsibling(node), "SUNW,ffb")) - count++; - - return count; -} - -static int __init ffb_scan_siblings(int root, int instance) -{ - int node, child; - - child = prom_getchild(root); - for (node = prom_searchsiblings(child, "SUNW,ffb"); node; - node = prom_searchsiblings(prom_getsibling(node), "SUNW,ffb")) { - ffb_position[instance].node = node; - ffb_position[instance].root = root; - instance++; - } - - return instance; -} - -static drm_map_t *ffb_find_map(struct file *filp, unsigned long off) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev; - drm_map_list_t *r_list; - struct list_head *list; - drm_map_t *map; - - if (!priv || (dev = priv->dev) == NULL) - return NULL; - - list_for_each(list, &dev->maplist->head) { - unsigned long uoff; - - r_list = (drm_map_list_t *)list; - map = r_list->map; - if (!map) - continue; - uoff = (map->offset & 0xffffffff); - if (uoff == off) - return map; - } - - return NULL; -} - -unsigned long ffb_get_unmapped_area(struct file *filp, - unsigned long hint, - unsigned long len, - unsigned long pgoff, - unsigned long flags) -{ - drm_map_t *map = ffb_find_map(filp, pgoff << PAGE_SHIFT); - unsigned long addr = -ENOMEM; - - if (!map) - return get_unmapped_area(NULL, hint, len, pgoff, flags); - - if (map->type == _DRM_FRAME_BUFFER || - map->type == _DRM_REGISTERS) { -#ifdef HAVE_ARCH_FB_UNMAPPED_AREA - addr = get_fb_unmapped_area(filp, hint, len, pgoff, flags); -#else - addr = get_unmapped_area(NULL, hint, len, pgoff, flags); -#endif - } else if (map->type == _DRM_SHM && SHMLBA > PAGE_SIZE) { - unsigned long slack = SHMLBA - PAGE_SIZE; - - addr = get_unmapped_area(NULL, hint, len + slack, pgoff, flags); - if (!(addr & ~PAGE_MASK)) { - unsigned long kvirt = (unsigned long) map->handle; - - if ((kvirt & (SHMLBA - 1)) != (addr & (SHMLBA - 1))) { - unsigned long koff, aoff; - - koff = kvirt & (SHMLBA - 1); - aoff = addr & (SHMLBA - 1); - if (koff < aoff) - koff += SHMLBA; - - addr += (koff - aoff); - } - } - } else { - addr = get_unmapped_area(NULL, hint, len, pgoff, flags); - } - - return addr; -} - -#include "drm_core.h" - -/* This functions must be here since it references DRM(numdevs) - * which drm_drv.h declares. - */ -int ffb_presetup(drm_device_t *dev) -{ - ffb_dev_priv_t *ffb_priv; - drm_device_t *temp_dev; - int ret = 0; - int i; - - /* Check for the case where no device was found. */ - if (ffb_position == NULL) - return -ENODEV; - - /* Find our instance number by finding our device in dev structure */ - for (i = 0; i < DRM(numdevs); i++) { - temp_dev = &(DRM(device)[i]); - if(temp_dev == dev) - break; - } - - if (i == DRM(numdevs)) - return -ENODEV; - - ffb_priv = kmalloc(sizeof(ffb_dev_priv_t), GFP_KERNEL); - if (!ffb_priv) - return -ENOMEM; - memset(ffb_priv, 0, sizeof(*ffb_priv)); - dev->dev_private = ffb_priv; - - ret = ffb_init_one(dev, - ffb_position[i].node, - ffb_position[i].root, - i); - return ret; -} - diff --git a/linux/ffb_drv.h b/linux/ffb_drv.h deleted file mode 100644 index 3948c08a0..000000000 --- a/linux/ffb_drv.h +++ /dev/null @@ -1,283 +0,0 @@ -/* $Id$ - * ffb_drv.h: Creator/Creator3D direct rendering driver. - * - * Copyright (C) 2000 David S. Miller (davem@redhat.com) - */ - -/* Auxilliary clips. */ -typedef struct { - volatile unsigned int min; - volatile unsigned int max; -} ffb_auxclip, *ffb_auxclipPtr; - -/* FFB register set. */ -typedef struct _ffb_fbc { - /* Next vertex registers, on the right we list which drawops - * use said register and the logical name the register has in - * that context. - */ /* DESCRIPTION DRAWOP(NAME) */ -/*0x00*/unsigned int pad1[3]; /* Reserved */ -/*0x0c*/volatile unsigned int alpha; /* ALPHA Transparency */ -/*0x10*/volatile unsigned int red; /* RED */ -/*0x14*/volatile unsigned int green; /* GREEN */ -/*0x18*/volatile unsigned int blue; /* BLUE */ -/*0x1c*/volatile unsigned int z; /* DEPTH */ -/*0x20*/volatile unsigned int y; /* Y triangle(DOYF) */ - /* aadot(DYF) */ - /* ddline(DYF) */ - /* aaline(DYF) */ -/*0x24*/volatile unsigned int x; /* X triangle(DOXF) */ - /* aadot(DXF) */ - /* ddline(DXF) */ - /* aaline(DXF) */ -/*0x28*/unsigned int pad2[2]; /* Reserved */ -/*0x30*/volatile unsigned int ryf; /* Y (alias to DOYF) ddline(RYF) */ - /* aaline(RYF) */ - /* triangle(RYF) */ -/*0x34*/volatile unsigned int rxf; /* X ddline(RXF) */ - /* aaline(RXF) */ - /* triangle(RXF) */ -/*0x38*/unsigned int pad3[2]; /* Reserved */ -/*0x40*/volatile unsigned int dmyf; /* Y (alias to DOYF) triangle(DMYF) */ -/*0x44*/volatile unsigned int dmxf; /* X triangle(DMXF) */ -/*0x48*/unsigned int pad4[2]; /* Reserved */ -/*0x50*/volatile unsigned int ebyi; /* Y (alias to RYI) polygon(EBYI) */ -/*0x54*/volatile unsigned int ebxi; /* X polygon(EBXI) */ -/*0x58*/unsigned int pad5[2]; /* Reserved */ -/*0x60*/volatile unsigned int by; /* Y brline(RYI) */ - /* fastfill(OP) */ - /* polygon(YI) */ - /* rectangle(YI) */ - /* bcopy(SRCY) */ - /* vscroll(SRCY) */ -/*0x64*/volatile unsigned int bx; /* X brline(RXI) */ - /* polygon(XI) */ - /* rectangle(XI) */ - /* bcopy(SRCX) */ - /* vscroll(SRCX) */ - /* fastfill(GO) */ -/*0x68*/volatile unsigned int dy; /* destination Y fastfill(DSTY) */ - /* bcopy(DSRY) */ - /* vscroll(DSRY) */ -/*0x6c*/volatile unsigned int dx; /* destination X fastfill(DSTX) */ - /* bcopy(DSTX) */ - /* vscroll(DSTX) */ -/*0x70*/volatile unsigned int bh; /* Y (alias to RYI) brline(DYI) */ - /* dot(DYI) */ - /* polygon(ETYI) */ - /* Height fastfill(H) */ - /* bcopy(H) */ - /* vscroll(H) */ - /* Y count fastfill(NY) */ -/*0x74*/volatile unsigned int bw; /* X dot(DXI) */ - /* brline(DXI) */ - /* polygon(ETXI) */ - /* fastfill(W) */ - /* bcopy(W) */ - /* vscroll(W) */ - /* fastfill(NX) */ -/*0x78*/unsigned int pad6[2]; /* Reserved */ -/*0x80*/unsigned int pad7[32]; /* Reserved */ - - /* Setup Unit's vertex state register */ -/*100*/ volatile unsigned int suvtx; -/*104*/ unsigned int pad8[63]; /* Reserved */ - - /* Frame Buffer Control Registers */ -/*200*/ volatile unsigned int ppc; /* Pixel Processor Control */ -/*204*/ volatile unsigned int wid; /* Current WID */ -/*208*/ volatile unsigned int fg; /* FG data */ -/*20c*/ volatile unsigned int bg; /* BG data */ -/*210*/ volatile unsigned int consty; /* Constant Y */ -/*214*/ volatile unsigned int constz; /* Constant Z */ -/*218*/ volatile unsigned int xclip; /* X Clip */ -/*21c*/ volatile unsigned int dcss; /* Depth Cue Scale Slope */ -/*220*/ volatile unsigned int vclipmin; /* Viewclip XY Min Bounds */ -/*224*/ volatile unsigned int vclipmax; /* Viewclip XY Max Bounds */ -/*228*/ volatile unsigned int vclipzmin; /* Viewclip Z Min Bounds */ -/*22c*/ volatile unsigned int vclipzmax; /* Viewclip Z Max Bounds */ -/*230*/ volatile unsigned int dcsf; /* Depth Cue Scale Front Bound */ -/*234*/ volatile unsigned int dcsb; /* Depth Cue Scale Back Bound */ -/*238*/ volatile unsigned int dczf; /* Depth Cue Z Front */ -/*23c*/ volatile unsigned int dczb; /* Depth Cue Z Back */ -/*240*/ unsigned int pad9; /* Reserved */ -/*244*/ volatile unsigned int blendc; /* Alpha Blend Control */ -/*248*/ volatile unsigned int blendc1; /* Alpha Blend Color 1 */ -/*24c*/ volatile unsigned int blendc2; /* Alpha Blend Color 2 */ -/*250*/ volatile unsigned int fbramitc; /* FB RAM Interleave Test Control */ -/*254*/ volatile unsigned int fbc; /* Frame Buffer Control */ -/*258*/ volatile unsigned int rop; /* Raster OPeration */ -/*25c*/ volatile unsigned int cmp; /* Frame Buffer Compare */ -/*260*/ volatile unsigned int matchab; /* Buffer AB Match Mask */ -/*264*/ volatile unsigned int matchc; /* Buffer C(YZ) Match Mask */ -/*268*/ volatile unsigned int magnab; /* Buffer AB Magnitude Mask */ -/*26c*/ volatile unsigned int magnc; /* Buffer C(YZ) Magnitude Mask */ -/*270*/ volatile unsigned int fbcfg0; /* Frame Buffer Config 0 */ -/*274*/ volatile unsigned int fbcfg1; /* Frame Buffer Config 1 */ -/*278*/ volatile unsigned int fbcfg2; /* Frame Buffer Config 2 */ -/*27c*/ volatile unsigned int fbcfg3; /* Frame Buffer Config 3 */ -/*280*/ volatile unsigned int ppcfg; /* Pixel Processor Config */ -/*284*/ volatile unsigned int pick; /* Picking Control */ -/*288*/ volatile unsigned int fillmode; /* FillMode */ -/*28c*/ volatile unsigned int fbramwac; /* FB RAM Write Address Control */ -/*290*/ volatile unsigned int pmask; /* RGB PlaneMask */ -/*294*/ volatile unsigned int xpmask; /* X PlaneMask */ -/*298*/ volatile unsigned int ypmask; /* Y PlaneMask */ -/*29c*/ volatile unsigned int zpmask; /* Z PlaneMask */ -/*2a0*/ ffb_auxclip auxclip[4]; /* Auxilliary Viewport Clip */ - - /* New 3dRAM III support regs */ -/*2c0*/ volatile unsigned int rawblend2; -/*2c4*/ volatile unsigned int rawpreblend; -/*2c8*/ volatile unsigned int rawstencil; -/*2cc*/ volatile unsigned int rawstencilctl; -/*2d0*/ volatile unsigned int threedram1; -/*2d4*/ volatile unsigned int threedram2; -/*2d8*/ volatile unsigned int passin; -/*2dc*/ volatile unsigned int rawclrdepth; -/*2e0*/ volatile unsigned int rawpmask; -/*2e4*/ volatile unsigned int rawcsrc; -/*2e8*/ volatile unsigned int rawmatch; -/*2ec*/ volatile unsigned int rawmagn; -/*2f0*/ volatile unsigned int rawropblend; -/*2f4*/ volatile unsigned int rawcmp; -/*2f8*/ volatile unsigned int rawwac; -/*2fc*/ volatile unsigned int fbramid; - -/*300*/ volatile unsigned int drawop; /* Draw OPeration */ -/*304*/ unsigned int pad10[2]; /* Reserved */ -/*30c*/ volatile unsigned int lpat; /* Line Pattern control */ -/*310*/ unsigned int pad11; /* Reserved */ -/*314*/ volatile unsigned int fontxy; /* XY Font coordinate */ -/*318*/ volatile unsigned int fontw; /* Font Width */ -/*31c*/ volatile unsigned int fontinc; /* Font Increment */ -/*320*/ volatile unsigned int font; /* Font bits */ -/*324*/ unsigned int pad12[3]; /* Reserved */ -/*330*/ volatile unsigned int blend2; -/*334*/ volatile unsigned int preblend; -/*338*/ volatile unsigned int stencil; -/*33c*/ volatile unsigned int stencilctl; - -/*340*/ unsigned int pad13[4]; /* Reserved */ -/*350*/ volatile unsigned int dcss1; /* Depth Cue Scale Slope 1 */ -/*354*/ volatile unsigned int dcss2; /* Depth Cue Scale Slope 2 */ -/*358*/ volatile unsigned int dcss3; /* Depth Cue Scale Slope 3 */ -/*35c*/ volatile unsigned int widpmask; -/*360*/ volatile unsigned int dcs2; -/*364*/ volatile unsigned int dcs3; -/*368*/ volatile unsigned int dcs4; -/*36c*/ unsigned int pad14; /* Reserved */ -/*370*/ volatile unsigned int dcd2; -/*374*/ volatile unsigned int dcd3; -/*378*/ volatile unsigned int dcd4; -/*37c*/ unsigned int pad15; /* Reserved */ -/*380*/ volatile unsigned int pattern[32]; /* area Pattern */ -/*400*/ unsigned int pad16[8]; /* Reserved */ -/*420*/ volatile unsigned int reset; /* chip RESET */ -/*424*/ unsigned int pad17[247]; /* Reserved */ -/*800*/ volatile unsigned int devid; /* Device ID */ -/*804*/ unsigned int pad18[63]; /* Reserved */ -/*900*/ volatile unsigned int ucsr; /* User Control & Status Register */ -/*904*/ unsigned int pad19[31]; /* Reserved */ -/*980*/ volatile unsigned int mer; /* Mode Enable Register */ -/*984*/ unsigned int pad20[1439]; /* Reserved */ -} ffb_fbc, *ffb_fbcPtr; - -struct ffb_hw_context { - int is_2d_only; - - unsigned int ppc; - unsigned int wid; - unsigned int fg; - unsigned int bg; - unsigned int consty; - unsigned int constz; - unsigned int xclip; - unsigned int dcss; - unsigned int vclipmin; - unsigned int vclipmax; - unsigned int vclipzmin; - unsigned int vclipzmax; - unsigned int dcsf; - unsigned int dcsb; - unsigned int dczf; - unsigned int dczb; - unsigned int blendc; - unsigned int blendc1; - unsigned int blendc2; - unsigned int fbc; - unsigned int rop; - unsigned int cmp; - unsigned int matchab; - unsigned int matchc; - unsigned int magnab; - unsigned int magnc; - unsigned int pmask; - unsigned int xpmask; - unsigned int ypmask; - unsigned int zpmask; - unsigned int auxclip0min; - unsigned int auxclip0max; - unsigned int auxclip1min; - unsigned int auxclip1max; - unsigned int auxclip2min; - unsigned int auxclip2max; - unsigned int auxclip3min; - unsigned int auxclip3max; - unsigned int drawop; - unsigned int lpat; - unsigned int fontxy; - unsigned int fontw; - unsigned int fontinc; - unsigned int area_pattern[32]; - unsigned int ucsr; - unsigned int stencil; - unsigned int stencilctl; - unsigned int dcss1; - unsigned int dcss2; - unsigned int dcss3; - unsigned int dcs2; - unsigned int dcs3; - unsigned int dcs4; - unsigned int dcd2; - unsigned int dcd3; - unsigned int dcd4; - unsigned int mer; -}; - -#define FFB_MAX_CTXS 32 - -enum ffb_chip_type { - ffb1_prototype = 0, /* Early pre-FCS FFB */ - ffb1_standard, /* First FCS FFB, 100Mhz UPA, 66MHz gclk */ - ffb1_speedsort, /* Second FCS FFB, 100Mhz UPA, 75MHz gclk */ - ffb2_prototype, /* Early pre-FCS vertical FFB2 */ - ffb2_vertical, /* First FCS FFB2/vertical, 100Mhz UPA, 100MHZ gclk, - 75(SingleBuffer)/83(DoubleBuffer) MHz fclk */ - ffb2_vertical_plus, /* Second FCS FFB2/vertical, same timings */ - ffb2_horizontal, /* First FCS FFB2/horizontal, same timings as FFB2/vert */ - ffb2_horizontal_plus, /* Second FCS FFB2/horizontal, same timings */ - afb_m3, /* FCS Elite3D, 3 float chips */ - afb_m6 /* FCS Elite3D, 6 float chips */ -}; - -typedef struct ffb_dev_priv { - /* Misc software state. */ - int prom_node; - enum ffb_chip_type ffb_type; - u64 card_phys_base; - struct miscdevice miscdev; - - /* Controller registers. */ - ffb_fbcPtr regs; - - /* Context table. */ - struct ffb_hw_context *hw_state[FFB_MAX_CTXS]; -} ffb_dev_priv_t; - -extern struct file_operations DRM(fops); -extern unsigned long ffb_get_unmapped_area(struct file *filp, - unsigned long hint, - unsigned long len, - unsigned long pgoff, - unsigned long flags); diff --git a/linux/i810.h b/linux/i810.h deleted file mode 100644 index 2ea83be82..000000000 --- a/linux/i810.h +++ /dev/null @@ -1,77 +0,0 @@ -/* i810.h -- Intel i810/i815 DRM template customization -*- linux-c -*- - * Created: Thu Feb 15 00:01:12 2001 by gareth@valinux.com - * - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - -#ifndef __I810_H__ -#define __I810_H__ - -/* This remains constant for all DRM template files. - */ -#define DRM(x) i810_##x - -/* General customization: - */ - -#define DRIVER_AUTHOR "VA Linux Systems Inc." - -#define DRIVER_NAME "i810" -#define DRIVER_DESC "Intel i810" -#define DRIVER_DATE "20030605" - -/* Interface history - * - * 1.1 - XFree86 4.1 - * 1.2 - XvMC interfaces - * - XFree86 4.2 - * 1.2.1 - Disable copying code (leave stub ioctls for backwards compatibility) - * - Remove requirement for interrupt (leave stubs again) - * 1.3 - Add page flipping. - * 1.4 - fix DRM interface - */ -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 4 -#define DRIVER_PATCHLEVEL 0 - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_INIT)] = { i810_dma_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_VERTEX)] = { i810_dma_vertex, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_CLEAR)] = { i810_clear_bufs, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_FLUSH)] = { i810_flush_ioctl, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_GETAGE)] = { i810_getage, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_GETBUF)] = { i810_getbuf, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_SWAP)] = { i810_swap_bufs, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_COPY)] = { i810_copybuf, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_DOCOPY)] = { i810_docopy, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_OV0INFO)] = { i810_ov0_info, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_FSTATUS)] = { i810_fstatus, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_OV0FLIP)] = { i810_ov0_flip, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_MC)] = { i810_dma_mc, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_RSTATUS)] = { i810_rstatus, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_FLIP)] = { i810_flip_bufs, 1, 0 } - -#endif diff --git a/linux/i810_dma.c b/linux/i810_dma.c deleted file mode 100644 index 621be7a92..000000000 --- a/linux/i810_dma.c +++ /dev/null @@ -1,1421 +0,0 @@ -/* i810_dma.c -- DMA support for the i810 -*- linux-c -*- - * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: Rickard E. (Rik) Faith <faith@valinux.com> - * Jeff Hartmann <jhartmann@valinux.com> - * Keith Whitwell <keith@tungstengraphics.com> - * - */ - -#include "i810.h" -#include "drmP.h" -#include "drm.h" -#include "i810_drm.h" -#include "i810_drv.h" -#include <linux/interrupt.h> /* For task queue support */ -#include <linux/delay.h> -#include <linux/pagemap.h> - -#ifdef DO_MUNMAP_4_ARGS -#define DO_MUNMAP(m, a, l) do_munmap(m, a, l, 1) -#else -#define DO_MUNMAP(m, a, l) do_munmap(m, a, l) -#endif - -#define I810_BUF_FREE 2 -#define I810_BUF_CLIENT 1 -#define I810_BUF_HARDWARE 0 - -#define I810_BUF_UNMAPPED 0 -#define I810_BUF_MAPPED 1 - -static inline void i810_print_status_page(drm_device_t *dev) -{ - drm_device_dma_t *dma = dev->dma; - drm_i810_private_t *dev_priv = dev->dev_private; - u32 *temp = dev_priv->hw_status_page; - int i; - - DRM_DEBUG( "hw_status: Interrupt Status : %x\n", temp[0]); - DRM_DEBUG( "hw_status: LpRing Head ptr : %x\n", temp[1]); - DRM_DEBUG( "hw_status: IRing Head ptr : %x\n", temp[2]); - DRM_DEBUG( "hw_status: Reserved : %x\n", temp[3]); - DRM_DEBUG( "hw_status: Last Render: %x\n", temp[4]); - DRM_DEBUG( "hw_status: Driver Counter : %d\n", temp[5]); - for(i = 6; i < dma->buf_count + 6; i++) { - DRM_DEBUG( "buffer status idx : %d used: %d\n", i - 6, temp[i]); - } -} - -static drm_buf_t *i810_freelist_get(drm_device_t *dev) -{ - drm_device_dma_t *dma = dev->dma; - int i; - int used; - - /* Linear search might not be the best solution */ - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - /* In use is already a pointer */ - used = cmpxchg(buf_priv->in_use, I810_BUF_FREE, - I810_BUF_CLIENT); - if (used == I810_BUF_FREE) { - return buf; - } - } - return NULL; -} - -/* This should only be called if the buffer is not sent to the hardware - * yet, the hardware updates in use for us once its on the ring buffer. - */ - -static int i810_freelist_put(drm_device_t *dev, drm_buf_t *buf) -{ - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - int used; - - /* In use is already a pointer */ - used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE); - if (used != I810_BUF_CLIENT) { - DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx); - return -EINVAL; - } - - return 0; -} - -static struct file_operations i810_buffer_fops = { - .open = DRM(open), - .flush = DRM(flush), - .release = DRM(release), - .ioctl = DRM(ioctl), - .mmap = i810_mmap_buffers, - .fasync = DRM(fasync), -}; - -int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev; - drm_i810_private_t *dev_priv; - drm_buf_t *buf; - drm_i810_buf_priv_t *buf_priv; - - lock_kernel(); - dev = priv->dev; - dev_priv = dev->dev_private; - buf = dev_priv->mmap_buffer; - buf_priv = buf->dev_private; - - vma->vm_flags |= (VM_IO | VM_DONTCOPY); - vma->vm_file = filp; - - buf_priv->currently_mapped = I810_BUF_MAPPED; - unlock_kernel(); - - if (remap_page_range(DRM_RPR_ARG(vma) vma->vm_start, - VM_OFFSET(vma), - vma->vm_end - vma->vm_start, - vma->vm_page_prot)) return -EAGAIN; - return 0; -} - -static int i810_map_buffer(drm_buf_t *buf, struct file *filp) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - drm_i810_private_t *dev_priv = dev->dev_private; - struct file_operations *old_fops; - int retcode = 0; - - if (buf_priv->currently_mapped == I810_BUF_MAPPED) - return -EINVAL; - - down_write( ¤t->mm->mmap_sem ); - old_fops = filp->f_op; - filp->f_op = &i810_buffer_fops; - dev_priv->mmap_buffer = buf; - buf_priv->virtual = (void *)do_mmap(filp, 0, buf->total, - PROT_READ|PROT_WRITE, - MAP_SHARED, - buf->bus_address); - dev_priv->mmap_buffer = NULL; - filp->f_op = old_fops; - if ((unsigned long)buf_priv->virtual > -1024UL) { - /* Real error */ - DRM_ERROR("mmap error\n"); - retcode = (signed int)buf_priv->virtual; - buf_priv->virtual = NULL; - } - up_write( ¤t->mm->mmap_sem ); - - return retcode; -} - -static int i810_unmap_buffer(drm_buf_t *buf) -{ - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - int retcode = 0; - - if (buf_priv->currently_mapped != I810_BUF_MAPPED) - return -EINVAL; - - down_write(¤t->mm->mmap_sem); - retcode = DO_MUNMAP(current->mm, - (unsigned long)buf_priv->virtual, - (size_t) buf->total); - up_write(¤t->mm->mmap_sem); - - buf_priv->currently_mapped = I810_BUF_UNMAPPED; - buf_priv->virtual = NULL; - - return retcode; -} - -static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d, - struct file *filp) -{ - drm_buf_t *buf; - drm_i810_buf_priv_t *buf_priv; - int retcode = 0; - - buf = i810_freelist_get(dev); - if (!buf) { - retcode = -ENOMEM; - DRM_DEBUG("retcode=%d\n", retcode); - return retcode; - } - - retcode = i810_map_buffer(buf, filp); - if (retcode) { - i810_freelist_put(dev, buf); - DRM_ERROR("mapbuf failed, retcode %d\n", retcode); - return retcode; - } - buf->filp = filp; - buf_priv = buf->dev_private; - d->granted = 1; - d->request_idx = buf->idx; - d->request_size = buf->total; - d->virtual = buf_priv->virtual; - - return retcode; -} - -int i810_dma_cleanup(drm_device_t *dev) -{ - drm_device_dma_t *dma = dev->dma; - - /* Make sure interrupts are disabled here because the uninstall ioctl - * may not have been called from userspace and after dev_private - * is freed, it's too late. - */ - if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled) - DRM(irq_uninstall)(dev); - - if (dev->dev_private) { - int i; - drm_i810_private_t *dev_priv = - (drm_i810_private_t *) dev->dev_private; - - if (dev_priv->ring.virtual_start) { - DRM(ioremapfree)((void *) dev_priv->ring.virtual_start, - dev_priv->ring.Size, dev); - } - if (dev_priv->hw_status_page) { - pci_free_consistent(dev->pdev, PAGE_SIZE, - dev_priv->hw_status_page, - dev_priv->dma_status_page); - /* Need to rewrite hardware status page */ - I810_WRITE(0x02080, 0x1ffff000); - } - DRM(free)(dev->dev_private, sizeof(drm_i810_private_t), - DRM_MEM_DRIVER); - dev->dev_private = NULL; - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - if ( buf_priv->kernel_virtual && buf->total ) - DRM(ioremapfree)(buf_priv->kernel_virtual, buf->total, dev); - } - } - return 0; -} - -static int i810_wait_ring(drm_device_t *dev, int n) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - drm_i810_ring_buffer_t *ring = &(dev_priv->ring); - int iters = 0; - unsigned long end; - unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; - - end = jiffies + (HZ*3); - while (ring->space < n) { - ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; - ring->space = ring->head - (ring->tail+8); - if (ring->space < 0) ring->space += ring->Size; - - if (ring->head != last_head) { - end = jiffies + (HZ*3); - last_head = ring->head; - } - - iters++; - if (time_before(end, jiffies)) { - DRM_ERROR("space: %d wanted %d\n", ring->space, n); - DRM_ERROR("lockup\n"); - goto out_wait_ring; - } - udelay(1); - } - -out_wait_ring: - return iters; -} - -static void i810_kernel_lost_context(drm_device_t *dev) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - drm_i810_ring_buffer_t *ring = &(dev_priv->ring); - - ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; - ring->tail = I810_READ(LP_RING + RING_TAIL); - ring->space = ring->head - (ring->tail+8); - if (ring->space < 0) ring->space += ring->Size; -} - -static int i810_freelist_init(drm_device_t *dev, drm_i810_private_t *dev_priv) -{ - drm_device_dma_t *dma = dev->dma; - int my_idx = 24; - u32 *hw_status = (u32 *)(dev_priv->hw_status_page + my_idx); - int i; - - if (dma->buf_count > 1019) { - /* Not enough space in the status page for the freelist */ - return -EINVAL; - } - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - - buf_priv->in_use = hw_status++; - buf_priv->my_use_idx = my_idx; - my_idx += 4; - - *buf_priv->in_use = I810_BUF_FREE; - - buf_priv->kernel_virtual = DRM(ioremap)(buf->bus_address, - buf->total, dev); - } - return 0; -} - -static int i810_dma_initialize(drm_device_t *dev, - drm_i810_private_t *dev_priv, - drm_i810_init_t *init) -{ - struct list_head *list; - - memset(dev_priv, 0, sizeof(drm_i810_private_t)); - - list_for_each(list, &dev->maplist->head) { - drm_map_list_t *r_list = list_entry(list, drm_map_list_t, head); - if (r_list->map && - r_list->map->type == _DRM_SHM && - r_list->map->flags & _DRM_CONTAINS_LOCK ) { - dev_priv->sarea_map = r_list->map; - break; - } - } - if (!dev_priv->sarea_map) { - dev->dev_private = (void *)dev_priv; - i810_dma_cleanup(dev); - DRM_ERROR("can not find sarea!\n"); - return -EINVAL; - } - dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset); - if (!dev_priv->mmio_map) { - dev->dev_private = (void *)dev_priv; - i810_dma_cleanup(dev); - DRM_ERROR("can not find mmio map!\n"); - return -EINVAL; - } - dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset); - if (!dev->agp_buffer_map) { - dev->dev_private = (void *)dev_priv; - i810_dma_cleanup(dev); - DRM_ERROR("can not find dma buffer map!\n"); - return -EINVAL; - } - - dev_priv->sarea_priv = (drm_i810_sarea_t *) - ((u8 *)dev_priv->sarea_map->handle + - init->sarea_priv_offset); - - dev_priv->ring.Start = init->ring_start; - dev_priv->ring.End = init->ring_end; - dev_priv->ring.Size = init->ring_size; - - dev_priv->ring.virtual_start = DRM(ioremap)(dev->agp->base + - init->ring_start, - init->ring_size, dev); - - if (dev_priv->ring.virtual_start == NULL) { - dev->dev_private = (void *) dev_priv; - i810_dma_cleanup(dev); - DRM_ERROR("can not ioremap virtual address for" - " ring buffer\n"); - return -ENOMEM; - } - - dev_priv->ring.tail_mask = dev_priv->ring.Size - 1; - - dev_priv->w = init->w; - dev_priv->h = init->h; - dev_priv->pitch = init->pitch; - dev_priv->back_offset = init->back_offset; - dev_priv->depth_offset = init->depth_offset; - dev_priv->front_offset = init->front_offset; - - dev_priv->overlay_offset = init->overlay_offset; - dev_priv->overlay_physical = init->overlay_physical; - - dev_priv->front_di1 = init->front_offset | init->pitch_bits; - dev_priv->back_di1 = init->back_offset | init->pitch_bits; - dev_priv->zi1 = init->depth_offset | init->pitch_bits; - - /* Program Hardware Status Page */ - dev_priv->hw_status_page = - pci_alloc_consistent(dev->pdev, PAGE_SIZE, - &dev_priv->dma_status_page); - if (!dev_priv->hw_status_page) { - dev->dev_private = (void *)dev_priv; - i810_dma_cleanup(dev); - DRM_ERROR("Can not allocate hardware status page\n"); - return -ENOMEM; - } - memset(dev_priv->hw_status_page, 0, PAGE_SIZE); - DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page); - - I810_WRITE(0x02080, dev_priv->dma_status_page); - DRM_DEBUG("Enabled hardware status page\n"); - - /* Now we need to init our freelist */ - if (i810_freelist_init(dev, dev_priv) != 0) { - dev->dev_private = (void *)dev_priv; - i810_dma_cleanup(dev); - DRM_ERROR("Not enough space in the status page for" - " the freelist\n"); - return -ENOMEM; - } - dev->dev_private = (void *)dev_priv; - - return 0; -} - -/* i810 DRM version 1.1 used a smaller init structure with different - * ordering of values than is currently used (drm >= 1.2). There is - * no defined way to detect the XFree version to correct this problem, - * however by checking using this procedure we can detect the correct - * thing to do. - * - * #1 Read the Smaller init structure from user-space - * #2 Verify the overlay_physical is a valid physical address, or NULL - * If it isn't then we have a v1.1 client. Fix up params. - * If it is, then we have a 1.2 client... get the rest of the data. - */ -int i810_dma_init_compat(drm_i810_init_t *init, unsigned long arg) -{ - - /* Get v1.1 init data */ - if (copy_from_user(init, (drm_i810_pre12_init_t __user *)arg, - sizeof(drm_i810_pre12_init_t))) { - return -EFAULT; - } - - if ((!init->overlay_physical) || (init->overlay_physical > 4096)) { - - /* This is a v1.2 client, just get the v1.2 init data */ - DRM_INFO("Using POST v1.2 init.\n"); - if (copy_from_user(init, (drm_i810_init_t __user *)arg, - sizeof(drm_i810_init_t))) { - return -EFAULT; - } - } else { - - /* This is a v1.1 client, fix the params */ - DRM_INFO("Using PRE v1.2 init.\n"); - init->pitch_bits = init->h; - init->pitch = init->w; - init->h = init->overlay_physical; - init->w = init->overlay_offset; - init->overlay_physical = 0; - init->overlay_offset = 0; - } - - return 0; -} - -int i810_dma_init(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i810_private_t *dev_priv; - drm_i810_init_t init; - int retcode = 0; - - /* Get only the init func */ - if (copy_from_user(&init, (void __user *)arg, sizeof(drm_i810_init_func_t))) - return -EFAULT; - - switch(init.func) { - case I810_INIT_DMA: - /* This case is for backward compatibility. It - * handles XFree 4.1.0 and 4.2.0, and has to - * do some parameter checking as described below. - * It will someday go away. - */ - retcode = i810_dma_init_compat(&init, arg); - if (retcode) - return retcode; - - dev_priv = DRM(alloc)(sizeof(drm_i810_private_t), - DRM_MEM_DRIVER); - if (dev_priv == NULL) - return -ENOMEM; - retcode = i810_dma_initialize(dev, dev_priv, &init); - break; - - default: - case I810_INIT_DMA_1_4: - DRM_INFO("Using v1.4 init.\n"); - if (copy_from_user(&init, (drm_i810_init_t __user *)arg, - sizeof(drm_i810_init_t))) { - return -EFAULT; - } - dev_priv = DRM(alloc)(sizeof(drm_i810_private_t), - DRM_MEM_DRIVER); - if (dev_priv == NULL) - return -ENOMEM; - retcode = i810_dma_initialize(dev, dev_priv, &init); - break; - - case I810_CLEANUP_DMA: - DRM_INFO("DMA Cleanup\n"); - retcode = i810_dma_cleanup(dev); - break; - } - - return retcode; -} - - - -/* Most efficient way to verify state for the i810 is as it is - * emitted. Non-conformant state is silently dropped. - * - * Use 'volatile' & local var tmp to force the emitted values to be - * identical to the verified ones. - */ -static void i810EmitContextVerified( drm_device_t *dev, - volatile unsigned int *code ) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - int i, j = 0; - unsigned int tmp; - RING_LOCALS; - - BEGIN_LP_RING( I810_CTX_SETUP_SIZE ); - - OUT_RING( GFX_OP_COLOR_FACTOR ); - OUT_RING( code[I810_CTXREG_CF1] ); - - OUT_RING( GFX_OP_STIPPLE ); - OUT_RING( code[I810_CTXREG_ST1] ); - - for ( i = 4 ; i < I810_CTX_SETUP_SIZE ; i++ ) { - tmp = code[i]; - - if ((tmp & (7<<29)) == (3<<29) && - (tmp & (0x1f<<24)) < (0x1d<<24)) - { - OUT_RING( tmp ); - j++; - } - else printk("constext state dropped!!!\n"); - } - - if (j & 1) - OUT_RING( 0 ); - - ADVANCE_LP_RING(); -} - -static void i810EmitTexVerified( drm_device_t *dev, - volatile unsigned int *code ) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - int i, j = 0; - unsigned int tmp; - RING_LOCALS; - - BEGIN_LP_RING( I810_TEX_SETUP_SIZE ); - - OUT_RING( GFX_OP_MAP_INFO ); - OUT_RING( code[I810_TEXREG_MI1] ); - OUT_RING( code[I810_TEXREG_MI2] ); - OUT_RING( code[I810_TEXREG_MI3] ); - - for ( i = 4 ; i < I810_TEX_SETUP_SIZE ; i++ ) { - tmp = code[i]; - - if ((tmp & (7<<29)) == (3<<29) && - (tmp & (0x1f<<24)) < (0x1d<<24)) - { - OUT_RING( tmp ); - j++; - } - else printk("texture state dropped!!!\n"); - } - - if (j & 1) - OUT_RING( 0 ); - - ADVANCE_LP_RING(); -} - - -/* Need to do some additional checking when setting the dest buffer. - */ -static void i810EmitDestVerified( drm_device_t *dev, - volatile unsigned int *code ) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - unsigned int tmp; - RING_LOCALS; - - BEGIN_LP_RING( I810_DEST_SETUP_SIZE + 2 ); - - tmp = code[I810_DESTREG_DI1]; - if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) { - OUT_RING( CMD_OP_DESTBUFFER_INFO ); - OUT_RING( tmp ); - } else - DRM_DEBUG("bad di1 %x (allow %x or %x)\n", - tmp, dev_priv->front_di1, dev_priv->back_di1); - - /* invarient: - */ - OUT_RING( CMD_OP_Z_BUFFER_INFO ); - OUT_RING( dev_priv->zi1 ); - - OUT_RING( GFX_OP_DESTBUFFER_VARS ); - OUT_RING( code[I810_DESTREG_DV1] ); - - OUT_RING( GFX_OP_DRAWRECT_INFO ); - OUT_RING( code[I810_DESTREG_DR1] ); - OUT_RING( code[I810_DESTREG_DR2] ); - OUT_RING( code[I810_DESTREG_DR3] ); - OUT_RING( code[I810_DESTREG_DR4] ); - OUT_RING( 0 ); - - ADVANCE_LP_RING(); -} - - - -static void i810EmitState( drm_device_t *dev ) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int dirty = sarea_priv->dirty; - - DRM_DEBUG("%s %x\n", __FUNCTION__, dirty); - - if (dirty & I810_UPLOAD_BUFFERS) { - i810EmitDestVerified( dev, sarea_priv->BufferState ); - sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS; - } - - if (dirty & I810_UPLOAD_CTX) { - i810EmitContextVerified( dev, sarea_priv->ContextState ); - sarea_priv->dirty &= ~I810_UPLOAD_CTX; - } - - if (dirty & I810_UPLOAD_TEX0) { - i810EmitTexVerified( dev, sarea_priv->TexState[0] ); - sarea_priv->dirty &= ~I810_UPLOAD_TEX0; - } - - if (dirty & I810_UPLOAD_TEX1) { - i810EmitTexVerified( dev, sarea_priv->TexState[1] ); - sarea_priv->dirty &= ~I810_UPLOAD_TEX1; - } -} - - - -/* need to verify - */ -static void i810_dma_dispatch_clear( drm_device_t *dev, int flags, - unsigned int clear_color, - unsigned int clear_zval ) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; - int nbox = sarea_priv->nbox; - drm_clip_rect_t *pbox = sarea_priv->boxes; - int pitch = dev_priv->pitch; - int cpp = 2; - int i; - RING_LOCALS; - - if ( dev_priv->current_page == 1 ) { - unsigned int tmp = flags; - - flags &= ~(I810_FRONT | I810_BACK); - if (tmp & I810_FRONT) flags |= I810_BACK; - if (tmp & I810_BACK) flags |= I810_FRONT; - } - - i810_kernel_lost_context(dev); - - if (nbox > I810_NR_SAREA_CLIPRECTS) - nbox = I810_NR_SAREA_CLIPRECTS; - - for (i = 0 ; i < nbox ; i++, pbox++) { - unsigned int x = pbox->x1; - unsigned int y = pbox->y1; - unsigned int width = (pbox->x2 - x) * cpp; - unsigned int height = pbox->y2 - y; - unsigned int start = y * pitch + x * cpp; - - if (pbox->x1 > pbox->x2 || - pbox->y1 > pbox->y2 || - pbox->x2 > dev_priv->w || - pbox->y2 > dev_priv->h) - continue; - - if ( flags & I810_FRONT ) { - BEGIN_LP_RING( 6 ); - OUT_RING( BR00_BITBLT_CLIENT | - BR00_OP_COLOR_BLT | 0x3 ); - OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch ); - OUT_RING( (height << 16) | width ); - OUT_RING( start ); - OUT_RING( clear_color ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - } - - if ( flags & I810_BACK ) { - BEGIN_LP_RING( 6 ); - OUT_RING( BR00_BITBLT_CLIENT | - BR00_OP_COLOR_BLT | 0x3 ); - OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch ); - OUT_RING( (height << 16) | width ); - OUT_RING( dev_priv->back_offset + start ); - OUT_RING( clear_color ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - } - - if ( flags & I810_DEPTH ) { - BEGIN_LP_RING( 6 ); - OUT_RING( BR00_BITBLT_CLIENT | - BR00_OP_COLOR_BLT | 0x3 ); - OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch ); - OUT_RING( (height << 16) | width ); - OUT_RING( dev_priv->depth_offset + start ); - OUT_RING( clear_zval ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - } - } -} - -static void i810_dma_dispatch_swap( drm_device_t *dev ) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; - int nbox = sarea_priv->nbox; - drm_clip_rect_t *pbox = sarea_priv->boxes; - int pitch = dev_priv->pitch; - int cpp = 2; - int i; - RING_LOCALS; - - DRM_DEBUG("swapbuffers\n"); - - i810_kernel_lost_context(dev); - - if (nbox > I810_NR_SAREA_CLIPRECTS) - nbox = I810_NR_SAREA_CLIPRECTS; - - for (i = 0 ; i < nbox; i++, pbox++) - { - unsigned int w = pbox->x2 - pbox->x1; - unsigned int h = pbox->y2 - pbox->y1; - unsigned int dst = pbox->x1*cpp + pbox->y1*pitch; - unsigned int start = dst; - - if (pbox->x1 > pbox->x2 || - pbox->y1 > pbox->y2 || - pbox->x2 > dev_priv->w || - pbox->y2 > dev_priv->h) - continue; - - BEGIN_LP_RING( 6 ); - OUT_RING( BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4 ); - OUT_RING( pitch | (0xCC << 16)); - OUT_RING( (h << 16) | (w * cpp)); - if (dev_priv->current_page == 0) - OUT_RING(dev_priv->front_offset + start); - else - OUT_RING(dev_priv->back_offset + start); - OUT_RING( pitch ); - if (dev_priv->current_page == 0) - OUT_RING(dev_priv->back_offset + start); - else - OUT_RING(dev_priv->front_offset + start); - ADVANCE_LP_RING(); - } -} - - -static void i810_dma_dispatch_vertex(drm_device_t *dev, - drm_buf_t *buf, - int discard, - int used) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_clip_rect_t *box = sarea_priv->boxes; - int nbox = sarea_priv->nbox; - unsigned long address = (unsigned long)buf->bus_address; - unsigned long start = address - dev->agp->base; - int i = 0; - RING_LOCALS; - - i810_kernel_lost_context(dev); - - if (nbox > I810_NR_SAREA_CLIPRECTS) - nbox = I810_NR_SAREA_CLIPRECTS; - - if (used > 4*1024) - used = 0; - - if (sarea_priv->dirty) - i810EmitState( dev ); - - if (buf_priv->currently_mapped == I810_BUF_MAPPED) { - unsigned int prim = (sarea_priv->vertex_prim & PR_MASK); - - *(u32 *)buf_priv->kernel_virtual = ((GFX_OP_PRIMITIVE | prim | ((used/4)-2))); - - if (used & 4) { - *(u32 *)((u32)buf_priv->kernel_virtual + used) = 0; - used += 4; - } - - i810_unmap_buffer(buf); - } - - if (used) { - do { - if (i < nbox) { - BEGIN_LP_RING(4); - OUT_RING( GFX_OP_SCISSOR | SC_UPDATE_SCISSOR | - SC_ENABLE ); - OUT_RING( GFX_OP_SCISSOR_INFO ); - OUT_RING( box[i].x1 | (box[i].y1<<16) ); - OUT_RING( (box[i].x2-1) | ((box[i].y2-1)<<16) ); - ADVANCE_LP_RING(); - } - - BEGIN_LP_RING(4); - OUT_RING( CMD_OP_BATCH_BUFFER ); - OUT_RING( start | BB1_PROTECTED ); - OUT_RING( start + used - 4 ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - - } while (++i < nbox); - } - - if (discard) { - dev_priv->counter++; - - (void) cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, - I810_BUF_HARDWARE); - - BEGIN_LP_RING(8); - OUT_RING( CMD_STORE_DWORD_IDX ); - OUT_RING( 20 ); - OUT_RING( dev_priv->counter ); - OUT_RING( CMD_STORE_DWORD_IDX ); - OUT_RING( buf_priv->my_use_idx ); - OUT_RING( I810_BUF_FREE ); - OUT_RING( CMD_REPORT_HEAD ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - } -} - -static void i810_dma_dispatch_flip( drm_device_t *dev ) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - int pitch = dev_priv->pitch; - RING_LOCALS; - - DRM_DEBUG( "%s: page=%d pfCurrentPage=%d\n", - __FUNCTION__, - dev_priv->current_page, - dev_priv->sarea_priv->pf_current_page); - - i810_kernel_lost_context(dev); - - BEGIN_LP_RING( 2 ); - OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - - BEGIN_LP_RING( I810_DEST_SETUP_SIZE + 2 ); - /* On i815 at least ASYNC is buggy */ - /* pitch<<5 is from 11.2.8 p158, - its the pitch / 8 then left shifted 8, - so (pitch >> 3) << 8 */ - OUT_RING( CMD_OP_FRONTBUFFER_INFO | (pitch<<5) /*| ASYNC_FLIP */ ); - if ( dev_priv->current_page == 0 ) { - OUT_RING( dev_priv->back_offset ); - dev_priv->current_page = 1; - } else { - OUT_RING( dev_priv->front_offset ); - dev_priv->current_page = 0; - } - OUT_RING(0); - ADVANCE_LP_RING(); - - BEGIN_LP_RING(2); - OUT_RING( CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - - /* Increment the frame counter. The client-side 3D driver must - * throttle the framerate by waiting for this value before - * performing the swapbuffer ioctl. - */ - dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; - -} - -void i810_dma_quiescent(drm_device_t *dev) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - -/* printk("%s\n", __FUNCTION__); */ - - i810_kernel_lost_context(dev); - - BEGIN_LP_RING(4); - OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE ); - OUT_RING( CMD_REPORT_HEAD ); - OUT_RING( 0 ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - - i810_wait_ring( dev, dev_priv->ring.Size - 8 ); -} - -static int i810_flush_queue(drm_device_t *dev) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - drm_device_dma_t *dma = dev->dma; - int i, ret = 0; - RING_LOCALS; - -/* printk("%s\n", __FUNCTION__); */ - - i810_kernel_lost_context(dev); - - BEGIN_LP_RING(2); - OUT_RING( CMD_REPORT_HEAD ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - - i810_wait_ring( dev, dev_priv->ring.Size - 8 ); - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - - int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE, - I810_BUF_FREE); - - if (used == I810_BUF_HARDWARE) - DRM_DEBUG("reclaimed from HARDWARE\n"); - if (used == I810_BUF_CLIENT) - DRM_DEBUG("still on client\n"); - } - - return ret; -} - -/* Must be called with the lock held */ -void i810_reclaim_buffers(drm_device_t *dev, struct file *filp) -{ - drm_device_dma_t *dma = dev->dma; - int i; - - if (!dma) return; - if (!dev->dev_private) return; - if (!dma->buflist) return; - - i810_flush_queue(dev); - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - - if (buf->filp == filp && buf_priv) { - int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, - I810_BUF_FREE); - - if (used == I810_BUF_CLIENT) - DRM_DEBUG("reclaimed from client\n"); - if (buf_priv->currently_mapped == I810_BUF_MAPPED) - buf_priv->currently_mapped = I810_BUF_UNMAPPED; - } - } -} - -int i810_flush_ioctl(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - - if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i810_flush_ioctl called without lock held\n"); - return -EINVAL; - } - - i810_flush_queue(dev); - return 0; -} - - -int i810_dma_vertex(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_device_dma_t *dma = dev->dma; - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - u32 *hw_status = dev_priv->hw_status_page; - drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) - dev_priv->sarea_priv; - drm_i810_vertex_t vertex; - - if (copy_from_user(&vertex, (drm_i810_vertex_t __user *)arg, sizeof(vertex))) - return -EFAULT; - - if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i810_dma_vertex called without lock held\n"); - return -EINVAL; - } - - DRM_DEBUG("i810 dma vertex, idx %d used %d discard %d\n", - vertex.idx, vertex.used, vertex.discard); - - if (vertex.idx < 0 || vertex.idx > dma->buf_count) - return -EINVAL; - - i810_dma_dispatch_vertex( dev, - dma->buflist[ vertex.idx ], - vertex.discard, vertex.used ); - - atomic_add(vertex.used, &dev->counts[_DRM_STAT_SECONDARY]); - atomic_inc(&dev->counts[_DRM_STAT_DMA]); - sarea_priv->last_enqueue = dev_priv->counter-1; - sarea_priv->last_dispatch = (int) hw_status[5]; - - return 0; -} - - - -int i810_clear_bufs(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i810_clear_t clear; - - if (copy_from_user(&clear, (drm_i810_clear_t __user *)arg, sizeof(clear))) - return -EFAULT; - - if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i810_clear_bufs called without lock held\n"); - return -EINVAL; - } - - /* GH: Someone's doing nasty things... */ - if (!dev->dev_private) { - return -EINVAL; - } - - i810_dma_dispatch_clear( dev, clear.flags, - clear.clear_color, - clear.clear_depth ); - return 0; -} - -int i810_swap_bufs(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - - DRM_DEBUG("i810_swap_bufs\n"); - - if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i810_swap_buf called without lock held\n"); - return -EINVAL; - } - - i810_dma_dispatch_swap( dev ); - return 0; -} - -int i810_getage(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - u32 *hw_status = dev_priv->hw_status_page; - drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) - dev_priv->sarea_priv; - - sarea_priv->last_dispatch = (int) hw_status[5]; - return 0; -} - -int i810_getbuf(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - int retcode = 0; - drm_i810_dma_t d; - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - u32 *hw_status = dev_priv->hw_status_page; - drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) - dev_priv->sarea_priv; - - if (copy_from_user(&d, (drm_i810_dma_t __user *)arg, sizeof(d))) - return -EFAULT; - - if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i810_dma called without lock held\n"); - return -EINVAL; - } - - d.granted = 0; - - retcode = i810_dma_get_buffer(dev, &d, filp); - - DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n", - current->pid, retcode, d.granted); - - if (copy_to_user((drm_dma_t __user *)arg, &d, sizeof(d))) - return -EFAULT; - sarea_priv->last_dispatch = (int) hw_status[5]; - - return retcode; -} - -int i810_copybuf(struct inode *inode, - struct file *filp, - unsigned int cmd, - unsigned long arg) -{ - /* Never copy - 2.4.x doesn't need it */ - return 0; -} - -int i810_docopy(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - /* Never copy - 2.4.x doesn't need it */ - return 0; -} - -static void i810_dma_dispatch_mc(drm_device_t *dev, drm_buf_t *buf, int used, - unsigned int last_render) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned long address = (unsigned long)buf->bus_address; - unsigned long start = address - dev->agp->base; - int u; - RING_LOCALS; - - i810_kernel_lost_context(dev); - - u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, - I810_BUF_HARDWARE); - if (u != I810_BUF_CLIENT) { - DRM_DEBUG("MC found buffer that isn't mine!\n"); - } - - if (used > 4*1024) - used = 0; - - sarea_priv->dirty = 0x7f; - - DRM_DEBUG("dispatch mc addr 0x%lx, used 0x%x\n", - address, used); - - dev_priv->counter++; - DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter); - DRM_DEBUG("i810_dma_dispatch_mc\n"); - DRM_DEBUG("start : %lx\n", start); - DRM_DEBUG("used : %d\n", used); - DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4); - - if (buf_priv->currently_mapped == I810_BUF_MAPPED) { - if (used & 4) { - *(u32 *)((u32)buf_priv->virtual + used) = 0; - used += 4; - } - - i810_unmap_buffer(buf); - } - BEGIN_LP_RING(4); - OUT_RING( CMD_OP_BATCH_BUFFER ); - OUT_RING( start | BB1_PROTECTED ); - OUT_RING( start + used - 4 ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - - - BEGIN_LP_RING(8); - OUT_RING( CMD_STORE_DWORD_IDX ); - OUT_RING( buf_priv->my_use_idx ); - OUT_RING( I810_BUF_FREE ); - OUT_RING( 0 ); - - OUT_RING( CMD_STORE_DWORD_IDX ); - OUT_RING( 16 ); - OUT_RING( last_render ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); -} - -int i810_dma_mc(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_device_dma_t *dma = dev->dma; - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - u32 *hw_status = dev_priv->hw_status_page; - drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) - dev_priv->sarea_priv; - drm_i810_mc_t mc; - - if (copy_from_user(&mc, (drm_i810_mc_t __user *)arg, sizeof(mc))) - return -EFAULT; - - if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i810_dma_mc called without lock held\n"); - return -EINVAL; - } - - if (mc.idx >= dma->buf_count || mc.idx < 0) - return -EINVAL; - - i810_dma_dispatch_mc(dev, dma->buflist[mc.idx], mc.used, - mc.last_render ); - - atomic_add(mc.used, &dev->counts[_DRM_STAT_SECONDARY]); - atomic_inc(&dev->counts[_DRM_STAT_DMA]); - sarea_priv->last_enqueue = dev_priv->counter-1; - sarea_priv->last_dispatch = (int) hw_status[5]; - - return 0; -} - -int i810_rstatus(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - - return (int)(((u32 *)(dev_priv->hw_status_page))[4]); -} - -int i810_ov0_info(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - drm_i810_overlay_t data; - - data.offset = dev_priv->overlay_offset; - data.physical = dev_priv->overlay_physical; - if (copy_to_user((drm_i810_overlay_t __user *)arg,&data,sizeof(data))) - return -EFAULT; - return 0; -} - -int i810_fstatus(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - - if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i810_fstatus called without lock held\n"); - return -EINVAL; - } - return I810_READ(0x30008); -} - -int i810_ov0_flip(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - - if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i810_ov0_flip called without lock held\n"); - return -EINVAL; - } - - //Tell the overlay to update - I810_WRITE(0x30000,dev_priv->overlay_physical | 0x80000000); - - return 0; -} - - -/* Not sure why this isn't set all the time: - */ -static void i810_do_init_pageflip( drm_device_t *dev ) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - - DRM_DEBUG("%s\n", __FUNCTION__); - dev_priv->page_flipping = 1; - dev_priv->current_page = 0; - dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; -} - -int i810_do_cleanup_pageflip( drm_device_t *dev ) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - - DRM_DEBUG("%s\n", __FUNCTION__); - if (dev_priv->current_page != 0) - i810_dma_dispatch_flip( dev ); - - dev_priv->page_flipping = 0; - return 0; -} - -int i810_flip_bufs(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i810_private_t *dev_priv = dev->dev_private; - - DRM_DEBUG("%s\n", __FUNCTION__); - - if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i810_flip_buf called without lock held\n"); - return -EINVAL; - } - - if (!dev_priv->page_flipping) - i810_do_init_pageflip( dev ); - - i810_dma_dispatch_flip( dev ); - return 0; -} - -static void i810_driver_pretakedown(drm_device_t *dev) -{ - i810_dma_cleanup( dev ); -} - -static void i810_driver_release(drm_device_t *dev, struct file *filp) -{ - i810_reclaim_buffers(dev, filp); -} - -static int i810_driver_dma_quiescent(drm_device_t *dev) -{ - i810_dma_quiescent( dev ); - return 0; -} - -void i810_driver_register_fns(drm_device_t *dev) -{ - dev->driver_features = DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_DMA | DRIVER_DMA_QUEUE; - dev->dev_priv_size = sizeof(drm_i810_buf_priv_t); - dev->fn_tbl.pretakedown = i810_driver_pretakedown; - dev->fn_tbl.release = i810_driver_release; - dev->fn_tbl.dma_quiescent = i810_driver_dma_quiescent; - dev->fn_tbl.reclaim_buffers = i810_reclaim_buffers; - - /* i810 has 4 more counters */ - dev->counters += 4; - dev->types[6] = _DRM_STAT_IRQ; - dev->types[7] = _DRM_STAT_PRIMARY; - dev->types[8] = _DRM_STAT_SECONDARY; - dev->types[9] = _DRM_STAT_DMA; -} - diff --git a/linux/i810_drm.h b/linux/i810_drm.h deleted file mode 100644 index 93775f68a..000000000 --- a/linux/i810_drm.h +++ /dev/null @@ -1,278 +0,0 @@ -#ifndef _I810_DRM_H_ -#define _I810_DRM_H_ - -/* WARNING: These defines must be the same as what the Xserver uses. - * if you change them, you must change the defines in the Xserver. - */ - -#ifndef _I810_DEFINES_ -#define _I810_DEFINES_ - -#define I810_DMA_BUF_ORDER 12 -#define I810_DMA_BUF_SZ (1<<I810_DMA_BUF_ORDER) -#define I810_DMA_BUF_NR 256 -#define I810_NR_SAREA_CLIPRECTS 8 - -/* Each region is a minimum of 64k, and there are at most 64 of them. - */ -#define I810_NR_TEX_REGIONS 64 -#define I810_LOG_MIN_TEX_REGION_SIZE 16 -#endif - -#define I810_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */ -#define I810_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */ -#define I810_UPLOAD_CTX 0x4 -#define I810_UPLOAD_BUFFERS 0x8 -#define I810_UPLOAD_TEX0 0x10 -#define I810_UPLOAD_TEX1 0x20 -#define I810_UPLOAD_CLIPRECTS 0x40 - - -/* Indices into buf.Setup where various bits of state are mirrored per - * context and per buffer. These can be fired at the card as a unit, - * or in a piecewise fashion as required. - */ - -/* Destbuffer state - * - backbuffer linear offset and pitch -- invarient in the current dri - * - zbuffer linear offset and pitch -- also invarient - * - drawing origin in back and depth buffers. - * - * Keep the depth/back buffer state here to accommodate private buffers - * in the future. - */ -#define I810_DESTREG_DI0 0 /* CMD_OP_DESTBUFFER_INFO (2 dwords) */ -#define I810_DESTREG_DI1 1 -#define I810_DESTREG_DV0 2 /* GFX_OP_DESTBUFFER_VARS (2 dwords) */ -#define I810_DESTREG_DV1 3 -#define I810_DESTREG_DR0 4 /* GFX_OP_DRAWRECT_INFO (4 dwords) */ -#define I810_DESTREG_DR1 5 -#define I810_DESTREG_DR2 6 -#define I810_DESTREG_DR3 7 -#define I810_DESTREG_DR4 8 -#define I810_DEST_SETUP_SIZE 10 - -/* Context state - */ -#define I810_CTXREG_CF0 0 /* GFX_OP_COLOR_FACTOR */ -#define I810_CTXREG_CF1 1 -#define I810_CTXREG_ST0 2 /* GFX_OP_STIPPLE */ -#define I810_CTXREG_ST1 3 -#define I810_CTXREG_VF 4 /* GFX_OP_VERTEX_FMT */ -#define I810_CTXREG_MT 5 /* GFX_OP_MAP_TEXELS */ -#define I810_CTXREG_MC0 6 /* GFX_OP_MAP_COLOR_STAGES - stage 0 */ -#define I810_CTXREG_MC1 7 /* GFX_OP_MAP_COLOR_STAGES - stage 1 */ -#define I810_CTXREG_MC2 8 /* GFX_OP_MAP_COLOR_STAGES - stage 2 */ -#define I810_CTXREG_MA0 9 /* GFX_OP_MAP_ALPHA_STAGES - stage 0 */ -#define I810_CTXREG_MA1 10 /* GFX_OP_MAP_ALPHA_STAGES - stage 1 */ -#define I810_CTXREG_MA2 11 /* GFX_OP_MAP_ALPHA_STAGES - stage 2 */ -#define I810_CTXREG_SDM 12 /* GFX_OP_SRC_DEST_MONO */ -#define I810_CTXREG_FOG 13 /* GFX_OP_FOG_COLOR */ -#define I810_CTXREG_B1 14 /* GFX_OP_BOOL_1 */ -#define I810_CTXREG_B2 15 /* GFX_OP_BOOL_2 */ -#define I810_CTXREG_LCS 16 /* GFX_OP_LINEWIDTH_CULL_SHADE_MODE */ -#define I810_CTXREG_PV 17 /* GFX_OP_PV_RULE -- Invarient! */ -#define I810_CTXREG_ZA 18 /* GFX_OP_ZBIAS_ALPHAFUNC */ -#define I810_CTXREG_AA 19 /* GFX_OP_ANTIALIAS */ -#define I810_CTX_SETUP_SIZE 20 - -/* Texture state (per tex unit) - */ -#define I810_TEXREG_MI0 0 /* GFX_OP_MAP_INFO (4 dwords) */ -#define I810_TEXREG_MI1 1 -#define I810_TEXREG_MI2 2 -#define I810_TEXREG_MI3 3 -#define I810_TEXREG_MF 4 /* GFX_OP_MAP_FILTER */ -#define I810_TEXREG_MLC 5 /* GFX_OP_MAP_LOD_CTL */ -#define I810_TEXREG_MLL 6 /* GFX_OP_MAP_LOD_LIMITS */ -#define I810_TEXREG_MCS 7 /* GFX_OP_MAP_COORD_SETS ??? */ -#define I810_TEX_SETUP_SIZE 8 - -/* Flags for clear ioctl - */ -#define I810_FRONT 0x1 -#define I810_BACK 0x2 -#define I810_DEPTH 0x4 - -typedef enum _drm_i810_init_func { - I810_INIT_DMA = 0x01, - I810_CLEANUP_DMA = 0x02, - I810_INIT_DMA_1_4 = 0x03 - } drm_i810_init_func_t; - -/* This is the init structure after v1.2 */ -typedef struct _drm_i810_init { - drm_i810_init_func_t func; -#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0) - int ring_map_idx; - int buffer_map_idx; -#else - unsigned int mmio_offset; - unsigned int buffers_offset; -#endif - int sarea_priv_offset; - unsigned int ring_start; - unsigned int ring_end; - unsigned int ring_size; - unsigned int front_offset; - unsigned int back_offset; - unsigned int depth_offset; - unsigned int overlay_offset; - unsigned int overlay_physical; - unsigned int w; - unsigned int h; - unsigned int pitch; - unsigned int pitch_bits; -} drm_i810_init_t; - -/* This is the init structure prior to v1.2 */ -typedef struct _drm_i810_pre12_init { - drm_i810_init_func_t func; -#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0) - int ring_map_idx; - int buffer_map_idx; -#else - unsigned int mmio_offset; - unsigned int buffers_offset; -#endif - int sarea_priv_offset; - unsigned int ring_start; - unsigned int ring_end; - unsigned int ring_size; - unsigned int front_offset; - unsigned int back_offset; - unsigned int depth_offset; - unsigned int w; - unsigned int h; - unsigned int pitch; - unsigned int pitch_bits; -} drm_i810_pre12_init_t; - -/* Warning: If you change the SAREA structure you must change the Xserver - * structure as well */ - -typedef struct _drm_i810_tex_region { - unsigned char next, prev; /* indices to form a circular LRU */ - unsigned char in_use; /* owned by a client, or free? */ - int age; /* tracked by clients to update local LRU's */ -} drm_i810_tex_region_t; - -typedef struct _drm_i810_sarea { - unsigned int ContextState[I810_CTX_SETUP_SIZE]; - unsigned int BufferState[I810_DEST_SETUP_SIZE]; - unsigned int TexState[2][I810_TEX_SETUP_SIZE]; - unsigned int dirty; - - unsigned int nbox; - drm_clip_rect_t boxes[I810_NR_SAREA_CLIPRECTS]; - - /* Maintain an LRU of contiguous regions of texture space. If - * you think you own a region of texture memory, and it has an - * age different to the one you set, then you are mistaken and - * it has been stolen by another client. If global texAge - * hasn't changed, there is no need to walk the list. - * - * These regions can be used as a proxy for the fine-grained - * texture information of other clients - by maintaining them - * in the same lru which is used to age their own textures, - * clients have an approximate lru for the whole of global - * texture space, and can make informed decisions as to which - * areas to kick out. There is no need to choose whether to - * kick out your own texture or someone else's - simply eject - * them all in LRU order. - */ - - drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS+1]; - /* Last elt is sentinal */ - int texAge; /* last time texture was uploaded */ - int last_enqueue; /* last time a buffer was enqueued */ - int last_dispatch; /* age of the most recently dispatched buffer */ - int last_quiescent; /* */ - int ctxOwner; /* last context to upload state */ - - int vertex_prim; - - int pf_enabled; /* is pageflipping allowed? */ - int pf_active; - int pf_current_page; /* which buffer is being displayed? */ -} drm_i810_sarea_t; - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (xf86drmMga.h) - */ - -/* i810 specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ -#define DRM_IOCTL_I810_INIT DRM_IOW( 0x40, drm_i810_init_t) -#define DRM_IOCTL_I810_VERTEX DRM_IOW( 0x41, drm_i810_vertex_t) -#define DRM_IOCTL_I810_CLEAR DRM_IOW( 0x42, drm_i810_clear_t) -#define DRM_IOCTL_I810_FLUSH DRM_IO( 0x43) -#define DRM_IOCTL_I810_GETAGE DRM_IO( 0x44) -#define DRM_IOCTL_I810_GETBUF DRM_IOWR(0x45, drm_i810_dma_t) -#define DRM_IOCTL_I810_SWAP DRM_IO( 0x46) -#define DRM_IOCTL_I810_COPY DRM_IOW( 0x47, drm_i810_copy_t) -#define DRM_IOCTL_I810_DOCOPY DRM_IO( 0x48) -#define DRM_IOCTL_I810_OV0INFO DRM_IOR( 0x49, drm_i810_overlay_t) -#define DRM_IOCTL_I810_FSTATUS DRM_IO ( 0x4a) -#define DRM_IOCTL_I810_OV0FLIP DRM_IO ( 0x4b) -#define DRM_IOCTL_I810_MC DRM_IOW( 0x4c, drm_i810_mc_t) -#define DRM_IOCTL_I810_RSTATUS DRM_IO ( 0x4d ) -#define DRM_IOCTL_I810_FLIP DRM_IO ( 0x4e ) - -typedef struct _drm_i810_clear { - int clear_color; - int clear_depth; - int flags; -} drm_i810_clear_t; - -/* These may be placeholders if we have more cliprects than - * I810_NR_SAREA_CLIPRECTS. In that case, the client sets discard to - * false, indicating that the buffer will be dispatched again with a - * new set of cliprects. - */ -typedef struct _drm_i810_vertex { - int idx; /* buffer index */ - int used; /* nr bytes in use */ - int discard; /* client is finished with the buffer? */ -} drm_i810_vertex_t; - -typedef struct _drm_i810_copy_t { - int idx; /* buffer index */ - int used; /* nr bytes in use */ - void *address; /* Address to copy from */ -} drm_i810_copy_t; - -#define PR_TRIANGLES (0x0<<18) -#define PR_TRISTRIP_0 (0x1<<18) -#define PR_TRISTRIP_1 (0x2<<18) -#define PR_TRIFAN (0x3<<18) -#define PR_POLYGON (0x4<<18) -#define PR_LINES (0x5<<18) -#define PR_LINESTRIP (0x6<<18) -#define PR_RECTS (0x7<<18) -#define PR_MASK (0x7<<18) - - -typedef struct drm_i810_dma { - void *virtual; - int request_idx; - int request_size; - int granted; -} drm_i810_dma_t; - -typedef struct _drm_i810_overlay_t { - unsigned int offset; /* Address of the Overlay Regs */ - unsigned int physical; -} drm_i810_overlay_t; - -typedef struct _drm_i810_mc { - int idx; /* buffer index */ - int used; /* nr bytes in use */ - int num_blocks; /* number of GFXBlocks */ - int *length; /* List of lengths for GFXBlocks (FUTURE)*/ - unsigned int last_render; /* Last Render Request */ -} drm_i810_mc_t; - - -#endif /* _I810_DRM_H_ */ diff --git a/linux/i810_drv.c b/linux/i810_drv.c deleted file mode 100644 index 00ca55166..000000000 --- a/linux/i810_drv.c +++ /dev/null @@ -1,40 +0,0 @@ -/* i810_drv.c -- I810 driver -*- linux-c -*- - * Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Jeff Hartmann <jhartmann@valinux.com> - * Gareth Hughes <gareth@valinux.com> - */ - -#include <linux/config.h> -#include "i810.h" -#include "drmP.h" -#include "drm.h" -#include "i810_drm.h" -#include "i810_drv.h" - -#include "drm_core.h" diff --git a/linux/i810_drv.h b/linux/i810_drv.h deleted file mode 100644 index 6578d3b50..000000000 --- a/linux/i810_drv.h +++ /dev/null @@ -1,253 +0,0 @@ -/* i810_drv.h -- Private header for the Matrox g200/g400 driver -*- linux-c -*- - * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: Rickard E. (Rik) Faith <faith@valinux.com> - * Jeff Hartmann <jhartmann@valinux.com> - * - */ - -#ifndef _I810_DRV_H_ -#define _I810_DRV_H_ - -typedef struct drm_i810_buf_priv { - u32 *in_use; - int my_use_idx; - int currently_mapped; - void *virtual; - void *kernel_virtual; -} drm_i810_buf_priv_t; - -typedef struct _drm_i810_ring_buffer{ - int tail_mask; - unsigned long Start; - unsigned long End; - unsigned long Size; - u8 *virtual_start; - int head; - int tail; - int space; -} drm_i810_ring_buffer_t; - -typedef struct drm_i810_private { - drm_map_t *sarea_map; - drm_map_t *mmio_map; - - drm_i810_sarea_t *sarea_priv; - drm_i810_ring_buffer_t ring; - - void *hw_status_page; - unsigned long counter; - - dma_addr_t dma_status_page; - - drm_buf_t *mmap_buffer; - - - u32 front_di1, back_di1, zi1; - - int back_offset; - int depth_offset; - int overlay_offset; - int overlay_physical; - int w, h; - int pitch; - int back_pitch; - int depth_pitch; - - int do_boxes; - int dma_used; - - int current_page; - int page_flipping; - - wait_queue_head_t irq_queue; - atomic_t irq_received; - atomic_t irq_emitted; - - int front_offset; -} drm_i810_private_t; - - /* i810_dma.c */ -extern int i810_dma_schedule(drm_device_t *dev, int locked); -extern int i810_getbuf(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int i810_dma_init(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int i810_dma_cleanup(drm_device_t *dev); -extern int i810_flush_ioctl(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern void i810_reclaim_buffers(drm_device_t *dev, struct file *filp); -extern int i810_getage(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma); - -/* Obsolete: - */ -extern int i810_copybuf(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -/* Obsolete: - */ -extern int i810_docopy(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); - -extern int i810_rstatus(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int i810_ov0_info(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int i810_fstatus(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int i810_ov0_flip(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int i810_dma_mc(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); - - -extern void i810_dma_quiescent(drm_device_t *dev); - -int i810_dma_vertex(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); - -int i810_swap_bufs(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); - -int i810_clear_bufs(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); - -int i810_flip_bufs(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); - -#define I810_BASE(reg) ((unsigned long) \ - dev_priv->mmio_map->handle) -#define I810_ADDR(reg) (I810_BASE(reg) + reg) -#define I810_DEREF(reg) *(__volatile__ int *)I810_ADDR(reg) -#define I810_READ(reg) I810_DEREF(reg) -#define I810_WRITE(reg,val) do { I810_DEREF(reg) = val; } while (0) -#define I810_DEREF16(reg) *(__volatile__ u16 *)I810_ADDR(reg) -#define I810_READ16(reg) I810_DEREF16(reg) -#define I810_WRITE16(reg,val) do { I810_DEREF16(reg) = val; } while (0) - -#define I810_VERBOSE 0 -#define RING_LOCALS unsigned int outring, ringmask; \ - volatile char *virt; - -#define BEGIN_LP_RING(n) do { \ - if (I810_VERBOSE) \ - DRM_DEBUG("BEGIN_LP_RING(%d) in %s\n", n, __FUNCTION__); \ - if (dev_priv->ring.space < n*4) \ - i810_wait_ring(dev, n*4); \ - dev_priv->ring.space -= n*4; \ - outring = dev_priv->ring.tail; \ - ringmask = dev_priv->ring.tail_mask; \ - virt = dev_priv->ring.virtual_start; \ -} while (0) - -#define ADVANCE_LP_RING() do { \ - if (I810_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING\n"); \ - dev_priv->ring.tail = outring; \ - I810_WRITE(LP_RING + RING_TAIL, outring); \ -} while(0) - -#define OUT_RING(n) do { \ - if (I810_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \ - *(volatile unsigned int *)(virt + outring) = n; \ - outring += 4; \ - outring &= ringmask; \ -} while (0) - -#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23)) -#define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23)) -#define CMD_REPORT_HEAD (7<<23) -#define CMD_STORE_DWORD_IDX ((0x21<<23) | 0x1) -#define CMD_OP_BATCH_BUFFER ((0x0<<29)|(0x30<<23)|0x1) - -#define INST_PARSER_CLIENT 0x00000000 -#define INST_OP_FLUSH 0x02000000 -#define INST_FLUSH_MAP_CACHE 0x00000001 - - -#define BB1_START_ADDR_MASK (~0x7) -#define BB1_PROTECTED (1<<0) -#define BB1_UNPROTECTED (0<<0) -#define BB2_END_ADDR_MASK (~0x7) - -#define I810REG_HWSTAM 0x02098 -#define I810REG_INT_IDENTITY_R 0x020a4 -#define I810REG_INT_MASK_R 0x020a8 -#define I810REG_INT_ENABLE_R 0x020a0 - -#define LP_RING 0x2030 -#define HP_RING 0x2040 -#define RING_TAIL 0x00 -#define TAIL_ADDR 0x000FFFF8 -#define RING_HEAD 0x04 -#define HEAD_WRAP_COUNT 0xFFE00000 -#define HEAD_WRAP_ONE 0x00200000 -#define HEAD_ADDR 0x001FFFFC -#define RING_START 0x08 -#define START_ADDR 0x00FFFFF8 -#define RING_LEN 0x0C -#define RING_NR_PAGES 0x000FF000 -#define RING_REPORT_MASK 0x00000006 -#define RING_REPORT_64K 0x00000002 -#define RING_REPORT_128K 0x00000004 -#define RING_NO_REPORT 0x00000000 -#define RING_VALID_MASK 0x00000001 -#define RING_VALID 0x00000001 -#define RING_INVALID 0x00000000 - -#define GFX_OP_SCISSOR ((0x3<<29)|(0x1c<<24)|(0x10<<19)) -#define SC_UPDATE_SCISSOR (0x1<<1) -#define SC_ENABLE_MASK (0x1<<0) -#define SC_ENABLE (0x1<<0) - -#define GFX_OP_SCISSOR_INFO ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1)) -#define SCI_YMIN_MASK (0xffff<<16) -#define SCI_XMIN_MASK (0xffff<<0) -#define SCI_YMAX_MASK (0xffff<<16) -#define SCI_XMAX_MASK (0xffff<<0) - -#define GFX_OP_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0) -#define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16)) -#define GFX_OP_MAP_INFO ((0x3<<29)|(0x1d<<24)|0x2) -#define GFX_OP_DESTBUFFER_VARS ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0) -#define GFX_OP_DRAWRECT_INFO ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3)) -#define GFX_OP_PRIMITIVE ((0x3<<29)|(0x1f<<24)) - -#define CMD_OP_Z_BUFFER_INFO ((0x0<<29)|(0x16<<23)) -#define CMD_OP_DESTBUFFER_INFO ((0x0<<29)|(0x15<<23)) -#define CMD_OP_FRONTBUFFER_INFO ((0x0<<29)|(0x14<<23)) -#define CMD_OP_WAIT_FOR_EVENT ((0x0<<29)|(0x03<<23)) - -#define BR00_BITBLT_CLIENT 0x40000000 -#define BR00_OP_COLOR_BLT 0x10000000 -#define BR00_OP_SRC_COPY_BLT 0x10C00000 -#define BR13_SOLID_PATTERN 0x80000000 - -#define WAIT_FOR_PLANE_A_SCANLINES (1<<1) -#define WAIT_FOR_PLANE_A_FLIP (1<<2) -#define WAIT_FOR_VBLANK (1<<3) - -#endif diff --git a/linux/i830.h b/linux/i830.h deleted file mode 100644 index 85a1ac204..000000000 --- a/linux/i830.h +++ /dev/null @@ -1,83 +0,0 @@ -/* i830.h -- Intel I830 DRM template customization -*- linux-c -*- - * Created: Thu Feb 15 00:01:12 2001 by gareth@valinux.com - * - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - -#ifndef __I830_H__ -#define __I830_H__ - -/* This remains constant for all DRM template files. - */ -#define DRM(x) i830_##x - -/* General customization: - */ - -#define DRIVER_AUTHOR "VA Linux Systems Inc." - -#define DRIVER_NAME "i830" -#define DRIVER_DESC "Intel 830M" -#define DRIVER_DATE "20021108" - -/* Interface history: - * - * 1.1: Original. - * 1.2: ? - * 1.3: New irq emit/wait ioctls. - * New pageflip ioctl. - * New getparam ioctl. - * State for texunits 3&4 in sarea. - * New (alternative) layout for texture state. - */ -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 3 -#define DRIVER_PATCHLEVEL 2 - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_INIT)] = { i830_dma_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_VERTEX)] = { i830_dma_vertex, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_CLEAR)] = { i830_clear_bufs, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_FLUSH)] = { i830_flush_ioctl, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_GETAGE)] = { i830_getage, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_GETBUF)] = { i830_getbuf, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_SWAP)] = { i830_swap_bufs, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_COPY)] = { i830_copybuf, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_DOCOPY)] = { i830_docopy, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_FLIP)] = { i830_flip_bufs, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_IRQ_EMIT)] = { i830_irq_emit, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_IRQ_WAIT)] = { i830_irq_wait, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_GETPARAM)] = { i830_getparam, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_SETPARAM)] = { i830_setparam, 1, 0 } - -/* Driver will work either way: IRQ's save cpu time when waiting for - * the card, but are subject to subtle interactions between bios, - * hardware and the driver. - */ -/* XXX: Add vblank support? */ -#define USE_IRQS 0 - -#endif diff --git a/linux/i830_dma.c b/linux/i830_dma.c deleted file mode 100644 index caae802fc..000000000 --- a/linux/i830_dma.c +++ /dev/null @@ -1,1623 +0,0 @@ -/* i830_dma.c -- DMA support for the I830 -*- linux-c -*- - * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: Rickard E. (Rik) Faith <faith@valinux.com> - * Jeff Hartmann <jhartmann@valinux.com> - * Keith Whitwell <keith@tungstengraphics.com> - * Abraham vd Merwe <abraham@2d3d.co.za> - * - */ - -#include "i830.h" -#include "drmP.h" -#include "drm.h" -#include "i830_drm.h" -#include "i830_drv.h" -#include <linux/interrupt.h> /* For task queue support */ -#include <linux/pagemap.h> /* For FASTCALL on unlock_page() */ -#include <linux/delay.h> -#include <asm/uaccess.h> - -#ifdef DO_MUNMAP_4_ARGS -#define DO_MUNMAP(m, a, l) do_munmap(m, a, l, 1) -#else -#define DO_MUNMAP(m, a, l) do_munmap(m, a, l) -#endif - -#define I830_BUF_FREE 2 -#define I830_BUF_CLIENT 1 -#define I830_BUF_HARDWARE 0 - -#define I830_BUF_UNMAPPED 0 -#define I830_BUF_MAPPED 1 - -static inline void i830_print_status_page(drm_device_t *dev) -{ - drm_device_dma_t *dma = dev->dma; - drm_i830_private_t *dev_priv = dev->dev_private; - u32 *temp = dev_priv->hw_status_page; - int i; - - DRM_DEBUG( "hw_status: Interrupt Status : %x\n", temp[0]); - DRM_DEBUG( "hw_status: LpRing Head ptr : %x\n", temp[1]); - DRM_DEBUG( "hw_status: IRing Head ptr : %x\n", temp[2]); - DRM_DEBUG( "hw_status: Reserved : %x\n", temp[3]); - DRM_DEBUG( "hw_status: Driver Counter : %d\n", temp[5]); - for(i = 9; i < dma->buf_count + 9; i++) { - DRM_DEBUG( "buffer status idx : %d used: %d\n", i - 9, temp[i]); - } -} - -static drm_buf_t *i830_freelist_get(drm_device_t *dev) -{ - drm_device_dma_t *dma = dev->dma; - int i; - int used; - - /* Linear search might not be the best solution */ - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i830_buf_priv_t *buf_priv = buf->dev_private; - /* In use is already a pointer */ - used = cmpxchg(buf_priv->in_use, I830_BUF_FREE, - I830_BUF_CLIENT); - if(used == I830_BUF_FREE) { - return buf; - } - } - return NULL; -} - -/* This should only be called if the buffer is not sent to the hardware - * yet, the hardware updates in use for us once its on the ring buffer. - */ - -static int i830_freelist_put(drm_device_t *dev, drm_buf_t *buf) -{ - drm_i830_buf_priv_t *buf_priv = buf->dev_private; - int used; - - /* In use is already a pointer */ - used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, I830_BUF_FREE); - if(used != I830_BUF_CLIENT) { - DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx); - return -EINVAL; - } - - return 0; -} - -static struct file_operations i830_buffer_fops = { - .open = DRM(open), - .flush = DRM(flush), - .release = DRM(release), - .ioctl = DRM(ioctl), - .mmap = i830_mmap_buffers, - .fasync = DRM(fasync), -}; - -int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev; - drm_i830_private_t *dev_priv; - drm_buf_t *buf; - drm_i830_buf_priv_t *buf_priv; - - lock_kernel(); - dev = priv->dev; - dev_priv = dev->dev_private; - buf = dev_priv->mmap_buffer; - buf_priv = buf->dev_private; - - vma->vm_flags |= (VM_IO | VM_DONTCOPY); - vma->vm_file = filp; - - buf_priv->currently_mapped = I830_BUF_MAPPED; - unlock_kernel(); - - if (remap_page_range(DRM_RPR_ARG(vma) vma->vm_start, - VM_OFFSET(vma), - vma->vm_end - vma->vm_start, - vma->vm_page_prot)) return -EAGAIN; - return 0; -} - -static int i830_map_buffer(drm_buf_t *buf, struct file *filp) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i830_buf_priv_t *buf_priv = buf->dev_private; - drm_i830_private_t *dev_priv = dev->dev_private; - struct file_operations *old_fops; - unsigned long virtual; - int retcode = 0; - - if(buf_priv->currently_mapped == I830_BUF_MAPPED) return -EINVAL; - - down_write( ¤t->mm->mmap_sem ); - old_fops = filp->f_op; - filp->f_op = &i830_buffer_fops; - dev_priv->mmap_buffer = buf; - virtual = do_mmap(filp, 0, buf->total, PROT_READ|PROT_WRITE, - MAP_SHARED, buf->bus_address); - dev_priv->mmap_buffer = NULL; - filp->f_op = old_fops; - if (IS_ERR((void *)virtual)) { /* ugh */ - /* Real error */ - DRM_ERROR("mmap error\n"); - retcode = virtual; - buf_priv->virtual = NULL; - } else { - buf_priv->virtual = (void __user *)virtual; - } - up_write( ¤t->mm->mmap_sem ); - - return retcode; -} - -static int i830_unmap_buffer(drm_buf_t *buf) -{ - drm_i830_buf_priv_t *buf_priv = buf->dev_private; - int retcode = 0; - - if(buf_priv->currently_mapped != I830_BUF_MAPPED) - return -EINVAL; - - down_write(¤t->mm->mmap_sem); - retcode = DO_MUNMAP(current->mm, - (unsigned long)buf_priv->virtual, - (size_t) buf->total); - up_write(¤t->mm->mmap_sem); - - buf_priv->currently_mapped = I830_BUF_UNMAPPED; - buf_priv->virtual = NULL; - - return retcode; -} - -static int i830_dma_get_buffer(drm_device_t *dev, drm_i830_dma_t *d, - struct file *filp) -{ - drm_buf_t *buf; - drm_i830_buf_priv_t *buf_priv; - int retcode = 0; - - buf = i830_freelist_get(dev); - if (!buf) { - retcode = -ENOMEM; - DRM_DEBUG("retcode=%d\n", retcode); - return retcode; - } - - retcode = i830_map_buffer(buf, filp); - if(retcode) { - i830_freelist_put(dev, buf); - DRM_ERROR("mapbuf failed, retcode %d\n", retcode); - return retcode; - } - buf->filp = filp; - buf_priv = buf->dev_private; - d->granted = 1; - d->request_idx = buf->idx; - d->request_size = buf->total; - d->virtual = buf_priv->virtual; - - return retcode; -} - -int i830_dma_cleanup(drm_device_t *dev) -{ - drm_device_dma_t *dma = dev->dma; - - /* Make sure interrupts are disabled here because the uninstall ioctl - * may not have been called from userspace and after dev_private - * is freed, it's too late. - */ - if (dev->irq_enabled) DRM(irq_uninstall)(dev); - - if (dev->dev_private) { - int i; - drm_i830_private_t *dev_priv = - (drm_i830_private_t *) dev->dev_private; - - if (dev_priv->ring.virtual_start) { - DRM(ioremapfree)((void *) dev_priv->ring.virtual_start, - dev_priv->ring.Size, dev); - } - if (dev_priv->hw_status_page) { - pci_free_consistent(dev->pdev, PAGE_SIZE, - dev_priv->hw_status_page, - dev_priv->dma_status_page); - /* Need to rewrite hardware status page */ - I830_WRITE(0x02080, 0x1ffff000); - } - - DRM(free)(dev->dev_private, sizeof(drm_i830_private_t), - DRM_MEM_DRIVER); - dev->dev_private = NULL; - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i830_buf_priv_t *buf_priv = buf->dev_private; - if ( buf_priv->kernel_virtual && buf->total ) - DRM(ioremapfree)(buf_priv->kernel_virtual, buf->total, dev); - } - } - return 0; -} - -int i830_wait_ring(drm_device_t *dev, int n, const char *caller) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - drm_i830_ring_buffer_t *ring = &(dev_priv->ring); - int iters = 0; - unsigned long end; - unsigned int last_head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR; - - end = jiffies + (HZ*3); - while (ring->space < n) { - ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR; - ring->space = ring->head - (ring->tail+8); - if (ring->space < 0) ring->space += ring->Size; - - if (ring->head != last_head) { - end = jiffies + (HZ*3); - last_head = ring->head; - } - - iters++; - if(time_before(end, jiffies)) { - DRM_ERROR("space: %d wanted %d\n", ring->space, n); - DRM_ERROR("lockup\n"); - goto out_wait_ring; - } - udelay(1); - dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT; - } - -out_wait_ring: - return iters; -} - -static void i830_kernel_lost_context(drm_device_t *dev) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - drm_i830_ring_buffer_t *ring = &(dev_priv->ring); - - ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR; - ring->tail = I830_READ(LP_RING + RING_TAIL) & TAIL_ADDR; - ring->space = ring->head - (ring->tail+8); - if (ring->space < 0) ring->space += ring->Size; - - if (ring->head == ring->tail) - dev_priv->sarea_priv->perf_boxes |= I830_BOX_RING_EMPTY; -} - -static int i830_freelist_init(drm_device_t *dev, drm_i830_private_t *dev_priv) -{ - drm_device_dma_t *dma = dev->dma; - int my_idx = 36; - u32 *hw_status = (u32 *)(dev_priv->hw_status_page + my_idx); - int i; - - if(dma->buf_count > 1019) { - /* Not enough space in the status page for the freelist */ - return -EINVAL; - } - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i830_buf_priv_t *buf_priv = buf->dev_private; - - buf_priv->in_use = hw_status++; - buf_priv->my_use_idx = my_idx; - my_idx += 4; - - *buf_priv->in_use = I830_BUF_FREE; - - buf_priv->kernel_virtual = DRM(ioremap)(buf->bus_address, - buf->total, dev); - } - return 0; -} - -static int i830_dma_initialize(drm_device_t *dev, - drm_i830_private_t *dev_priv, - drm_i830_init_t *init) -{ - struct list_head *list; - - memset(dev_priv, 0, sizeof(drm_i830_private_t)); - - list_for_each(list, &dev->maplist->head) { - drm_map_list_t *r_list = list_entry(list, drm_map_list_t, head); - if( r_list->map && - r_list->map->type == _DRM_SHM && - r_list->map->flags & _DRM_CONTAINS_LOCK ) { - dev_priv->sarea_map = r_list->map; - break; - } - } - - if(!dev_priv->sarea_map) { - dev->dev_private = (void *)dev_priv; - i830_dma_cleanup(dev); - DRM_ERROR("can not find sarea!\n"); - return -EINVAL; - } - dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset); - if(!dev_priv->mmio_map) { - dev->dev_private = (void *)dev_priv; - i830_dma_cleanup(dev); - DRM_ERROR("can not find mmio map!\n"); - return -EINVAL; - } - dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset); - if(!dev->agp_buffer_map) { - dev->dev_private = (void *)dev_priv; - i830_dma_cleanup(dev); - DRM_ERROR("can not find dma buffer map!\n"); - return -EINVAL; - } - - dev_priv->sarea_priv = (drm_i830_sarea_t *) - ((u8 *)dev_priv->sarea_map->handle + - init->sarea_priv_offset); - - dev_priv->ring.Start = init->ring_start; - dev_priv->ring.End = init->ring_end; - dev_priv->ring.Size = init->ring_size; - - dev_priv->ring.virtual_start = DRM(ioremap)(dev->agp->base + - init->ring_start, - init->ring_size, dev); - - if (dev_priv->ring.virtual_start == NULL) { - dev->dev_private = (void *) dev_priv; - i830_dma_cleanup(dev); - DRM_ERROR("can not ioremap virtual address for" - " ring buffer\n"); - return -ENOMEM; - } - - dev_priv->ring.tail_mask = dev_priv->ring.Size - 1; - - dev_priv->w = init->w; - dev_priv->h = init->h; - dev_priv->pitch = init->pitch; - dev_priv->back_offset = init->back_offset; - dev_priv->depth_offset = init->depth_offset; - dev_priv->front_offset = init->front_offset; - - dev_priv->front_di1 = init->front_offset | init->pitch_bits; - dev_priv->back_di1 = init->back_offset | init->pitch_bits; - dev_priv->zi1 = init->depth_offset | init->pitch_bits; - - DRM_DEBUG("front_di1 %x\n", dev_priv->front_di1); - DRM_DEBUG("back_offset %x\n", dev_priv->back_offset); - DRM_DEBUG("back_di1 %x\n", dev_priv->back_di1); - DRM_DEBUG("pitch_bits %x\n", init->pitch_bits); - - dev_priv->cpp = init->cpp; - /* We are using separate values as placeholders for mechanisms for - * private backbuffer/depthbuffer usage. - */ - - dev_priv->back_pitch = init->back_pitch; - dev_priv->depth_pitch = init->depth_pitch; - dev_priv->do_boxes = 0; - dev_priv->use_mi_batchbuffer_start = 0; - - /* Program Hardware Status Page */ - dev_priv->hw_status_page = - pci_alloc_consistent(dev->pdev, PAGE_SIZE, - &dev_priv->dma_status_page); - if (!dev_priv->hw_status_page) { - dev->dev_private = (void *)dev_priv; - i830_dma_cleanup(dev); - DRM_ERROR("Can not allocate hardware status page\n"); - return -ENOMEM; - } - memset(dev_priv->hw_status_page, 0, PAGE_SIZE); - DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page); - - I830_WRITE(0x02080, dev_priv->dma_status_page); - DRM_DEBUG("Enabled hardware status page\n"); - - /* Now we need to init our freelist */ - if(i830_freelist_init(dev, dev_priv) != 0) { - dev->dev_private = (void *)dev_priv; - i830_dma_cleanup(dev); - DRM_ERROR("Not enough space in the status page for" - " the freelist\n"); - return -ENOMEM; - } - dev->dev_private = (void *)dev_priv; - - return 0; -} - -int i830_dma_init(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i830_private_t *dev_priv; - drm_i830_init_t init; - int retcode = 0; - - if (copy_from_user(&init, (void * __user) arg, sizeof(init))) - return -EFAULT; - - switch(init.func) { - case I830_INIT_DMA: - dev_priv = DRM(alloc)(sizeof(drm_i830_private_t), - DRM_MEM_DRIVER); - if(dev_priv == NULL) return -ENOMEM; - retcode = i830_dma_initialize(dev, dev_priv, &init); - break; - case I830_CLEANUP_DMA: - retcode = i830_dma_cleanup(dev); - break; - default: - retcode = -EINVAL; - break; - } - - return retcode; -} - -#define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16)) -#define ST1_ENABLE (1<<16) -#define ST1_MASK (0xffff) - -/* Most efficient way to verify state for the i830 is as it is - * emitted. Non-conformant state is silently dropped. - */ -static void i830EmitContextVerified( drm_device_t *dev, - unsigned int *code ) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - int i, j = 0; - unsigned int tmp; - RING_LOCALS; - - BEGIN_LP_RING( I830_CTX_SETUP_SIZE + 4 ); - - for ( i = 0 ; i < I830_CTXREG_BLENDCOLR0 ; i++ ) { - tmp = code[i]; - if ((tmp & (7<<29)) == CMD_3D && - (tmp & (0x1f<<24)) < (0x1d<<24)) { - OUT_RING( tmp ); - j++; - } else { - DRM_ERROR("Skipping %d\n", i); - } - } - - OUT_RING( STATE3D_CONST_BLEND_COLOR_CMD ); - OUT_RING( code[I830_CTXREG_BLENDCOLR] ); - j += 2; - - for ( i = I830_CTXREG_VF ; i < I830_CTXREG_MCSB0 ; i++ ) { - tmp = code[i]; - if ((tmp & (7<<29)) == CMD_3D && - (tmp & (0x1f<<24)) < (0x1d<<24)) { - OUT_RING( tmp ); - j++; - } else { - DRM_ERROR("Skipping %d\n", i); - } - } - - OUT_RING( STATE3D_MAP_COORD_SETBIND_CMD ); - OUT_RING( code[I830_CTXREG_MCSB1] ); - j += 2; - - if (j & 1) - OUT_RING( 0 ); - - ADVANCE_LP_RING(); -} - -static void i830EmitTexVerified( drm_device_t *dev, unsigned int *code ) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - int i, j = 0; - unsigned int tmp; - RING_LOCALS; - - if (code[I830_TEXREG_MI0] == GFX_OP_MAP_INFO || - (code[I830_TEXREG_MI0] & ~(0xf*LOAD_TEXTURE_MAP0)) == - (STATE3D_LOAD_STATE_IMMEDIATE_2|4)) { - - BEGIN_LP_RING( I830_TEX_SETUP_SIZE ); - - OUT_RING( code[I830_TEXREG_MI0] ); /* TM0LI */ - OUT_RING( code[I830_TEXREG_MI1] ); /* TM0S0 */ - OUT_RING( code[I830_TEXREG_MI2] ); /* TM0S1 */ - OUT_RING( code[I830_TEXREG_MI3] ); /* TM0S2 */ - OUT_RING( code[I830_TEXREG_MI4] ); /* TM0S3 */ - OUT_RING( code[I830_TEXREG_MI5] ); /* TM0S4 */ - - for ( i = 6 ; i < I830_TEX_SETUP_SIZE ; i++ ) { - tmp = code[i]; - OUT_RING( tmp ); - j++; - } - - if (j & 1) - OUT_RING( 0 ); - - ADVANCE_LP_RING(); - } - else - printk("rejected packet %x\n", code[0]); -} - -static void i830EmitTexBlendVerified( drm_device_t *dev, - unsigned int *code, - unsigned int num) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - int i, j = 0; - unsigned int tmp; - RING_LOCALS; - - if (!num) - return; - - BEGIN_LP_RING( num + 1 ); - - for ( i = 0 ; i < num ; i++ ) { - tmp = code[i]; - OUT_RING( tmp ); - j++; - } - - if (j & 1) - OUT_RING( 0 ); - - ADVANCE_LP_RING(); -} - -static void i830EmitTexPalette( drm_device_t *dev, - unsigned int *palette, - int number, - int is_shared ) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - int i; - RING_LOCALS; - - return; - - BEGIN_LP_RING( 258 ); - - if(is_shared == 1) { - OUT_RING(CMD_OP_MAP_PALETTE_LOAD | - MAP_PALETTE_NUM(0) | - MAP_PALETTE_BOTH); - } else { - OUT_RING(CMD_OP_MAP_PALETTE_LOAD | MAP_PALETTE_NUM(number)); - } - for(i = 0; i < 256; i++) { - OUT_RING(palette[i]); - } - OUT_RING(0); - /* KW: WHERE IS THE ADVANCE_LP_RING? This is effectively a noop! - */ -} - -/* Need to do some additional checking when setting the dest buffer. - */ -static void i830EmitDestVerified( drm_device_t *dev, - unsigned int *code ) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - unsigned int tmp; - RING_LOCALS; - - BEGIN_LP_RING( I830_DEST_SETUP_SIZE + 10 ); - - - tmp = code[I830_DESTREG_CBUFADDR]; - if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) { - if (((int)outring) & 8) { - OUT_RING(0); - OUT_RING(0); - } - - OUT_RING( CMD_OP_DESTBUFFER_INFO ); - OUT_RING( BUF_3D_ID_COLOR_BACK | - BUF_3D_PITCH(dev_priv->back_pitch * dev_priv->cpp) | - BUF_3D_USE_FENCE); - OUT_RING( tmp ); - OUT_RING( 0 ); - - OUT_RING( CMD_OP_DESTBUFFER_INFO ); - OUT_RING( BUF_3D_ID_DEPTH | BUF_3D_USE_FENCE | - BUF_3D_PITCH(dev_priv->depth_pitch * dev_priv->cpp)); - OUT_RING( dev_priv->zi1 ); - OUT_RING( 0 ); - } else { - DRM_ERROR("bad di1 %x (allow %x or %x)\n", - tmp, dev_priv->front_di1, dev_priv->back_di1); - } - - /* invarient: - */ - - - OUT_RING( GFX_OP_DESTBUFFER_VARS ); - OUT_RING( code[I830_DESTREG_DV1] ); - - OUT_RING( GFX_OP_DRAWRECT_INFO ); - OUT_RING( code[I830_DESTREG_DR1] ); - OUT_RING( code[I830_DESTREG_DR2] ); - OUT_RING( code[I830_DESTREG_DR3] ); - OUT_RING( code[I830_DESTREG_DR4] ); - - /* Need to verify this */ - tmp = code[I830_DESTREG_SENABLE]; - if((tmp & ~0x3) == GFX_OP_SCISSOR_ENABLE) { - OUT_RING( tmp ); - } else { - DRM_ERROR("bad scissor enable\n"); - OUT_RING( 0 ); - } - - OUT_RING( GFX_OP_SCISSOR_RECT ); - OUT_RING( code[I830_DESTREG_SR1] ); - OUT_RING( code[I830_DESTREG_SR2] ); - OUT_RING( 0 ); - - ADVANCE_LP_RING(); -} - -static void i830EmitStippleVerified( drm_device_t *dev, - unsigned int *code ) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - - BEGIN_LP_RING( 2 ); - OUT_RING( GFX_OP_STIPPLE ); - OUT_RING( code[1] ); - ADVANCE_LP_RING(); -} - - -static void i830EmitState( drm_device_t *dev ) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int dirty = sarea_priv->dirty; - - DRM_DEBUG("%s %x\n", __FUNCTION__, dirty); - - if (dirty & I830_UPLOAD_BUFFERS) { - i830EmitDestVerified( dev, sarea_priv->BufferState ); - sarea_priv->dirty &= ~I830_UPLOAD_BUFFERS; - } - - if (dirty & I830_UPLOAD_CTX) { - i830EmitContextVerified( dev, sarea_priv->ContextState ); - sarea_priv->dirty &= ~I830_UPLOAD_CTX; - } - - if (dirty & I830_UPLOAD_TEX0) { - i830EmitTexVerified( dev, sarea_priv->TexState[0] ); - sarea_priv->dirty &= ~I830_UPLOAD_TEX0; - } - - if (dirty & I830_UPLOAD_TEX1) { - i830EmitTexVerified( dev, sarea_priv->TexState[1] ); - sarea_priv->dirty &= ~I830_UPLOAD_TEX1; - } - - if (dirty & I830_UPLOAD_TEXBLEND0) { - i830EmitTexBlendVerified( dev, sarea_priv->TexBlendState[0], - sarea_priv->TexBlendStateWordsUsed[0]); - sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND0; - } - - if (dirty & I830_UPLOAD_TEXBLEND1) { - i830EmitTexBlendVerified( dev, sarea_priv->TexBlendState[1], - sarea_priv->TexBlendStateWordsUsed[1]); - sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND1; - } - - if (dirty & I830_UPLOAD_TEX_PALETTE_SHARED) { - i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 1); - } else { - if (dirty & I830_UPLOAD_TEX_PALETTE_N(0)) { - i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 0); - sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(0); - } - if (dirty & I830_UPLOAD_TEX_PALETTE_N(1)) { - i830EmitTexPalette(dev, sarea_priv->Palette[1], 1, 0); - sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(1); - } - - /* 1.3: - */ -#if 0 - if (dirty & I830_UPLOAD_TEX_PALETTE_N(2)) { - i830EmitTexPalette(dev, sarea_priv->Palette2[0], 0, 0); - sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2); - } - if (dirty & I830_UPLOAD_TEX_PALETTE_N(3)) { - i830EmitTexPalette(dev, sarea_priv->Palette2[1], 1, 0); - sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2); - } -#endif - } - - /* 1.3: - */ - if (dirty & I830_UPLOAD_STIPPLE) { - i830EmitStippleVerified( dev, - sarea_priv->StippleState); - sarea_priv->dirty &= ~I830_UPLOAD_STIPPLE; - } - - if (dirty & I830_UPLOAD_TEX2) { - i830EmitTexVerified( dev, sarea_priv->TexState2 ); - sarea_priv->dirty &= ~I830_UPLOAD_TEX2; - } - - if (dirty & I830_UPLOAD_TEX3) { - i830EmitTexVerified( dev, sarea_priv->TexState3 ); - sarea_priv->dirty &= ~I830_UPLOAD_TEX3; - } - - - if (dirty & I830_UPLOAD_TEXBLEND2) { - i830EmitTexBlendVerified( - dev, - sarea_priv->TexBlendState2, - sarea_priv->TexBlendStateWordsUsed2); - - sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND2; - } - - if (dirty & I830_UPLOAD_TEXBLEND3) { - i830EmitTexBlendVerified( - dev, - sarea_priv->TexBlendState3, - sarea_priv->TexBlendStateWordsUsed3); - sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND3; - } -} - -/* ================================================================ - * Performance monitoring functions - */ - -static void i830_fill_box( drm_device_t *dev, - int x, int y, int w, int h, - int r, int g, int b ) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - u32 color; - unsigned int BR13, CMD; - RING_LOCALS; - - BR13 = (0xF0 << 16) | (dev_priv->pitch * dev_priv->cpp) | (1<<24); - CMD = XY_COLOR_BLT_CMD; - x += dev_priv->sarea_priv->boxes[0].x1; - y += dev_priv->sarea_priv->boxes[0].y1; - - if (dev_priv->cpp == 4) { - BR13 |= (1<<25); - CMD |= (XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB); - color = (((0xff) << 24) | (r << 16) | (g << 8) | b); - } else { - color = (((r & 0xf8) << 8) | - ((g & 0xfc) << 3) | - ((b & 0xf8) >> 3)); - } - - BEGIN_LP_RING( 6 ); - OUT_RING( CMD ); - OUT_RING( BR13 ); - OUT_RING( (y << 16) | x ); - OUT_RING( ((y+h) << 16) | (x+w) ); - - if ( dev_priv->current_page == 1 ) { - OUT_RING( dev_priv->front_offset ); - } else { - OUT_RING( dev_priv->back_offset ); - } - - OUT_RING( color ); - ADVANCE_LP_RING(); -} - -static void i830_cp_performance_boxes( drm_device_t *dev ) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - - /* Purple box for page flipping - */ - if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_FLIP ) - i830_fill_box( dev, 4, 4, 8, 8, 255, 0, 255 ); - - /* Red box if we have to wait for idle at any point - */ - if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_WAIT ) - i830_fill_box( dev, 16, 4, 8, 8, 255, 0, 0 ); - - /* Blue box: lost context? - */ - if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_LOST_CONTEXT ) - i830_fill_box( dev, 28, 4, 8, 8, 0, 0, 255 ); - - /* Yellow box for texture swaps - */ - if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_TEXTURE_LOAD ) - i830_fill_box( dev, 40, 4, 8, 8, 255, 255, 0 ); - - /* Green box if hardware never idles (as far as we can tell) - */ - if ( !(dev_priv->sarea_priv->perf_boxes & I830_BOX_RING_EMPTY) ) - i830_fill_box( dev, 64, 4, 8, 8, 0, 255, 0 ); - - - /* Draw bars indicating number of buffers allocated - * (not a great measure, easily confused) - */ - if (dev_priv->dma_used) { - int bar = dev_priv->dma_used / 10240; - if (bar > 100) bar = 100; - if (bar < 1) bar = 1; - i830_fill_box( dev, 4, 16, bar, 4, 196, 128, 128 ); - dev_priv->dma_used = 0; - } - - dev_priv->sarea_priv->perf_boxes = 0; -} - -static void i830_dma_dispatch_clear( drm_device_t *dev, int flags, - unsigned int clear_color, - unsigned int clear_zval, - unsigned int clear_depthmask) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv; - int nbox = sarea_priv->nbox; - drm_clip_rect_t *pbox = sarea_priv->boxes; - int pitch = dev_priv->pitch; - int cpp = dev_priv->cpp; - int i; - unsigned int BR13, CMD, D_CMD; - RING_LOCALS; - - - if ( dev_priv->current_page == 1 ) { - unsigned int tmp = flags; - - flags &= ~(I830_FRONT | I830_BACK); - if ( tmp & I830_FRONT ) flags |= I830_BACK; - if ( tmp & I830_BACK ) flags |= I830_FRONT; - } - - i830_kernel_lost_context(dev); - - switch(cpp) { - case 2: - BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24); - D_CMD = CMD = XY_COLOR_BLT_CMD; - break; - case 4: - BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24) | (1<<25); - CMD = (XY_COLOR_BLT_CMD | XY_COLOR_BLT_WRITE_ALPHA | - XY_COLOR_BLT_WRITE_RGB); - D_CMD = XY_COLOR_BLT_CMD; - if(clear_depthmask & 0x00ffffff) - D_CMD |= XY_COLOR_BLT_WRITE_RGB; - if(clear_depthmask & 0xff000000) - D_CMD |= XY_COLOR_BLT_WRITE_ALPHA; - break; - default: - BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24); - D_CMD = CMD = XY_COLOR_BLT_CMD; - break; - } - - if (nbox > I830_NR_SAREA_CLIPRECTS) - nbox = I830_NR_SAREA_CLIPRECTS; - - for (i = 0 ; i < nbox ; i++, pbox++) { - if (pbox->x1 > pbox->x2 || - pbox->y1 > pbox->y2 || - pbox->x2 > dev_priv->w || - pbox->y2 > dev_priv->h) - continue; - - if ( flags & I830_FRONT ) { - DRM_DEBUG("clear front\n"); - BEGIN_LP_RING( 6 ); - OUT_RING( CMD ); - OUT_RING( BR13 ); - OUT_RING( (pbox->y1 << 16) | pbox->x1 ); - OUT_RING( (pbox->y2 << 16) | pbox->x2 ); - OUT_RING( dev_priv->front_offset ); - OUT_RING( clear_color ); - ADVANCE_LP_RING(); - } - - if ( flags & I830_BACK ) { - DRM_DEBUG("clear back\n"); - BEGIN_LP_RING( 6 ); - OUT_RING( CMD ); - OUT_RING( BR13 ); - OUT_RING( (pbox->y1 << 16) | pbox->x1 ); - OUT_RING( (pbox->y2 << 16) | pbox->x2 ); - OUT_RING( dev_priv->back_offset ); - OUT_RING( clear_color ); - ADVANCE_LP_RING(); - } - - if ( flags & I830_DEPTH ) { - DRM_DEBUG("clear depth\n"); - BEGIN_LP_RING( 6 ); - OUT_RING( D_CMD ); - OUT_RING( BR13 ); - OUT_RING( (pbox->y1 << 16) | pbox->x1 ); - OUT_RING( (pbox->y2 << 16) | pbox->x2 ); - OUT_RING( dev_priv->depth_offset ); - OUT_RING( clear_zval ); - ADVANCE_LP_RING(); - } - } -} - -static void i830_dma_dispatch_swap( drm_device_t *dev ) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv; - int nbox = sarea_priv->nbox; - drm_clip_rect_t *pbox = sarea_priv->boxes; - int pitch = dev_priv->pitch; - int cpp = dev_priv->cpp; - int i; - unsigned int CMD, BR13; - RING_LOCALS; - - DRM_DEBUG("swapbuffers\n"); - - i830_kernel_lost_context(dev); - - if (dev_priv->do_boxes) - i830_cp_performance_boxes( dev ); - - switch(cpp) { - case 2: - BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24); - CMD = XY_SRC_COPY_BLT_CMD; - break; - case 4: - BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24) | (1<<25); - CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); - break; - default: - BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24); - CMD = XY_SRC_COPY_BLT_CMD; - break; - } - - - if (nbox > I830_NR_SAREA_CLIPRECTS) - nbox = I830_NR_SAREA_CLIPRECTS; - - for (i = 0 ; i < nbox; i++, pbox++) - { - if (pbox->x1 > pbox->x2 || - pbox->y1 > pbox->y2 || - pbox->x2 > dev_priv->w || - pbox->y2 > dev_priv->h) - continue; - - DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n", - pbox->x1, pbox->y1, - pbox->x2, pbox->y2); - - BEGIN_LP_RING( 8 ); - OUT_RING( CMD ); - OUT_RING( BR13 ); - OUT_RING( (pbox->y1 << 16) | pbox->x1 ); - OUT_RING( (pbox->y2 << 16) | pbox->x2 ); - - if (dev_priv->current_page == 0) - OUT_RING( dev_priv->front_offset ); - else - OUT_RING( dev_priv->back_offset ); - - OUT_RING( (pbox->y1 << 16) | pbox->x1 ); - OUT_RING( BR13 & 0xffff ); - - if (dev_priv->current_page == 0) - OUT_RING( dev_priv->back_offset ); - else - OUT_RING( dev_priv->front_offset ); - - ADVANCE_LP_RING(); - } -} - -static void i830_dma_dispatch_flip( drm_device_t *dev ) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - - DRM_DEBUG( "%s: page=%d pfCurrentPage=%d\n", - __FUNCTION__, - dev_priv->current_page, - dev_priv->sarea_priv->pf_current_page); - - i830_kernel_lost_context(dev); - - if (dev_priv->do_boxes) { - dev_priv->sarea_priv->perf_boxes |= I830_BOX_FLIP; - i830_cp_performance_boxes( dev ); - } - - - BEGIN_LP_RING( 2 ); - OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - - BEGIN_LP_RING( 6 ); - OUT_RING( CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP ); - OUT_RING( 0 ); - if ( dev_priv->current_page == 0 ) { - OUT_RING( dev_priv->back_offset ); - dev_priv->current_page = 1; - } else { - OUT_RING( dev_priv->front_offset ); - dev_priv->current_page = 0; - } - OUT_RING(0); - ADVANCE_LP_RING(); - - - BEGIN_LP_RING( 2 ); - OUT_RING( MI_WAIT_FOR_EVENT | - MI_WAIT_FOR_PLANE_A_FLIP ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - - - dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; -} - -static void i830_dma_dispatch_vertex(drm_device_t *dev, - drm_buf_t *buf, - int discard, - int used) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - drm_i830_buf_priv_t *buf_priv = buf->dev_private; - drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_clip_rect_t *box = sarea_priv->boxes; - int nbox = sarea_priv->nbox; - unsigned long address = (unsigned long)buf->bus_address; - unsigned long start = address - dev->agp->base; - int i = 0, u; - RING_LOCALS; - - i830_kernel_lost_context(dev); - - if (nbox > I830_NR_SAREA_CLIPRECTS) - nbox = I830_NR_SAREA_CLIPRECTS; - - if (discard) { - u = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, - I830_BUF_HARDWARE); - if(u != I830_BUF_CLIENT) { - DRM_DEBUG("xxxx 2\n"); - } - } - - if (used > 4*1023) - used = 0; - - if (sarea_priv->dirty) - i830EmitState( dev ); - - DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n", - address, used, nbox); - - dev_priv->counter++; - DRM_DEBUG( "dispatch counter : %ld\n", dev_priv->counter); - DRM_DEBUG( "i830_dma_dispatch\n"); - DRM_DEBUG( "start : %lx\n", start); - DRM_DEBUG( "used : %d\n", used); - DRM_DEBUG( "start + used - 4 : %ld\n", start + used - 4); - - if (buf_priv->currently_mapped == I830_BUF_MAPPED) { - u32 *vp = buf_priv->kernel_virtual; - - vp[0] = (GFX_OP_PRIMITIVE | - sarea_priv->vertex_prim | - ((used/4)-2)); - - if (dev_priv->use_mi_batchbuffer_start) { - vp[used/4] = MI_BATCH_BUFFER_END; - used += 4; - } - - if (used & 4) { - vp[used/4] = 0; - used += 4; - } - - i830_unmap_buffer(buf); - } - - if (used) { - do { - if (i < nbox) { - BEGIN_LP_RING(6); - OUT_RING( GFX_OP_DRAWRECT_INFO ); - OUT_RING( sarea_priv->BufferState[I830_DESTREG_DR1] ); - OUT_RING( box[i].x1 | (box[i].y1<<16) ); - OUT_RING( box[i].x2 | (box[i].y2<<16) ); - OUT_RING( sarea_priv->BufferState[I830_DESTREG_DR4] ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - } - - if (dev_priv->use_mi_batchbuffer_start) { - BEGIN_LP_RING(2); - OUT_RING( MI_BATCH_BUFFER_START | (2<<6) ); - OUT_RING( start | MI_BATCH_NON_SECURE ); - ADVANCE_LP_RING(); - } - else { - BEGIN_LP_RING(4); - OUT_RING( MI_BATCH_BUFFER ); - OUT_RING( start | MI_BATCH_NON_SECURE ); - OUT_RING( start + used - 4 ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - } - - } while (++i < nbox); - } - - if (discard) { - dev_priv->counter++; - - (void) cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, - I830_BUF_HARDWARE); - - BEGIN_LP_RING(8); - OUT_RING( CMD_STORE_DWORD_IDX ); - OUT_RING( 20 ); - OUT_RING( dev_priv->counter ); - OUT_RING( CMD_STORE_DWORD_IDX ); - OUT_RING( buf_priv->my_use_idx ); - OUT_RING( I830_BUF_FREE ); - OUT_RING( CMD_REPORT_HEAD ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - } -} - - -void i830_dma_quiescent(drm_device_t *dev) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - - i830_kernel_lost_context(dev); - - BEGIN_LP_RING(4); - OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE ); - OUT_RING( CMD_REPORT_HEAD ); - OUT_RING( 0 ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - - i830_wait_ring( dev, dev_priv->ring.Size - 8, __FUNCTION__ ); -} - -static int i830_flush_queue(drm_device_t *dev) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - drm_device_dma_t *dma = dev->dma; - int i, ret = 0; - RING_LOCALS; - - i830_kernel_lost_context(dev); - - BEGIN_LP_RING(2); - OUT_RING( CMD_REPORT_HEAD ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - - i830_wait_ring( dev, dev_priv->ring.Size - 8, __FUNCTION__ ); - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i830_buf_priv_t *buf_priv = buf->dev_private; - - int used = cmpxchg(buf_priv->in_use, I830_BUF_HARDWARE, - I830_BUF_FREE); - - if (used == I830_BUF_HARDWARE) - DRM_DEBUG("reclaimed from HARDWARE\n"); - if (used == I830_BUF_CLIENT) - DRM_DEBUG("still on client\n"); - } - - return ret; -} - -/* Must be called with the lock held */ -void i830_reclaim_buffers( drm_device_t *dev, struct file *filp ) -{ - drm_device_dma_t *dma = dev->dma; - int i; - - if (!dma) return; - if (!dev->dev_private) return; - if (!dma->buflist) return; - - i830_flush_queue(dev); - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i830_buf_priv_t *buf_priv = buf->dev_private; - - if (buf->filp == filp && buf_priv) { - int used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, - I830_BUF_FREE); - - if (used == I830_BUF_CLIENT) - DRM_DEBUG("reclaimed from client\n"); - if(buf_priv->currently_mapped == I830_BUF_MAPPED) - buf_priv->currently_mapped = I830_BUF_UNMAPPED; - } - } -} - -int i830_flush_ioctl(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i830_flush_ioctl called without lock held\n"); - return -EINVAL; - } - - i830_flush_queue(dev); - return 0; -} - -int i830_dma_vertex(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_device_dma_t *dma = dev->dma; - drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; - u32 *hw_status = dev_priv->hw_status_page; - drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *) - dev_priv->sarea_priv; - drm_i830_vertex_t vertex; - - if (copy_from_user(&vertex, (drm_i830_vertex_t __user *)arg, sizeof(vertex))) - return -EFAULT; - - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i830_dma_vertex called without lock held\n"); - return -EINVAL; - } - - DRM_DEBUG("i830 dma vertex, idx %d used %d discard %d\n", - vertex.idx, vertex.used, vertex.discard); - - if(vertex.idx < 0 || vertex.idx > dma->buf_count) return -EINVAL; - - i830_dma_dispatch_vertex( dev, - dma->buflist[ vertex.idx ], - vertex.discard, vertex.used ); - - sarea_priv->last_enqueue = dev_priv->counter-1; - sarea_priv->last_dispatch = (int) hw_status[5]; - - return 0; -} - -int i830_clear_bufs(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i830_clear_t clear; - - if (copy_from_user(&clear, (drm_i830_clear_t __user *)arg, sizeof(clear))) - return -EFAULT; - - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i830_clear_bufs called without lock held\n"); - return -EINVAL; - } - - /* GH: Someone's doing nasty things... */ - if (!dev->dev_private) { - return -EINVAL; - } - - i830_dma_dispatch_clear( dev, clear.flags, - clear.clear_color, - clear.clear_depth, - clear.clear_depthmask); - return 0; -} - -int i830_swap_bufs(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - - DRM_DEBUG("i830_swap_bufs\n"); - - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i830_swap_buf called without lock held\n"); - return -EINVAL; - } - - i830_dma_dispatch_swap( dev ); - return 0; -} - - - -/* Not sure why this isn't set all the time: - */ -static void i830_do_init_pageflip( drm_device_t *dev ) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - - DRM_DEBUG("%s\n", __FUNCTION__); - dev_priv->page_flipping = 1; - dev_priv->current_page = 0; - dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; -} - -int i830_do_cleanup_pageflip( drm_device_t *dev ) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - - DRM_DEBUG("%s\n", __FUNCTION__); - if (dev_priv->current_page != 0) - i830_dma_dispatch_flip( dev ); - - dev_priv->page_flipping = 0; - return 0; -} - -int i830_flip_bufs(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i830_private_t *dev_priv = dev->dev_private; - - DRM_DEBUG("%s\n", __FUNCTION__); - - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i830_flip_buf called without lock held\n"); - return -EINVAL; - } - - if (!dev_priv->page_flipping) - i830_do_init_pageflip( dev ); - - i830_dma_dispatch_flip( dev ); - return 0; -} - -int i830_getage(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; - u32 *hw_status = dev_priv->hw_status_page; - drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *) - dev_priv->sarea_priv; - - sarea_priv->last_dispatch = (int) hw_status[5]; - return 0; -} - -int i830_getbuf(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - int retcode = 0; - drm_i830_dma_t d; - drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; - u32 *hw_status = dev_priv->hw_status_page; - drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *) - dev_priv->sarea_priv; - - DRM_DEBUG("getbuf\n"); - if (copy_from_user(&d, (drm_i830_dma_t __user *)arg, sizeof(d))) - return -EFAULT; - - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i830_dma called without lock held\n"); - return -EINVAL; - } - - d.granted = 0; - - retcode = i830_dma_get_buffer(dev, &d, filp); - - DRM_DEBUG("i830_dma: %d returning %d, granted = %d\n", - current->pid, retcode, d.granted); - - if (copy_to_user((drm_dma_t __user *)arg, &d, sizeof(d))) - return -EFAULT; - sarea_priv->last_dispatch = (int) hw_status[5]; - - return retcode; -} - -int i830_copybuf(struct inode *inode, - struct file *filp, - unsigned int cmd, - unsigned long arg) -{ - /* Never copy - 2.4.x doesn't need it */ - return 0; -} - -int i830_docopy(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - return 0; -} - - - -int i830_getparam( struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i830_private_t *dev_priv = dev->dev_private; - drm_i830_getparam_t param; - int value; - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return -EINVAL; - } - - if (copy_from_user(¶m, (drm_i830_getparam_t __user *)arg, sizeof(param) )) - return -EFAULT; - - switch( param.param ) { - case I830_PARAM_IRQ_ACTIVE: - value = dev->irq_enabled; - break; - default: - return -EINVAL; - } - - if ( copy_to_user( param.value, &value, sizeof(int) ) ) { - DRM_ERROR( "copy_to_user\n" ); - return -EFAULT; - } - - return 0; -} - - -int i830_setparam( struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i830_private_t *dev_priv = dev->dev_private; - drm_i830_setparam_t param; - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return -EINVAL; - } - - if (copy_from_user(¶m, (drm_i830_setparam_t __user *)arg, sizeof(param) )) - return -EFAULT; - - switch( param.param ) { - case I830_SETPARAM_USE_MI_BATCHBUFFER_START: - dev_priv->use_mi_batchbuffer_start = param.value; - break; - default: - return -EINVAL; - } - - return 0; -} - - -static void i830_driver_pretakedown(drm_device_t *dev) -{ - i830_dma_cleanup( dev ); -} - -static void i830_driver_release(drm_device_t *dev, struct file *filp) -{ - i830_reclaim_buffers(dev, filp); -} - -static int i830_driver_dma_quiescent(drm_device_t *dev) -{ - i830_dma_quiescent( dev ); - return 0; -} - -void i830_driver_register_fns(drm_device_t *dev) -{ - dev->driver_features = DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_DMA | DRIVER_DMA_QUEUE; -#if USE_IRQS - dev->driver_features |= DRIVER_HAVE_IRQ | DRIVER_SHARED_IRQ; -#endif - dev->dev_priv_size = sizeof(drm_i830_buf_priv_t); - dev->fn_tbl.pretakedown = i830_driver_pretakedown; - dev->fn_tbl.release = i830_driver_release; - dev->fn_tbl.dma_quiescent = i830_driver_dma_quiescent; - dev->fn_tbl.reclaim_buffers = i830_reclaim_buffers; -#if USE_IRQS - dev->fn_tbl.irq_preinstall = i830_driver_irq_preinstall; - dev->fn_tbl.irq_postinstall = i830_driver_irq_postinstall; - dev->fn_tbl.irq_uninstall = i830_driver_irq_uninstall; - dev->fn_tbl.irq_handler = i830_driver_irq_handler; -#endif - dev->counters += 4; - dev->types[6] = _DRM_STAT_IRQ; - dev->types[7] = _DRM_STAT_PRIMARY; - dev->types[8] = _DRM_STAT_SECONDARY; - dev->types[9] = _DRM_STAT_DMA; -} - diff --git a/linux/i830_drm.h b/linux/i830_drm.h deleted file mode 100644 index 1bd45994e..000000000 --- a/linux/i830_drm.h +++ /dev/null @@ -1,335 +0,0 @@ -#ifndef _I830_DRM_H_ -#define _I830_DRM_H_ - -/* WARNING: These defines must be the same as what the Xserver uses. - * if you change them, you must change the defines in the Xserver. - * - * KW: Actually, you can't ever change them because doing so would - * break backwards compatibility. - */ - -#ifndef _I830_DEFINES_ -#define _I830_DEFINES_ - -#define I830_DMA_BUF_ORDER 12 -#define I830_DMA_BUF_SZ (1<<I830_DMA_BUF_ORDER) -#define I830_DMA_BUF_NR 256 -#define I830_NR_SAREA_CLIPRECTS 8 - -/* Each region is a minimum of 64k, and there are at most 64 of them. - */ -#define I830_NR_TEX_REGIONS 64 -#define I830_LOG_MIN_TEX_REGION_SIZE 16 - -/* KW: These aren't correct but someone set them to two and then - * released the module. Now we can't change them as doing so would - * break backwards compatibility. - */ -#define I830_TEXTURE_COUNT 2 -#define I830_TEXBLEND_COUNT I830_TEXTURE_COUNT - -#define I830_TEXBLEND_SIZE 12 /* (4 args + op) * 2 + COLOR_FACTOR */ - -#define I830_UPLOAD_CTX 0x1 -#define I830_UPLOAD_BUFFERS 0x2 -#define I830_UPLOAD_CLIPRECTS 0x4 -#define I830_UPLOAD_TEX0_IMAGE 0x100 /* handled clientside */ -#define I830_UPLOAD_TEX0_CUBE 0x200 /* handled clientside */ -#define I830_UPLOAD_TEX1_IMAGE 0x400 /* handled clientside */ -#define I830_UPLOAD_TEX1_CUBE 0x800 /* handled clientside */ -#define I830_UPLOAD_TEX2_IMAGE 0x1000 /* handled clientside */ -#define I830_UPLOAD_TEX2_CUBE 0x2000 /* handled clientside */ -#define I830_UPLOAD_TEX3_IMAGE 0x4000 /* handled clientside */ -#define I830_UPLOAD_TEX3_CUBE 0x8000 /* handled clientside */ -#define I830_UPLOAD_TEX_N_IMAGE(n) (0x100 << (n * 2)) -#define I830_UPLOAD_TEX_N_CUBE(n) (0x200 << (n * 2)) -#define I830_UPLOAD_TEXIMAGE_MASK 0xff00 -#define I830_UPLOAD_TEX0 0x10000 -#define I830_UPLOAD_TEX1 0x20000 -#define I830_UPLOAD_TEX2 0x40000 -#define I830_UPLOAD_TEX3 0x80000 -#define I830_UPLOAD_TEX_N(n) (0x10000 << (n)) -#define I830_UPLOAD_TEX_MASK 0xf0000 -#define I830_UPLOAD_TEXBLEND0 0x100000 -#define I830_UPLOAD_TEXBLEND1 0x200000 -#define I830_UPLOAD_TEXBLEND2 0x400000 -#define I830_UPLOAD_TEXBLEND3 0x800000 -#define I830_UPLOAD_TEXBLEND_N(n) (0x100000 << (n)) -#define I830_UPLOAD_TEXBLEND_MASK 0xf00000 -#define I830_UPLOAD_TEX_PALETTE_N(n) (0x1000000 << (n)) -#define I830_UPLOAD_TEX_PALETTE_SHARED 0x4000000 -#define I830_UPLOAD_STIPPLE 0x8000000 - -/* Indices into buf.Setup where various bits of state are mirrored per - * context and per buffer. These can be fired at the card as a unit, - * or in a piecewise fashion as required. - */ - -/* Destbuffer state - * - backbuffer linear offset and pitch -- invarient in the current dri - * - zbuffer linear offset and pitch -- also invarient - * - drawing origin in back and depth buffers. - * - * Keep the depth/back buffer state here to accommodate private buffers - * in the future. - */ - -#define I830_DESTREG_CBUFADDR 0 -#define I830_DESTREG_DBUFADDR 1 -#define I830_DESTREG_DV0 2 -#define I830_DESTREG_DV1 3 -#define I830_DESTREG_SENABLE 4 -#define I830_DESTREG_SR0 5 -#define I830_DESTREG_SR1 6 -#define I830_DESTREG_SR2 7 -#define I830_DESTREG_DR0 8 -#define I830_DESTREG_DR1 9 -#define I830_DESTREG_DR2 10 -#define I830_DESTREG_DR3 11 -#define I830_DESTREG_DR4 12 -#define I830_DEST_SETUP_SIZE 13 - -/* Context state - */ -#define I830_CTXREG_STATE1 0 -#define I830_CTXREG_STATE2 1 -#define I830_CTXREG_STATE3 2 -#define I830_CTXREG_STATE4 3 -#define I830_CTXREG_STATE5 4 -#define I830_CTXREG_IALPHAB 5 -#define I830_CTXREG_STENCILTST 6 -#define I830_CTXREG_ENABLES_1 7 -#define I830_CTXREG_ENABLES_2 8 -#define I830_CTXREG_AA 9 -#define I830_CTXREG_FOGCOLOR 10 -#define I830_CTXREG_BLENDCOLR0 11 -#define I830_CTXREG_BLENDCOLR 12 /* Dword 1 of 2 dword command */ -#define I830_CTXREG_VF 13 -#define I830_CTXREG_VF2 14 -#define I830_CTXREG_MCSB0 15 -#define I830_CTXREG_MCSB1 16 -#define I830_CTX_SETUP_SIZE 17 - -/* 1.3: Stipple state - */ -#define I830_STPREG_ST0 0 -#define I830_STPREG_ST1 1 -#define I830_STP_SETUP_SIZE 2 - - -/* Texture state (per tex unit) - */ - -#define I830_TEXREG_MI0 0 /* GFX_OP_MAP_INFO (6 dwords) */ -#define I830_TEXREG_MI1 1 -#define I830_TEXREG_MI2 2 -#define I830_TEXREG_MI3 3 -#define I830_TEXREG_MI4 4 -#define I830_TEXREG_MI5 5 -#define I830_TEXREG_MF 6 /* GFX_OP_MAP_FILTER */ -#define I830_TEXREG_MLC 7 /* GFX_OP_MAP_LOD_CTL */ -#define I830_TEXREG_MLL 8 /* GFX_OP_MAP_LOD_LIMITS */ -#define I830_TEXREG_MCS 9 /* GFX_OP_MAP_COORD_SETS */ -#define I830_TEX_SETUP_SIZE 10 - -#define I830_TEXREG_TM0LI 0 /* load immediate 2 texture map n */ -#define I830_TEXREG_TM0S0 1 -#define I830_TEXREG_TM0S1 2 -#define I830_TEXREG_TM0S2 3 -#define I830_TEXREG_TM0S3 4 -#define I830_TEXREG_TM0S4 5 -#define I830_TEXREG_NOP0 6 /* noop */ -#define I830_TEXREG_NOP1 7 /* noop */ -#define I830_TEXREG_NOP2 8 /* noop */ -#define __I830_TEXREG_MCS 9 /* GFX_OP_MAP_COORD_SETS -- shared */ -#define __I830_TEX_SETUP_SIZE 10 - -#define I830_FRONT 0x1 -#define I830_BACK 0x2 -#define I830_DEPTH 0x4 - -#endif /* _I830_DEFINES_ */ - -typedef struct _drm_i830_init { - enum { - I830_INIT_DMA = 0x01, - I830_CLEANUP_DMA = 0x02 - } func; - unsigned int mmio_offset; - unsigned int buffers_offset; - int sarea_priv_offset; - unsigned int ring_start; - unsigned int ring_end; - unsigned int ring_size; - unsigned int front_offset; - unsigned int back_offset; - unsigned int depth_offset; - unsigned int w; - unsigned int h; - unsigned int pitch; - unsigned int pitch_bits; - unsigned int back_pitch; - unsigned int depth_pitch; - unsigned int cpp; -} drm_i830_init_t; - -/* Warning: If you change the SAREA structure you must change the Xserver - * structure as well */ - -typedef struct _drm_i830_tex_region { - unsigned char next, prev; /* indices to form a circular LRU */ - unsigned char in_use; /* owned by a client, or free? */ - int age; /* tracked by clients to update local LRU's */ -} drm_i830_tex_region_t; - -typedef struct _drm_i830_sarea { - unsigned int ContextState[I830_CTX_SETUP_SIZE]; - unsigned int BufferState[I830_DEST_SETUP_SIZE]; - unsigned int TexState[I830_TEXTURE_COUNT][I830_TEX_SETUP_SIZE]; - unsigned int TexBlendState[I830_TEXBLEND_COUNT][I830_TEXBLEND_SIZE]; - unsigned int TexBlendStateWordsUsed[I830_TEXBLEND_COUNT]; - unsigned int Palette[2][256]; - unsigned int dirty; - - unsigned int nbox; - drm_clip_rect_t boxes[I830_NR_SAREA_CLIPRECTS]; - - /* Maintain an LRU of contiguous regions of texture space. If - * you think you own a region of texture memory, and it has an - * age different to the one you set, then you are mistaken and - * it has been stolen by another client. If global texAge - * hasn't changed, there is no need to walk the list. - * - * These regions can be used as a proxy for the fine-grained - * texture information of other clients - by maintaining them - * in the same lru which is used to age their own textures, - * clients have an approximate lru for the whole of global - * texture space, and can make informed decisions as to which - * areas to kick out. There is no need to choose whether to - * kick out your own texture or someone else's - simply eject - * them all in LRU order. - */ - - drm_i830_tex_region_t texList[I830_NR_TEX_REGIONS+1]; - /* Last elt is sentinal */ - int texAge; /* last time texture was uploaded */ - int last_enqueue; /* last time a buffer was enqueued */ - int last_dispatch; /* age of the most recently dispatched buffer */ - int last_quiescent; /* */ - int ctxOwner; /* last context to upload state */ - - int vertex_prim; - - int pf_enabled; /* is pageflipping allowed? */ - int pf_active; - int pf_current_page; /* which buffer is being displayed? */ - - int perf_boxes; /* performance boxes to be displayed */ - - /* Here's the state for texunits 2,3: - */ - unsigned int TexState2[I830_TEX_SETUP_SIZE]; - unsigned int TexBlendState2[I830_TEXBLEND_SIZE]; - unsigned int TexBlendStateWordsUsed2; - - unsigned int TexState3[I830_TEX_SETUP_SIZE]; - unsigned int TexBlendState3[I830_TEXBLEND_SIZE]; - unsigned int TexBlendStateWordsUsed3; - - unsigned int StippleState[I830_STP_SETUP_SIZE]; -} drm_i830_sarea_t; - -/* Flags for perf_boxes - */ -#define I830_BOX_RING_EMPTY 0x1 /* populated by kernel */ -#define I830_BOX_FLIP 0x2 /* populated by kernel */ -#define I830_BOX_WAIT 0x4 /* populated by kernel & client */ -#define I830_BOX_TEXTURE_LOAD 0x8 /* populated by kernel */ -#define I830_BOX_LOST_CONTEXT 0x10 /* populated by client */ - - -/* I830 specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ -#define DRM_IOCTL_I830_INIT DRM_IOW( 0x40, drm_i830_init_t) -#define DRM_IOCTL_I830_VERTEX DRM_IOW( 0x41, drm_i830_vertex_t) -#define DRM_IOCTL_I830_CLEAR DRM_IOW( 0x42, drm_i830_clear_t) -#define DRM_IOCTL_I830_FLUSH DRM_IO ( 0x43) -#define DRM_IOCTL_I830_GETAGE DRM_IO ( 0x44) -#define DRM_IOCTL_I830_GETBUF DRM_IOWR(0x45, drm_i830_dma_t) -#define DRM_IOCTL_I830_SWAP DRM_IO ( 0x46) -#define DRM_IOCTL_I830_COPY DRM_IOW( 0x47, drm_i830_copy_t) -#define DRM_IOCTL_I830_DOCOPY DRM_IO ( 0x48) -#define DRM_IOCTL_I830_FLIP DRM_IO ( 0x49) -#define DRM_IOCTL_I830_IRQ_EMIT DRM_IOWR(0x4a, drm_i830_irq_emit_t) -#define DRM_IOCTL_I830_IRQ_WAIT DRM_IOW( 0x4b, drm_i830_irq_wait_t) -#define DRM_IOCTL_I830_GETPARAM DRM_IOWR(0x4c, drm_i830_getparam_t) -#define DRM_IOCTL_I830_SETPARAM DRM_IOWR(0x4d, drm_i830_setparam_t) - -typedef struct _drm_i830_clear { - int clear_color; - int clear_depth; - int flags; - unsigned int clear_colormask; - unsigned int clear_depthmask; -} drm_i830_clear_t; - - - -/* These may be placeholders if we have more cliprects than - * I830_NR_SAREA_CLIPRECTS. In that case, the client sets discard to - * false, indicating that the buffer will be dispatched again with a - * new set of cliprects. - */ -typedef struct _drm_i830_vertex { - int idx; /* buffer index */ - int used; /* nr bytes in use */ - int discard; /* client is finished with the buffer? */ -} drm_i830_vertex_t; - -typedef struct _drm_i830_copy_t { - int idx; /* buffer index */ - int used; /* nr bytes in use */ - void __user *address; /* Address to copy from */ -} drm_i830_copy_t; - -typedef struct drm_i830_dma { - void __user *virtual; - int request_idx; - int request_size; - int granted; -} drm_i830_dma_t; - - -/* 1.3: Userspace can request & wait on irq's: - */ -typedef struct drm_i830_irq_emit { - int __user *irq_seq; -} drm_i830_irq_emit_t; - -typedef struct drm_i830_irq_wait { - int irq_seq; -} drm_i830_irq_wait_t; - - -/* 1.3: New ioctl to query kernel params: - */ -#define I830_PARAM_IRQ_ACTIVE 1 - -typedef struct drm_i830_getparam { - int param; - int __user *value; -} drm_i830_getparam_t; - - -/* 1.3: New ioctl to set kernel params: - */ -#define I830_SETPARAM_USE_MI_BATCHBUFFER_START 1 - -typedef struct drm_i830_setparam { - int param; - int value; -} drm_i830_setparam_t; - - -#endif /* _I830_DRM_H_ */ diff --git a/linux/i830_drv.c b/linux/i830_drv.c deleted file mode 100644 index eb45b2726..000000000 --- a/linux/i830_drv.c +++ /dev/null @@ -1,42 +0,0 @@ -/* i830_drv.c -- I810 driver -*- linux-c -*- - * Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Jeff Hartmann <jhartmann@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * Abraham vd Merwe <abraham@2d3d.co.za> - * Keith Whitwell <keith@tungstengraphics.com> - */ - -#include <linux/config.h> -#include "i830.h" -#include "drmP.h" -#include "drm.h" -#include "i830_drm.h" -#include "i830_drv.h" - -#include "drm_core.h" diff --git a/linux/i830_drv.h b/linux/i830_drv.h deleted file mode 100644 index 4e684ce89..000000000 --- a/linux/i830_drv.h +++ /dev/null @@ -1,302 +0,0 @@ -/* i830_drv.h -- Private header for the I830 driver -*- linux-c -*- - * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: Rickard E. (Rik) Faith <faith@valinux.com> - * Jeff Hartmann <jhartmann@valinux.com> - * - */ - -#ifndef _I830_DRV_H_ -#define _I830_DRV_H_ - -typedef struct drm_i830_buf_priv { - u32 *in_use; - int my_use_idx; - int currently_mapped; - void __user *virtual; - void *kernel_virtual; -} drm_i830_buf_priv_t; - -typedef struct _drm_i830_ring_buffer{ - int tail_mask; - unsigned long Start; - unsigned long End; - unsigned long Size; - u8 *virtual_start; - int head; - int tail; - int space; -} drm_i830_ring_buffer_t; - -typedef struct drm_i830_private { - drm_map_t *sarea_map; - drm_map_t *mmio_map; - - drm_i830_sarea_t *sarea_priv; - drm_i830_ring_buffer_t ring; - - void * hw_status_page; - unsigned long counter; - - dma_addr_t dma_status_page; - - drm_buf_t *mmap_buffer; - - u32 front_di1, back_di1, zi1; - - int back_offset; - int depth_offset; - int front_offset; - int w, h; - int pitch; - int back_pitch; - int depth_pitch; - unsigned int cpp; - - int do_boxes; - int dma_used; - - int current_page; - int page_flipping; - - wait_queue_head_t irq_queue; - atomic_t irq_received; - atomic_t irq_emitted; - - int use_mi_batchbuffer_start; - -} drm_i830_private_t; - - /* i830_dma.c */ -extern int i830_dma_schedule(drm_device_t *dev, int locked); -extern int i830_getbuf(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int i830_dma_init(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int i830_dma_cleanup(drm_device_t *dev); -extern int i830_flush_ioctl(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern void i830_reclaim_buffers(drm_device_t *dev, struct file *filp); -extern int i830_getage(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg); -extern int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma); -extern int i830_copybuf(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int i830_docopy(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); - -extern void i830_dma_quiescent(drm_device_t *dev); - -extern int i830_dma_vertex(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); - -extern int i830_swap_bufs(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); - -extern int i830_clear_bufs(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); - -extern int i830_flip_bufs(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); - -extern int i830_getparam( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); - -extern int i830_setparam( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); - -/* i830_irq.c */ -extern int i830_irq_emit( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); -extern int i830_irq_wait( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ); -extern int i830_wait_irq(drm_device_t *dev, int irq_nr); -extern int i830_emit_irq(drm_device_t *dev); - -extern irqreturn_t i830_driver_irq_handler( DRM_IRQ_ARGS ); -extern void i830_driver_irq_preinstall( drm_device_t *dev ); -extern void i830_driver_irq_postinstall( drm_device_t *dev ); -extern void i830_driver_irq_uninstall( drm_device_t *dev ); - -#define I830_BASE(reg) ((unsigned long) \ - dev_priv->mmio_map->handle) -#define I830_ADDR(reg) (I830_BASE(reg) + reg) -#define I830_DEREF(reg) *(__volatile__ unsigned int *)I830_ADDR(reg) -#define I830_READ(reg) readl((volatile u32 *)I830_ADDR(reg)) -#define I830_WRITE(reg,val) writel(val, (volatile u32 *)I830_ADDR(reg)) -#define I830_DEREF16(reg) *(__volatile__ u16 *)I830_ADDR(reg) -#define I830_READ16(reg) I830_DEREF16(reg) -#define I830_WRITE16(reg,val) do { I830_DEREF16(reg) = val; } while (0) - - - -#define I830_VERBOSE 0 - -#define RING_LOCALS unsigned int outring, ringmask, outcount; \ - volatile char *virt; - -#define BEGIN_LP_RING(n) do { \ - if (I830_VERBOSE) \ - printk("BEGIN_LP_RING(%d) in %s\n", \ - n, __FUNCTION__); \ - if (dev_priv->ring.space < n*4) \ - i830_wait_ring(dev, n*4, __FUNCTION__); \ - outcount = 0; \ - outring = dev_priv->ring.tail; \ - ringmask = dev_priv->ring.tail_mask; \ - virt = dev_priv->ring.virtual_start; \ -} while (0) - - -#define OUT_RING(n) do { \ - if (I830_VERBOSE) printk(" OUT_RING %x\n", (int)(n)); \ - *(volatile unsigned int *)(virt + outring) = n; \ - outcount++; \ - outring += 4; \ - outring &= ringmask; \ -} while (0) - -#define ADVANCE_LP_RING() do { \ - if (I830_VERBOSE) printk("ADVANCE_LP_RING %x\n", outring); \ - dev_priv->ring.tail = outring; \ - dev_priv->ring.space -= outcount * 4; \ - I830_WRITE(LP_RING + RING_TAIL, outring); \ -} while(0) - -extern int i830_wait_ring(drm_device_t *dev, int n, const char *caller); - - -#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23)) -#define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23)) -#define CMD_REPORT_HEAD (7<<23) -#define CMD_STORE_DWORD_IDX ((0x21<<23) | 0x1) -#define CMD_OP_BATCH_BUFFER ((0x0<<29)|(0x30<<23)|0x1) - -#define STATE3D_LOAD_STATE_IMMEDIATE_2 ((0x3<<29)|(0x1d<<24)|(0x03<<16)) -#define LOAD_TEXTURE_MAP0 (1<<11) - -#define INST_PARSER_CLIENT 0x00000000 -#define INST_OP_FLUSH 0x02000000 -#define INST_FLUSH_MAP_CACHE 0x00000001 - - -#define BB1_START_ADDR_MASK (~0x7) -#define BB1_PROTECTED (1<<0) -#define BB1_UNPROTECTED (0<<0) -#define BB2_END_ADDR_MASK (~0x7) - -#define I830REG_HWSTAM 0x02098 -#define I830REG_INT_IDENTITY_R 0x020a4 -#define I830REG_INT_MASK_R 0x020a8 -#define I830REG_INT_ENABLE_R 0x020a0 - -#define I830_IRQ_RESERVED ((1<<13)|(3<<2)) - - -#define LP_RING 0x2030 -#define HP_RING 0x2040 -#define RING_TAIL 0x00 -#define TAIL_ADDR 0x001FFFF8 -#define RING_HEAD 0x04 -#define HEAD_WRAP_COUNT 0xFFE00000 -#define HEAD_WRAP_ONE 0x00200000 -#define HEAD_ADDR 0x001FFFFC -#define RING_START 0x08 -#define START_ADDR 0x0xFFFFF000 -#define RING_LEN 0x0C -#define RING_NR_PAGES 0x001FF000 -#define RING_REPORT_MASK 0x00000006 -#define RING_REPORT_64K 0x00000002 -#define RING_REPORT_128K 0x00000004 -#define RING_NO_REPORT 0x00000000 -#define RING_VALID_MASK 0x00000001 -#define RING_VALID 0x00000001 -#define RING_INVALID 0x00000000 - -#define GFX_OP_SCISSOR ((0x3<<29)|(0x1c<<24)|(0x10<<19)) -#define SC_UPDATE_SCISSOR (0x1<<1) -#define SC_ENABLE_MASK (0x1<<0) -#define SC_ENABLE (0x1<<0) - -#define GFX_OP_SCISSOR_INFO ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1)) -#define SCI_YMIN_MASK (0xffff<<16) -#define SCI_XMIN_MASK (0xffff<<0) -#define SCI_YMAX_MASK (0xffff<<16) -#define SCI_XMAX_MASK (0xffff<<0) - -#define GFX_OP_SCISSOR_ENABLE ((0x3<<29)|(0x1c<<24)|(0x10<<19)) -#define GFX_OP_SCISSOR_RECT ((0x3<<29)|(0x1d<<24)|(0x81<<16)|1) -#define GFX_OP_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0) -#define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16)) -#define GFX_OP_MAP_INFO ((0x3<<29)|(0x1d<<24)|0x4) -#define GFX_OP_DESTBUFFER_VARS ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0) -#define GFX_OP_DRAWRECT_INFO ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3)) -#define GFX_OP_PRIMITIVE ((0x3<<29)|(0x1f<<24)) - -#define CMD_OP_DESTBUFFER_INFO ((0x3<<29)|(0x1d<<24)|(0x8e<<16)|1) - -#define CMD_OP_DISPLAYBUFFER_INFO ((0x0<<29)|(0x14<<23)|2) -#define ASYNC_FLIP (1<<22) - -#define CMD_3D (0x3<<29) -#define STATE3D_CONST_BLEND_COLOR_CMD (CMD_3D|(0x1d<<24)|(0x88<<16)) -#define STATE3D_MAP_COORD_SETBIND_CMD (CMD_3D|(0x1d<<24)|(0x02<<16)) - -#define BR00_BITBLT_CLIENT 0x40000000 -#define BR00_OP_COLOR_BLT 0x10000000 -#define BR00_OP_SRC_COPY_BLT 0x10C00000 -#define BR13_SOLID_PATTERN 0x80000000 - -#define BUF_3D_ID_COLOR_BACK (0x3<<24) -#define BUF_3D_ID_DEPTH (0x7<<24) -#define BUF_3D_USE_FENCE (1<<23) -#define BUF_3D_PITCH(x) (((x)/4)<<2) - -#define CMD_OP_MAP_PALETTE_LOAD ((3<<29)|(0x1d<<24)|(0x82<<16)|255) -#define MAP_PALETTE_NUM(x) ((x<<8) & (1<<8)) -#define MAP_PALETTE_BOTH (1<<11) - -#define XY_COLOR_BLT_CMD ((2<<29)|(0x50<<22)|0x4) -#define XY_COLOR_BLT_WRITE_ALPHA (1<<21) -#define XY_COLOR_BLT_WRITE_RGB (1<<20) - -#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6) -#define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21) -#define XY_SRC_COPY_BLT_WRITE_RGB (1<<20) - -#define MI_BATCH_BUFFER ((0x30<<23)|1) -#define MI_BATCH_BUFFER_START (0x31<<23) -#define MI_BATCH_BUFFER_END (0xA<<23) -#define MI_BATCH_NON_SECURE (1) - -#define MI_WAIT_FOR_EVENT ((0x3<<23)) -#define MI_WAIT_FOR_PLANE_A_FLIP (1<<2) -#define MI_WAIT_FOR_PLANE_A_SCANLINES (1<<1) - -#define MI_LOAD_SCAN_LINES_INCL ((0x12<<23)) - -#endif - diff --git a/linux/i830_irq.c b/linux/i830_irq.c deleted file mode 100644 index 0f01d0880..000000000 --- a/linux/i830_irq.c +++ /dev/null @@ -1,208 +0,0 @@ -/* i830_dma.c -- DMA support for the I830 -*- linux-c -*- - * - * Copyright 2002 Tungsten Graphics, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: Keith Whitwell <keith@tungstengraphics.com> - * - */ - -#include "i830.h" -#include "drmP.h" -#include "drm.h" -#include "i830_drm.h" -#include "i830_drv.h" -#include <linux/interrupt.h> /* For task queue support */ -#include <linux/delay.h> - - -irqreturn_t i830_driver_irq_handler( DRM_IRQ_ARGS ) -{ - drm_device_t *dev = (drm_device_t *)arg; - drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; - u16 temp; - - temp = I830_READ16(I830REG_INT_IDENTITY_R); - DRM_DEBUG("%x\n", temp); - - if ( !( temp & 2 ) ) - return IRQ_NONE; - - I830_WRITE16(I830REG_INT_IDENTITY_R, temp); - - atomic_inc(&dev_priv->irq_received); - wake_up_interruptible(&dev_priv->irq_queue); - - return IRQ_HANDLED; -} - - -int i830_emit_irq(drm_device_t *dev) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - - DRM_DEBUG("%s\n", __FUNCTION__); - - atomic_inc(&dev_priv->irq_emitted); - - BEGIN_LP_RING(2); - OUT_RING( 0 ); - OUT_RING( GFX_OP_USER_INTERRUPT ); - ADVANCE_LP_RING(); - - return atomic_read(&dev_priv->irq_emitted); -} - - -int i830_wait_irq(drm_device_t *dev, int irq_nr) -{ - drm_i830_private_t *dev_priv = - (drm_i830_private_t *)dev->dev_private; - DECLARE_WAITQUEUE(entry, current); - unsigned long end = jiffies + HZ*3; - int ret = 0; - - DRM_DEBUG("%s\n", __FUNCTION__); - - if (atomic_read(&dev_priv->irq_received) >= irq_nr) - return 0; - - dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT; - - add_wait_queue(&dev_priv->irq_queue, &entry); - - for (;;) { - current->state = TASK_INTERRUPTIBLE; - if (atomic_read(&dev_priv->irq_received) >= irq_nr) - break; - if((signed)(end - jiffies) <= 0) { - DRM_ERROR("timeout iir %x imr %x ier %x hwstam %x\n", - I830_READ16( I830REG_INT_IDENTITY_R ), - I830_READ16( I830REG_INT_MASK_R ), - I830_READ16( I830REG_INT_ENABLE_R ), - I830_READ16( I830REG_HWSTAM )); - - ret = -EBUSY; /* Lockup? Missed irq? */ - break; - } - schedule_timeout(HZ*3); - if (signal_pending(current)) { - ret = -EINTR; - break; - } - } - - current->state = TASK_RUNNING; - remove_wait_queue(&dev_priv->irq_queue, &entry); - return ret; -} - - -/* Needs the lock as it touches the ring. - */ -int i830_irq_emit( struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i830_private_t *dev_priv = dev->dev_private; - drm_i830_irq_emit_t emit; - int result; - - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i830_irq_emit called without lock held\n"); - return -EINVAL; - } - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return -EINVAL; - } - - if (copy_from_user( &emit, (drm_i830_irq_emit_t __user *)arg, sizeof(emit) )) - return -EFAULT; - - result = i830_emit_irq( dev ); - - if ( copy_to_user( emit.irq_seq, &result, sizeof(int) ) ) { - DRM_ERROR( "copy_to_user\n" ); - return -EFAULT; - } - - return 0; -} - - -/* Doesn't need the hardware lock. - */ -int i830_irq_wait( struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg ) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i830_private_t *dev_priv = dev->dev_private; - drm_i830_irq_wait_t irqwait; - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return -EINVAL; - } - - if (copy_from_user( &irqwait, (drm_i830_irq_wait_t __user *)arg, - sizeof(irqwait) )) - return -EFAULT; - - return i830_wait_irq( dev, irqwait.irq_seq ); -} - - -/* drm_dma.h hooks -*/ -void i830_driver_irq_preinstall( drm_device_t *dev ) { - drm_i830_private_t *dev_priv = - (drm_i830_private_t *)dev->dev_private; - - I830_WRITE16( I830REG_HWSTAM, 0xffff ); - I830_WRITE16( I830REG_INT_MASK_R, 0x0 ); - I830_WRITE16( I830REG_INT_ENABLE_R, 0x0 ); - atomic_set(&dev_priv->irq_received, 0); - atomic_set(&dev_priv->irq_emitted, 0); - init_waitqueue_head(&dev_priv->irq_queue); -} - -void i830_driver_irq_postinstall( drm_device_t *dev ) { - drm_i830_private_t *dev_priv = - (drm_i830_private_t *)dev->dev_private; - - I830_WRITE16( I830REG_INT_ENABLE_R, 0x2 ); -} - -void i830_driver_irq_uninstall( drm_device_t *dev ) { - drm_i830_private_t *dev_priv = - (drm_i830_private_t *)dev->dev_private; - if (!dev_priv) - return; - - I830_WRITE16( I830REG_INT_MASK_R, 0xffff ); - I830_WRITE16( I830REG_INT_ENABLE_R, 0x0 ); -} diff --git a/linux/i915_drv.c b/linux/i915_drv.c deleted file mode 100644 index becce4d70..000000000 --- a/linux/i915_drv.c +++ /dev/null @@ -1,17 +0,0 @@ -/* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*- - */ - -/************************************************************************** - * - * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - **************************************************************************/ - -#include "i915.h" -#include "drmP.h" -#include "drm.h" -#include "i915_drm.h" -#include "i915_drv.h" - -#include "drm_core.h" diff --git a/linux/mach64_drv.c b/linux/mach64_drv.c deleted file mode 100644 index 05170abc2..000000000 --- a/linux/mach64_drv.c +++ /dev/null @@ -1,37 +0,0 @@ -/* mach64_drv.c -- mach64 (Rage Pro) driver -*- linux-c -*- - * Created: Fri Nov 24 18:34:32 2000 by gareth@valinux.com - * - * Copyright 2000 Gareth Hughes - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - * Leif Delgass <ldelgass@retinalburn.net> - */ - -#include <linux/config.h> -#include "mach64.h" -#include "drmP.h" -#include "drm.h" -#include "mach64_drm.h" -#include "mach64_drv.h" - -#include "drm_core.h" diff --git a/linux/mga_drv.c b/linux/mga_drv.c deleted file mode 100644 index 54bfb2d3b..000000000 --- a/linux/mga_drv.c +++ /dev/null @@ -1,39 +0,0 @@ -/* mga_drv.c -- Matrox G200/G400 driver -*- linux-c -*- - * Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - */ - -#include <linux/config.h> -#include "mga.h" -#include "drmP.h" -#include "drm.h" -#include "mga_drm.h" -#include "mga_drv.h" - -#include "drm_core.h" diff --git a/linux/r128_drv.c b/linux/r128_drv.c deleted file mode 100644 index 8cfc9966c..000000000 --- a/linux/r128_drv.c +++ /dev/null @@ -1,40 +0,0 @@ -/* r128_drv.c -- ATI Rage 128 driver -*- linux-c -*- - * Created: Mon Dec 13 09:47:27 1999 by faith@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - */ - -#include <linux/config.h> -#include "r128.h" -#include "drmP.h" -#include "drm.h" -#include "r128_drm.h" -#include "r128_drv.h" -#include "ati_pcigart.h" - -#include "drm_core.h" diff --git a/linux/radeon_drv.c b/linux/radeon_drv.c deleted file mode 100644 index 965abc449..000000000 --- a/linux/radeon_drv.c +++ /dev/null @@ -1,41 +0,0 @@ -/** - * \file radeon_drv.c - * ATI Radeon driver - * - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - - -#include <linux/config.h> -#include "radeon.h" -#include "drmP.h" -#include "drm.h" -#include "radeon_drm.h" -#include "radeon_drv.h" -#include "ati_pcigart.h" - -#include "drm_core.h" diff --git a/linux/savage.h b/linux/savage.h deleted file mode 100644 index cb50d6e2b..000000000 --- a/linux/savage.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#ifndef __SAVAGE_H__ -#define __SAVAGE_H__ - -/* This remains constant for all DRM template files. - */ -#define DRM(x) savage_##x - -#endif diff --git a/linux/savage_dma.c b/linux/savage_dma.c deleted file mode 100644 index 581d43021..000000000 --- a/linux/savage_dma.c +++ /dev/null @@ -1,88 +0,0 @@ -/* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - - -/*=========================================================*/ -#include "savage.h" -#include "drmP.h" -#include "savage_drm.h" -#include "savage_drv.h" - -#include <linux/interrupt.h> /* For task queue support */ -#include <linux/delay.h> - -#define SAVAGE_DEFAULT_USEC_TIMEOUT 10000 -#define SAVAGE_FREELIST_DEBUG 0 - -static int savage_preinit( drm_device_t *dev, unsigned long chipset ) -{ - drm_savage_private_t *dev_priv; - unsigned mmioBase, fbBase, fbSize, apertureBase; - int ret = 0; - - dev_priv = DRM(alloc)( sizeof(drm_savage_private_t), DRM_MEM_DRIVER ); - if ( dev_priv == NULL ) - return DRM_ERR(ENOMEM); - - memset( dev_priv, 0, sizeof(drm_savage_private_t) ); - dev->dev_private = (void *)dev_priv; - dev_priv->chipset = (enum savage_family)chipset; - - if( S3_SAVAGE3D_SERIES(dev_priv->chipset) ) { - fbBase = pci_resource_start( dev->pdev, 0 ); - fbSize = SAVAGE_FB_SIZE_S3; - mmioBase = fbBase + fbSize; - apertureBase = fbBase + SAVAGE_APERTURE_OFFSET; - } else if( chipset != S3_SUPERSAVAGE ) { - mmioBase = pci_resource_start( dev->pdev, 0 ); - fbBase = pci_resource_start( dev->pdev, 1 ); - fbSize = SAVAGE_FB_SIZE_S4; - apertureBase = fbBase + SAVAGE_APERTURE_OFFSET; - } else { - mmioBase = pci_resource_start( dev->pdev, 0 ); - fbBase = pci_resource_start( dev->pdev, 1 ); - fbSize = pci_resource_len( dev->pdev, 1 ); - apertureBase = pci_resource_start( dev->pdev, 2 ); - } - - if( (ret = DRM(initmap)( dev, mmioBase, SAVAGE_MMIO_SIZE, - _DRM_REGISTERS, 0 ))) - return ret; - - if( (ret = DRM(initmap)( dev, fbBase, fbSize, - _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING ))) - return ret; - - if( (ret = DRM(initmap)( dev, apertureBase, SAVAGE_APERTURE_SIZE, - _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING ))) - return ret; - - return ret; -} - -void DRM(driver_register_fns)(drm_device_t *dev) -{ - dev->driver_features = DRIVER_USE_AGP | DRIVER_USE_MTRR; - dev->fn_tbl.preinit = savage_preinit; -} diff --git a/linux/savage_drm.h b/linux/savage_drm.h deleted file mode 100644 index f7d4f4047..000000000 --- a/linux/savage_drm.h +++ /dev/null @@ -1,238 +0,0 @@ -/* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#ifndef __SAVAGE_DRM_H__ -#define __SAVAGE_DRM_H__ - -#ifndef __SAVAGE_SAREA_DEFINES__ -#define __SAVAGE_SAREA_DEFINES__ - -#define DRM_SAVAGE_MEM_PAGE (1UL<<12) -#define DRM_SAVAGE_MEM_WORK 32 -#define DRM_SAVAGE_MEM_LOCATION_PCI 1 -#define DRM_SAVAGE_MEM_LOCATION_AGP 2 -#define DRM_SAVAGE_DMA_AGP_SIZE (16*1024*1024) - -typedef struct drm_savage_alloc_cont_mem -{ - size_t size; /*size of buffer*/ - unsigned long type; /*4k page or word*/ - unsigned long alignment; - unsigned long location; /*agp or pci*/ - - unsigned long phyaddress; - unsigned long linear; -} drm_savage_alloc_cont_mem_t; - -typedef struct drm_savage_get_physcis_address -{ - unsigned long v_address; - unsigned long p_address; -}drm_savage_get_physcis_address_t; - -/*ioctl number*/ -#define DRM_IOCTL_SAVAGE_ALLOC_CONTINUOUS_MEM \ - DRM_IOWR(0x40,drm_savage_alloc_cont_mem_t) -#define DRM_IOCTL_SAVAGE_GET_PHYSICS_ADDRESS \ - DRM_IOWR(0x41, drm_savage_get_physcis_address_t) -#define DRM_IOCTL_SAVAGE_FREE_CONTINUOUS_MEM \ - DRM_IOWR(0x42, drm_savage_alloc_cont_mem_t) - -#define SAVAGE_FRONT 0x1 -#define SAVAGE_BACK 0x2 -#define SAVAGE_DEPTH 0x4 -#define SAVAGE_STENCIL 0x8 - -/* What needs to be changed for the current vertex dma buffer? - */ -#define SAVAGE_UPLOAD_CTX 0x1 -#define SAVAGE_UPLOAD_TEX0 0x2 -#define SAVAGE_UPLOAD_TEX1 0x4 -#define SAVAGE_UPLOAD_PIPE 0x8 /* <- seems should be removed, Jiayo Hsu */ -#define SAVAGE_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */ -#define SAVAGE_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */ -#define SAVAGE_UPLOAD_2D 0x40 -#define SAVAGE_WAIT_AGE 0x80 /* handled client-side */ -#define SAVAGE_UPLOAD_CLIPRECTS 0x100 /* handled client-side */ -/*frank:add Buffer state 2001/11/15*/ -#define SAVAGE_UPLOAD_BUFFERS 0x200 -/* original marked off in MGA drivers , Jiayo Hsu Oct.23,2001 */ - -/* Keep these small for testing. - */ -#define SAVAGE_NR_SAREA_CLIPRECTS 8 - -/* 2 heaps (1 for card, 1 for agp), each divided into upto 128 - * regions, subject to a minimum region size of (1<<16) == 64k. - * - * Clients may subdivide regions internally, but when sharing between - * clients, the region size is the minimum granularity. - */ - -#define SAVAGE_CARD_HEAP 0 -#define SAVAGE_AGP_HEAP 1 -#define SAVAGE_NR_TEX_HEAPS 2 -#define SAVAGE_NR_TEX_REGIONS 16 /* num. of global texture manage list element*/ -#define SAVAGE_LOG_MIN_TEX_REGION_SIZE 16 /* each region 64K, Jiayo Hsu */ - -#endif /* __SAVAGE_SAREA_DEFINES__ */ - -/* drm_tex_region_t define in drm.h */ - -typedef drm_tex_region_t drm_savage_tex_region_t; - -/* Setup registers for 2D, X server - */ -typedef struct { - unsigned int pitch; -} drm_savage_server_regs_t; - - -typedef struct _drm_savage_sarea { - /* The channel for communication of state information to the kernel - * on firing a vertex dma buffer. - */ - unsigned int setup[28]; /* 3D context registers */ - drm_savage_server_regs_t server_state; - - unsigned int dirty; - - unsigned int vertsize; /* vertext size */ - - /* The current cliprects, or a subset thereof. - */ - drm_clip_rect_t boxes[SAVAGE_NR_SAREA_CLIPRECTS]; - unsigned int nbox; - - /* Information about the most recently used 3d drawable. The - * client fills in the req_* fields, the server fills in the - * exported_ fields and puts the cliprects into boxes, above. - * - * The client clears the exported_drawable field before - * clobbering the boxes data. - */ - unsigned int req_drawable; /* the X drawable id */ - unsigned int req_draw_buffer; /* SAVAGE_FRONT or SAVAGE_BACK */ - - unsigned int exported_drawable; - unsigned int exported_index; - unsigned int exported_stamp; - unsigned int exported_buffers; - unsigned int exported_nfront; - unsigned int exported_nback; - int exported_back_x, exported_front_x, exported_w; - int exported_back_y, exported_front_y, exported_h; - drm_clip_rect_t exported_boxes[SAVAGE_NR_SAREA_CLIPRECTS]; - - /* Counters for aging textures and for client-side throttling. - */ - unsigned int status[4]; - - - /* LRU lists for texture memory in agp space and on the card. - */ - drm_tex_region_t texList[SAVAGE_NR_TEX_HEAPS][SAVAGE_NR_TEX_REGIONS+1]; - unsigned int texAge[SAVAGE_NR_TEX_HEAPS]; - - /* Mechanism to validate card state. - */ - int ctxOwner; - unsigned long shadow_status[64];/*too big?*/ - - /*agp offset*/ - unsigned long agp_offset; -} drm_savage_sarea_t,*drm_savage_sarea_ptr; - - - -typedef struct drm_savage_init { - - unsigned long sarea_priv_offset; - - int chipset; - int sgram; - - unsigned int maccess; - - unsigned int fb_cpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - - unsigned int depth_cpp; - unsigned int depth_offset, depth_pitch; - - unsigned int texture_offset[SAVAGE_NR_TEX_HEAPS]; - unsigned int texture_size[SAVAGE_NR_TEX_HEAPS]; - - unsigned long fb_offset; - unsigned long mmio_offset; - unsigned long status_offset; -} drm_savage_init_t; - -typedef struct drm_savage_fullscreen { - enum { - SAVAGE_INIT_FULLSCREEN = 0x01, - SAVAGE_CLEANUP_FULLSCREEN = 0x02 - } func; -} drm_savage_fullscreen_t; - -typedef struct drm_savage_clear { - unsigned int flags; - unsigned int clear_color; - unsigned int clear_depth; - unsigned int color_mask; - unsigned int depth_mask; -} drm_savage_clear_t; - -typedef struct drm_savage_vertex { - int idx; /* buffer to queue */ - int used; /* bytes in use */ - int discard; /* client finished with buffer? */ -} drm_savage_vertex_t; - -typedef struct drm_savage_indices { - int idx; /* buffer to queue */ - unsigned int start; - unsigned int end; - int discard; /* client finished with buffer? */ -} drm_savage_indices_t; - -typedef struct drm_savage_iload { - int idx; - unsigned int dstorg; - unsigned int length; -} drm_savage_iload_t; - -typedef struct _drm_savage_blit { - unsigned int planemask; - unsigned int srcorg; - unsigned int dstorg; - int src_pitch, dst_pitch; - int delta_sx, delta_sy; - int delta_dx, delta_dy; - int height, ydir; /* flip image vertically */ - int source_pitch, dest_pitch; -} drm_savage_blit_t; - -#endif diff --git a/linux/savage_drv.c b/linux/savage_drv.c deleted file mode 100644 index 0c5188741..000000000 --- a/linux/savage_drv.c +++ /dev/null @@ -1,255 +0,0 @@ -/* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include <linux/config.h> -#include "savage.h" -#include "drmP.h" -#include "savage_drm.h" -#include "savage_drv.h" - -#define DRIVER_AUTHOR "John Zhao, S3 Graphics Inc." - -#define DRIVER_NAME "savage" -#define DRIVER_DESC "Savage4 Family" -#define DRIVER_DATE "20011023" - -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 0 -#define DRIVER_PATCHLEVEL 0 - -/* Currently Savage4 not implement DMA */ -/* mark off by Jiayo Hsu, Oct. 23, 2001*/ - - -#if SAVAGE_CMD_DMA /* Check the 3D driver, and we need to fix this anyway */ - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_SAVAGE_ALLOC_CONTINUOUS_MEM)] \ - = {savage_alloc_continuous_mem,1,0},\ - [DRM_IOCTL_NR( DRM_IOCTL_SAVAGE_GET_PHYSICS_ADDRESS)] \ - = {savage_get_physics_address,1,0},\ - [DRM_IOCTL_NR(DRM_IOCTL_SAVAGE_FREE_CONTINUOUS_MEM)] \ - = {savage_free_cont_mem,1,0} - -int savage_alloc_continuous_mem(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_savage_alloc_cont_mem_t cont_mem; - unsigned long size,addr; - void * ret; - int i; - mem_map_t *p; - pgprot_t flags; - - /* add to list */ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_map_t *map; - drm_map_list_t *list; - - if (copy_from_user(&cont_mem,(drm_savage_alloc_cont_mem_t *)arg,sizeof(cont_mem))) - return -EFAULT; - - map = DRM(alloc)( sizeof(*map), DRM_MEM_MAPS ); - if ( !map ) - return -ENOMEM; - - /*check the parameters*/ - if (cont_mem.size <= 0 ) - return -EINVAL; - - size = cont_mem.type * cont_mem.size; - printk("[drm]JTLIsize = %lu\n",size); - - ret = (void *)__get_free_pages(GFP_KERNEL, get_order(size)); - if (ret == NULL) - { - printk("Kalloc error\n"); - return 0; - } - - /*set the reserverd flag so that the remap_page_range can map these page*/ - for(i=0,p=virt_to_page(ret);i< size /PAGE_SIZE; i++,p++) - SetPageReserved(p); - - cont_mem.phyaddress = virt_to_bus(ret); - cont_mem.location = DRM_SAVAGE_MEM_LOCATION_PCI; /* pci only at present*/ - - - /*Map the memory to user space*/ - down_write(¤t->mm->mmap_sem); - addr=do_mmap(NULL,0,size,PROT_READ|PROT_WRITE,MAP_PRIVATE,cont_mem.phyaddress); - if (addr<=0) - return -EFAULT; - pgprot_val(flags)=_PAGE_PRESENT | _PAGE_RW |_PAGE_USER ; - if (remap_page_range(addr,cont_mem.phyaddress,size,flags)) - return -EFAULT; - up_write(¤t->mm->mmap_sem); - - for(i=0,p=virt_to_page(ret);i< size /PAGE_SIZE; i++,p++) - ClearPageReserved(p); - - cont_mem.linear = addr; - - /*map list*/ - map->handle = ret; /* to distinguish with other*/ - map->offset = cont_mem.phyaddress; - map->size = size; - map->mtrr=-1; - /*map-flags,type??*/ - - list = DRM(alloc)(sizeof(*list), DRM_MEM_MAPS); - if(!list) { - DRM(free)(map, sizeof(*map), DRM_MEM_MAPS); - return -EINVAL; - } - memset(list, 0, sizeof(*list)); - list->map = map; - - down(&dev->struct_sem); - list_add(&list->head, &dev->maplist->head); - up(&dev->struct_sem); - - if (copy_to_user((drm_savage_alloc_cont_mem_t *)arg,&cont_mem,sizeof(cont_mem))) - return -EFAULT; - - for(i=0,p=virt_to_page(ret);i< size /PAGE_SIZE; i++,p++) - atomic_set(&p->count,1); - - return 1;/*success*/ -} - -int savage_get_physics_address(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - - drm_savage_get_physcis_address_t req; - unsigned long buf; - pgd_t *pgd; - pmd_t *pmd; - pte_t *pte; - struct mm_struct *mm; - - if (copy_from_user(&req,(drm_savage_get_physcis_address_t *)arg,sizeof(req))) - return -EFAULT; - buf = req.v_address; - - /*What kind of virtual address ?*/ - if (buf >= (unsigned long)high_memory) - mm = &init_mm; - else - mm = current->mm; - -#ifdef LINUX_24 - spin_lock(&mm->page_table_lock); -#endif - - pgd=pgd_offset(mm,buf); - pmd=pmd_offset(pgd,buf); - pte=pte_offset_map(pmd,buf); - - if (!pte_present(*pte)) - return -EFAULT; - - req.p_address = ((pte_val(*pte) &PAGE_MASK) |( buf&(PAGE_SIZE-1))); - - if (copy_to_user((drm_savage_get_physcis_address_t *)arg,&req,sizeof(req))) - return -EFAULT; - return 1; -} - -/*free the continuous memory*/ -int savage_free_cont_mem(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_savage_alloc_cont_mem_t cont_mem; - unsigned long size; - - /*map list */ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_map_t *map; - struct list_head *list; - drm_map_list_t *r_list = NULL; - - if (copy_from_user(&cont_mem,(drm_savage_alloc_cont_mem_t *)arg,sizeof(cont_mem))) - return -EFAULT; - size = cont_mem.type * cont_mem.size; - if (size <= 0) - return -EINVAL; - - /* find the map in the list */ - list_for_each(list,&dev->maplist->head) - { - r_list = (drm_map_list_t *) list; - - if(r_list->map && - r_list->map->offset == cont_mem.phyaddress ) - break; - } - /*find none*/ - if(list == (&dev->maplist->head)) { - up(&dev->struct_sem); - return -EINVAL; - } - map = r_list->map; - list_del(list); - DRM(free)(list, sizeof(*list), DRM_MEM_MAPS); - - /*unmap the user space */ -#ifdef DO_MUNMAP_4_ARGS - if ( do_munmap(current->mm,cont_mem.linear,size,1)!=0) -#else - if ( do_munmap(current->mm,cont_mem.linear,size)!=0) -#endif - return -EFAULT; - /*free the page*/ - free_pages((unsigned long)map->handle, get_order(size)); - - return 1; -} -#else /* SAVAGE_CMD_DMA */ -#define DRIVER_IOCTLS -#endif /* SAVAGE_CMD_DMA */ - -#if 0 - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { mga_dma_buffers, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_INIT)] = { mga_dma_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)] = { mga_dma_flush, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_RESET)] = { mga_dma_reset, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_dma_swap, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_dma_clear, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_dma_vertex, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_dma_indices, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_dma_iload, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_BLIT)] = { mga_dma_blit, 1, 0 }, - - -#endif /* end #if 0 */ - -#include "drm_core.h" - - diff --git a/linux/savage_drv.h b/linux/savage_drv.h deleted file mode 100644 index 755ed2e9b..000000000 --- a/linux/savage_drv.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ -#ifndef __SAVAGE_DRV_H__ -#define __SAVAGE_DRV_H__ - -/* these chip tags should match the ones in the 2D driver in savage_regs.h. */ -enum savage_family { - S3_UNKNOWN = 0, - S3_SAVAGE3D, - S3_SAVAGE_MX, - S3_SAVAGE4, - S3_PROSAVAGE, - S3_TWISTER, - S3_PROSAVAGEDDR, - S3_SUPERSAVAGE, - S3_SAVAGE2000, - S3_LAST -}; - -#define S3_SAVAGE3D_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX)) - -#define S3_SAVAGE4_SERIES(chip) ((chip==S3_SAVAGE4) \ - || (chip==S3_PROSAVAGE) \ - || (chip==S3_TWISTER) \ - || (chip==S3_PROSAVAGEDDR)) - -#define S3_SAVAGE_MOBILE_SERIES(chip) ((chip==S3_SAVAGE_MX) || (chip==S3_SUPERSAVAGE)) - -#define S3_SAVAGE_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE2000)) - -#define S3_MOBILE_TWISTER_SERIES(chip) ((chip==S3_TWISTER) \ - ||(chip==S3_PROSAVAGEDDR)) - -/* flags */ -#define SAVAGE_IS_AGP 1 - -typedef struct drm_savage_private { - drm_savage_sarea_t *sarea_priv; - - enum savage_family chipset; - unsigned flags; - -} drm_savage_private_t; - -#define SAVAGE_FB_SIZE_S3 0x01000000 /* 16MB */ -#define SAVAGE_FB_SIZE_S4 0x02000000 /* 32MB */ -#define SAVAGE_MMIO_SIZE 0x00080000 /* 512kB */ -#define SAVAGE_APERTURE_OFFSET 0x02000000 /* 32MB */ -#define SAVAGE_APERTURE_SIZE 0x05000000 /* 5 tiled surfaces, 16MB each */ - -#endif /* end #ifndef __SAVAGE_DRV_ */ diff --git a/linux/sis_drv.c b/linux/sis_drv.c deleted file mode 100644 index 90e01cdc3..000000000 --- a/linux/sis_drv.c +++ /dev/null @@ -1,35 +0,0 @@ -/* sis.c -- sis driver -*- linux-c -*- - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - */ - -#include <linux/config.h> -#include "sis.h" -#include "drmP.h" -#include "sis_drm.h" -#include "sis_drv.h" - -#include "drm_core.h" - diff --git a/linux/tdfx_drv.c b/linux/tdfx_drv.c deleted file mode 100644 index d13144438..000000000 --- a/linux/tdfx_drv.c +++ /dev/null @@ -1,43 +0,0 @@ -/* tdfx_drv.c -- tdfx driver -*- linux-c -*- - * Created: Thu Oct 7 10:38:32 1999 by faith@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Daryll Strauss <daryll@valinux.com> - * Gareth Hughes <gareth@valinux.com> - */ - -#include <linux/config.h> -#include "tdfx.h" -#include "drmP.h" - -#include "drm_core.h" - -void DRM(driver_register_fns)(drm_device_t *dev) -{ - dev->driver_features = DRIVER_USE_MTRR; -} - diff --git a/shared/drm.h b/shared/drm.h deleted file mode 100644 index b132fe5bf..000000000 --- a/shared/drm.h +++ /dev/null @@ -1,733 +0,0 @@ -/** - * \file drm.h - * Header for the Direct Rendering Manager - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * - * \par Acknowledgments: - * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg. - */ - -/* - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/** - * \mainpage - * - * The Direct Rendering Manager (DRM) is a device-independent kernel-level - * device driver that provides support for the XFree86 Direct Rendering - * Infrastructure (DRI). - * - * The DRM supports the Direct Rendering Infrastructure (DRI) in four major - * ways: - * -# The DRM provides synchronized access to the graphics hardware via - * the use of an optimized two-tiered lock. - * -# The DRM enforces the DRI security policy for access to the graphics - * hardware by only allowing authenticated X11 clients access to - * restricted regions of memory. - * -# The DRM provides a generic DMA engine, complete with multiple - * queues and the ability to detect the need for an OpenGL context - * switch. - * -# The DRM is extensible via the use of small device-specific modules - * that rely extensively on the API exported by the DRM module. - * - */ - -#ifndef _DRM_H_ -#define _DRM_H_ - -#ifndef __user -#define __user -#endif - -#if defined(__linux__) -#include <linux/config.h> -#include <asm/ioctl.h> /* For _IO* macros */ -#define DRM_IOCTL_NR(n) _IOC_NR(n) -#define DRM_IOC_VOID _IOC_NONE -#define DRM_IOC_READ _IOC_READ -#define DRM_IOC_WRITE _IOC_WRITE -#define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE -#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) -#elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) -#if defined(__FreeBSD__) && defined(IN_MODULE) -/* Prevent name collision when including sys/ioccom.h */ -#undef ioctl -#include <sys/ioccom.h> -#define ioctl(a,b,c) xf86ioctl(a,b,c) -#else -#include <sys/ioccom.h> -#endif /* __FreeBSD__ && xf86ioctl */ -#define DRM_IOCTL_NR(n) ((n) & 0xff) -#define DRM_IOC_VOID IOC_VOID -#define DRM_IOC_READ IOC_OUT -#define DRM_IOC_WRITE IOC_IN -#define DRM_IOC_READWRITE IOC_INOUT -#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) -#endif - -#define XFREE86_VERSION(major,minor,patch,snap) \ - ((major << 16) | (minor << 8) | patch) - -#ifndef CONFIG_XFREE86_VERSION -#define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0) -#endif - -#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0) -#define DRM_PROC_DEVICES "/proc/devices" -#define DRM_PROC_MISC "/proc/misc" -#define DRM_PROC_DRM "/proc/drm" -#define DRM_DEV_DRM "/dev/drm" -#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP) -#define DRM_DEV_UID 0 -#define DRM_DEV_GID 0 -#endif - -#if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0) -#ifdef __OpenBSD__ -#define DRM_MAJOR 81 -#endif -#if defined(__linux__) || defined(__NetBSD__) -#define DRM_MAJOR 226 -#endif -#define DRM_MAX_MINOR 255 -#endif -#define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */ -#define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */ -#define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */ -#define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */ - -#define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */ -#define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */ -#define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD) -#define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT) -#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT)) - - -typedef unsigned long drm_handle_t; /**< To mapped regions */ -typedef unsigned int drm_context_t; /**< GLXContext handle */ -typedef unsigned int drm_drawable_t; -typedef unsigned int drm_magic_t; /**< Magic for authentication */ - - -/** - * Cliprect. - * - * \warning If you change this structure, make sure you change - * XF86DRIClipRectRec in the server as well - * - * \note KW: Actually it's illegal to change either for - * backwards-compatibility reasons. - */ -typedef struct drm_clip_rect { - unsigned short x1; - unsigned short y1; - unsigned short x2; - unsigned short y2; -} drm_clip_rect_t; - - -/** - * Texture region, - */ -typedef struct drm_tex_region { - unsigned char next; - unsigned char prev; - unsigned char in_use; - unsigned char padding; - unsigned int age; -} drm_tex_region_t; - -/** - * Hardware lock. - * - * The lock structure is a simple cache-line aligned integer. To avoid - * processor bus contention on a multiprocessor system, there should not be any - * other data stored in the same cache line. - */ -typedef struct drm_hw_lock { - __volatile__ unsigned int lock; /**< lock variable */ - char padding[60]; /**< Pad to cache line */ -} drm_hw_lock_t; - - -/* This is beyond ugly, and only works on GCC. However, it allows me to use - * drm.h in places (i.e., in the X-server) where I can't use size_t. The real - * fix is to use uint32_t instead of size_t, but that fix will break existing - * LP64 (i.e., PowerPC64, SPARC64, IA-64, Alpha, etc.) systems. That *will* - * eventually happen, though. I chose 'unsigned long' to be the fallback type - * because that works on all the platforms I know about. Hopefully, the - * real fix will happen before that bites us. - */ - -#ifdef __SIZE_TYPE__ -# define DRM_SIZE_T __SIZE_TYPE__ -#else -# warning "__SIZE_TYPE__ not defined. Assuming sizeof(size_t) == sizeof(unsigned long)!" -# define DRM_SIZE_T unsigned long -#endif - -/** - * DRM_IOCTL_VERSION ioctl argument type. - * - * \sa drmGetVersion(). - */ -typedef struct drm_version { - int version_major; /**< Major version */ - int version_minor; /**< Minor version */ - int version_patchlevel;/**< Patch level */ - DRM_SIZE_T name_len; /**< Length of name buffer */ - char __user *name; /**< Name of driver */ - DRM_SIZE_T date_len; /**< Length of date buffer */ - char __user *date; /**< User-space buffer to hold date */ - DRM_SIZE_T desc_len; /**< Length of desc buffer */ - char __user *desc; /**< User-space buffer to hold desc */ -} drm_version_t; - - -/** - * DRM_IOCTL_GET_UNIQUE ioctl argument type. - * - * \sa drmGetBusid() and drmSetBusId(). - */ -typedef struct drm_unique { - DRM_SIZE_T unique_len; /**< Length of unique */ - char __user *unique; /**< Unique name for driver instantiation */ -} drm_unique_t; - -#undef DRM_SIZE_T - -typedef struct drm_list { - int count; /**< Length of user-space structures */ - drm_version_t __user *version; -} drm_list_t; - - -typedef struct drm_block { - int unused; -} drm_block_t; - - -/** - * DRM_IOCTL_CONTROL ioctl argument type. - * - * \sa drmCtlInstHandler() and drmCtlUninstHandler(). - */ -typedef struct drm_control { - enum { - DRM_ADD_COMMAND, - DRM_RM_COMMAND, - DRM_INST_HANDLER, - DRM_UNINST_HANDLER - } func; - int irq; -} drm_control_t; - - -/** - * Type of memory to map. - */ -typedef enum drm_map_type { - _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */ - _DRM_REGISTERS = 1, /**< no caching, no core dump */ - _DRM_SHM = 2, /**< shared, cached */ - _DRM_AGP = 3, /**< AGP/GART */ - _DRM_SCATTER_GATHER = 4 /**< Scatter/gather memory for PCI DMA */ -} drm_map_type_t; - - -/** - * Memory mapping flags. - */ -typedef enum drm_map_flags { - _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */ - _DRM_READ_ONLY = 0x02, - _DRM_LOCKED = 0x04, /**< shared, cached, locked */ - _DRM_KERNEL = 0x08, /**< kernel requires access */ - _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */ - _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */ - _DRM_REMOVABLE = 0x40 /**< Removable mapping */ -} drm_map_flags_t; - - -typedef struct drm_ctx_priv_map { - unsigned int ctx_id; /**< Context requesting private mapping */ - void *handle; /**< Handle of map */ -} drm_ctx_priv_map_t; - - -/** - * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls - * argument type. - * - * \sa drmAddMap(). - */ -typedef struct drm_map { - unsigned long offset; /**< Requested physical address (0 for SAREA)*/ - unsigned long size; /**< Requested physical size (bytes) */ - drm_map_type_t type; /**< Type of memory to map */ - drm_map_flags_t flags; /**< Flags */ - void *handle; /**< User-space: "Handle" to pass to mmap() */ - /**< Kernel-space: kernel-virtual address */ - int mtrr; /**< MTRR slot used */ - /* Private data */ -} drm_map_t; - - -/** - * DRM_IOCTL_GET_CLIENT ioctl argument type. - */ -typedef struct drm_client { - int idx; /**< Which client desired? */ - int auth; /**< Is client authenticated? */ - unsigned long pid; /**< Process ID */ - unsigned long uid; /**< User ID */ - unsigned long magic; /**< Magic */ - unsigned long iocs; /**< Ioctl count */ -} drm_client_t; - - -typedef enum { - _DRM_STAT_LOCK, - _DRM_STAT_OPENS, - _DRM_STAT_CLOSES, - _DRM_STAT_IOCTLS, - _DRM_STAT_LOCKS, - _DRM_STAT_UNLOCKS, - _DRM_STAT_VALUE, /**< Generic value */ - _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */ - _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */ - - _DRM_STAT_IRQ, /**< IRQ */ - _DRM_STAT_PRIMARY, /**< Primary DMA bytes */ - _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */ - _DRM_STAT_DMA, /**< DMA */ - _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */ - _DRM_STAT_MISSED /**< Missed DMA opportunity */ - - /* Add to the *END* of the list */ -} drm_stat_type_t; - - -/** - * DRM_IOCTL_GET_STATS ioctl argument type. - */ -typedef struct drm_stats { - unsigned long count; - struct { - unsigned long value; - drm_stat_type_t type; - } data[15]; -} drm_stats_t; - - -/** - * Hardware locking flags. - */ -typedef enum drm_lock_flags { - _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */ - _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */ - _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */ - _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */ - /* These *HALT* flags aren't supported yet - -- they will be used to support the - full-screen DGA-like mode. */ - _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */ - _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */ -} drm_lock_flags_t; - - -/** - * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type. - * - * \sa drmGetLock() and drmUnlock(). - */ -typedef struct drm_lock { - int context; - drm_lock_flags_t flags; -} drm_lock_t; - - -/** - * DMA flags - * - * \warning - * These values \e must match xf86drm.h. - * - * \sa drm_dma. - */ -typedef enum drm_dma_flags { - /* Flags for DMA buffer dispatch */ - _DRM_DMA_BLOCK = 0x01, /**< - * Block until buffer dispatched. - * - * \note The buffer may not yet have - * been processed by the hardware -- - * getting a hardware lock with the - * hardware quiescent will ensure - * that the buffer has been - * processed. - */ - _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */ - _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */ - - /* Flags for DMA buffer request */ - _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */ - _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */ - _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */ -} drm_dma_flags_t; - - -/** - * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type. - * - * \sa drmAddBufs(). - */ -typedef struct drm_buf_desc { - int count; /**< Number of buffers of this size */ - int size; /**< Size in bytes */ - int low_mark; /**< Low water mark */ - int high_mark; /**< High water mark */ - enum { - _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */ - _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */ - _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */ - _DRM_FB_BUFFER = 0x08 /**< Buffer is in frame buffer */ - } flags; - unsigned long agp_start; /**< - * Start address of where the AGP buffers are - * in the AGP aperture - */ -} drm_buf_desc_t; - - -/** - * DRM_IOCTL_INFO_BUFS ioctl argument type. - */ -typedef struct drm_buf_info { - int count; /**< Number of buffers described in list */ - drm_buf_desc_t __user *list; /**< List of buffer descriptions */ -} drm_buf_info_t; - - -/** - * DRM_IOCTL_FREE_BUFS ioctl argument type. - */ -typedef struct drm_buf_free { - int count; - int __user *list; -} drm_buf_free_t; - - -/** - * Buffer information - * - * \sa drm_buf_map. - */ -typedef struct drm_buf_pub { - int idx; /**< Index into the master buffer list */ - int total; /**< Buffer size */ - int used; /**< Amount of buffer in use (for DMA) */ - void __user *address; /**< Address of buffer */ -} drm_buf_pub_t; - - -/** - * DRM_IOCTL_MAP_BUFS ioctl argument type. - */ -typedef struct drm_buf_map { - int count; /**< Length of the buffer list */ - void __user *virtual; /**< Mmap'd area in user-virtual */ - drm_buf_pub_t __user *list; /**< Buffer information */ -} drm_buf_map_t; - - -/** - * DRM_IOCTL_DMA ioctl argument type. - * - * Indices here refer to the offset into the buffer list in drm_buf_get. - * - * \sa drmDMA(). - */ -typedef struct drm_dma { - int context; /**< Context handle */ - int send_count; /**< Number of buffers to send */ - int __user *send_indices; /**< List of handles to buffers */ - int __user *send_sizes; /**< Lengths of data to send */ - drm_dma_flags_t flags; /**< Flags */ - int request_count; /**< Number of buffers requested */ - int request_size; /**< Desired size for buffers */ - int __user *request_indices; /**< Buffer information */ - int __user *request_sizes; - int granted_count; /**< Number of buffers granted */ -} drm_dma_t; - - -typedef enum { - _DRM_CONTEXT_PRESERVED = 0x01, - _DRM_CONTEXT_2DONLY = 0x02 -} drm_ctx_flags_t; - - -/** - * DRM_IOCTL_ADD_CTX ioctl argument type. - * - * \sa drmCreateContext() and drmDestroyContext(). - */ -typedef struct drm_ctx { - drm_context_t handle; - drm_ctx_flags_t flags; -} drm_ctx_t; - - -/** - * DRM_IOCTL_RES_CTX ioctl argument type. - */ -typedef struct drm_ctx_res { - int count; - drm_ctx_t __user *contexts; -} drm_ctx_res_t; - - -/** - * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type. - */ -typedef struct drm_draw { - drm_drawable_t handle; -} drm_draw_t; - - -/** - * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type. - */ -typedef struct drm_auth { - drm_magic_t magic; -} drm_auth_t; - - -/** - * DRM_IOCTL_IRQ_BUSID ioctl argument type. - * - * \sa drmGetInterruptFromBusID(). - */ -typedef struct drm_irq_busid { - int irq; /**< IRQ number */ - int busnum; /**< bus number */ - int devnum; /**< device number */ - int funcnum; /**< function number */ -} drm_irq_busid_t; - - -typedef enum { - _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */ - _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */ - _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking */ -} drm_vblank_seq_type_t; - - -#define _DRM_VBLANK_FLAGS_MASK _DRM_VBLANK_SIGNAL - - -struct drm_wait_vblank_request { - drm_vblank_seq_type_t type; - unsigned int sequence; - unsigned long signal; -}; - - -struct drm_wait_vblank_reply { - drm_vblank_seq_type_t type; - unsigned int sequence; - long tval_sec; - long tval_usec; -}; - - -/** - * DRM_IOCTL_WAIT_VBLANK ioctl argument type. - * - * \sa drmWaitVBlank(). - */ -typedef union drm_wait_vblank { - struct drm_wait_vblank_request request; - struct drm_wait_vblank_reply reply; -} drm_wait_vblank_t; - - -/** - * DRM_IOCTL_AGP_ENABLE ioctl argument type. - * - * \sa drmAgpEnable(). - */ -typedef struct drm_agp_mode { - unsigned long mode; /**< AGP mode */ -} drm_agp_mode_t; - - -/** - * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type. - * - * \sa drmAgpAlloc() and drmAgpFree(). - */ -typedef struct drm_agp_buffer { - unsigned long size; /**< In bytes -- will round to page boundary */ - unsigned long handle; /**< Used for binding / unbinding */ - unsigned long type; /**< Type of memory to allocate */ - unsigned long physical; /**< Physical used by i810 */ -} drm_agp_buffer_t; - - -/** - * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type. - * - * \sa drmAgpBind() and drmAgpUnbind(). - */ -typedef struct drm_agp_binding { - unsigned long handle; /**< From drm_agp_buffer */ - unsigned long offset; /**< In bytes -- will round to page boundary */ -} drm_agp_binding_t; - - -/** - * DRM_IOCTL_AGP_INFO ioctl argument type. - * - * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(), - * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(), - * drmAgpVendorId() and drmAgpDeviceId(). - */ -typedef struct drm_agp_info { - int agp_version_major; - int agp_version_minor; - unsigned long mode; - unsigned long aperture_base; /**< physical address */ - unsigned long aperture_size; /**< bytes */ - unsigned long memory_allowed; /**< bytes */ - unsigned long memory_used; - - /** \name PCI information */ - /*@{*/ - unsigned short id_vendor; - unsigned short id_device; - /*@}*/ -} drm_agp_info_t; - - -/** - * DRM_IOCTL_SG_ALLOC ioctl argument type. - */ -typedef struct drm_scatter_gather { - unsigned long size; /**< In bytes -- will round to page boundary */ - unsigned long handle; /**< Used for mapping / unmapping */ -} drm_scatter_gather_t; - -/** - * DRM_IOCTL_SET_VERSION ioctl argument type. - */ -typedef struct drm_set_version { - int drm_di_major; - int drm_di_minor; - int drm_dd_major; - int drm_dd_minor; -} drm_set_version_t; - - -/** - * \name Ioctls Definitions - */ -/*@{*/ - -#define DRM_IOCTL_BASE 'd' -#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) -#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) -#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) -#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type) - -#define DRM_IOCTL_VERSION DRM_IOWR(0x00, drm_version_t) -#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t) -#define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, drm_auth_t) -#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, drm_irq_busid_t) -#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, drm_map_t) -#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, drm_client_t) -#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, drm_stats_t) -#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, drm_set_version_t) - -#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t) -#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t) -#define DRM_IOCTL_BLOCK DRM_IOWR(0x12, drm_block_t) -#define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, drm_block_t) -#define DRM_IOCTL_CONTROL DRM_IOW( 0x14, drm_control_t) -#define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, drm_map_t) -#define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, drm_buf_desc_t) -#define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, drm_buf_desc_t) -#define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, drm_buf_info_t) -#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, drm_buf_map_t) -#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, drm_buf_free_t) - -#define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, drm_map_t) - -#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, drm_ctx_priv_map_t) -#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, drm_ctx_priv_map_t) - -#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, drm_ctx_t) -#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, drm_ctx_t) -#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, drm_ctx_t) -#define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, drm_ctx_t) -#define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, drm_ctx_t) -#define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, drm_ctx_t) -#define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, drm_ctx_res_t) -#define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, drm_draw_t) -#define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, drm_draw_t) -#define DRM_IOCTL_DMA DRM_IOWR(0x29, drm_dma_t) -#define DRM_IOCTL_LOCK DRM_IOW( 0x2a, drm_lock_t) -#define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, drm_lock_t) -#define DRM_IOCTL_FINISH DRM_IOW( 0x2c, drm_lock_t) - -#define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30) -#define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31) -#define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, drm_agp_mode_t) -#define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, drm_agp_info_t) -#define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, drm_agp_buffer_t) -#define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, drm_agp_buffer_t) -#define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, drm_agp_binding_t) -#define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, drm_agp_binding_t) - -#define DRM_IOCTL_SG_ALLOC DRM_IOW( 0x38, drm_scatter_gather_t) -#define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, drm_scatter_gather_t) - -#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, drm_wait_vblank_t) - -/*@}*/ - - -/** - * Device specific ioctls should only be in their respective headers - * The device specific ioctl range is from 0x40 to 0x79. - * - * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and - * drmCommandReadWrite(). - */ -#define DRM_COMMAND_BASE 0x40 - -#endif diff --git a/shared/drm_pciids.txt b/shared/drm_pciids.txt deleted file mode 100644 index e03d71b6b..000000000 --- a/shared/drm_pciids.txt +++ /dev/null @@ -1,211 +0,0 @@ -[radeon] -0x1002 0x4136 CHIP_RS100|CHIP_IS_IGP "ATI Radeon RS100 IGP 320M" -0x1002 0x4137 CHIP_RS200|CHIP_IS_IGP "ATI Radeon RS200 IGP" -0x1002 0x4144 CHIP_R300 "ATI Radeon AD 9500 Pro" -0x1002 0x4145 CHIP_R300 "ATI Radeon AE 9700 Pro" -0x1002 0x4146 CHIP_R300 "ATI Radeon AF 9700 Pro" -0x1002 0x4147 CHIP_R300 "ATI FireGL AG Z1/X1" -0x1002 0x4150 CHIP_RV350 "ATI Radeon AP 9600" -0x1002 0x4151 CHIP_RV350 "ATI Radeon AQ 9600" -0x1002 0x4152 CHIP_RV350 "ATI Radeon AR 9600" -0x1002 0x4153 CHIP_RV350 "ATI Radeon AS 9600 AS" -0x1002 0x4154 CHIP_RV350 "ATI FireGL AT T2" -0x1002 0x4156 CHIP_RV350 "ATI FireGL AV T2" -0x1002 0x4237 CHIP_RS250|CHIP_IS_IGP "ATI Radeon RS250 IGP" -0x1002 0x4242 CHIP_R200 "ATI Radeon BB R200 AIW 8500DV" -0x1002 0x4243 CHIP_R200 "ATI Radeon BC R200" -0x1002 0x4336 CHIP_RS100|CHIP_IS_IGP|CHIP_IS_MOBILITY "ATI Radeon RS100 Mobility U1" -0x1002 0x4337 CHIP_RS200|CHIP_IS_IGP|CHIP_IS_MOBILITY "ATI Radeon RS200 Mobility IGP 340M" -0x1002 0x4437 CHIP_RS250|CHIP_IS_IGP|CHIP_IS_MOBILITY "ATI Radeon RS250 Mobility IGP" -0x1002 0x4964 CHIP_R250 "ATI Radeon Id R250 9000" -0x1002 0x4965 CHIP_R250 "ATI Radeon Ie R250 9000" -0x1002 0x4966 CHIP_R250 "ATI Radeon If R250 9000" -0x1002 0x4967 CHIP_R250 "ATI Radeon Ig R250 9000" -0x1002 0x4C57 CHIP_RV200|CHIP_IS_MOBILITY "ATI Radeon LW RV200 Mobility 7500 M7" -0x1002 0x4C58 CHIP_RV200|CHIP_IS_MOBILITY "ATI Radeon LX RV200 Mobility FireGL 7800 M7" -0x1002 0x4C59 CHIP_RV100|CHIP_IS_MOBILITY "ATI Radeon LY RV100 Mobility M6" -0x1002 0x4C5A CHIP_RV100|CHIP_IS_MOBILITY "ATI Radeon LZ RV100 Mobility M6" -0x1002 0x4C64 CHIP_R250|CHIP_IS_MOBILITY "ATI Radeon Ld R250 Mobility 9000 M9" -0x1002 0x4C65 CHIP_R250|CHIP_IS_MOBILITY "ATI Radeon Le R250 Mobility 9000 M9" -0x1002 0x4C66 CHIP_R250|CHIP_IS_MOBILITY "ATI Radeon Lf R250 Mobility 9000 M9" -0x1002 0x4C67 CHIP_R250|CHIP_IS_MOBILITY "ATI Radeon Lg R250 Mobility 9000 M9" -0x1002 0x4E50 CHIP_RV350|CHIP_IS_MOBILITY "ATI Radeon RV300 Mobility 9600 M10" -0x1002 0x5144 CHIP_R100|CHIP_SINGLE_CRTC "ATI Radeon QD R100" -0x1002 0x5145 CHIP_R100|CHIP_SINGLE_CRTC "ATI Radeon QE R100" -0x1002 0x5146 CHIP_R100|CHIP_SINGLE_CRTC "ATI Radeon QF R100" -0x1002 0x5147 CHIP_R100|CHIP_SINGLE_CRTC "ATI Radeon QG R100" -0x1002 0x5148 CHIP_R200 "ATI Radeon QH R200 8500" -0x1002 0x5149 CHIP_R200 "ATI Radeon QI R200" -0x1002 0x514A CHIP_R200 "ATI Radeon QJ R200" -0x1002 0x514B CHIP_R200 "ATI Radeon QK R200" -0x1002 0x514C CHIP_R200 "ATI Radeon QL R200 8500 LE" -0x1002 0x514D CHIP_R200 "ATI Radeon QM R200 9100" -0x1002 0x514E CHIP_R200 "ATI Radeon QN R200 8500 LE" -0x1002 0x514F CHIP_R200 "ATI Radeon QO R200 8500 LE" -0x1002 0x5157 CHIP_RV200 "ATI Radeon QW RV200 7500" -0x1002 0x5158 CHIP_RV200 "ATI Radeon QX RV200 7500" -0x1002 0x5159 CHIP_RV100 "ATI Radeon QY RV100 7000/VE" -0x1002 0x515A CHIP_RV100 "ATI Radeon QZ RV100 7000/VE" -0x1002 0x515E CHIP_RV100 "ATI ES1000 RN50" -0x1002 0x5168 CHIP_R200 "ATI Radeon Qh R200" -0x1002 0x5169 CHIP_R200 "ATI Radeon Qi R200" -0x1002 0x516A CHIP_R200 "ATI Radeon Qj R200" -0x1002 0x516B CHIP_R200 "ATI Radeon Qk R200" -0x1002 0x516C CHIP_R200 "ATI Radeon Ql R200" -0x1002 0x5834 CHIP_RS300|CHIP_IS_IGP "ATI Radeon RS300 IGP" -0x1002 0x5835 CHIP_RS300|CHIP_IS_IGP|CHIP_IS_MOBILITY "ATI Radeon RS300 Mobility IGP" -0x1002 0x5836 CHIP_RS300|CHIP_IS_IGP "ATI Radeon RS300 IGP" -0x1002 0x5837 CHIP_RS300|CHIP_IS_IGP "ATI Radeon RS300 IGP" -0x1002 0x5960 CHIP_RV280 "ATI Radeon RV280 9200" -0x1002 0x5961 CHIP_RV280 "ATI Radeon RV280 9200 SE" -0x1002 0x5962 CHIP_RV280 "ATI Radeon RV280 9200" -0x1002 0x5963 CHIP_RV280 "ATI Radeon RV280 9200" -0x1002 0x5964 CHIP_RV280 "ATI Radeon RV280 9200 SE" -0x1002 0x5968 CHIP_RV280 "ATI Radeon RV280 9200" -0x1002 0x5969 CHIP_RV100 "ATI ES1000 RN50" -0x1002 0x596A CHIP_RV280 "ATI Radeon RV280 9200" -0x1002 0x596B CHIP_RV280 "ATI Radeon RV280 9200" -0x1002 0x5c61 CHIP_RV280|CHIP_IS_MOBILITY "ATI Radeon RV280 Mobility" -0x1002 0x5c62 CHIP_RV280 "ATI Radeon RV280" -0x1002 0x5c63 CHIP_RV280|CHIP_IS_MOBILITY "ATI Radeon RV280 Mobility" -0x1002 0x5c64 CHIP_RV280 "ATI Radeon RV280" - -[r128] -0x1002 0x4c45 0 "ATI Rage 128 Mobility LE (PCI)" -0x1002 0x4c46 0 "ATI Rage 128 Mobility LF (AGP)" -0x1002 0x4d46 0 "ATI Rage 128 Mobility MF (AGP)" -0x1002 0x4d4c 0 "ATI Rage 128 Mobility ML (AGP)" -0x1002 0x5041 0 "ATI Rage 128 Pro PA (PCI)" -0x1002 0x5042 0 "ATI Rage 128 Pro PB (AGP)" -0x1002 0x5043 0 "ATI Rage 128 Pro PC (AGP)" -0x1002 0x5044 0 "ATI Rage 128 Pro PD (PCI)" -0x1002 0x5045 0 "ATI Rage 128 Pro PE (AGP)" -0x1002 0x5046 0 "ATI Rage 128 Pro PF (AGP)" -0x1002 0x5047 0 "ATI Rage 128 Pro PG (PCI)" -0x1002 0x5048 0 "ATI Rage 128 Pro PH (AGP)" -0x1002 0x5049 0 "ATI Rage 128 Pro PI (AGP)" -0x1002 0x504A 0 "ATI Rage 128 Pro PJ (PCI)" -0x1002 0x504B 0 "ATI Rage 128 Pro PK (AGP)" -0x1002 0x504C 0 "ATI Rage 128 Pro PL (AGP)" -0x1002 0x504D 0 "ATI Rage 128 Pro PM (PCI)" -0x1002 0x504E 0 "ATI Rage 128 Pro PN (AGP)" -0x1002 0x504F 0 "ATI Rage 128 Pro PO (AGP)" -0x1002 0x5050 0 "ATI Rage 128 Pro PP (PCI)" -0x1002 0x5051 0 "ATI Rage 128 Pro PQ (AGP)" -0x1002 0x5052 0 "ATI Rage 128 Pro PR (PCI)" -0x1002 0x5053 0 "ATI Rage 128 Pro PS (PCI)" -0x1002 0x5054 0 "ATI Rage 128 Pro PT (AGP)" -0x1002 0x5055 0 "ATI Rage 128 Pro PU (AGP)" -0x1002 0x5056 0 "ATI Rage 128 Pro PV (PCI)" -0x1002 0x5057 0 "ATI Rage 128 Pro PW (AGP)" -0x1002 0x5058 0 "ATI Rage 128 Pro PX (AGP)" -0x1002 0x5245 0 "ATI Rage 128 RE (PCI)" -0x1002 0x5246 0 "ATI Rage 128 RF (AGP)" -0x1002 0x5247 0 "ATI Rage 128 RG (AGP)" -0x1002 0x524b 0 "ATI Rage 128 RK (PCI)" -0x1002 0x524c 0 "ATI Rage 128 RL (AGP)" -0x1002 0x534d 0 "ATI Rage 128 SM (AGP)" -0x1002 0x5446 0 "ATI Rage 128 Pro Ultra TF (AGP)" -0x1002 0x544C 0 "ATI Rage 128 Pro Ultra TL (AGP)" -0x1002 0x5452 0 "ATI Rage 128 Pro Ultra TR (AGP)" - -[mga] -0x102b 0x0521 0 "Matrox G200 (AGP)" -0x102b 0x0525 0 "Matrox G400/G450 (AGP)" -0x102b 0x2527 0 "Matrox G550 (AGP)" - -[mach64] -0x1002 0x4749 0 "3D Rage Pro" -0x1002 0x4750 0 "3D Rage Pro 215GP" -0x1002 0x4751 0 "3D Rage Pro 215GQ" -0x1002 0x4742 0 "3D Rage Pro AGP 1X/2X" -0x1002 0x4744 0 "3D Rage Pro AGP 1X" -0x1002 0x4c49 0 "3D Rage LT Pro" -0x1002 0x4c50 0 "3D Rage LT Pro" -0x1002 0x4c51 0 "3D Rage LT Pro" -0x1002 0x4c42 0 "3D Rage LT Pro AGP-133" -0x1002 0x4c44 0 "3D Rage LT Pro AGP-66" -0x1002 0x474c 0 "Rage XC" -0x1002 0x474f 0 "Rage XL" -0x1002 0x4752 0 "Rage XL" -0x1002 0x4753 0 "Rage XC" -0x1002 0x474d 0 "Rage XL AGP 2X" -0x1002 0x474e 0 "Rage XC AGP" -0x1002 0x4c52 0 "Rage Mobility P/M" -0x1002 0x4c53 0 "Rage Mobility L" -0x1002 0x4c4d 0 "Rage Mobility P/M AGP 2X" -0x1002 0x4c4e 0 "Rage Mobility L AGP 2X" - -[sisdrv] -0x1039 0x0300 0 "SiS 300/305" -0x1039 0x5300 0 "SiS 540" -0x1039 0x6300 0 "SiS 630" -0x1039 0x7300 0 "SiS 730" - -[tdfx] -0x121a 0x0003 0 "3dfx Voodoo Banshee" -0x121a 0x0004 0 "3dfx Voodoo3 2000" -0x121a 0x0005 0 "3dfx Voodoo3 3000" -0x121a 0x0007 0 "3dfx Voodoo4 4500" -0x121a 0x0009 0 "3dfx Voodoo5 5500" -0x121a 0x000b 0 "3dfx Voodoo4 4200" - -[viadrv] -0x1106 0x3022 0 "VIA CLE266 3022" -0x1106 0x3118 0 "VIA CN400 / PM8X0" -0x1106 0x3122 0 "VIA CLE266" -0x1106 0x7205 0 "VIA KM400" -0x1106 0x3108 0 "VIA K8M800" - -[i810] -0x8086 0x7121 0 "Intel i810 GMCH" -0x8086 0x7123 0 "Intel i810-DC100 GMCH" -0x8086 0x7125 0 "Intel i810E GMCH" -0x8086 0x1132 0 "Intel i815 GMCH" - -[i830] -0x8086 0x3577 0 "Intel i830M GMCH" -0x8086 0x2562 0 "Intel i845G GMCH" -0x8086 0x3582 0 "Intel i852GM/i855GM GMCH" -0x8086 0x2572 0 "Intel i865G GMCH" - -[gamma] -0x3d3d 0x0008 0 "3DLabs GLINT Gamma G1" - -[savage] -0x5333 0x8a20 S3_SAVAGE3D "Savage 3D" -0x5333 0x8a21 S3_SAVAGE3D "Savage 3D/MV" -0x5333 0x8a22 S3_SAVAGE4 "Savage4" -0x5333 0x8a23 S3_SAVAGE4 "Savage4" -0x5333 0x8c10 S3_SAVAGE_MX "Savage/MX-MV" -0x5333 0x8c11 S3_SAVAGE_MX "Savage/MX" -0x5333 0x8c12 S3_SAVAGE_MX "Savage/IX-MV" -0x5333 0x8c13 S3_SAVAGE_MX "Savage/IX" -0x5333 0x8c22 S3_SUPERSAVAGE "SuperSavage MX/128" -0x5333 0x8c24 S3_SUPERSAVAGE "SuperSavage MX/64" -0x5333 0x8c26 S3_SUPERSAVAGE "SuperSavage MX/64C" -0x5333 0x8c2a S3_SUPERSAVAGE "SuperSavage IX/128 SDR" -0x5333 0x8c2b S3_SUPERSAVAGE "SuperSavage IX/128 DDR" -0x5333 0x8c2c S3_SUPERSAVAGE "SuperSavage IX/64 SDR" -0x5333 0x8c2d S3_SUPERSAVAGE "SuperSavage IX/64 DDR" -0x5333 0x8c2e S3_SUPERSAVAGE "SuperSavage IX/C SDR" -0x5333 0x8c2f S3_SUPERSAVAGE "SuperSavage IX/C DDR" -0x5333 0x8a25 S3_PROSAVAGE "ProSavage PM133" -0x5333 0x8a26 S3_PROSAVAGE "ProSavage KM133" -0x5333 0x8d01 S3_TWISTER "ProSavage Twister PN133" -0x5333 0x8d02 S3_TWISTER "ProSavage Twister KN133" -0x5333 0x8d03 S3_PROSAVAGEDDR "ProSavage DDR" -0x5333 0x8d04 S3_PROSAVAGEDDR "ProSavage DDR-K" - -[ffb] - -[i915] -0x8086 0x3577 0 "Intel i830M GMCH" -0x8086 0x2562 0 "Intel i845G GMCH" -0x8086 0x3582 0 "Intel i852GM/i855GM GMCH" -0x8086 0x2572 0 "Intel i865G GMCH" -0x8086 0x2582 0 "Intel i915G" -0x8086 0x2592 0 "Intel i915GM" -0x8086 0x2772 0 "Intel i945G" - - diff --git a/shared/drm_sarea.h b/shared/drm_sarea.h deleted file mode 100644 index 40f7d5f19..000000000 --- a/shared/drm_sarea.h +++ /dev/null @@ -1,78 +0,0 @@ -/** - * \file drm_sarea.h - * \brief SAREA definitions - * - * \author Michel D�zer <michel@daenzer.net> - */ - -/* - * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _DRM_SAREA_H_ -#define _DRM_SAREA_H_ - -#include "drm.h" - -/* SAREA area needs to be at least a page */ -#if defined(__alpha__) -#define SAREA_MAX 0x2000 -#elif defined(__ia64__) -#define SAREA_MAX 0x10000 /* 64kB */ -#else -/* Intel 830M driver needs at least 8k SAREA */ -#define SAREA_MAX 0x2000 -#endif - -/** Maximum number of drawables in the SAREA */ -#define SAREA_MAX_DRAWABLES 256 - -#define SAREA_DRAWABLE_CLAIMED_ENTRY 0x80000000 - -/** SAREA drawable */ -typedef struct drm_sarea_drawable { - unsigned int stamp; - unsigned int flags; -} drm_sarea_drawable_t; - -/** SAREA frame */ -typedef struct drm_sarea_frame { - unsigned int x; - unsigned int y; - unsigned int width; - unsigned int height; - unsigned int fullscreen; -} drm_sarea_frame_t; - -/** SAREA */ -typedef struct drm_sarea { - /** first thing is always the DRM locking structure */ - drm_hw_lock_t lock; - /** \todo Use readers/writer lock for drm_sarea::drawable_lock */ - drm_hw_lock_t drawable_lock; - drm_sarea_drawable_t drawableTable[SAREA_MAX_DRAWABLES]; /**< drawables */ - drm_sarea_frame_t frame; /**< frame */ - drm_context_t dummy_context; -} drm_sarea_t; - -#endif /* _DRM_SAREA_H_ */ diff --git a/shared/i915.h b/shared/i915.h deleted file mode 100644 index 360665ae9..000000000 --- a/shared/i915.h +++ /dev/null @@ -1,49 +0,0 @@ -/* i915.h -- Intel I915 DRM template customization -*- linux-c -*- - */ -/************************************************************************** - * - * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - **************************************************************************/ - -#ifndef __I915_H__ -#define __I915_H__ - -/* This remains constant for all DRM template files. - */ -#define DRM(x) i915_##x - -/* General customization: - */ - -#define DRIVER_AUTHOR "Tungsten Graphics, Inc." - -#define DRIVER_NAME "i915" -#define DRIVER_DESC "Intel Graphics" -#define DRIVER_DATE "20041217" - -/* Interface history: - * - * 1.1: Original. - * 1.2: Add Power Management - */ -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 2 -#define DRIVER_PATCHLEVEL 0 - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_I915_INIT)] = { i915_dma_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I915_FLUSH)] = { i915_flush_ioctl, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I915_FLIP)] = { i915_flip_bufs, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I915_BATCHBUFFER)] = { i915_batchbuffer, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I915_IRQ_EMIT)] = { i915_irq_emit, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I915_IRQ_WAIT)] = { i915_irq_wait, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I915_GETPARAM)] = { i915_getparam, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I915_SETPARAM)] = { i915_setparam, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I915_ALLOC)] = { i915_mem_alloc, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I915_FREE)] = { i915_mem_free, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I915_INIT_HEAP)] = { i915_mem_init_heap, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I915_CMDBUFFER)] = { i915_cmdbuffer, 1, 0 } - -#endif diff --git a/shared/i915_dma.c b/shared/i915_dma.c deleted file mode 100644 index 14f7fd6eb..000000000 --- a/shared/i915_dma.c +++ /dev/null @@ -1,769 +0,0 @@ -/* i915_dma.c -- DMA support for the I915 -*- linux-c -*- - */ -/************************************************************************** - * - * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - **************************************************************************/ - -#include "i915.h" -#include "drmP.h" -#include "drm.h" -#include "i915_drm.h" -#include "i915_drv.h" - -static inline void i915_print_status_page(drm_device_t * dev) -{ - drm_i915_private_t *dev_priv = dev->dev_private; - u32 *temp = dev_priv->hw_status_page; - - if (!temp) { - DRM_DEBUG("no status page\n"); - return; - } - - DRM_DEBUG("hw_status: Interrupt Status : %x\n", temp[0]); - DRM_DEBUG("hw_status: LpRing Head ptr : %x\n", temp[1]); - DRM_DEBUG("hw_status: IRing Head ptr : %x\n", temp[2]); - DRM_DEBUG("hw_status: Reserved : %x\n", temp[3]); - DRM_DEBUG("hw_status: Driver Counter : %d\n", temp[5]); - -} - -/* Really want an OS-independent resettable timer. Would like to have - * this loop run for (eg) 3 sec, but have the timer reset every time - * the head pointer changes, so that EBUSY only happens if the ring - * actually stalls for (eg) 3 seconds. - */ -int i915_wait_ring(drm_device_t * dev, int n, const char *caller) -{ - drm_i915_private_t *dev_priv = dev->dev_private; - drm_i915_ring_buffer_t *ring = &(dev_priv->ring); - u32 last_head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR; - int i; - - for (i = 0; i < 10000; i++) { - ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR; - ring->space = ring->head - (ring->tail + 8); - if (ring->space < 0) - ring->space += ring->Size; - if (ring->space >= n) - return 0; - - dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT; - - if (ring->head != last_head) - i = 0; - - last_head = ring->head; - } - - return DRM_ERR(EBUSY); -} - -void i915_kernel_lost_context(drm_device_t * dev) -{ - drm_i915_private_t *dev_priv = dev->dev_private; - drm_i915_ring_buffer_t *ring = &(dev_priv->ring); - - ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR; - ring->tail = I915_READ(LP_RING + RING_TAIL) & TAIL_ADDR; - ring->space = ring->head - (ring->tail + 8); - if (ring->space < 0) - ring->space += ring->Size; - - if (ring->head == ring->tail) - dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY; -} - -int i915_dma_cleanup(drm_device_t * dev) -{ - /* Make sure interrupts are disabled here because the uninstall ioctl - * may not have been called from userspace and after dev_private - * is freed, it's too late. - */ - if (dev->irq) - DRM(irq_uninstall) (dev); - - if (dev->dev_private) { - drm_i915_private_t *dev_priv = - (drm_i915_private_t *) dev->dev_private; - - if (dev_priv->ring.virtual_start) { - drm_core_ioremapfree(&dev_priv->ring.map, dev); - } - - if (dev_priv->hw_status_page) { -#ifdef __FreeBSD__ -#if __FreeBSD_version > 500000 - contigfree(dev_priv->hw_status_page, PAGE_SIZE, M_DRM); -#endif -#else - pci_free_consistent(dev->pdev, PAGE_SIZE, - dev_priv->hw_status_page, - dev_priv->dma_status_page); -#endif - /* Need to rewrite hardware status page */ - I915_WRITE(0x02080, 0x1ffff000); - } - - DRM(free) (dev->dev_private, sizeof(drm_i915_private_t), - DRM_MEM_DRIVER); - - dev->dev_private = NULL; - } - - return 0; -} - -static int i915_initialize(drm_device_t * dev, - drm_i915_private_t * dev_priv, - drm_i915_init_t * init) -{ - memset(dev_priv, 0, sizeof(drm_i915_private_t)); - - DRM_GETSAREA(); - if (!dev_priv->sarea) { - DRM_ERROR("can not find sarea!\n"); - dev->dev_private = (void *)dev_priv; - i915_dma_cleanup(dev); - return DRM_ERR(EINVAL); - } - - dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset); - if (!dev_priv->mmio_map) { - dev->dev_private = (void *)dev_priv; - i915_dma_cleanup(dev); - DRM_ERROR("can not find mmio map!\n"); - return DRM_ERR(EINVAL); - } - - dev_priv->sarea_priv = (drm_i915_sarea_t *) - ((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset); - - dev_priv->ring.Start = init->ring_start; - dev_priv->ring.End = init->ring_end; - dev_priv->ring.Size = init->ring_size; - dev_priv->ring.tail_mask = dev_priv->ring.Size - 1; - - dev_priv->ring.map.offset = init->ring_start; - dev_priv->ring.map.size = init->ring_size; - dev_priv->ring.map.type = 0; - dev_priv->ring.map.flags = 0; - dev_priv->ring.map.mtrr = 0; - - drm_core_ioremap(&dev_priv->ring.map, dev); - - if (dev_priv->ring.map.handle == NULL) { - dev->dev_private = (void *)dev_priv; - i915_dma_cleanup(dev); - DRM_ERROR("can not ioremap virtual address for" - " ring buffer\n"); - return DRM_ERR(ENOMEM); - } - - dev_priv->ring.virtual_start = dev_priv->ring.map.handle; - - dev_priv->back_offset = init->back_offset; - dev_priv->front_offset = init->front_offset; - dev_priv->current_page = 0; - dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; - - /* We are using separate values as placeholders for mechanisms for - * private backbuffer/depthbuffer usage. - */ - dev_priv->use_mi_batchbuffer_start = 0; - - /* Allow hardware batchbuffers unless told otherwise. - */ - dev_priv->allow_batchbuffer = 1; - - /* Program Hardware Status Page */ -#ifdef __FreeBSD__ - dev_priv->hw_status_page = - contigmalloc(PAGE_SIZE, DRM(M_DRM), M_NOWAIT, 0ul, 0, 0, 0); - dev_priv->dma_status_page = vtophys(dev_priv->hw_status_page); -#else - dev_priv->hw_status_page = - pci_alloc_consistent(dev->pdev, PAGE_SIZE, - &dev_priv->dma_status_page); -#endif - - if (!dev_priv->hw_status_page) { - dev->dev_private = (void *)dev_priv; - i915_dma_cleanup(dev); - DRM_ERROR("Can not allocate hardware status page\n"); - return DRM_ERR(ENOMEM); - } - memset(dev_priv->hw_status_page, 0, PAGE_SIZE); - DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page); - - I915_WRITE(0x02080, dev_priv->dma_status_page); - DRM_DEBUG("Enabled hardware status page\n"); - - dev->dev_private = (void *)dev_priv; - - return 0; -} - -static int i915_dma_resume(drm_device_t * dev) -{ - drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; - - DRM_DEBUG("%s\n", __FUNCTION__); - - if (!dev_priv->sarea) { - DRM_ERROR("can not find sarea!\n"); - return DRM_ERR(EINVAL); - } - - if (!dev_priv->mmio_map) { - DRM_ERROR("can not find mmio map!\n"); - return DRM_ERR(EINVAL); - } - - if (dev_priv->ring.map.handle == NULL) { - DRM_ERROR("can not ioremap virtual address for" - " ring buffer\n"); - return DRM_ERR(ENOMEM); - } - - /* Program Hardware Status Page */ - if (!dev_priv->hw_status_page) { - DRM_ERROR("Can not find hardware status page\n"); - return DRM_ERR(EINVAL); - } - DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page); - - I915_WRITE(0x02080, dev_priv->dma_status_page); - DRM_DEBUG("Enabled hardware status page\n"); - - return 0; -} - -int i915_dma_init(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - drm_i915_private_t *dev_priv; - drm_i915_init_t init; - int retcode = 0; - - DRM_COPY_FROM_USER_IOCTL(init, (drm_i915_init_t __user *) data, - sizeof(init)); - - switch (init.func) { - case I915_INIT_DMA: - dev_priv = DRM(alloc) (sizeof(drm_i915_private_t), - DRM_MEM_DRIVER); - if (dev_priv == NULL) - return DRM_ERR(ENOMEM); - retcode = i915_initialize(dev, dev_priv, &init); - break; - case I915_CLEANUP_DMA: - retcode = i915_dma_cleanup(dev); - break; - case I915_RESUME_DMA: - retcode = i915_dma_resume(dev); - break; - default: - retcode = -EINVAL; - break; - } - - return retcode; -} - -/* Implement basically the same security restrictions as hardware does - * for MI_BATCH_NON_SECURE. These can be made stricter at any time. - * - * Most of the calculations below involve calculating the size of a - * particular instruction. It's important to get the size right as - * that tells us where the next instruction to check is. Any illegal - * instruction detected will be given a size of zero, which is a - * signal to abort the rest of the buffer. - */ -static int do_validate_cmd(int cmd) -{ - switch (((cmd >> 29) & 0x7)) { - case 0x0: - switch ((cmd >> 23) & 0x3f) { - case 0x0: - return 1; /* MI_NOOP */ - case 0x4: - return 1; /* MI_FLUSH */ - default: - return 0; /* disallow everything else */ - } - break; - case 0x1: - return 0; /* reserved */ - case 0x2: - return (cmd & 0xff) + 2; /* 2d commands */ - case 0x3: - if (((cmd >> 24) & 0x1f) <= 0x18) - return 1; - - switch ((cmd >> 24) & 0x1f) { - case 0x1c: - return 1; - case 0x1d: - switch ((cmd >> 16) & 0xff) { - case 0x3: - return (cmd & 0x1f) + 2; - case 0x4: - return (cmd & 0xf) + 2; - default: - return (cmd & 0xffff) + 2; - } - case 0x1e: - if (cmd & (1 << 23)) - return (cmd & 0xffff) + 1; - else - return 1; - case 0x1f: - if ((cmd & (1 << 23)) == 0) /* inline vertices */ - return (cmd & 0x1ffff) + 2; - else if (cmd & (1 << 17)) /* indirect random */ - if ((cmd & 0xffff) == 0) - return 0; /* unknown length, too hard */ - else - return (((cmd & 0xffff) + 1) / 2) + 1; - else - return 2; /* indirect sequential */ - default: - return 0; - } - default: - return 0; - } - - return 0; -} - -static int validate_cmd(int cmd) -{ - int ret = do_validate_cmd(cmd); - -/* printk("validate_cmd( %x ): %d\n", cmd, ret); */ - - return ret; -} - -static int i915_emit_cmds(drm_device_t * dev, int __user * buffer, int dwords) -{ - drm_i915_private_t *dev_priv = dev->dev_private; - int i; - RING_LOCALS; - - for (i = 0; i < dwords;) { - int cmd, sz; - - if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd))) - return DRM_ERR(EINVAL); - -/* printk("%d/%d ", i, dwords); */ - - if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords) - return DRM_ERR(EINVAL); - - BEGIN_LP_RING(sz); - OUT_RING(cmd); - - while (++i, --sz) { - if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], - sizeof(cmd))) { - return DRM_ERR(EINVAL); - } - OUT_RING(cmd); - } - ADVANCE_LP_RING(); - } - - return 0; -} - -static int i915_emit_box(drm_device_t * dev, - drm_clip_rect_t __user * boxes, - int i, int DR1, int DR4) -{ - drm_i915_private_t *dev_priv = dev->dev_private; - drm_clip_rect_t box; - RING_LOCALS; - - if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) { - return EFAULT; - } - - if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) { - DRM_ERROR("Bad box %d,%d..%d,%d\n", - box.x1, box.y1, box.x2, box.y2); - return DRM_ERR(EINVAL); - } - - BEGIN_LP_RING(6); - OUT_RING(GFX_OP_DRAWRECT_INFO); - OUT_RING(DR1); - OUT_RING((box.x1 & 0xffff) | (box.y1 << 16)); - OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16)); - OUT_RING(DR4); - OUT_RING(0); - ADVANCE_LP_RING(); - - return 0; -} - -static int i915_dispatch_cmdbuffer(drm_device_t * dev, - drm_i915_cmdbuffer_t * cmd) -{ - int nbox = cmd->num_cliprects; - int i = 0, count, ret; - - if (cmd->sz & 0x3) { - DRM_ERROR("alignment"); - return DRM_ERR(EINVAL); - } - - i915_kernel_lost_context(dev); - - count = nbox ? nbox : 1; - - for (i = 0; i < count; i++) { - if (i < nbox) { - ret = i915_emit_box(dev, cmd->cliprects, i, - cmd->DR1, cmd->DR4); - if (ret) - return ret; - } - - ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4); - if (ret) - return ret; - } - - return 0; -} - -static int i915_dispatch_batchbuffer(drm_device_t * dev, - drm_i915_batchbuffer_t * batch) -{ - drm_i915_private_t *dev_priv = dev->dev_private; - drm_clip_rect_t __user *boxes = batch->cliprects; - int nbox = batch->num_cliprects; - int i = 0, count; - RING_LOCALS; - - if ((batch->start | batch->used) & 0x7) { - DRM_ERROR("alignment"); - return DRM_ERR(EINVAL); - } - - i915_kernel_lost_context(dev); - - count = nbox ? nbox : 1; - - for (i = 0; i < count; i++) { - if (i < nbox) { - int ret = i915_emit_box(dev, boxes, i, - batch->DR1, batch->DR4); - if (ret) - return ret; - } - - if (dev_priv->use_mi_batchbuffer_start) { - BEGIN_LP_RING(2); - OUT_RING(MI_BATCH_BUFFER_START | (2 << 6)); - OUT_RING(batch->start | MI_BATCH_NON_SECURE); - ADVANCE_LP_RING(); - } else { - BEGIN_LP_RING(4); - OUT_RING(MI_BATCH_BUFFER); - OUT_RING(batch->start | MI_BATCH_NON_SECURE); - OUT_RING(batch->start + batch->used - 4); - OUT_RING(0); - ADVANCE_LP_RING(); - } - } - - dev_priv->sarea_priv->last_enqueue = dev_priv->counter++; - - BEGIN_LP_RING(4); - OUT_RING(CMD_STORE_DWORD_IDX); - OUT_RING(20); - OUT_RING(dev_priv->counter); - OUT_RING(0); - ADVANCE_LP_RING(); - - return 0; -} - -static int i915_dispatch_flip(drm_device_t * dev) -{ - drm_i915_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - - DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n", - __FUNCTION__, - dev_priv->current_page, - dev_priv->sarea_priv->pf_current_page); - - i915_kernel_lost_context(dev); - - BEGIN_LP_RING(2); - OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE); - OUT_RING(0); - ADVANCE_LP_RING(); - - BEGIN_LP_RING(6); - OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP); - OUT_RING(0); - if (dev_priv->current_page == 0) { - OUT_RING(dev_priv->back_offset); - dev_priv->current_page = 1; - } else { - OUT_RING(dev_priv->front_offset); - dev_priv->current_page = 0; - } - OUT_RING(0); - ADVANCE_LP_RING(); - - BEGIN_LP_RING(2); - OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP); - OUT_RING(0); - ADVANCE_LP_RING(); - - dev_priv->sarea_priv->last_enqueue = dev_priv->counter++; - - BEGIN_LP_RING(4); - OUT_RING(CMD_STORE_DWORD_IDX); - OUT_RING(20); - OUT_RING(dev_priv->counter); - OUT_RING(0); - ADVANCE_LP_RING(); - - dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; - return 0; -} - -static int i915_quiescent(drm_device_t * dev) -{ - drm_i915_private_t *dev_priv = dev->dev_private; - - i915_kernel_lost_context(dev); - return i915_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__); -} - -int i915_flush_ioctl(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - - if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i915_flush_ioctl called without lock held\n"); - return DRM_ERR(EINVAL); - } - - return i915_quiescent(dev); -} - -int i915_batchbuffer(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; - u32 *hw_status = dev_priv->hw_status_page; - drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *) - dev_priv->sarea_priv; - drm_i915_batchbuffer_t batch; - int ret; - - if (!dev_priv->allow_batchbuffer) { - DRM_ERROR("Batchbuffer ioctl disabled\n"); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL(batch, (drm_i915_batchbuffer_t __user *) data, - sizeof(batch)); - - DRM_DEBUG("i915 batchbuffer, start %x used %d cliprects %d\n", - batch.start, batch.used, batch.num_cliprects); - - if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i915_batchbuffer called without lock held\n"); - return DRM_ERR(EINVAL); - } - - if (batch.num_cliprects && DRM_VERIFYAREA_READ(batch.cliprects, - batch.num_cliprects * - sizeof(drm_clip_rect_t))) - return DRM_ERR(EFAULT); - - ret = i915_dispatch_batchbuffer(dev, &batch); - - sarea_priv->last_dispatch = (int)hw_status[5]; - return ret; -} - -int i915_cmdbuffer(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; - u32 *hw_status = dev_priv->hw_status_page; - drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *) - dev_priv->sarea_priv; - drm_i915_cmdbuffer_t cmdbuf; - int ret; - - DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_i915_cmdbuffer_t __user *) data, - sizeof(cmdbuf)); - - DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n", - cmdbuf.buf, cmdbuf.sz, cmdbuf.num_cliprects); - - if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i915_cmdbuffer called without lock held\n"); - return DRM_ERR(EINVAL); - } - - if (cmdbuf.num_cliprects && - DRM_VERIFYAREA_READ(cmdbuf.cliprects, - cmdbuf.num_cliprects * - sizeof(drm_clip_rect_t))) { - DRM_ERROR("Fault accessing cliprects\n"); - return DRM_ERR(EFAULT); - } - - ret = i915_dispatch_cmdbuffer(dev, &cmdbuf); - if (ret) { - DRM_ERROR("i915_dispatch_cmdbuffer failed\n"); - return ret; - } - - sarea_priv->last_dispatch = (int)hw_status[5]; - return 0; -} - -int i915_do_cleanup_pageflip(drm_device_t * dev) -{ - drm_i915_private_t *dev_priv = dev->dev_private; - - DRM_DEBUG("%s\n", __FUNCTION__); - if (dev_priv->current_page != 0) - i915_dispatch_flip(dev); - - return 0; -} - -int i915_flip_bufs(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - - DRM_DEBUG("%s\n", __FUNCTION__); - if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i915_flip_buf called without lock held\n"); - return DRM_ERR(EINVAL); - } - - return i915_dispatch_flip(dev); -} - -int i915_getparam(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - drm_i915_private_t *dev_priv = dev->dev_private; - drm_i915_getparam_t param; - int value; - - if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL(param, (drm_i915_getparam_t __user *) data, - sizeof(param)); - - switch (param.param) { - case I915_PARAM_IRQ_ACTIVE: - value = dev->irq ? 1 : 0; - break; - case I915_PARAM_ALLOW_BATCHBUFFER: - value = dev_priv->allow_batchbuffer ? 1 : 0; - break; - default: - DRM_ERROR("Unkown parameter %d\n", param.param); - return DRM_ERR(EINVAL); - } - - if (DRM_COPY_TO_USER(param.value, &value, sizeof(int))) { - DRM_ERROR("DRM_COPY_TO_USER failed\n"); - return DRM_ERR(EFAULT); - } - - return 0; -} - -int i915_setparam(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - drm_i915_private_t *dev_priv = dev->dev_private; - drm_i915_setparam_t param; - - if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL(param, (drm_i915_setparam_t __user *) data, - sizeof(param)); - - switch (param.param) { - case I915_SETPARAM_USE_MI_BATCHBUFFER_START: - dev_priv->use_mi_batchbuffer_start = param.value; - break; - case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY: - dev_priv->tex_lru_log_granularity = param.value; - break; - case I915_SETPARAM_ALLOW_BATCHBUFFER: - dev_priv->allow_batchbuffer = param.value; - break; - default: - DRM_ERROR("unknown parameter %d\n", param.param); - return DRM_ERR(EINVAL); - } - - return 0; -} - -static void i915_driver_pretakedown(drm_device_t *dev) -{ - if (dev->dev_private) { - drm_i915_private_t *dev_priv = dev->dev_private; - i915_mem_takedown(&(dev_priv->agp_heap)); - } - i915_dma_cleanup(dev); -} - -static void i915_driver_prerelease(drm_device_t *dev, DRMFILE filp) -{ - if (dev->dev_private) { - drm_i915_private_t *dev_priv = dev->dev_private; - i915_mem_release(dev, filp, dev_priv->agp_heap); - } -} - -void i915_driver_register_fns(drm_device_t *dev) -{ - dev->driver_features = - DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR | - DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED; - dev->fn_tbl.pretakedown = i915_driver_pretakedown; - dev->fn_tbl.prerelease = i915_driver_prerelease; - dev->fn_tbl.irq_preinstall = i915_driver_irq_preinstall; - dev->fn_tbl.irq_postinstall = i915_driver_irq_postinstall; - dev->fn_tbl.irq_uninstall = i915_driver_irq_uninstall; - dev->fn_tbl.irq_handler = i915_driver_irq_handler; - - dev->counters += 4; - dev->types[6] = _DRM_STAT_IRQ; - dev->types[7] = _DRM_STAT_PRIMARY; - dev->types[8] = _DRM_STAT_SECONDARY; - dev->types[9] = _DRM_STAT_DMA; -} diff --git a/shared/i915_drm.h b/shared/i915_drm.h deleted file mode 100644 index 24f4cd622..000000000 --- a/shared/i915_drm.h +++ /dev/null @@ -1,154 +0,0 @@ -#ifndef _I915_DRM_H_ -#define _I915_DRM_H_ - -/* Please note that modifications to all structs defined here are - * subject to backwards-compatibility constraints. - */ - -#include "drm.h" - -/* Each region is a minimum of 16k, and there are at most 255 of them. - */ -#define I915_NR_TEX_REGIONS 255 /* table size 2k - maximum due to use - * of chars for next/prev indices */ -#define I915_LOG_MIN_TEX_REGION_SIZE 14 - -typedef struct _drm_i915_init { - enum { - I915_INIT_DMA = 0x01, - I915_CLEANUP_DMA = 0x02, - I915_RESUME_DMA = 0x03 - } func; - unsigned int mmio_offset; - int sarea_priv_offset; - unsigned int ring_start; - unsigned int ring_end; - unsigned int ring_size; - unsigned int front_offset; - unsigned int back_offset; - unsigned int depth_offset; - unsigned int w; - unsigned int h; - unsigned int pitch; - unsigned int pitch_bits; - unsigned int back_pitch; - unsigned int depth_pitch; - unsigned int cpp; - unsigned int chipset; -} drm_i915_init_t; - -typedef struct _drm_i915_sarea { - drm_tex_region_t texList[I915_NR_TEX_REGIONS + 1]; - int last_upload; /* last time texture was uploaded */ - int last_enqueue; /* last time a buffer was enqueued */ - int last_dispatch; /* age of the most recently dispatched buffer */ - int ctxOwner; /* last context to upload state */ - int texAge; - int pf_enabled; /* is pageflipping allowed? */ - int pf_active; - int pf_current_page; /* which buffer is being displayed? */ - int perf_boxes; /* performance boxes to be displayed */ -} drm_i915_sarea_t; - -/* Flags for perf_boxes - */ -#define I915_BOX_RING_EMPTY 0x1 -#define I915_BOX_FLIP 0x2 -#define I915_BOX_WAIT 0x4 -#define I915_BOX_TEXTURE_LOAD 0x8 -#define I915_BOX_LOST_CONTEXT 0x10 - -/* I915 specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ -#define DRM_IOCTL_I915_INIT DRM_IOW( 0x40, drm_i915_init_t) -#define DRM_IOCTL_I915_FLUSH DRM_IO ( 0x41) -#define DRM_IOCTL_I915_FLIP DRM_IO ( 0x42) -#define DRM_IOCTL_I915_BATCHBUFFER DRM_IOW( 0x43, drm_i915_batchbuffer_t) -#define DRM_IOCTL_I915_IRQ_EMIT DRM_IOWR(0x44, drm_i915_irq_emit_t) -#define DRM_IOCTL_I915_IRQ_WAIT DRM_IOW( 0x45, drm_i915_irq_wait_t) -#define DRM_IOCTL_I915_GETPARAM DRM_IOWR(0x46, drm_i915_getparam_t) -#define DRM_IOCTL_I915_SETPARAM DRM_IOW( 0x47, drm_i915_setparam_t) -#define DRM_IOCTL_I915_ALLOC DRM_IOWR(0x48, drm_i915_mem_alloc_t) -#define DRM_IOCTL_I915_FREE DRM_IOW( 0x49, drm_i915_mem_free_t) -#define DRM_IOCTL_I915_INIT_HEAP DRM_IOW( 0x4a, drm_i915_mem_init_heap_t) -#define DRM_IOCTL_I915_CMDBUFFER DRM_IOW( 0x4b, drm_i915_cmdbuffer_t) - -/* Allow drivers to submit batchbuffers directly to hardware, relying - * on the security mechanisms provided by hardware. - */ -typedef struct _drm_i915_batchbuffer { - int start; /* agp offset */ - int used; /* nr bytes in use */ - int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */ - int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */ - int num_cliprects; /* mulitpass with multiple cliprects? */ - drm_clip_rect_t __user *cliprects; /* pointer to userspace cliprects */ -} drm_i915_batchbuffer_t; - -/* As above, but pass a pointer to userspace buffer which can be - * validated by the kernel prior to sending to hardware. - */ -typedef struct _drm_i915_cmdbuffer { - char __user *buf; /* pointer to userspace command buffer */ - int sz; /* nr bytes in buf */ - int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */ - int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */ - int num_cliprects; /* mulitpass with multiple cliprects? */ - drm_clip_rect_t __user *cliprects; /* pointer to userspace cliprects */ -} drm_i915_cmdbuffer_t; - -/* Userspace can request & wait on irq's: - */ -typedef struct drm_i915_irq_emit { - int __user *irq_seq; -} drm_i915_irq_emit_t; - -typedef struct drm_i915_irq_wait { - int irq_seq; -} drm_i915_irq_wait_t; - -/* Ioctl to query kernel params: - */ -#define I915_PARAM_IRQ_ACTIVE 1 -#define I915_PARAM_ALLOW_BATCHBUFFER 2 - -typedef struct drm_i915_getparam { - int param; - int __user *value; -} drm_i915_getparam_t; - -/* Ioctl to set kernel params: - */ -#define I915_SETPARAM_USE_MI_BATCHBUFFER_START 1 -#define I915_SETPARAM_TEX_LRU_LOG_GRANULARITY 2 -#define I915_SETPARAM_ALLOW_BATCHBUFFER 3 - -typedef struct drm_i915_setparam { - int param; - int value; -} drm_i915_setparam_t; - -/* A memory manager for regions of shared memory: - */ -#define I915_MEM_REGION_AGP 1 - -typedef struct drm_i915_mem_alloc { - int region; - int alignment; - int size; - int __user *region_offset; /* offset from start of fb or agp */ -} drm_i915_mem_alloc_t; - -typedef struct drm_i915_mem_free { - int region; - int region_offset; -} drm_i915_mem_free_t; - -typedef struct drm_i915_mem_init_heap { - int region; - int size; - int start; -} drm_i915_mem_init_heap_t; - -#endif /* _I915_DRM_H_ */ diff --git a/shared/i915_drv.h b/shared/i915_drv.h deleted file mode 100644 index 7564cd090..000000000 --- a/shared/i915_drv.h +++ /dev/null @@ -1,219 +0,0 @@ -/* i915_drv.h -- Private header for the I915 driver -*- linux-c -*- - */ -/************************************************************************** - * - * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - **************************************************************************/ - -#ifndef _I915_DRV_H_ -#define _I915_DRV_H_ - -typedef struct _drm_i915_ring_buffer { - int tail_mask; - unsigned long Start; - unsigned long End; - unsigned long Size; - u8 *virtual_start; - int head; - int tail; - int space; - drm_local_map_t map; -} drm_i915_ring_buffer_t; - -struct mem_block { - struct mem_block *next; - struct mem_block *prev; - int start; - int size; - DRMFILE filp; /* 0: free, -1: heap, other: real files */ -}; - -typedef struct drm_i915_private { - drm_local_map_t *sarea; - drm_local_map_t *mmio_map; - - drm_i915_sarea_t *sarea_priv; - drm_i915_ring_buffer_t ring; - - void *hw_status_page; - unsigned long counter; - dma_addr_t dma_status_page; - - int back_offset; - int front_offset; - int current_page; - int page_flipping; - int use_mi_batchbuffer_start; - - wait_queue_head_t irq_queue; - atomic_t irq_received; - atomic_t irq_emitted; - - int tex_lru_log_granularity; - int allow_batchbuffer; - struct mem_block *agp_heap; -} drm_i915_private_t; - - /* i915_dma.c */ -extern int i915_dma_init(DRM_IOCTL_ARGS); -extern int i915_dma_cleanup(drm_device_t * dev); -extern int i915_flush_ioctl(DRM_IOCTL_ARGS); -extern int i915_batchbuffer(DRM_IOCTL_ARGS); -extern int i915_flip_bufs(DRM_IOCTL_ARGS); -extern int i915_getparam(DRM_IOCTL_ARGS); -extern int i915_setparam(DRM_IOCTL_ARGS); -extern int i915_cmdbuffer(DRM_IOCTL_ARGS); -extern void i915_kernel_lost_context(drm_device_t * dev); - -/* i915_irq.c */ -extern int i915_irq_emit(DRM_IOCTL_ARGS); -extern int i915_irq_wait(DRM_IOCTL_ARGS); -extern int i915_wait_irq(drm_device_t * dev, int irq_nr); -extern int i915_emit_irq(drm_device_t * dev); - -extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS); -extern void i915_driver_irq_preinstall(drm_device_t *dev); -extern void i915_driver_irq_postinstall(drm_device_t *dev); -extern void i915_driver_irq_uninstall(drm_device_t *dev); - -/* i915_mem.c */ -extern int i915_mem_alloc(DRM_IOCTL_ARGS); -extern int i915_mem_free(DRM_IOCTL_ARGS); -extern int i915_mem_init_heap(DRM_IOCTL_ARGS); -extern void i915_mem_takedown(struct mem_block **heap); -extern void i915_mem_release(drm_device_t * dev, - DRMFILE filp, struct mem_block *heap); - -#define I915_READ(reg) DRM_READ32(dev_priv->mmio_map, reg) -#define I915_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio_map, reg, val) -#define I915_READ16(reg) DRM_READ16(dev_priv->mmio_map, reg) -#define I915_WRITE16(reg,val) DRM_WRITE16(dev_priv->mmio_map, reg, val) - -#define I915_VERBOSE 0 - -#define RING_LOCALS unsigned int outring, ringmask, outcount; \ - volatile char *virt; - -#define BEGIN_LP_RING(n) do { \ - if (I915_VERBOSE) \ - DRM_DEBUG("BEGIN_LP_RING(%d) in %s\n", \ - n, __FUNCTION__); \ - if (dev_priv->ring.space < n*4) \ - i915_wait_ring(dev, n*4, __FUNCTION__); \ - outcount = 0; \ - outring = dev_priv->ring.tail; \ - ringmask = dev_priv->ring.tail_mask; \ - virt = dev_priv->ring.virtual_start; \ -} while (0) - -#define OUT_RING(n) do { \ - if (I915_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \ - *(volatile unsigned int *)(virt + outring) = n; \ - outcount++; \ - outring += 4; \ - outring &= ringmask; \ -} while (0) - -#define ADVANCE_LP_RING() do { \ - if (I915_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING %x\n", outring); \ - dev_priv->ring.tail = outring; \ - dev_priv->ring.space -= outcount * 4; \ - I915_WRITE(LP_RING + RING_TAIL, outring); \ -} while(0) - -extern int i915_wait_ring(drm_device_t * dev, int n, const char *caller); - -#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23)) -#define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23)) -#define CMD_REPORT_HEAD (7<<23) -#define CMD_STORE_DWORD_IDX ((0x21<<23) | 0x1) -#define CMD_OP_BATCH_BUFFER ((0x0<<29)|(0x30<<23)|0x1) - -#define INST_PARSER_CLIENT 0x00000000 -#define INST_OP_FLUSH 0x02000000 -#define INST_FLUSH_MAP_CACHE 0x00000001 - -#define BB1_START_ADDR_MASK (~0x7) -#define BB1_PROTECTED (1<<0) -#define BB1_UNPROTECTED (0<<0) -#define BB2_END_ADDR_MASK (~0x7) - -#define I915REG_HWSTAM 0x02098 -#define I915REG_INT_IDENTITY_R 0x020a4 -#define I915REG_INT_MASK_R 0x020a8 -#define I915REG_INT_ENABLE_R 0x020a0 - -#define SRX_INDEX 0x3c4 -#define SRX_DATA 0x3c5 -#define SR01 1 -#define SR01_SCREEN_OFF (1<<5) - -#define PPCR 0x61204 -#define PPCR_ON (1<<0) - -#define ADPA 0x61100 -#define ADPA_DPMS_MASK (~(3<<10)) -#define ADPA_DPMS_ON (0<<10) -#define ADPA_DPMS_SUSPEND (1<<10) -#define ADPA_DPMS_STANDBY (2<<10) -#define ADPA_DPMS_OFF (3<<10) - -#define NOPID 0x2094 -#define LP_RING 0x2030 -#define HP_RING 0x2040 -#define RING_TAIL 0x00 -#define TAIL_ADDR 0x001FFFF8 -#define RING_HEAD 0x04 -#define HEAD_WRAP_COUNT 0xFFE00000 -#define HEAD_WRAP_ONE 0x00200000 -#define HEAD_ADDR 0x001FFFFC -#define RING_START 0x08 -#define START_ADDR 0x0xFFFFF000 -#define RING_LEN 0x0C -#define RING_NR_PAGES 0x001FF000 -#define RING_REPORT_MASK 0x00000006 -#define RING_REPORT_64K 0x00000002 -#define RING_REPORT_128K 0x00000004 -#define RING_NO_REPORT 0x00000000 -#define RING_VALID_MASK 0x00000001 -#define RING_VALID 0x00000001 -#define RING_INVALID 0x00000000 - -#define GFX_OP_SCISSOR ((0x3<<29)|(0x1c<<24)|(0x10<<19)) -#define SC_UPDATE_SCISSOR (0x1<<1) -#define SC_ENABLE_MASK (0x1<<0) -#define SC_ENABLE (0x1<<0) - -#define GFX_OP_SCISSOR_INFO ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1)) -#define SCI_YMIN_MASK (0xffff<<16) -#define SCI_XMIN_MASK (0xffff<<0) -#define SCI_YMAX_MASK (0xffff<<16) -#define SCI_XMAX_MASK (0xffff<<0) - -#define GFX_OP_SCISSOR_ENABLE ((0x3<<29)|(0x1c<<24)|(0x10<<19)) -#define GFX_OP_SCISSOR_RECT ((0x3<<29)|(0x1d<<24)|(0x81<<16)|1) -#define GFX_OP_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0) -#define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16)) -#define GFX_OP_MAP_INFO ((0x3<<29)|(0x1d<<24)|0x4) -#define GFX_OP_DESTBUFFER_VARS ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0) -#define GFX_OP_DRAWRECT_INFO ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3)) - -#define MI_BATCH_BUFFER ((0x30<<23)|1) -#define MI_BATCH_BUFFER_START (0x31<<23) -#define MI_BATCH_BUFFER_END (0xA<<23) -#define MI_BATCH_NON_SECURE (1) - -#define MI_WAIT_FOR_EVENT ((0x3<<23)) -#define MI_WAIT_FOR_PLANE_A_FLIP (1<<2) -#define MI_WAIT_FOR_PLANE_A_SCANLINES (1<<1) - -#define MI_LOAD_SCAN_LINES_INCL ((0x12<<23)) - -#define CMD_OP_DISPLAYBUFFER_INFO ((0x0<<29)|(0x14<<23)|2) -#define ASYNC_FLIP (1<<22) - -#define CMD_OP_DESTBUFFER_INFO ((0x3<<29)|(0x1d<<24)|(0x8e<<16)|1) - -#endif diff --git a/shared/i915_irq.c b/shared/i915_irq.c deleted file mode 100644 index de91aba58..000000000 --- a/shared/i915_irq.c +++ /dev/null @@ -1,165 +0,0 @@ -/* i915_dma.c -- DMA support for the I915 -*- linux-c -*- - */ -/************************************************************************** - * - * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - **************************************************************************/ - -#include "i915.h" -#include "drmP.h" -#include "drm.h" -#include "i915_drm.h" -#include "i915_drv.h" - -#define USER_INT_FLAG 0x2 -#define MAX_NOPID ((u32)~0) -#define READ_BREADCRUMB(dev_priv) (((u32*)(dev_priv->hw_status_page))[5]) - -irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) -{ - drm_device_t *dev = (drm_device_t *) arg; - drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; - u16 temp; - - temp = I915_READ16(I915REG_INT_IDENTITY_R); - temp &= USER_INT_FLAG; - - DRM_DEBUG("%s flag=%08x\n", __FUNCTION__, temp); - - if (temp == 0) - return IRQ_NONE; - - I915_WRITE16(I915REG_INT_IDENTITY_R, temp); - DRM_WAKEUP(&dev_priv->irq_queue); - - return IRQ_HANDLED; -} - -int i915_emit_irq(drm_device_t * dev) -{ - drm_i915_private_t *dev_priv = dev->dev_private; - u32 ret; - RING_LOCALS; - - i915_kernel_lost_context(dev); - - DRM_DEBUG("%s\n", __FUNCTION__); - - ret = dev_priv->counter; - - BEGIN_LP_RING(2); - OUT_RING(0); - OUT_RING(GFX_OP_USER_INTERRUPT); - ADVANCE_LP_RING(); - - return ret; -} - -int i915_wait_irq(drm_device_t * dev, int irq_nr) -{ - drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; - int ret = 0; - - DRM_DEBUG("%s irq_nr=%d breadcrumb=%d\n", __FUNCTION__, irq_nr, - READ_BREADCRUMB(dev_priv)); - - if (READ_BREADCRUMB(dev_priv) >= irq_nr) - return 0; - - dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT; - - DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ, - READ_BREADCRUMB(dev_priv) >= irq_nr); - - if (ret == DRM_ERR(EBUSY)) { - DRM_ERROR("%s: EBUSY -- rec: %d emitted: %d\n", - __FUNCTION__, - READ_BREADCRUMB(dev_priv), (int)dev_priv->counter); - } - - dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); - return ret; -} - -/* Needs the lock as it touches the ring. - */ -int i915_irq_emit(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - drm_i915_private_t *dev_priv = dev->dev_private; - drm_i915_irq_emit_t emit; - int result; - - if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i915_irq_emit called without lock held\n"); - return DRM_ERR(EINVAL); - } - - if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL(emit, (drm_i915_irq_emit_t __user *) data, - sizeof(emit)); - - result = i915_emit_irq(dev); - - if (DRM_COPY_TO_USER(emit.irq_seq, &result, sizeof(int))) { - DRM_ERROR("copy_to_user\n"); - return DRM_ERR(EFAULT); - } - - return 0; -} - -/* Doesn't need the hardware lock. - */ -int i915_irq_wait(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - drm_i915_private_t *dev_priv = dev->dev_private; - drm_i915_irq_wait_t irqwait; - - if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL(irqwait, (drm_i915_irq_wait_t __user *) data, - sizeof(irqwait)); - - return i915_wait_irq(dev, irqwait.irq_seq); -} - -/* drm_dma.h hooks -*/ -void i915_driver_irq_preinstall(drm_device_t * dev) -{ - drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; - - I915_WRITE16(I915REG_HWSTAM, 0xfffe); - I915_WRITE16(I915REG_INT_MASK_R, 0x0); - I915_WRITE16(I915REG_INT_ENABLE_R, 0x0); -} - -void i915_driver_irq_postinstall(drm_device_t * dev) -{ - drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; - - I915_WRITE16(I915REG_INT_ENABLE_R, USER_INT_FLAG); - DRM_INIT_WAITQUEUE(&dev_priv->irq_queue); -} - -void i915_driver_irq_uninstall(drm_device_t * dev) -{ - drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; - if (!dev_priv) - return; - - I915_WRITE16(I915REG_HWSTAM, 0xffff); - I915_WRITE16(I915REG_INT_MASK_R, 0xffff); - I915_WRITE16(I915REG_INT_ENABLE_R, 0x0); -} diff --git a/shared/i915_mem.c b/shared/i915_mem.c deleted file mode 100644 index c6115b7e1..000000000 --- a/shared/i915_mem.c +++ /dev/null @@ -1,347 +0,0 @@ -/* i915_mem.c -- Simple agp/fb memory manager for i915 -*- linux-c -*- - */ -/************************************************************************** - * - * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - **************************************************************************/ - -#include "i915.h" -#include "drmP.h" -#include "drm.h" -#include "i915_drm.h" -#include "i915_drv.h" - -/* This memory manager is integrated into the global/local lru - * mechanisms used by the clients. Specifically, it operates by - * setting the 'in_use' fields of the global LRU to indicate whether - * this region is privately allocated to a client. - * - * This does require the client to actually respect that field. - * - * Currently no effort is made to allocate 'private' memory in any - * clever way - the LRU information isn't used to determine which - * block to allocate, and the ring is drained prior to allocations -- - * in other words allocation is expensive. - */ -static void mark_block(drm_device_t * dev, struct mem_block *p, int in_use) -{ - drm_i915_private_t *dev_priv = dev->dev_private; - drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_tex_region_t *list; - unsigned shift, nr; - unsigned start; - unsigned end; - unsigned i; - int age; - - shift = dev_priv->tex_lru_log_granularity; - nr = I915_NR_TEX_REGIONS; - - start = p->start >> shift; - end = (p->start + p->size - 1) >> shift; - - age = ++sarea_priv->texAge; - list = sarea_priv->texList; - - /* Mark the regions with the new flag and update their age. Move - * them to head of list to preserve LRU semantics. - */ - for (i = start; i <= end; i++) { - list[i].in_use = in_use; - list[i].age = age; - - /* remove_from_list(i) - */ - list[(unsigned)list[i].next].prev = list[i].prev; - list[(unsigned)list[i].prev].next = list[i].next; - - /* insert_at_head(list, i) - */ - list[i].prev = nr; - list[i].next = list[nr].next; - list[(unsigned)list[nr].next].prev = i; - list[nr].next = i; - } -} - -/* Very simple allocator for agp memory, working on a static range - * already mapped into each client's address space. - */ - -static struct mem_block *split_block(struct mem_block *p, int start, int size, - DRMFILE filp) -{ - /* Maybe cut off the start of an existing block */ - if (start > p->start) { - struct mem_block *newblock = DRM(alloc)(sizeof(*newblock), DRM_MEM_BUFLISTS); - if (!newblock) - goto out; - newblock->start = start; - newblock->size = p->size - (start - p->start); - newblock->filp = NULL; - newblock->next = p->next; - newblock->prev = p; - p->next->prev = newblock; - p->next = newblock; - p->size -= newblock->size; - p = newblock; - } - - /* Maybe cut off the end of an existing block */ - if (size < p->size) { - struct mem_block *newblock = DRM(alloc)(sizeof(*newblock), DRM_MEM_BUFLISTS); - if (!newblock) - goto out; - newblock->start = start + size; - newblock->size = p->size - size; - newblock->filp = NULL; - newblock->next = p->next; - newblock->prev = p; - p->next->prev = newblock; - p->next = newblock; - p->size = size; - } - - out: - /* Our block is in the middle */ - p->filp = filp; - return p; -} - -static struct mem_block *alloc_block(struct mem_block *heap, int size, - int align2, DRMFILE filp) -{ - struct mem_block *p; - int mask = (1 << align2) - 1; - - for (p = heap->next; p != heap; p = p->next) { - int start = (p->start + mask) & ~mask; - if (p->filp == NULL && start + size <= p->start + p->size) - return split_block(p, start, size, filp); - } - - return NULL; -} - -static struct mem_block *find_block(struct mem_block *heap, int start) -{ - struct mem_block *p; - - for (p = heap->next; p != heap; p = p->next) - if (p->start == start) - return p; - - return NULL; -} - -static void free_block(struct mem_block *p) -{ - p->filp = NULL; - - /* Assumes a single contiguous range. Needs a special filp in - * 'heap' to stop it being subsumed. - */ - if (p->next->filp == NULL) { - struct mem_block *q = p->next; - p->size += q->size; - p->next = q->next; - p->next->prev = p; - DRM(free)(q, sizeof(*q), DRM_MEM_BUFLISTS); - } - - if (p->prev->filp == NULL) { - struct mem_block *q = p->prev; - q->size += p->size; - q->next = p->next; - q->next->prev = q; - DRM(free)(p, sizeof(*q), DRM_MEM_BUFLISTS); - } -} - -/* Initialize. How to check for an uninitialized heap? - */ -static int init_heap(struct mem_block **heap, int start, int size) -{ - struct mem_block *blocks = DRM(alloc)(sizeof(*blocks), DRM_MEM_BUFLISTS); - - if (!blocks) - return -ENOMEM; - - *heap = DRM(alloc)(sizeof(**heap), DRM_MEM_BUFLISTS); - if (!*heap) { - DRM(free)(blocks, sizeof(*blocks), DRM_MEM_BUFLISTS); - return -ENOMEM; - } - - blocks->start = start; - blocks->size = size; - blocks->filp = NULL; - blocks->next = blocks->prev = *heap; - - memset(*heap, 0, sizeof(**heap)); - (*heap)->filp = (DRMFILE) - 1; - (*heap)->next = (*heap)->prev = blocks; - return 0; -} - -/* Free all blocks associated with the releasing file. - */ -void i915_mem_release(drm_device_t * dev, DRMFILE filp, struct mem_block *heap) -{ - struct mem_block *p; - - if (!heap || !heap->next) - return; - - for (p = heap->next; p != heap; p = p->next) { - if (p->filp == filp) { - p->filp = NULL; - mark_block(dev, p, 0); - } - } - - /* Assumes a single contiguous range. Needs a special filp in - * 'heap' to stop it being subsumed. - */ - for (p = heap->next; p != heap; p = p->next) { - while (p->filp == NULL && p->next->filp == NULL) { - struct mem_block *q = p->next; - p->size += q->size; - p->next = q->next; - p->next->prev = p; - DRM(free)(q, sizeof(*q), DRM_MEM_BUFLISTS); - } - } -} - -/* Shutdown. - */ -void i915_mem_takedown(struct mem_block **heap) -{ - struct mem_block *p; - - if (!*heap) - return; - - for (p = (*heap)->next; p != *heap;) { - struct mem_block *q = p; - p = p->next; - DRM(free)(q, sizeof(*q), DRM_MEM_BUFLISTS); - } - - DRM(free)(*heap, sizeof(**heap), DRM_MEM_BUFLISTS); - *heap = NULL; -} - -static struct mem_block **get_heap(drm_i915_private_t * dev_priv, int region) -{ - switch (region) { - case I915_MEM_REGION_AGP: - return &dev_priv->agp_heap; - default: - return NULL; - } -} - -/* IOCTL HANDLERS */ - -int i915_mem_alloc(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - drm_i915_private_t *dev_priv = dev->dev_private; - drm_i915_mem_alloc_t alloc; - struct mem_block *block, **heap; - - if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL(alloc, (drm_i915_mem_alloc_t __user *) data, - sizeof(alloc)); - - heap = get_heap(dev_priv, alloc.region); - if (!heap || !*heap) - return DRM_ERR(EFAULT); - - /* Make things easier on ourselves: all allocations at least - * 4k aligned. - */ - if (alloc.alignment < 12) - alloc.alignment = 12; - - block = alloc_block(*heap, alloc.size, alloc.alignment, filp); - - if (!block) - return DRM_ERR(ENOMEM); - - mark_block(dev, block, 1); - - if (DRM_COPY_TO_USER(alloc.region_offset, &block->start, sizeof(int))) { - DRM_ERROR("copy_to_user\n"); - return DRM_ERR(EFAULT); - } - - return 0; -} - -int i915_mem_free(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - drm_i915_private_t *dev_priv = dev->dev_private; - drm_i915_mem_free_t memfree; - struct mem_block *block, **heap; - - if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL(memfree, (drm_i915_mem_free_t __user *) data, - sizeof(memfree)); - - heap = get_heap(dev_priv, memfree.region); - if (!heap || !*heap) - return DRM_ERR(EFAULT); - - block = find_block(*heap, memfree.region_offset); - if (!block) - return DRM_ERR(EFAULT); - - if (block->filp != filp) - return DRM_ERR(EPERM); - - mark_block(dev, block, 0); - free_block(block); - return 0; -} - -int i915_mem_init_heap(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - drm_i915_private_t *dev_priv = dev->dev_private; - drm_i915_mem_init_heap_t initheap; - struct mem_block **heap; - - if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL(initheap, - (drm_i915_mem_init_heap_t __user *) data, - sizeof(initheap)); - - heap = get_heap(dev_priv, initheap.region); - if (!heap) - return DRM_ERR(EFAULT); - - if (*heap) { - DRM_ERROR("heap already initialized?"); - return DRM_ERR(EFAULT); - } - - return init_heap(heap, initheap.start, initheap.size); -} diff --git a/shared/mach64.h b/shared/mach64.h deleted file mode 100644 index 9fae34335..000000000 --- a/shared/mach64.h +++ /dev/null @@ -1,69 +0,0 @@ -/* mach64.h -- ATI Mach 64 DRM template customization -*- linux-c -*- - * Created: Wed Feb 14 16:07:10 2001 by gareth@valinux.com - * - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * Copyright 2002-2003 Leif Delgass - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - * Leif Delgass <ldelgass@retinalburn.net> - */ - -#ifndef __MACH64_H__ -#define __MACH64_H__ - -/* This remains constant for all DRM template files. - */ -#define DRM(x) mach64_##x - -/* General customization: - */ - -#define DRIVER_AUTHOR "Gareth Hughes, Leif Delgass, José Fonseca" - -#define DRIVER_NAME "mach64" -#define DRIVER_DESC "DRM module for the ATI Rage Pro" -#define DRIVER_DATE "20020904" - -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 0 -#define DRIVER_PATCHLEVEL 0 - -/* Interface history: - * - * 1.0 - Initial mach64 DRM - * - */ -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { mach64_dma_buffers, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MACH64_INIT)] = { mach64_dma_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MACH64_CLEAR)] = { mach64_dma_clear, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MACH64_SWAP)] = { mach64_dma_swap, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MACH64_IDLE)] = { mach64_dma_idle, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MACH64_RESET)] = { mach64_engine_reset, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MACH64_VERTEX)] = { mach64_dma_vertex, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MACH64_BLIT)] = { mach64_dma_blit, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MACH64_FLUSH)] = { mach64_dma_flush, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MACH64_GETPARAM)] = { mach64_get_param, 1, 0 } - -#endif diff --git a/shared/mach64_dma.c b/shared/mach64_dma.c deleted file mode 100644 index 210a6103c..000000000 --- a/shared/mach64_dma.c +++ /dev/null @@ -1,1343 +0,0 @@ -/* mach64_dma.c -- DMA support for mach64 (Rage Pro) driver -*- linux-c -*- - * Created: Sun Dec 03 19:20:26 2000 by gareth@valinux.com - * - * Copyright 2000 Gareth Hughes - * Copyright 2002 Frank C. Earl - * Copyright 2002-2003 Leif Delgass - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - * Frank C. Earl <fearl@airmail.net> - * Leif Delgass <ldelgass@retinalburn.net> - * José Fonseca <j_r_fonseca@yahoo.co.uk> - */ - -#include "mach64.h" -#include "drmP.h" -#include "drm.h" -#include "mach64_drm.h" -#include "mach64_drv.h" - - -/* ================================================================ - * Engine, FIFO control - */ - -int mach64_do_wait_for_fifo( drm_mach64_private_t *dev_priv, int entries ) -{ - int slots = 0, i; - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - slots = (MACH64_READ( MACH64_FIFO_STAT ) & - MACH64_FIFO_SLOT_MASK); - if ( slots <= (0x8000 >> entries) ) return 0; - DRM_UDELAY( 1 ); - } - - DRM_INFO( "%s failed! slots=%d entries=%d\n", __FUNCTION__, slots, entries ); - return DRM_ERR(EBUSY); -} - -int mach64_do_wait_for_idle( drm_mach64_private_t *dev_priv ) -{ - int i, ret; - - ret = mach64_do_wait_for_fifo( dev_priv, 16 ); - if ( ret < 0 ) return ret; - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - if ( !(MACH64_READ( MACH64_GUI_STAT ) & MACH64_GUI_ACTIVE) ) { - return 0; - } - DRM_UDELAY( 1 ); - } - - DRM_INFO( "%s failed! GUI_STAT=0x%08x\n", __FUNCTION__, - MACH64_READ( MACH64_GUI_STAT ) ); - mach64_dump_ring_info( dev_priv ); - return DRM_ERR(EBUSY); -} - -int mach64_wait_ring( drm_mach64_private_t *dev_priv, int n ) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - int i; - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - mach64_update_ring_snapshot( dev_priv ); - if ( ring->space >= n ) { - if (i > 0) { - DRM_DEBUG( "%s: %d usecs\n", __FUNCTION__, i ); - } - return 0; - } - DRM_UDELAY( 1 ); - } - - /* FIXME: This is being ignored... */ - DRM_ERROR( "failed!\n" ); - mach64_dump_ring_info( dev_priv ); - return DRM_ERR(EBUSY); -} - -/* Wait until all DMA requests have been processed... */ -static int mach64_ring_idle( drm_mach64_private_t *dev_priv ) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - u32 head; - int i; - - head = ring->head; - i = 0; - while ( i < dev_priv->usec_timeout ) { - mach64_update_ring_snapshot( dev_priv ); - if ( ring->head == ring->tail && - !(MACH64_READ(MACH64_GUI_STAT) & MACH64_GUI_ACTIVE) ) { - if (i > 0) { - DRM_DEBUG( "%s: %d usecs\n", __FUNCTION__, i ); - } - return 0; - } - if ( ring->head == head ) { - ++i; - } else { - head = ring->head; - i = 0; - } - DRM_UDELAY( 1 ); - } - - DRM_INFO( "%s failed! GUI_STAT=0x%08x\n", __FUNCTION__, - MACH64_READ( MACH64_GUI_STAT ) ); - mach64_dump_ring_info( dev_priv ); - return DRM_ERR(EBUSY); -} - -static void mach64_ring_reset( drm_mach64_private_t *dev_priv ) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - - mach64_do_release_used_buffers( dev_priv ); - ring->head_addr = ring->start_addr; - ring->head = ring->tail = 0; - ring->space = ring->size; - - MACH64_WRITE( MACH64_BM_GUI_TABLE_CMD, - ring->head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB ); - - dev_priv->ring_running = 0; -} - -int mach64_do_dma_flush( drm_mach64_private_t *dev_priv ) -{ - /* FIXME: It's not necessary to wait for idle when flushing - * we just need to ensure the ring will be completely processed - * in finite time without another ioctl - */ - return mach64_ring_idle( dev_priv ); -} - -int mach64_do_dma_idle( drm_mach64_private_t *dev_priv ) -{ - int ret; - - /* wait for completion */ - if ( (ret = mach64_ring_idle( dev_priv )) < 0 ) { - DRM_ERROR( "%s failed BM_GUI_TABLE=0x%08x tail: %u\n", __FUNCTION__, - MACH64_READ(MACH64_BM_GUI_TABLE), dev_priv->ring.tail ); - return ret; - } - - mach64_ring_stop( dev_priv ); - - /* clean up after pass */ - mach64_do_release_used_buffers( dev_priv ); - return 0; -} - -/* Reset the engine. This will stop the DMA if it is running. - */ -int mach64_do_engine_reset( drm_mach64_private_t *dev_priv ) -{ - u32 tmp; - - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - /* Kill off any outstanding DMA transfers. - */ - tmp = MACH64_READ( MACH64_BUS_CNTL ); - MACH64_WRITE( MACH64_BUS_CNTL, - tmp | MACH64_BUS_MASTER_DIS ); - - /* Reset the GUI engine (high to low transition). - */ - tmp = MACH64_READ( MACH64_GEN_TEST_CNTL ); - MACH64_WRITE( MACH64_GEN_TEST_CNTL, - tmp & ~MACH64_GUI_ENGINE_ENABLE ); - /* Enable the GUI engine - */ - tmp = MACH64_READ( MACH64_GEN_TEST_CNTL ); - MACH64_WRITE( MACH64_GEN_TEST_CNTL, - tmp | MACH64_GUI_ENGINE_ENABLE ); - - /* ensure engine is not locked up by clearing any FIFO or HOST errors - */ - tmp = MACH64_READ( MACH64_BUS_CNTL ); - MACH64_WRITE( MACH64_BUS_CNTL, tmp | 0x00a00000 ); - - /* Once GUI engine is restored, disable bus mastering */ - MACH64_WRITE( MACH64_SRC_CNTL, 0 ); - - /* Reset descriptor ring */ - mach64_ring_reset( dev_priv ); - - return 0; -} - -/* ================================================================ - * Debugging output - */ - -void mach64_dump_engine_info( drm_mach64_private_t *dev_priv ) -{ - DRM_INFO( "\n" ); - if ( !dev_priv->is_pci ) - { - DRM_INFO( " AGP_BASE = 0x%08x\n", MACH64_READ( MACH64_AGP_BASE ) ); - DRM_INFO( " AGP_CNTL = 0x%08x\n", MACH64_READ( MACH64_AGP_CNTL ) ); - } - DRM_INFO( " ALPHA_TST_CNTL = 0x%08x\n", MACH64_READ( MACH64_ALPHA_TST_CNTL ) ); - DRM_INFO( "\n" ); - DRM_INFO( " BM_COMMAND = 0x%08x\n", MACH64_READ( MACH64_BM_COMMAND ) ); - DRM_INFO( "BM_FRAME_BUF_OFFSET = 0x%08x\n", MACH64_READ( MACH64_BM_FRAME_BUF_OFFSET ) ); - DRM_INFO( " BM_GUI_TABLE = 0x%08x\n", MACH64_READ( MACH64_BM_GUI_TABLE ) ); - DRM_INFO( " BM_STATUS = 0x%08x\n", MACH64_READ( MACH64_BM_STATUS ) ); - DRM_INFO( " BM_SYSTEM_MEM_ADDR = 0x%08x\n", MACH64_READ( MACH64_BM_SYSTEM_MEM_ADDR ) ); - DRM_INFO( " BM_SYSTEM_TABLE = 0x%08x\n", MACH64_READ( MACH64_BM_SYSTEM_TABLE ) ); - DRM_INFO( " BUS_CNTL = 0x%08x\n", MACH64_READ( MACH64_BUS_CNTL ) ); - DRM_INFO( "\n" ); - /* DRM_INFO( " CLOCK_CNTL = 0x%08x\n", MACH64_READ( MACH64_CLOCK_CNTL ) ); */ - DRM_INFO( " CLR_CMP_CLR = 0x%08x\n", MACH64_READ( MACH64_CLR_CMP_CLR ) ); - DRM_INFO( " CLR_CMP_CNTL = 0x%08x\n", MACH64_READ( MACH64_CLR_CMP_CNTL ) ); - /* DRM_INFO( " CLR_CMP_MSK = 0x%08x\n", MACH64_READ( MACH64_CLR_CMP_MSK ) ); */ - DRM_INFO( " CONFIG_CHIP_ID = 0x%08x\n", MACH64_READ( MACH64_CONFIG_CHIP_ID ) ); - DRM_INFO( " CONFIG_CNTL = 0x%08x\n", MACH64_READ( MACH64_CONFIG_CNTL ) ); - DRM_INFO( " CONFIG_STAT0 = 0x%08x\n", MACH64_READ( MACH64_CONFIG_STAT0 ) ); - DRM_INFO( " CONFIG_STAT1 = 0x%08x\n", MACH64_READ( MACH64_CONFIG_STAT1 ) ); - DRM_INFO( " CONFIG_STAT2 = 0x%08x\n", MACH64_READ( MACH64_CONFIG_STAT2 ) ); - DRM_INFO( " CRC_SIG = 0x%08x\n", MACH64_READ( MACH64_CRC_SIG ) ); - DRM_INFO( " CUSTOM_MACRO_CNTL = 0x%08x\n", MACH64_READ( MACH64_CUSTOM_MACRO_CNTL ) ); - DRM_INFO( "\n" ); - /* DRM_INFO( " DAC_CNTL = 0x%08x\n", MACH64_READ( MACH64_DAC_CNTL ) ); */ - /* DRM_INFO( " DAC_REGS = 0x%08x\n", MACH64_READ( MACH64_DAC_REGS ) ); */ - DRM_INFO( " DP_BKGD_CLR = 0x%08x\n", MACH64_READ( MACH64_DP_BKGD_CLR ) ); - DRM_INFO( " DP_FRGD_CLR = 0x%08x\n", MACH64_READ( MACH64_DP_FRGD_CLR ) ); - DRM_INFO( " DP_MIX = 0x%08x\n", MACH64_READ( MACH64_DP_MIX ) ); - DRM_INFO( " DP_PIX_WIDTH = 0x%08x\n", MACH64_READ( MACH64_DP_PIX_WIDTH ) ); - DRM_INFO( " DP_SRC = 0x%08x\n", MACH64_READ( MACH64_DP_SRC ) ); - DRM_INFO( " DP_WRITE_MASK = 0x%08x\n", MACH64_READ( MACH64_DP_WRITE_MASK ) ); - DRM_INFO( " DSP_CONFIG = 0x%08x\n", MACH64_READ( MACH64_DSP_CONFIG ) ); - DRM_INFO( " DSP_ON_OFF = 0x%08x\n", MACH64_READ( MACH64_DSP_ON_OFF ) ); - DRM_INFO( " DST_CNTL = 0x%08x\n", MACH64_READ( MACH64_DST_CNTL ) ); - DRM_INFO( " DST_OFF_PITCH = 0x%08x\n", MACH64_READ( MACH64_DST_OFF_PITCH ) ); - DRM_INFO( "\n" ); - /* DRM_INFO( " EXT_DAC_REGS = 0x%08x\n", MACH64_READ( MACH64_EXT_DAC_REGS ) ); */ - DRM_INFO( " EXT_MEM_CNTL = 0x%08x\n", MACH64_READ( MACH64_EXT_MEM_CNTL ) ); - DRM_INFO( "\n" ); - DRM_INFO( " FIFO_STAT = 0x%08x\n", MACH64_READ( MACH64_FIFO_STAT ) ); - DRM_INFO( "\n" ); - DRM_INFO( " GEN_TEST_CNTL = 0x%08x\n", MACH64_READ( MACH64_GEN_TEST_CNTL ) ); - /* DRM_INFO( " GP_IO = 0x%08x\n", MACH64_READ( MACH64_GP_IO ) ); */ - DRM_INFO( " GUI_CMDFIFO_DATA = 0x%08x\n", MACH64_READ( MACH64_GUI_CMDFIFO_DATA ) ); - DRM_INFO( " GUI_CMDFIFO_DEBUG = 0x%08x\n", MACH64_READ( MACH64_GUI_CMDFIFO_DEBUG ) ); - DRM_INFO( " GUI_CNTL = 0x%08x\n", MACH64_READ( MACH64_GUI_CNTL ) ); - DRM_INFO( " GUI_STAT = 0x%08x\n", MACH64_READ( MACH64_GUI_STAT ) ); - DRM_INFO( " GUI_TRAJ_CNTL = 0x%08x\n", MACH64_READ( MACH64_GUI_TRAJ_CNTL ) ); - DRM_INFO( "\n" ); - DRM_INFO( " HOST_CNTL = 0x%08x\n", MACH64_READ( MACH64_HOST_CNTL ) ); - DRM_INFO( " HW_DEBUG = 0x%08x\n", MACH64_READ( MACH64_HW_DEBUG ) ); - DRM_INFO( "\n" ); - DRM_INFO( " MEM_ADDR_CONFIG = 0x%08x\n", MACH64_READ( MACH64_MEM_ADDR_CONFIG ) ); - DRM_INFO( " MEM_BUF_CNTL = 0x%08x\n", MACH64_READ( MACH64_MEM_BUF_CNTL ) ); - DRM_INFO( "\n" ); - DRM_INFO( " PAT_REG0 = 0x%08x\n", MACH64_READ( MACH64_PAT_REG0 ) ); - DRM_INFO( " PAT_REG1 = 0x%08x\n", MACH64_READ( MACH64_PAT_REG1 ) ); - DRM_INFO( "\n" ); - DRM_INFO( " SC_LEFT = 0x%08x\n", MACH64_READ( MACH64_SC_LEFT ) ); - DRM_INFO( " SC_RIGHT = 0x%08x\n", MACH64_READ( MACH64_SC_RIGHT ) ); - DRM_INFO( " SC_TOP = 0x%08x\n", MACH64_READ( MACH64_SC_TOP ) ); - DRM_INFO( " SC_BOTTOM = 0x%08x\n", MACH64_READ( MACH64_SC_BOTTOM ) ); - DRM_INFO( "\n" ); - DRM_INFO( " SCALE_3D_CNTL = 0x%08x\n", MACH64_READ( MACH64_SCALE_3D_CNTL ) ); - DRM_INFO( " SCRATCH_REG0 = 0x%08x\n", MACH64_READ( MACH64_SCRATCH_REG0 ) ); - DRM_INFO( " SCRATCH_REG1 = 0x%08x\n", MACH64_READ( MACH64_SCRATCH_REG1 ) ); - DRM_INFO( " SETUP_CNTL = 0x%08x\n", MACH64_READ( MACH64_SETUP_CNTL ) ); - DRM_INFO( " SRC_CNTL = 0x%08x\n", MACH64_READ( MACH64_SRC_CNTL ) ); - DRM_INFO( "\n" ); - DRM_INFO( " TEX_CNTL = 0x%08x\n", MACH64_READ( MACH64_TEX_CNTL ) ); - DRM_INFO( " TEX_SIZE_PITCH = 0x%08x\n", MACH64_READ( MACH64_TEX_SIZE_PITCH ) ); - DRM_INFO( " TIMER_CONFIG = 0x%08x\n", MACH64_READ( MACH64_TIMER_CONFIG ) ); - DRM_INFO( "\n" ); - DRM_INFO( " Z_CNTL = 0x%08x\n", MACH64_READ( MACH64_Z_CNTL ) ); - DRM_INFO( " Z_OFF_PITCH = 0x%08x\n", MACH64_READ( MACH64_Z_OFF_PITCH ) ); - DRM_INFO( "\n" ); -} - -#define MACH64_DUMP_CONTEXT 3 - -static void mach64_dump_buf_info( drm_mach64_private_t *dev_priv, drm_buf_t *buf) -{ - u32 addr = GETBUFADDR( buf ); - u32 used = buf->used >> 2; - u32 sys_addr = MACH64_READ( MACH64_BM_SYSTEM_MEM_ADDR ); - u32 *p = GETBUFPTR( buf ); - int skipped = 0; - - DRM_INFO( "buffer contents:\n" ); - - while ( used ) { - u32 reg, count; - - reg = le32_to_cpu(*p++); - if( addr <= GETBUFADDR( buf ) + MACH64_DUMP_CONTEXT * 4 || - (addr >= sys_addr - MACH64_DUMP_CONTEXT * 4 && - addr <= sys_addr + MACH64_DUMP_CONTEXT * 4) || - addr >= GETBUFADDR( buf ) + buf->used - MACH64_DUMP_CONTEXT * 4) { - DRM_INFO("%08x: 0x%08x\n", addr, reg); - } - addr += 4; - used--; - - count = (reg >> 16) + 1; - reg = reg & 0xffff; - reg = MMSELECT( reg ); - while ( count && used ) { - if( addr <= GETBUFADDR( buf ) + MACH64_DUMP_CONTEXT * 4 || - (addr >= sys_addr - MACH64_DUMP_CONTEXT * 4 && - addr <= sys_addr + MACH64_DUMP_CONTEXT * 4) || - addr >= GETBUFADDR( buf ) + buf->used - MACH64_DUMP_CONTEXT * 4) { - DRM_INFO("%08x: 0x%04x = 0x%08x\n", addr, reg, le32_to_cpu(*p)); - skipped = 0; - } else { - if( !skipped ) { - DRM_INFO( " ...\n" ); - skipped = 1; - } - } - p++; - addr += 4; - used--; - - reg += 4; - count--; - } - } - - DRM_INFO( "\n" ); -} - -void mach64_dump_ring_info( drm_mach64_private_t *dev_priv ) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - int i, skipped; - - DRM_INFO( "\n" ); - - DRM_INFO("ring contents:\n"); - DRM_INFO(" head_addr: 0x%08x head: %u tail: %u\n\n", - ring->head_addr, ring->head, ring->tail ); - - skipped = 0; - for ( i = 0; i < ring->size / sizeof(u32); i += 4) { - if( i <= MACH64_DUMP_CONTEXT * 4 || - i >= ring->size / sizeof(u32) - MACH64_DUMP_CONTEXT * 4 || - (i >= ring->tail - MACH64_DUMP_CONTEXT * 4 && - i <= ring->tail + MACH64_DUMP_CONTEXT * 4) || - (i >= ring->head - MACH64_DUMP_CONTEXT * 4 && - i <= ring->head + MACH64_DUMP_CONTEXT * 4)) { - DRM_INFO( " 0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x%s%s\n", - ring->start_addr + i * sizeof(u32), - le32_to_cpu(((u32*) ring->start)[i + 0]), - le32_to_cpu(((u32*) ring->start)[i + 1]), - le32_to_cpu(((u32*) ring->start)[i + 2]), - le32_to_cpu(((u32*) ring->start)[i + 3]), - i == ring->head ? " (head)" : "", - i == ring->tail ? " (tail)" : "" - ); - skipped = 0; - } else { - if( !skipped ) { - DRM_INFO( " ...\n" ); - skipped = 1; - } - } - } - - DRM_INFO( "\n" ); - - if( ring->head >= 0 && ring->head < ring->size / sizeof(u32) ) { - struct list_head *ptr; - u32 addr = le32_to_cpu(((u32 *)ring->start)[ring->head + 1]); - - list_for_each(ptr, &dev_priv->pending) { - drm_mach64_freelist_t *entry = - list_entry(ptr, drm_mach64_freelist_t, list); - drm_buf_t *buf = entry->buf; - - u32 buf_addr = GETBUFADDR( buf ); - - if ( buf_addr <= addr && addr < buf_addr + buf->used ) { - mach64_dump_buf_info ( dev_priv, buf ); - } - } - } - - DRM_INFO( "\n" ); - DRM_INFO( " BM_GUI_TABLE = 0x%08x\n", MACH64_READ( MACH64_BM_GUI_TABLE ) ); - DRM_INFO( "\n" ); - DRM_INFO( "BM_FRAME_BUF_OFFSET = 0x%08x\n", MACH64_READ( MACH64_BM_FRAME_BUF_OFFSET ) ); - DRM_INFO( " BM_SYSTEM_MEM_ADDR = 0x%08x\n", MACH64_READ( MACH64_BM_SYSTEM_MEM_ADDR ) ); - DRM_INFO( " BM_COMMAND = 0x%08x\n", MACH64_READ( MACH64_BM_COMMAND ) ); - DRM_INFO( "\n" ); - DRM_INFO( " BM_STATUS = 0x%08x\n", MACH64_READ( MACH64_BM_STATUS ) ); - DRM_INFO( " BUS_CNTL = 0x%08x\n", MACH64_READ( MACH64_BUS_CNTL ) ); - DRM_INFO( " FIFO_STAT = 0x%08x\n", MACH64_READ( MACH64_FIFO_STAT ) ); - DRM_INFO( " GUI_STAT = 0x%08x\n", MACH64_READ( MACH64_GUI_STAT ) ); - DRM_INFO( " SRC_CNTL = 0x%08x\n", MACH64_READ( MACH64_SRC_CNTL ) ); -} - - -/* ================================================================ - * DMA test and initialization - */ - -static int mach64_bm_dma_test( drm_device_t *dev ) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - dma_addr_t data_handle; - void *cpu_addr_data; - u32 data_addr; - u32 *table, *data; - u32 expected[2]; - u32 src_cntl, pat_reg0, pat_reg1; - int i, count, failed; - - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - table = (u32 *) dev_priv->ring.start; - - /* FIXME: get a dma buffer from the freelist here */ - DRM_DEBUG( "Allocating data memory ...\n" ); - cpu_addr_data = DRM(pci_alloc)( dev, 0x1000, 0x1000, 0xfffffffful, &data_handle ); - if (!cpu_addr_data || !data_handle) { - DRM_INFO( "data-memory allocation failed!\n" ); - return DRM_ERR(ENOMEM); - } else { - data = (u32 *) cpu_addr_data; - data_addr = (u32) data_handle; - } - - /* Save the X server's value for SRC_CNTL and restore it - * in case our test fails. This prevents the X server - * from disabling it's cache for this register - */ - src_cntl = MACH64_READ( MACH64_SRC_CNTL ); - pat_reg0 = MACH64_READ( MACH64_PAT_REG0 ); - pat_reg1 = MACH64_READ( MACH64_PAT_REG1 ); - - mach64_do_wait_for_fifo( dev_priv, 3 ); - - MACH64_WRITE( MACH64_SRC_CNTL, 0 ); - MACH64_WRITE( MACH64_PAT_REG0, 0x11111111 ); - MACH64_WRITE( MACH64_PAT_REG1, 0x11111111 ); - - mach64_do_wait_for_idle( dev_priv ); - - for (i=0; i < 2; i++) { - u32 reg; - reg = MACH64_READ( (MACH64_PAT_REG0 + i*4) ); - DRM_DEBUG( "(Before DMA Transfer) reg %d = 0x%08x\n", i, reg ); - if ( reg != 0x11111111 ) { - DRM_INFO( "Error initializing test registers\n" ); - DRM_INFO( "resetting engine ...\n"); - mach64_do_engine_reset( dev_priv ); - DRM_INFO( "freeing data buffer memory.\n" ); - DRM(pci_free)( dev, 0x1000, cpu_addr_data, data_handle ); - return DRM_ERR(EIO); - } - } - - /* fill up a buffer with sets of 2 consecutive writes starting with PAT_REG0 */ - count = 0; - - data[count++] = cpu_to_le32(DMAREG(MACH64_PAT_REG0) | (1 << 16)); - data[count++] = expected[0] = 0x22222222; - data[count++] = expected[1] = 0xaaaaaaaa; - - while (count < 1020) { - data[count++] = cpu_to_le32(DMAREG(MACH64_PAT_REG0) | (1 << 16)); - data[count++] = 0x22222222; - data[count++] = 0xaaaaaaaa; - } - data[count++] = cpu_to_le32(DMAREG(MACH64_SRC_CNTL) | (0 << 16)); - data[count++] = 0; - - DRM_DEBUG( "Preparing table ...\n" ); - table[MACH64_DMA_FRAME_BUF_OFFSET] = cpu_to_le32(MACH64_BM_ADDR + - MACH64_APERTURE_OFFSET); - table[MACH64_DMA_SYS_MEM_ADDR] = cpu_to_le32(data_addr); - table[MACH64_DMA_COMMAND] = cpu_to_le32(count * sizeof( u32 ) - | MACH64_DMA_HOLD_OFFSET - | MACH64_DMA_EOL); - table[MACH64_DMA_RESERVED] = 0; - - DRM_DEBUG( "table[0] = 0x%08x\n", table[0] ); - DRM_DEBUG( "table[1] = 0x%08x\n", table[1] ); - DRM_DEBUG( "table[2] = 0x%08x\n", table[2] ); - DRM_DEBUG( "table[3] = 0x%08x\n", table[3] ); - - for ( i = 0 ; i < 6 ; i++ ) { - DRM_DEBUG( " data[%d] = 0x%08x\n", i, data[i] ); - } - DRM_DEBUG( " ...\n" ); - for ( i = count-5 ; i < count ; i++ ) { - DRM_DEBUG( " data[%d] = 0x%08x\n", i, data[i] ); - } - - DRM_MEMORYBARRIER(); - - DRM_DEBUG( "waiting for idle...\n" ); - if ( ( i = mach64_do_wait_for_idle( dev_priv ) ) ) { - DRM_INFO( "mach64_do_wait_for_idle failed (result=%d)\n", i); - DRM_INFO( "resetting engine ...\n"); - mach64_do_engine_reset( dev_priv ); - mach64_do_wait_for_fifo( dev_priv, 3 ); - MACH64_WRITE( MACH64_SRC_CNTL, src_cntl ); - MACH64_WRITE( MACH64_PAT_REG0, pat_reg0 ); - MACH64_WRITE( MACH64_PAT_REG1, pat_reg1 ); - DRM_INFO( "freeing data buffer memory.\n" ); - DRM(pci_free)( dev, 0x1000, cpu_addr_data, data_handle ); - return i; - } - DRM_DEBUG( "waiting for idle...done\n" ); - - DRM_DEBUG( "BUS_CNTL = 0x%08x\n", MACH64_READ( MACH64_BUS_CNTL ) ); - DRM_DEBUG( "SRC_CNTL = 0x%08x\n", MACH64_READ( MACH64_SRC_CNTL ) ); - DRM_DEBUG( "\n" ); - DRM_DEBUG( "data bus addr = 0x%08x\n", data_addr ); - DRM_DEBUG( "table bus addr = 0x%08x\n", dev_priv->ring.start_addr ); - - DRM_DEBUG( "starting DMA transfer...\n" ); - MACH64_WRITE( MACH64_BM_GUI_TABLE_CMD, - dev_priv->ring.start_addr | - MACH64_CIRCULAR_BUF_SIZE_16KB ); - - MACH64_WRITE( MACH64_SRC_CNTL, - MACH64_SRC_BM_ENABLE | MACH64_SRC_BM_SYNC | - MACH64_SRC_BM_OP_SYSTEM_TO_REG ); - - /* Kick off the transfer */ - DRM_DEBUG( "starting DMA transfer... done.\n" ); - MACH64_WRITE( MACH64_DST_HEIGHT_WIDTH, 0 ); - - DRM_DEBUG( "waiting for idle...\n" ); - - if ( ( i = mach64_do_wait_for_idle( dev_priv ) ) ) { - /* engine locked up, dump register state and reset */ - DRM_INFO( "mach64_do_wait_for_idle failed (result=%d)\n", i); - mach64_dump_engine_info( dev_priv ); - DRM_INFO( "resetting engine ...\n"); - mach64_do_engine_reset( dev_priv ); - mach64_do_wait_for_fifo( dev_priv, 3 ); - MACH64_WRITE( MACH64_SRC_CNTL, src_cntl ); - MACH64_WRITE( MACH64_PAT_REG0, pat_reg0 ); - MACH64_WRITE( MACH64_PAT_REG1, pat_reg1 ); - DRM_INFO( "freeing data buffer memory.\n" ); - DRM(pci_free)( dev, 0x1000, cpu_addr_data, data_handle ); - return i; - } - - DRM_DEBUG( "waiting for idle...done\n" ); - - /* restore SRC_CNTL */ - mach64_do_wait_for_fifo( dev_priv, 1 ); - MACH64_WRITE( MACH64_SRC_CNTL, src_cntl ); - - failed = 0; - - /* Check register values to see if the GUI master operation succeeded */ - for ( i = 0; i < 2; i++ ) { - u32 reg; - reg = MACH64_READ( (MACH64_PAT_REG0 + i*4) ); - DRM_DEBUG( "(After DMA Transfer) reg %d = 0x%08x\n", i, reg ); - if (reg != expected[i]) { - failed = -1; - } - } - - /* restore pattern registers */ - mach64_do_wait_for_fifo( dev_priv, 2 ); - MACH64_WRITE( MACH64_PAT_REG0, pat_reg0 ); - MACH64_WRITE( MACH64_PAT_REG1, pat_reg1 ); - - DRM_DEBUG( "freeing data buffer memory.\n" ); - DRM(pci_free)( dev, 0x1000, cpu_addr_data, data_handle ); - DRM_DEBUG( "returning ...\n" ); - - return failed; -} - - -static int mach64_do_dma_init( drm_device_t *dev, drm_mach64_init_t *init ) -{ - drm_mach64_private_t *dev_priv; - u32 tmp; - int i, ret; - - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - dev_priv = DRM(alloc)( sizeof(drm_mach64_private_t), DRM_MEM_DRIVER ); - if ( dev_priv == NULL ) - return DRM_ERR(ENOMEM); - - memset( dev_priv, 0, sizeof(drm_mach64_private_t) ); - - dev_priv->is_pci = init->is_pci; - - dev_priv->fb_bpp = init->fb_bpp; - dev_priv->front_offset = init->front_offset; - dev_priv->front_pitch = init->front_pitch; - dev_priv->back_offset = init->back_offset; - dev_priv->back_pitch = init->back_pitch; - - dev_priv->depth_bpp = init->depth_bpp; - dev_priv->depth_offset = init->depth_offset; - dev_priv->depth_pitch = init->depth_pitch; - - dev_priv->front_offset_pitch = (((dev_priv->front_pitch/8) << 22) | - (dev_priv->front_offset >> 3)); - dev_priv->back_offset_pitch = (((dev_priv->back_pitch/8) << 22) | - (dev_priv->back_offset >> 3)); - dev_priv->depth_offset_pitch = (((dev_priv->depth_pitch/8) << 22) | - (dev_priv->depth_offset >> 3)); - - dev_priv->usec_timeout = 1000000; - - /* Set up the freelist, placeholder list and pending list */ - INIT_LIST_HEAD(&dev_priv->free_list); - INIT_LIST_HEAD(&dev_priv->placeholders); - INIT_LIST_HEAD(&dev_priv->pending); - - DRM_GETSAREA(); - - if (!dev_priv->sarea) { - DRM_ERROR("can not find sarea!\n"); - dev->dev_private = (void *)dev_priv; - mach64_do_cleanup_dma(dev); - return DRM_ERR(EINVAL); - } - dev_priv->fb = drm_core_findmap(dev, init->fb_offset); - if (!dev_priv->fb) { - DRM_ERROR("can not find frame buffer map!\n"); - dev->dev_private = (void *)dev_priv; - mach64_do_cleanup_dma(dev); - return DRM_ERR(EINVAL); - } - dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset); - if (!dev_priv->mmio) { - DRM_ERROR("can not find mmio map!\n"); - dev->dev_private = (void *)dev_priv; - mach64_do_cleanup_dma(dev); - return DRM_ERR(EINVAL); - } - - dev_priv->sarea_priv = (drm_mach64_sarea_t *) - ((u8 *)dev_priv->sarea->handle + - init->sarea_priv_offset); - - if( !dev_priv->is_pci ) { - dev_priv->ring_map = drm_core_findmap(dev, init->ring_offset); - if ( !dev_priv->ring_map ) { - DRM_ERROR( "can not find ring map!\n" ); - dev->dev_private = (void *)dev_priv; - mach64_do_cleanup_dma(dev); - return DRM_ERR(EINVAL); - } - drm_core_ioremap( dev_priv->ring_map, dev ); - if ( !dev_priv->ring_map->handle ) { - DRM_ERROR( "can not ioremap virtual address for" - " descriptor ring\n" ); - dev->dev_private = (void *) dev_priv; - mach64_do_cleanup_dma( dev ); - return DRM_ERR(ENOMEM); - } - dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset); - if ( !dev->agp_buffer_map ) { - DRM_ERROR( "can not find dma buffer map!\n" ); - dev->dev_private = (void *)dev_priv; - mach64_do_cleanup_dma( dev ); - return DRM_ERR(EINVAL); - } - /* there might be a nicer way to do this - - dev isn't passed all the way though the mach64 - DA */ - dev_priv->dev_buffers = dev->agp_buffer_map; - - drm_core_ioremap( dev->agp_buffer_map, dev ); - if ( !dev->agp_buffer_map->handle ) { - DRM_ERROR( "can not ioremap virtual address for" - " dma buffer\n" ); - dev->dev_private = (void *) dev_priv; - mach64_do_cleanup_dma( dev ); - return DRM_ERR(ENOMEM); - } - dev_priv->agp_textures = drm_core_findmap(dev, init->agp_textures_offset); - if (!dev_priv->agp_textures) { - DRM_ERROR( "can not find agp texture region!\n" ); - dev->dev_private = (void *)dev_priv; - mach64_do_cleanup_dma( dev ); - return DRM_ERR(EINVAL); - } - } - - dev->dev_private = (void *) dev_priv; - - dev_priv->driver_mode = init->dma_mode; - - /* changing the FIFO size from the default causes problems with DMA */ - tmp = MACH64_READ( MACH64_GUI_CNTL ); - if ( (tmp & MACH64_CMDFIFO_SIZE_MASK) != MACH64_CMDFIFO_SIZE_128 ) { - DRM_INFO( "Setting FIFO size to 128 entries\n"); - /* FIFO must be empty to change the FIFO depth */ - if ((ret=mach64_do_wait_for_idle( dev_priv ))) { - DRM_ERROR("wait for idle failed before changing FIFO depth!\n"); - mach64_do_cleanup_dma( dev ); - return ret; - } - MACH64_WRITE( MACH64_GUI_CNTL, ( ( tmp & ~MACH64_CMDFIFO_SIZE_MASK ) \ - | MACH64_CMDFIFO_SIZE_128 ) ); - /* need to read GUI_STAT for proper sync according to docs */ - if ((ret=mach64_do_wait_for_idle( dev_priv ))) { - DRM_ERROR("wait for idle failed when changing FIFO depth!\n"); - mach64_do_cleanup_dma( dev ); - return ret; - } - } - - /* allocate descriptor memory from pci pool */ - DRM_DEBUG( "Allocating dma descriptor ring\n" ); - dev_priv->ring.size = 0x4000; /* 16KB */ - - if ( dev_priv->is_pci ) { - dev_priv->ring.start = DRM(pci_alloc)( dev, dev_priv->ring.size, - dev_priv->ring.size, 0xfffffffful, - &dev_priv->ring.handle ); - - if (!dev_priv->ring.start || !dev_priv->ring.handle) { - DRM_ERROR( "Allocating dma descriptor ring failed\n"); - return DRM_ERR(ENOMEM); - } else { - dev_priv->ring.start_addr = (u32) dev_priv->ring.handle; - } - } else { - dev_priv->ring.start = dev_priv->ring_map->handle; - dev_priv->ring.start_addr = (u32) dev_priv->ring_map->offset; - } - - memset( dev_priv->ring.start, 0, dev_priv->ring.size ); - DRM_INFO( "descriptor ring: cpu addr 0x%08x, bus addr: 0x%08x\n", - (u32) dev_priv->ring.start, dev_priv->ring.start_addr ); - - ret = 0; - if ( dev_priv->driver_mode != MACH64_MODE_MMIO ) { - - /* enable block 1 registers and bus mastering */ - MACH64_WRITE( MACH64_BUS_CNTL, - ( ( MACH64_READ(MACH64_BUS_CNTL) - | MACH64_BUS_EXT_REG_EN ) - & ~MACH64_BUS_MASTER_DIS ) ); - - /* try a DMA GUI-mastering pass and fall back to MMIO if it fails */ - DRM_DEBUG( "Starting DMA test...\n"); - if ( (ret=mach64_bm_dma_test( dev )) ) { - dev_priv->driver_mode = MACH64_MODE_MMIO; - } - } - - switch (dev_priv->driver_mode) { - case MACH64_MODE_MMIO: - MACH64_WRITE( MACH64_BUS_CNTL, ( MACH64_READ(MACH64_BUS_CNTL) - | MACH64_BUS_EXT_REG_EN - | MACH64_BUS_MASTER_DIS ) ); - if ( init->dma_mode == MACH64_MODE_MMIO ) - DRM_INFO( "Forcing pseudo-DMA mode\n" ); - else - DRM_INFO( "DMA test failed (ret=%d), using pseudo-DMA mode\n", ret ); - break; - case MACH64_MODE_DMA_SYNC: - DRM_INFO( "DMA test succeeded, using synchronous DMA mode\n"); - break; - case MACH64_MODE_DMA_ASYNC: - default: - DRM_INFO( "DMA test succeeded, using asynchronous DMA mode\n"); - } - - dev_priv->ring_running = 0; - - /* setup offsets for physical address of table start and end */ - dev_priv->ring.head_addr = dev_priv->ring.start_addr; - dev_priv->ring.head = dev_priv->ring.tail = 0; - dev_priv->ring.tail_mask = (dev_priv->ring.size / sizeof(u32)) - 1; - dev_priv->ring.space = dev_priv->ring.size; - - /* setup physical address and size of descriptor table */ - mach64_do_wait_for_fifo( dev_priv, 1 ); - MACH64_WRITE( MACH64_BM_GUI_TABLE_CMD, - ( dev_priv->ring.head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB ) ); - - /* init frame counter */ - dev_priv->sarea_priv->frames_queued = 0; - for (i = 0; i < MACH64_MAX_QUEUED_FRAMES; i++) { - dev_priv->frame_ofs[i] = ~0; /* All ones indicates placeholder */ - } - - /* Allocate the DMA buffer freelist */ - if ( (ret=mach64_init_freelist( dev )) ) { - DRM_ERROR("Freelist allocation failed\n"); - mach64_do_cleanup_dma( dev ); - return ret; - } - - return 0; -} - -/* =================================================================== - * MMIO Pseudo-DMA (intended primarily for debugging, not performance) - */ - -int mach64_do_dispatch_pseudo_dma( drm_mach64_private_t *dev_priv ) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - volatile u32 *ring_read; - struct list_head *ptr; - drm_mach64_freelist_t *entry; - drm_buf_t *buf = NULL; - u32 *buf_ptr; - u32 used, reg, target; - int fifo, count, found, ret, no_idle_wait; - - fifo = count = reg = no_idle_wait = 0; - target = MACH64_BM_ADDR; - - if ( (ret=mach64_do_wait_for_idle( dev_priv )) < 0) { - DRM_INFO( "%s: idle failed before pseudo-dma dispatch, resetting engine\n", - __FUNCTION__); - mach64_dump_engine_info( dev_priv ); - mach64_do_engine_reset( dev_priv ); - return ret; - } - - ring_read = (u32 *) ring->start; - - while ( ring->tail != ring->head ) { - u32 buf_addr, new_target, offset; - u32 bytes, remaining, head, eol; - - head = ring->head; - - new_target = le32_to_cpu( ring_read[head++] ) - MACH64_APERTURE_OFFSET; - buf_addr = le32_to_cpu( ring_read[head++] ); - eol = le32_to_cpu( ring_read[head] ) & MACH64_DMA_EOL; - bytes = le32_to_cpu( ring_read[head++] ) - & ~(MACH64_DMA_HOLD_OFFSET | MACH64_DMA_EOL); - head++; - head &= ring->tail_mask; - - /* can't wait for idle between a blit setup descriptor - * and a HOSTDATA descriptor or the engine will lock - */ - if (new_target == MACH64_BM_HOSTDATA && target == MACH64_BM_ADDR) - no_idle_wait = 1; - - target = new_target; - - found = 0; - offset = 0; - list_for_each(ptr, &dev_priv->pending) - { - entry = list_entry(ptr, drm_mach64_freelist_t, list); - buf = entry->buf; - offset = buf_addr - GETBUFADDR( buf ); - if (offset >= 0 && offset < MACH64_BUFFER_SIZE) { - found = 1; - break; - } - } - - if (!found || buf == NULL) { - DRM_ERROR("Couldn't find pending buffer: head: %u tail: %u buf_addr: 0x%08x %s\n", - head, ring->tail, buf_addr, (eol ? "eol" : "")); - mach64_dump_ring_info( dev_priv ); - mach64_do_engine_reset( dev_priv ); - return DRM_ERR(EINVAL); - } - - /* Hand feed the buffer to the card via MMIO, waiting for the fifo - * every 16 writes - */ - DRM_DEBUG("target: (0x%08x) %s\n", target, - (target == MACH64_BM_HOSTDATA ? "BM_HOSTDATA" : "BM_ADDR")); - DRM_DEBUG("offset: %u bytes: %u used: %u\n", offset, bytes, buf->used); - - remaining = (buf->used - offset) >> 2; /* dwords remaining in buffer */ - used = bytes >> 2; /* dwords in buffer for this descriptor */ - buf_ptr = (u32 *)((char *)GETBUFPTR( buf ) + offset); - - while ( used ) { - - if (count == 0) { - if (target == MACH64_BM_HOSTDATA) { - reg = DMAREG(MACH64_HOST_DATA0); - count = (remaining > 16) ? 16 : remaining; - fifo = 0; - } else { - reg = le32_to_cpu(*buf_ptr++); - used--; - count = (reg >> 16) + 1; - } - - reg = reg & 0xffff; - reg = MMSELECT( reg ); - } - while ( count && used ) { - if ( !fifo ) { - if (no_idle_wait) { - if ( (ret=mach64_do_wait_for_fifo( dev_priv, 16 )) < 0 ) { - no_idle_wait = 0; - return ret; - } - } else { - if ( (ret=mach64_do_wait_for_idle( dev_priv )) < 0 ) { - return ret; - } - } - fifo = 16; - } - --fifo; - MACH64_WRITE(reg, le32_to_cpu(*buf_ptr++)); - used--; remaining--; - - reg += 4; - count--; - } - } - ring->head = head; - ring->head_addr = ring->start_addr + (ring->head * sizeof(u32)); - ring->space += (4 * sizeof(u32)); - } - - if ( (ret=mach64_do_wait_for_idle( dev_priv )) < 0 ) { - return ret; - } - MACH64_WRITE( MACH64_BM_GUI_TABLE_CMD, - ring->head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB ); - - DRM_DEBUG( "%s completed\n", __FUNCTION__ ); - return 0; -} - -/* ================================================================ - * DMA cleanup - */ - -int mach64_do_cleanup_dma( drm_device_t *dev ) -{ - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - /* Make sure interrupts are disabled here because the uninstall ioctl - * may not have been called from userspace and after dev_private - * is freed, it's too late. - */ - if ( dev->irq ) DRM(irq_uninstall)(dev); - - if ( dev->dev_private ) { - drm_mach64_private_t *dev_priv = dev->dev_private; - - if ( dev_priv->is_pci ) { - if ( (dev_priv->ring.start != NULL) && dev_priv->ring.handle ) { - DRM(pci_free)( dev, dev_priv->ring.size, - dev_priv->ring.start, dev_priv->ring.handle ); - } - } else { - if ( dev_priv->ring_map ) - drm_core_ioremapfree( dev_priv->ring_map, dev ); - } - - if ( dev->agp_buffer_map ) { - drm_core_ioremapfree( dev->agp_buffer_map, dev ); - dev->agp_buffer_map = NULL; - } - - mach64_destroy_freelist( dev ); - - DRM(free)( dev_priv, sizeof(drm_mach64_private_t), - DRM_MEM_DRIVER ); - dev->dev_private = NULL; - } - - return 0; -} - -/* ================================================================ - * IOCTL handlers - */ - -int mach64_dma_init( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_mach64_init_t init; - - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( init, (drm_mach64_init_t *)data, - sizeof(init) ); - - switch ( init.func ) { - case DRM_MACH64_INIT_DMA: - return mach64_do_dma_init( dev, &init ); - case DRM_MACH64_CLEANUP_DMA: - return mach64_do_cleanup_dma( dev ); - } - - return DRM_ERR(EINVAL); -} - -int mach64_dma_idle( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_mach64_private_t *dev_priv = dev->dev_private; - - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - return mach64_do_dma_idle( dev_priv ); -} - -int mach64_dma_flush( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_mach64_private_t *dev_priv = dev->dev_private; - - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - return mach64_do_dma_flush( dev_priv ); -} - -int mach64_engine_reset( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_mach64_private_t *dev_priv = dev->dev_private; - - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - return mach64_do_engine_reset( dev_priv ); -} - - -/* ================================================================ - * Freelist management - */ - -int mach64_init_freelist( drm_device_t *dev ) -{ - drm_device_dma_t *dma = dev->dma; - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_freelist_t *entry; - struct list_head *ptr; - int i; - - DRM_DEBUG("%s: adding %d buffers to freelist\n", __FUNCTION__, dma->buf_count); - - for ( i = 0 ; i < dma->buf_count ; i++ ) { - if ((entry = - (drm_mach64_freelist_t *) DRM(alloc)(sizeof(drm_mach64_freelist_t), - DRM_MEM_BUFLISTS)) == NULL) - return DRM_ERR(ENOMEM); - memset( entry, 0, sizeof(drm_mach64_freelist_t) ); - entry->buf = dma->buflist[i]; - ptr = &entry->list; - list_add_tail(ptr, &dev_priv->free_list); - } - - return 0; -} - -void mach64_destroy_freelist( drm_device_t *dev ) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_freelist_t *entry; - struct list_head *ptr; - struct list_head *tmp; - - DRM_DEBUG("%s\n", __FUNCTION__); - - list_for_each_safe(ptr, tmp, &dev_priv->pending) - { - list_del(ptr); - entry = list_entry(ptr, drm_mach64_freelist_t, list); - DRM(free)(entry, sizeof(*entry), DRM_MEM_BUFLISTS); - } - list_for_each_safe(ptr, tmp, &dev_priv->placeholders) - { - list_del(ptr); - entry = list_entry(ptr, drm_mach64_freelist_t, list); - DRM(free)(entry, sizeof(*entry), DRM_MEM_BUFLISTS); - } - - list_for_each_safe(ptr, tmp, &dev_priv->free_list) - { - list_del(ptr); - entry = list_entry(ptr, drm_mach64_freelist_t, list); - DRM(free)(entry, sizeof(*entry), DRM_MEM_BUFLISTS); - } -} - -/* IMPORTANT: This function should only be called when the engine is idle or locked up, - * as it assumes all buffers in the pending list have been completed by the hardware. - */ -int mach64_do_release_used_buffers( drm_mach64_private_t *dev_priv ) -{ - struct list_head *ptr; - struct list_head *tmp; - drm_mach64_freelist_t *entry; - int i; - - if ( list_empty(&dev_priv->pending) ) - return 0; - - /* Iterate the pending list and move all buffers into the freelist... */ - i = 0; - list_for_each_safe(ptr, tmp, &dev_priv->pending) - { - entry = list_entry(ptr, drm_mach64_freelist_t, list); - if (entry->discard) { - entry->buf->pending = 0; - list_del(ptr); - list_add_tail(ptr, &dev_priv->free_list); - i++; - } - } - - DRM_DEBUG( "%s: released %d buffers from pending list\n", __FUNCTION__, i ); - - return 0; -} - -drm_buf_t *mach64_freelist_get( drm_mach64_private_t *dev_priv ) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - drm_mach64_freelist_t *entry; - struct list_head *ptr; - struct list_head *tmp; - int t; - - if ( list_empty(&dev_priv->free_list) ) { - u32 head, tail, ofs; - - if ( list_empty( &dev_priv->pending ) ) { - DRM_ERROR( "Couldn't get buffer - pending and free lists empty\n" ); - t = 0; - list_for_each( ptr, &dev_priv->placeholders ) { - t++; - } - DRM_INFO( "Placeholders: %d\n", t ); - return NULL; - } - - tail = ring->tail; - for ( t = 0 ; t < dev_priv->usec_timeout ; t++ ) { - mach64_ring_tick( dev_priv, ring ); - head = ring->head; - - if ( head == tail ) { -#if MACH64_EXTRA_CHECKING - if ( MACH64_READ(MACH64_GUI_STAT) & MACH64_GUI_ACTIVE ) { - DRM_ERROR( "Empty ring with non-idle engine!\n" ); - mach64_dump_ring_info( dev_priv ); - return NULL; - } -#endif - /* last pass is complete, so release everything */ - mach64_do_release_used_buffers( dev_priv ); - DRM_DEBUG( "%s: idle engine, freed all buffers.\n", __FUNCTION__ ); - if ( list_empty(&dev_priv->free_list) ) { - DRM_ERROR( "Freelist empty with idle engine\n" ); - return NULL; - } - goto _freelist_entry_found; - } - /* Look for a completed buffer and bail out of the loop - * as soon as we find one -- don't waste time trying - * to free extra bufs here, leave that to do_release_used_buffers - */ - list_for_each_safe(ptr, tmp, &dev_priv->pending) { - entry = list_entry(ptr, drm_mach64_freelist_t, list); - ofs = entry->ring_ofs; - if ( entry->discard && - ((head < tail && (ofs < head || ofs >= tail)) || - (head > tail && (ofs < head && ofs >= tail))) ) { -#if MACH64_EXTRA_CHECKING - int i; - - for ( i = head ; i != tail ; i = (i + 4) & ring->tail_mask ) { - u32 o1 = le32_to_cpu(((u32 *)ring->start)[i + 1]); - u32 o2 = GETBUFADDR( entry->buf ); - - if ( o1 == o2 ) { - DRM_ERROR ( "Attempting to free used buffer: " - "i=%d buf=0x%08x\n", i, o1 ); - mach64_dump_ring_info( dev_priv ); - return NULL; - } - } -#endif - /* found a processed buffer */ - entry->buf->pending = 0; - list_del(ptr); - entry->buf->used = 0; - list_add_tail(ptr, &dev_priv->placeholders); - DRM_DEBUG( "%s: freed processed buffer (head=%d tail=%d " - "buf ring ofs=%d).\n", __FUNCTION__, head, tail, ofs ); - return entry->buf; - } - } - DRM_UDELAY( 1 ); - } - mach64_dump_ring_info( dev_priv ); - DRM_ERROR( "timeout waiting for buffers: ring head_addr: 0x%08x head: %d tail: %d\n", - ring->head_addr, ring->head, ring->tail ); - return NULL; - } - -_freelist_entry_found: - ptr = dev_priv->free_list.next; - list_del(ptr); - entry = list_entry(ptr, drm_mach64_freelist_t, list); - entry->buf->used = 0; - list_add_tail(ptr, &dev_priv->placeholders); - return entry->buf; -} - -/* ================================================================ - * DMA buffer request and submission IOCTL handler - */ - -static int mach64_dma_get_buffers( DRMFILE filp, drm_device_t *dev, drm_dma_t *d ) -{ - int i; - drm_buf_t *buf; - drm_mach64_private_t *dev_priv = dev->dev_private; - - for ( i = d->granted_count ; i < d->request_count ; i++ ) { - buf = mach64_freelist_get( dev_priv ); -#if MACH64_EXTRA_CHECKING - if ( !buf ) return DRM_ERR(EFAULT); -#else - if ( !buf ) return DRM_ERR(EAGAIN); -#endif - - buf->filp = filp; - - if ( DRM_COPY_TO_USER( &d->request_indices[i], &buf->idx, - sizeof(buf->idx) ) ) - return DRM_ERR(EFAULT); - if ( DRM_COPY_TO_USER( &d->request_sizes[i], &buf->total, - sizeof(buf->total) ) ) - return DRM_ERR(EFAULT); - - d->granted_count++; - } - return 0; -} - -int mach64_dma_buffers( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_device_dma_t *dma = dev->dma; - drm_dma_t d; - int ret = 0; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( d, (drm_dma_t *)data, sizeof(d) ); - - /* Please don't send us buffers. - */ - if ( d.send_count != 0 ) - { - DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n", - DRM_CURRENTPID, d.send_count ); - return DRM_ERR(EINVAL); - } - - /* We'll send you buffers. - */ - if ( d.request_count < 0 || d.request_count > dma->buf_count ) - { - DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n", - DRM_CURRENTPID, d.request_count, dma->buf_count ); - ret = DRM_ERR(EINVAL); - } - - d.granted_count = 0; - - if ( d.request_count ) - { - ret = mach64_dma_get_buffers( filp, dev, &d ); - } - - DRM_COPY_TO_USER_IOCTL( (drm_dma_t *)data, d, sizeof(d) ); - - return ret; -} - -static void mach64_driver_pretakedown(drm_device_t *dev) -{ - mach64_do_cleanup_dma( dev ); -} - -void mach64_driver_register_fns(drm_device_t *dev) -{ - dev->driver_features = DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_IRQ_VBL; - dev->fn_tbl.pretakedown = mach64_driver_pretakedown; - dev->fn_tbl.vblank_wait = mach64_driver_vblank_wait; - dev->fn_tbl.irq_preinstall = mach64_driver_irq_preinstall; - dev->fn_tbl.irq_postinstall = mach64_driver_irq_postinstall; - dev->fn_tbl.irq_uninstall = mach64_driver_irq_uninstall; - dev->fn_tbl.irq_handler = mach64_driver_irq_handler; -} diff --git a/shared/mach64_drm.h b/shared/mach64_drm.h deleted file mode 100644 index 9d748a37e..000000000 --- a/shared/mach64_drm.h +++ /dev/null @@ -1,258 +0,0 @@ -/* mach64_drm.h -- Public header for the mach64 driver -*- linux-c -*- - * Created: Thu Nov 30 20:04:32 2000 by gareth@valinux.com - * - * Copyright 2000 Gareth Hughes - * Copyright 2002 Frank C. Earl - * Copyright 2002-2003 Leif Delgass - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - * Frank C. Earl <fearl@airmail.net> - * Leif Delgass <ldelgass@retinalburn.net> - */ - -#ifndef __MACH64_DRM_H__ -#define __MACH64_DRM_H__ - - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (mach64_sarea.h) - */ -#ifndef __MACH64_SAREA_DEFINES__ -#define __MACH64_SAREA_DEFINES__ - -/* What needs to be changed for the current vertex buffer? - * GH: We're going to be pedantic about this. We want the card to do as - * little as possible, so let's avoid having it fetch a whole bunch of - * register values that don't change all that often, if at all. - */ -#define MACH64_UPLOAD_DST_OFF_PITCH 0x0001 -#define MACH64_UPLOAD_Z_OFF_PITCH 0x0002 -#define MACH64_UPLOAD_Z_ALPHA_CNTL 0x0004 -#define MACH64_UPLOAD_SCALE_3D_CNTL 0x0008 -#define MACH64_UPLOAD_DP_FOG_CLR 0x0010 -#define MACH64_UPLOAD_DP_WRITE_MASK 0x0020 -#define MACH64_UPLOAD_DP_PIX_WIDTH 0x0040 -#define MACH64_UPLOAD_SETUP_CNTL 0x0080 -#define MACH64_UPLOAD_MISC 0x0100 -#define MACH64_UPLOAD_TEXTURE 0x0200 -#define MACH64_UPLOAD_TEX0IMAGE 0x0400 -#define MACH64_UPLOAD_TEX1IMAGE 0x0800 -#define MACH64_UPLOAD_CLIPRECTS 0x1000 /* handled client-side */ -#define MACH64_UPLOAD_CONTEXT 0x00ff -#define MACH64_UPLOAD_ALL 0x1fff - -/* DMA buffer size - */ -#define MACH64_BUFFER_SIZE 16384 - -/* Max number of swaps allowed on the ring - * before the client must wait - */ -#define MACH64_MAX_QUEUED_FRAMES 3 - -/* Byte offsets for host blit buffer data - */ -#define MACH64_HOSTDATA_BLIT_OFFSET 104 - -/* Keep these small for testing. - */ -#define MACH64_NR_SAREA_CLIPRECTS 8 - - -#define MACH64_CARD_HEAP 0 -#define MACH64_AGP_HEAP 1 -#define MACH64_NR_TEX_HEAPS 2 -#define MACH64_NR_TEX_REGIONS 64 -#define MACH64_LOG_TEX_GRANULARITY 16 - -#define MACH64_TEX_MAXLEVELS 1 - -#define MACH64_NR_CONTEXT_REGS 15 -#define MACH64_NR_TEXTURE_REGS 4 - -#endif /* __MACH64_SAREA_DEFINES__ */ - -typedef struct { - unsigned int dst_off_pitch; - - unsigned int z_off_pitch; - unsigned int z_cntl; - unsigned int alpha_tst_cntl; - - unsigned int scale_3d_cntl; - - unsigned int sc_left_right; - unsigned int sc_top_bottom; - - unsigned int dp_fog_clr; - unsigned int dp_write_mask; - unsigned int dp_pix_width; - unsigned int dp_mix; - unsigned int dp_src; - - unsigned int clr_cmp_cntl; - unsigned int gui_traj_cntl; - - unsigned int setup_cntl; - - unsigned int tex_size_pitch; - unsigned int tex_cntl; - unsigned int secondary_tex_off; - unsigned int tex_offset; -} drm_mach64_context_regs_t; - -typedef struct drm_mach64_sarea { - /* The channel for communication of state information to the kernel - * on firing a vertex dma buffer. - */ - drm_mach64_context_regs_t context_state; - unsigned int dirty; - unsigned int vertsize; - - /* The current cliprects, or a subset thereof. - */ - drm_clip_rect_t boxes[MACH64_NR_SAREA_CLIPRECTS]; - unsigned int nbox; - - /* Counters for client-side throttling of rendering clients. - */ - unsigned int frames_queued; - - /* Texture memory LRU. - */ - drm_tex_region_t tex_list[MACH64_NR_TEX_HEAPS][MACH64_NR_TEX_REGIONS+1]; - unsigned int tex_age[MACH64_NR_TEX_HEAPS]; - int ctx_owner; -} drm_mach64_sarea_t; - - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (mach64_common.h) - */ - -/* Mach64 specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ - -#define DRM_MACH64_INIT 0x00 -#define DRM_MACH64_IDLE 0x01 -#define DRM_MACH64_RESET 0x02 -#define DRM_MACH64_SWAP 0x03 -#define DRM_MACH64_CLEAR 0x04 -#define DRM_MACH64_VERTEX 0x05 -#define DRM_MACH64_BLIT 0x06 -#define DRM_MACH64_FLUSH 0x07 -#define DRM_MACH64_GETPARAM 0x08 - -#define DRM_IOCTL_MACH64_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_INIT, drm_mach64_init_t) -#define DRM_IOCTL_MACH64_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_IDLE ) -#define DRM_IOCTL_MACH64_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_RESET ) -#define DRM_IOCTL_MACH64_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_SWAP ) -#define DRM_IOCTL_MACH64_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_CLEAR, drm_mach64_clear_t) -#define DRM_IOCTL_MACH64_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_VERTEX, drm_mach64_vertex_t) -#define DRM_IOCTL_MACH64_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_BLIT, drm_mach64_blit_t) -#define DRM_IOCTL_MACH64_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_FLUSH ) -#define DRM_IOCTL_MACH64_GETPARAM DRM_IOWR( DRM_COMMAND_BASE + DRM_MACH64_GETPARAM, drm_mach64_getparam_t) - -/* Buffer flags for clears - */ -#define MACH64_FRONT 0x1 -#define MACH64_BACK 0x2 -#define MACH64_DEPTH 0x4 - -/* Primitive types for vertex buffers - */ -#define MACH64_PRIM_POINTS 0x00000000 -#define MACH64_PRIM_LINES 0x00000001 -#define MACH64_PRIM_LINE_LOOP 0x00000002 -#define MACH64_PRIM_LINE_STRIP 0x00000003 -#define MACH64_PRIM_TRIANGLES 0x00000004 -#define MACH64_PRIM_TRIANGLE_STRIP 0x00000005 -#define MACH64_PRIM_TRIANGLE_FAN 0x00000006 -#define MACH64_PRIM_QUADS 0x00000007 -#define MACH64_PRIM_QUAD_STRIP 0x00000008 -#define MACH64_PRIM_POLYGON 0x00000009 - - -typedef enum _drm_mach64_dma_mode_t { - MACH64_MODE_DMA_ASYNC, - MACH64_MODE_DMA_SYNC, - MACH64_MODE_MMIO -} drm_mach64_dma_mode_t; - -typedef struct drm_mach64_init { - enum { - DRM_MACH64_INIT_DMA = 0x01, - DRM_MACH64_CLEANUP_DMA = 0x02 - } func; - - unsigned long sarea_priv_offset; - int is_pci; - drm_mach64_dma_mode_t dma_mode; - - unsigned int fb_bpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - - unsigned int depth_bpp; - unsigned int depth_offset, depth_pitch; - - unsigned long fb_offset; - unsigned long mmio_offset; - unsigned long ring_offset; - unsigned long buffers_offset; - unsigned long agp_textures_offset; -} drm_mach64_init_t; - -typedef struct drm_mach64_clear { - unsigned int flags; - int x, y, w, h; - unsigned int clear_color; - unsigned int clear_depth; -} drm_mach64_clear_t; - -typedef struct drm_mach64_vertex { - int prim; - void *buf; /* Address of vertex buffer */ - unsigned long used; /* Number of bytes in buffer */ - int discard; /* Client finished with buffer? */ -} drm_mach64_vertex_t; - -typedef struct drm_mach64_blit { - int idx; - int pitch; - int offset; - int format; - unsigned short x, y; - unsigned short width, height; -} drm_mach64_blit_t; - -typedef struct drm_mach64_getparam { - enum { - MACH64_PARAM_FRAMES_QUEUED = 0x01, - MACH64_PARAM_IRQ_NR = 0x02 - } param; - void *value; -} drm_mach64_getparam_t; - -#endif diff --git a/shared/mach64_drv.h b/shared/mach64_drv.h deleted file mode 100644 index b49e6f655..000000000 --- a/shared/mach64_drv.h +++ /dev/null @@ -1,1040 +0,0 @@ -/* mach64_drv.h -- Private header for mach64 driver -*- linux-c -*- - * Created: Fri Nov 24 22:07:58 2000 by gareth@valinux.com - * - * Copyright 2000 Gareth Hughes - * Copyright 2002 Frank C. Earl - * Copyright 2002-2003 Leif Delgass - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - * Frank C. Earl <fearl@airmail.net> - * Leif Delgass <ldelgass@retinalburn.net> - * José Fonseca <j_r_fonseca@yahoo.co.uk> - */ - -#ifndef __MACH64_DRV_H__ -#define __MACH64_DRV_H__ - - -/* FIXME: remove these when not needed */ -/* Development driver options */ -#define MACH64_EXTRA_CHECKING 0 /* Extra sanity checks for DMA/freelist management */ -#define MACH64_VERBOSE 0 /* Verbose debugging output */ - -typedef struct drm_mach64_freelist { - struct list_head list; /* List pointers for free_list, placeholders, or pending list */ - drm_buf_t *buf; /* Pointer to the buffer */ - int discard; /* This flag is set when we're done (re)using a buffer */ - u32 ring_ofs; /* dword offset in ring of last descriptor for this buffer */ -} drm_mach64_freelist_t; - -typedef struct drm_mach64_descriptor_ring { - dma_addr_t handle; /* handle (bus address) of ring returned by pci_alloc_consistent() */ - void *start; /* write pointer (cpu address) to start of descriptor ring */ - u32 start_addr; /* bus address of beginning of descriptor ring */ - int size; /* size of ring in bytes */ - - u32 head_addr; /* bus address of descriptor ring head */ - u32 head; /* dword offset of descriptor ring head */ - u32 tail; /* dword offset of descriptor ring tail */ - u32 tail_mask; /* mask used to wrap ring */ - int space; /* number of free bytes in ring */ -} drm_mach64_descriptor_ring_t; - -typedef struct drm_mach64_private { - drm_mach64_sarea_t *sarea_priv; - - int is_pci; - drm_mach64_dma_mode_t driver_mode; /* Async DMA, sync DMA, or MMIO */ - - int usec_timeout; /* Timeout for the wait functions */ - - drm_mach64_descriptor_ring_t ring; /* DMA descriptor table (ring buffer) */ - int ring_running; /* Is bus mastering is enabled */ - - struct list_head free_list; /* Free-list head */ - struct list_head placeholders; /* Placeholder list for buffers held by clients */ - struct list_head pending; /* Buffers pending completion */ - - u32 frame_ofs[MACH64_MAX_QUEUED_FRAMES]; /* dword ring offsets of most recent frame swaps */ - - unsigned int fb_bpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - - unsigned int depth_bpp; - unsigned int depth_offset, depth_pitch; - - u32 front_offset_pitch; - u32 back_offset_pitch; - u32 depth_offset_pitch; - - drm_local_map_t *sarea; - drm_local_map_t *fb; - drm_local_map_t *mmio; - drm_local_map_t *ring_map; - drm_local_map_t *dev_buffers; /* this is a pointer to a structure in dev */ - drm_local_map_t *agp_textures; -} drm_mach64_private_t; - - /* mach64_dma.c */ -extern int mach64_dma_init( DRM_IOCTL_ARGS ); -extern int mach64_dma_idle( DRM_IOCTL_ARGS ); -extern int mach64_dma_flush( DRM_IOCTL_ARGS ); -extern int mach64_engine_reset( DRM_IOCTL_ARGS ); -extern int mach64_dma_buffers( DRM_IOCTL_ARGS ); - -extern int mach64_init_freelist( drm_device_t *dev ); -extern void mach64_destroy_freelist( drm_device_t *dev ); -extern drm_buf_t *mach64_freelist_get( drm_mach64_private_t *dev_priv ); - -extern int mach64_do_wait_for_fifo( drm_mach64_private_t *dev_priv, - int entries ); -extern int mach64_do_wait_for_idle( drm_mach64_private_t *dev_priv ); -extern int mach64_wait_ring( drm_mach64_private_t *dev_priv, int n ); -extern int mach64_do_dispatch_pseudo_dma( drm_mach64_private_t *dev_priv ); -extern int mach64_do_release_used_buffers( drm_mach64_private_t *dev_priv ); -extern void mach64_dump_engine_info( drm_mach64_private_t *dev_priv ); -extern void mach64_dump_ring_info( drm_mach64_private_t *dev_priv ); -extern int mach64_do_engine_reset( drm_mach64_private_t *dev_priv ); - -extern int mach64_do_dma_idle( drm_mach64_private_t *dev_priv ); -extern int mach64_do_dma_flush( drm_mach64_private_t *dev_priv ); -extern int mach64_do_cleanup_dma( drm_device_t *dev ); - - /* mach64_state.c */ -extern int mach64_dma_clear( DRM_IOCTL_ARGS ); -extern int mach64_dma_swap( DRM_IOCTL_ARGS ); -extern int mach64_dma_vertex( DRM_IOCTL_ARGS ); -extern int mach64_dma_blit( DRM_IOCTL_ARGS ); -extern int mach64_get_param( DRM_IOCTL_ARGS ); -extern int mach64_driver_vblank_wait(drm_device_t *dev, unsigned int *sequence); - -extern irqreturn_t mach64_driver_irq_handler( DRM_IRQ_ARGS ); -extern void mach64_driver_irq_preinstall( drm_device_t *dev ); -extern void mach64_driver_irq_postinstall( drm_device_t *dev ); -extern void mach64_driver_irq_uninstall( drm_device_t *dev ); - -/* ================================================================ - * Registers - */ - -#define MACH64_AGP_BASE 0x0148 -#define MACH64_AGP_CNTL 0x014c -#define MACH64_ALPHA_TST_CNTL 0x0550 - - -#define MACH64_DSP_CONFIG 0x0420 -#define MACH64_DSP_ON_OFF 0x0424 -#define MACH64_EXT_MEM_CNTL 0x04ac -#define MACH64_GEN_TEST_CNTL 0x04d0 -#define MACH64_HW_DEBUG 0x047c -#define MACH64_MEM_ADDR_CONFIG 0x0434 -#define MACH64_MEM_BUF_CNTL 0x042c -#define MACH64_MEM_CNTL 0x04b0 - - -#define MACH64_BM_ADDR 0x0648 -#define MACH64_BM_COMMAND 0x0188 -#define MACH64_BM_DATA 0x0648 -#define MACH64_BM_FRAME_BUF_OFFSET 0x0180 -#define MACH64_BM_GUI_TABLE 0x01b8 -#define MACH64_BM_GUI_TABLE_CMD 0x064c -# define MACH64_CIRCULAR_BUF_SIZE_16KB (0 << 0) -# define MACH64_CIRCULAR_BUF_SIZE_32KB (1 << 0) -# define MACH64_CIRCULAR_BUF_SIZE_64KB (2 << 0) -# define MACH64_CIRCULAR_BUF_SIZE_128KB (3 << 0) -# define MACH64_LAST_DESCRIPTOR (1 << 31) -#define MACH64_BM_HOSTDATA 0x0644 -#define MACH64_BM_STATUS 0x018c -#define MACH64_BM_SYSTEM_MEM_ADDR 0x0184 -#define MACH64_BM_SYSTEM_TABLE 0x01bc -#define MACH64_BUS_CNTL 0x04a0 -# define MACH64_BUS_MSTR_RESET (1 << 1) -# define MACH64_BUS_APER_REG_DIS (1 << 4) -# define MACH64_BUS_FLUSH_BUF (1 << 2) -# define MACH64_BUS_MASTER_DIS (1 << 6) -# define MACH64_BUS_EXT_REG_EN (1 << 27) - -#define MACH64_CLR_CMP_CLR 0x0700 -#define MACH64_CLR_CMP_CNTL 0x0708 -#define MACH64_CLR_CMP_MASK 0x0704 -#define MACH64_CONFIG_CHIP_ID 0x04e0 -#define MACH64_CONFIG_CNTL 0x04dc -#define MACH64_CONFIG_STAT0 0x04e4 -#define MACH64_CONFIG_STAT1 0x0494 -#define MACH64_CONFIG_STAT2 0x0498 -#define MACH64_CONTEXT_LOAD_CNTL 0x072c -#define MACH64_CONTEXT_MASK 0x0720 -#define MACH64_COMPOSITE_SHADOW_ID 0x0798 -#define MACH64_CRC_SIG 0x04e8 -#define MACH64_CUSTOM_MACRO_CNTL 0x04d4 - -#define MACH64_DP_BKGD_CLR 0x06c0 -#define MACH64_DP_FOG_CLR 0x06c4 -#define MACH64_DP_FGRD_BKGD_CLR 0x06e0 -#define MACH64_DP_FRGD_CLR 0x06c4 -#define MACH64_DP_FGRD_CLR_MIX 0x06dc - -#define MACH64_DP_MIX 0x06d4 -# define BKGD_MIX_NOT_D (0 << 0) -# define BKGD_MIX_ZERO (1 << 0) -# define BKGD_MIX_ONE (2 << 0) -# define MACH64_BKGD_MIX_D (3 << 0) -# define BKGD_MIX_NOT_S (4 << 0) -# define BKGD_MIX_D_XOR_S (5 << 0) -# define BKGD_MIX_NOT_D_XOR_S (6 << 0) -# define MACH64_BKGD_MIX_S (7 << 0) -# define BKGD_MIX_NOT_D_OR_NOT_S (8 << 0) -# define BKGD_MIX_D_OR_NOT_S (9 << 0) -# define BKGD_MIX_NOT_D_OR_S (10 << 0) -# define BKGD_MIX_D_OR_S (11 << 0) -# define BKGD_MIX_D_AND_S (12 << 0) -# define BKGD_MIX_NOT_D_AND_S (13 << 0) -# define BKGD_MIX_D_AND_NOT_S (14 << 0) -# define BKGD_MIX_NOT_D_AND_NOT_S (15 << 0) -# define BKGD_MIX_D_PLUS_S_DIV2 (23 << 0) -# define FRGD_MIX_NOT_D (0 << 16) -# define FRGD_MIX_ZERO (1 << 16) -# define FRGD_MIX_ONE (2 << 16) -# define FRGD_MIX_D (3 << 16) -# define FRGD_MIX_NOT_S (4 << 16) -# define FRGD_MIX_D_XOR_S (5 << 16) -# define FRGD_MIX_NOT_D_XOR_S (6 << 16) -# define MACH64_FRGD_MIX_S (7 << 16) -# define FRGD_MIX_NOT_D_OR_NOT_S (8 << 16) -# define FRGD_MIX_D_OR_NOT_S (9 << 16) -# define FRGD_MIX_NOT_D_OR_S (10 << 16) -# define FRGD_MIX_D_OR_S (11 << 16) -# define FRGD_MIX_D_AND_S (12 << 16) -# define FRGD_MIX_NOT_D_AND_S (13 << 16) -# define FRGD_MIX_D_AND_NOT_S (14 << 16) -# define FRGD_MIX_NOT_D_AND_NOT_S (15 << 16) -# define FRGD_MIX_D_PLUS_S_DIV2 (23 << 16) - -#define MACH64_DP_PIX_WIDTH 0x06d0 -# define MACH64_HOST_TRIPLE_ENABLE (1 << 13) -# define MACH64_BYTE_ORDER_MSB_TO_LSB (0 << 24) -# define MACH64_BYTE_ORDER_LSB_TO_MSB (1 << 24) - -#define MACH64_DP_SRC 0x06d8 -# define MACH64_BKGD_SRC_BKGD_CLR (0 << 0) -# define MACH64_BKGD_SRC_FRGD_CLR (1 << 0) -# define MACH64_BKGD_SRC_HOST (2 << 0) -# define MACH64_BKGD_SRC_BLIT (3 << 0) -# define MACH64_BKGD_SRC_PATTERN (4 << 0) -# define MACH64_BKGD_SRC_3D (5 << 0) -# define MACH64_FRGD_SRC_BKGD_CLR (0 << 8) -# define MACH64_FRGD_SRC_FRGD_CLR (1 << 8) -# define MACH64_FRGD_SRC_HOST (2 << 8) -# define MACH64_FRGD_SRC_BLIT (3 << 8) -# define MACH64_FRGD_SRC_PATTERN (4 << 8) -# define MACH64_FRGD_SRC_3D (5 << 8) -# define MACH64_MONO_SRC_ONE (0 << 16) -# define MACH64_MONO_SRC_PATTERN (1 << 16) -# define MACH64_MONO_SRC_HOST (2 << 16) -# define MACH64_MONO_SRC_BLIT (3 << 16) - -#define MACH64_DP_WRITE_MASK 0x06c8 - -#define MACH64_DST_CNTL 0x0530 -# define MACH64_DST_X_RIGHT_TO_LEFT (0 << 0) -# define MACH64_DST_X_LEFT_TO_RIGHT (1 << 0) -# define MACH64_DST_Y_BOTTOM_TO_TOP (0 << 1) -# define MACH64_DST_Y_TOP_TO_BOTTOM (1 << 1) -# define MACH64_DST_X_MAJOR (0 << 2) -# define MACH64_DST_Y_MAJOR (1 << 2) -# define MACH64_DST_X_TILE (1 << 3) -# define MACH64_DST_Y_TILE (1 << 4) -# define MACH64_DST_LAST_PEL (1 << 5) -# define MACH64_DST_POLYGON_ENABLE (1 << 6) -# define MACH64_DST_24_ROTATION_ENABLE (1 << 7) - -#define MACH64_DST_HEIGHT_WIDTH 0x0518 -#define MACH64_DST_OFF_PITCH 0x0500 -#define MACH64_DST_WIDTH_HEIGHT 0x06ec -#define MACH64_DST_X_Y 0x06e8 -#define MACH64_DST_Y_X 0x050c - -#define MACH64_FIFO_STAT 0x0710 -# define MACH64_FIFO_SLOT_MASK 0x0000ffff -# define MACH64_FIFO_ERR (1 << 31) - -#define MACH64_GEN_TEST_CNTL 0x04d0 -# define MACH64_GUI_ENGINE_ENABLE (1 << 8) -#define MACH64_GUI_CMDFIFO_DEBUG 0x0170 -#define MACH64_GUI_CMDFIFO_DATA 0x0174 -#define MACH64_GUI_CNTL 0x0178 -# define MACH64_CMDFIFO_SIZE_MASK 0x00000003ul -# define MACH64_CMDFIFO_SIZE_192 0x00000000ul -# define MACH64_CMDFIFO_SIZE_128 0x00000001ul -# define MACH64_CMDFIFO_SIZE_64 0x00000002ul -#define MACH64_GUI_STAT 0x0738 -# define MACH64_GUI_ACTIVE (1 << 0) -#define MACH64_GUI_TRAJ_CNTL 0x0730 - -#define MACH64_HOST_CNTL 0x0640 -#define MACH64_HOST_DATA0 0x0600 - -#define MACH64_ONE_OVER_AREA 0x029c -#define MACH64_ONE_OVER_AREA_UC 0x0300 - -#define MACH64_PAT_REG0 0x0680 -#define MACH64_PAT_REG1 0x0684 - -#define MACH64_SC_LEFT 0x06a0 -#define MACH64_SC_RIGHT 0x06a4 -#define MACH64_SC_LEFT_RIGHT 0x06a8 -#define MACH64_SC_TOP 0x06ac -#define MACH64_SC_BOTTOM 0x06b0 -#define MACH64_SC_TOP_BOTTOM 0x06b4 - -#define MACH64_SCALE_3D_CNTL 0x05fc -#define MACH64_SCRATCH_REG0 0x0480 -#define MACH64_SCRATCH_REG1 0x0484 -#define MACH64_SECONDARY_TEX_OFF 0x0778 -#define MACH64_SETUP_CNTL 0x0304 -#define MACH64_SRC_CNTL 0x05b4 -# define MACH64_SRC_BM_ENABLE (1 << 8) -# define MACH64_SRC_BM_SYNC (1 << 9) -# define MACH64_SRC_BM_OP_FRAME_TO_SYSTEM (0 << 10) -# define MACH64_SRC_BM_OP_SYSTEM_TO_FRAME (1 << 10) -# define MACH64_SRC_BM_OP_REG_TO_SYSTEM (2 << 10) -# define MACH64_SRC_BM_OP_SYSTEM_TO_REG (3 << 10) -#define MACH64_SRC_HEIGHT1 0x0594 -#define MACH64_SRC_HEIGHT2 0x05ac -#define MACH64_SRC_HEIGHT1_WIDTH1 0x0598 -#define MACH64_SRC_HEIGHT2_WIDTH2 0x05b0 -#define MACH64_SRC_OFF_PITCH 0x0580 -#define MACH64_SRC_WIDTH1 0x0590 -#define MACH64_SRC_Y_X 0x058c - -#define MACH64_TEX_0_OFF 0x05c0 -#define MACH64_TEX_CNTL 0x0774 -#define MACH64_TEX_SIZE_PITCH 0x0770 -#define MACH64_TIMER_CONFIG 0x0428 - -#define MACH64_VERTEX_1_ARGB 0x0254 -#define MACH64_VERTEX_1_S 0x0240 -#define MACH64_VERTEX_1_SECONDARY_S 0x0328 -#define MACH64_VERTEX_1_SECONDARY_T 0x032c -#define MACH64_VERTEX_1_SECONDARY_W 0x0330 -#define MACH64_VERTEX_1_SPEC_ARGB 0x024c -#define MACH64_VERTEX_1_T 0x0244 -#define MACH64_VERTEX_1_W 0x0248 -#define MACH64_VERTEX_1_X_Y 0x0258 -#define MACH64_VERTEX_1_Z 0x0250 -#define MACH64_VERTEX_2_ARGB 0x0274 -#define MACH64_VERTEX_2_S 0x0260 -#define MACH64_VERTEX_2_SECONDARY_S 0x0334 -#define MACH64_VERTEX_2_SECONDARY_T 0x0338 -#define MACH64_VERTEX_2_SECONDARY_W 0x033c -#define MACH64_VERTEX_2_SPEC_ARGB 0x026c -#define MACH64_VERTEX_2_T 0x0264 -#define MACH64_VERTEX_2_W 0x0268 -#define MACH64_VERTEX_2_X_Y 0x0278 -#define MACH64_VERTEX_2_Z 0x0270 -#define MACH64_VERTEX_3_ARGB 0x0294 -#define MACH64_VERTEX_3_S 0x0280 -#define MACH64_VERTEX_3_SECONDARY_S 0x02a0 -#define MACH64_VERTEX_3_SECONDARY_T 0x02a4 -#define MACH64_VERTEX_3_SECONDARY_W 0x02a8 -#define MACH64_VERTEX_3_SPEC_ARGB 0x028c -#define MACH64_VERTEX_3_T 0x0284 -#define MACH64_VERTEX_3_W 0x0288 -#define MACH64_VERTEX_3_X_Y 0x0298 -#define MACH64_VERTEX_3_Z 0x0290 - -#define MACH64_Z_CNTL 0x054c -#define MACH64_Z_OFF_PITCH 0x0548 - -#define MACH64_CRTC_VLINE_CRNT_VLINE 0x0410 -# define MACH64_CRTC_VLINE_MASK 0x000007ff -# define MACH64_CRTC_CRNT_VLINE_MASK 0x07ff0000 -#define MACH64_CRTC_OFF_PITCH 0x0414 -#define MACH64_CRTC_INT_CNTL 0x0418 -# define MACH64_CRTC_VBLANK (1 << 0) -# define MACH64_CRTC_VBLANK_INT_EN (1 << 1) -# define MACH64_CRTC_VBLANK_INT (1 << 2) -# define MACH64_CRTC_VLINE_INT_EN (1 << 3) -# define MACH64_CRTC_VLINE_INT (1 << 4) -# define MACH64_CRTC_VLINE_SYNC (1 << 5) /* 0=even, 1=odd */ -# define MACH64_CRTC_FRAME (1 << 6) /* 0=even, 1=odd */ -# define MACH64_CRTC_SNAPSHOT_INT_EN (1 << 7) -# define MACH64_CRTC_SNAPSHOT_INT (1 << 8) -# define MACH64_CRTC_I2C_INT_EN (1 << 9) -# define MACH64_CRTC_I2C_INT (1 << 10) -# define MACH64_CRTC2_VBLANK (1 << 11) /* LT Pro */ -# define MACH64_CRTC2_VBLANK_INT_EN (1 << 12) /* LT Pro */ -# define MACH64_CRTC2_VBLANK_INT (1 << 13) /* LT Pro */ -# define MACH64_CRTC2_VLINE_INT_EN (1 << 14) /* LT Pro */ -# define MACH64_CRTC2_VLINE_INT (1 << 15) /* LT Pro */ -# define MACH64_CRTC_CAPBUF0_INT_EN (1 << 16) -# define MACH64_CRTC_CAPBUF0_INT (1 << 17) -# define MACH64_CRTC_CAPBUF1_INT_EN (1 << 18) -# define MACH64_CRTC_CAPBUF1_INT (1 << 19) -# define MACH64_CRTC_OVERLAY_EOF_INT_EN (1 << 20) -# define MACH64_CRTC_OVERLAY_EOF_INT (1 << 21) -# define MACH64_CRTC_ONESHOT_CAP_INT_EN (1 << 22) -# define MACH64_CRTC_ONESHOT_CAP_INT (1 << 23) -# define MACH64_CRTC_BUSMASTER_EOL_INT_EN (1 << 24) -# define MACH64_CRTC_BUSMASTER_EOL_INT (1 << 25) -# define MACH64_CRTC_GP_INT_EN (1 << 26) -# define MACH64_CRTC_GP_INT (1 << 27) -# define MACH64_CRTC2_VLINE_SYNC (1 << 28) /* LT Pro */ /* 0=even, 1=odd */ -# define MACH64_CRTC_SNAPSHOT2_INT_EN (1 << 29) /* LT Pro */ -# define MACH64_CRTC_SNAPSHOT2_INT (1 << 30) /* LT Pro */ -# define MACH64_CRTC_VBLANK2_INT (1 << 31) -# define MACH64_CRTC_INT_ENS \ - ( \ - MACH64_CRTC_VBLANK_INT_EN | \ - MACH64_CRTC_VLINE_INT_EN | \ - MACH64_CRTC_SNAPSHOT_INT_EN | \ - MACH64_CRTC_I2C_INT_EN | \ - MACH64_CRTC2_VBLANK_INT_EN | \ - MACH64_CRTC2_VLINE_INT_EN | \ - MACH64_CRTC_CAPBUF0_INT_EN | \ - MACH64_CRTC_CAPBUF1_INT_EN | \ - MACH64_CRTC_OVERLAY_EOF_INT_EN | \ - MACH64_CRTC_ONESHOT_CAP_INT_EN | \ - MACH64_CRTC_BUSMASTER_EOL_INT_EN | \ - MACH64_CRTC_GP_INT_EN | \ - MACH64_CRTC_SNAPSHOT2_INT_EN | \ - 0 \ - ) -# define MACH64_CRTC_INT_ACKS \ - ( \ - MACH64_CRTC_VBLANK_INT | \ - MACH64_CRTC_VLINE_INT | \ - MACH64_CRTC_SNAPSHOT_INT | \ - MACH64_CRTC_I2C_INT | \ - MACH64_CRTC2_VBLANK_INT | \ - MACH64_CRTC2_VLINE_INT | \ - MACH64_CRTC_CAPBUF0_INT | \ - MACH64_CRTC_CAPBUF1_INT | \ - MACH64_CRTC_OVERLAY_EOF_INT | \ - MACH64_CRTC_ONESHOT_CAP_INT | \ - MACH64_CRTC_BUSMASTER_EOL_INT | \ - MACH64_CRTC_GP_INT | \ - MACH64_CRTC_SNAPSHOT2_INT | \ - MACH64_CRTC_VBLANK2_INT | \ - 0 \ - ) - -#define MACH64_DATATYPE_CI8 2 -#define MACH64_DATATYPE_ARGB1555 3 -#define MACH64_DATATYPE_RGB565 4 -#define MACH64_DATATYPE_ARGB8888 6 -#define MACH64_DATATYPE_RGB332 7 -#define MACH64_DATATYPE_Y8 8 -#define MACH64_DATATYPE_RGB8 9 -#define MACH64_DATATYPE_VYUY422 11 -#define MACH64_DATATYPE_YVYU422 12 -#define MACH64_DATATYPE_AYUV444 14 -#define MACH64_DATATYPE_ARGB4444 15 - -#define MACH64_READ(reg) DRM_READ32(dev_priv->mmio, (reg) ) -#define MACH64_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio, (reg), (val) ) - - -#define DWMREG0 0x0400 -#define DWMREG0_END 0x07ff -#define DWMREG1 0x0000 -#define DWMREG1_END 0x03ff - -#define ISREG0(r) (((r) >= DWMREG0) && ((r) <= DWMREG0_END)) -#define DMAREG0(r) (((r) - DWMREG0) >> 2) -#define DMAREG1(r) ((((r) - DWMREG1) >> 2 ) | 0x0100) -#define DMAREG(r) (ISREG0(r) ? DMAREG0(r) : DMAREG1(r)) - -#define MMREG0 0x0000 -#define MMREG0_END 0x00ff - -#define ISMMREG0(r) (((r) >= MMREG0) && ((r) <= MMREG0_END)) -#define MMSELECT0(r) (((r) << 2) + DWMREG0) -#define MMSELECT1(r) (((((r) & 0xff) << 2) + DWMREG1)) -#define MMSELECT(r) (ISMMREG0(r) ? MMSELECT0(r) : MMSELECT1(r)) - -/* ================================================================ - * DMA constants - */ - -/* DMA descriptor field indices: - * The descriptor fields are loaded into the read-only - * BM_* system bus master registers during a bus-master operation - */ -#define MACH64_DMA_FRAME_BUF_OFFSET 0 /* BM_FRAME_BUF_OFFSET */ -#define MACH64_DMA_SYS_MEM_ADDR 1 /* BM_SYSTEM_MEM_ADDR */ -#define MACH64_DMA_COMMAND 2 /* BM_COMMAND */ -#define MACH64_DMA_RESERVED 3 /* BM_STATUS */ - -/* BM_COMMAND descriptor field flags */ -#define MACH64_DMA_HOLD_OFFSET (1<<30) /* Don't increment DMA_FRAME_BUF_OFFSET */ -#define MACH64_DMA_EOL (1<<31) /* End of descriptor list flag */ - -#define MACH64_DMA_CHUNKSIZE 0x1000 /* 4kB per DMA descriptor */ -#define MACH64_APERTURE_OFFSET 0x7ff800 /* frame-buffer offset for gui-masters */ - - -/* ================================================================ - * Misc helper macros - */ - -static __inline__ void mach64_set_dma_eol( volatile u32 * addr ) -{ -#if defined(__i386__) - int nr = 31; - - /* Taken from include/asm-i386/bitops.h linux header */ - __asm__ __volatile__( "lock;" - "btsl %1,%0" - :"=m" (*addr) - :"Ir" (nr)); -#elif defined(__powerpc__) - u32 old; - u32 mask = cpu_to_le32( MACH64_DMA_EOL ); - - /* Taken from the include/asm-ppc/bitops.h linux header */ - __asm__ __volatile__("\n\ -1: lwarx %0,0,%3 \n\ - or %0,%0,%2 \n\ - stwcx. %0,0,%3 \n\ - bne- 1b" - : "=&r" (old), "=m" (*addr) - : "r" (mask), "r" (addr), "m" (*addr) - : "cc"); -#elif defined(__alpha__) - u32 temp; - u32 mask = MACH64_DMA_EOL; - - /* Taken from the include/asm-alpha/bitops.h linux header */ - __asm__ __volatile__( - "1: ldl_l %0,%3\n" - " bis %0,%2,%0\n" - " stl_c %0,%1\n" - " beq %0,2f\n" - ".subsection 2\n" - "2: br 1b\n" - ".previous" - :"=&r" (temp), "=m" (*addr) - :"Ir" (mask), "m" (*addr)); -#else - u32 mask = cpu_to_le32( MACH64_DMA_EOL ); - - *addr |= mask; -#endif -} - -static __inline__ void mach64_clear_dma_eol( volatile u32 * addr ) -{ -#if defined(__i386__) - int nr = 31; - - /* Taken from include/asm-i386/bitops.h linux header */ - __asm__ __volatile__( "lock;" - "btrl %1,%0" - :"=m" (*addr) - :"Ir" (nr)); -#elif defined(__powerpc__) - u32 old; - u32 mask = cpu_to_le32( MACH64_DMA_EOL ); - - /* Taken from the include/asm-ppc/bitops.h linux header */ - __asm__ __volatile__("\n\ -1: lwarx %0,0,%3 \n\ - andc %0,%0,%2 \n\ - stwcx. %0,0,%3 \n\ - bne- 1b" - : "=&r" (old), "=m" (*addr) - : "r" (mask), "r" (addr), "m" (*addr) - : "cc"); -#elif defined(__alpha__) - u32 temp; - u32 mask = ~MACH64_DMA_EOL; - - /* Taken from the include/asm-alpha/bitops.h linux header */ - __asm__ __volatile__( - "1: ldl_l %0,%3\n" - " and %0,%2,%0\n" - " stl_c %0,%1\n" - " beq %0,2f\n" - ".subsection 2\n" - "2: br 1b\n" - ".previous" - :"=&r" (temp), "=m" (*addr) - :"Ir" (mask), "m" (*addr)); -#else - u32 mask = cpu_to_le32( ~MACH64_DMA_EOL ); - - *addr &= mask; -#endif -} - -static __inline__ void mach64_ring_start( drm_mach64_private_t *dev_priv ) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - - DRM_DEBUG( "%s: head_addr: 0x%08x head: %d tail: %d space: %d\n", - __FUNCTION__, - ring->head_addr, ring->head, ring->tail, ring->space ); - - if ( mach64_do_wait_for_idle( dev_priv ) < 0 ) { - mach64_do_engine_reset( dev_priv ); - } - - if (dev_priv->driver_mode != MACH64_MODE_MMIO ) { - /* enable bus mastering and block 1 registers */ - MACH64_WRITE( MACH64_BUS_CNTL, - ( MACH64_READ(MACH64_BUS_CNTL) & ~MACH64_BUS_MASTER_DIS ) - | MACH64_BUS_EXT_REG_EN ); - mach64_do_wait_for_idle( dev_priv ); - } - - /* reset descriptor table ring head */ - MACH64_WRITE( MACH64_BM_GUI_TABLE_CMD, - ring->head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB ); - - dev_priv->ring_running = 1; -} - -static __inline__ void mach64_ring_resume( drm_mach64_private_t *dev_priv, - drm_mach64_descriptor_ring_t *ring ) -{ - DRM_DEBUG( "%s: head_addr: 0x%08x head: %d tail: %d space: %d\n", - __FUNCTION__, - ring->head_addr, ring->head, ring->tail, ring->space ); - - /* reset descriptor table ring head */ - MACH64_WRITE( MACH64_BM_GUI_TABLE_CMD, - ring->head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB ); - - if ( dev_priv->driver_mode == MACH64_MODE_MMIO ) { - mach64_do_dispatch_pseudo_dma( dev_priv ); - } else { - /* enable GUI bus mastering, and sync the bus master to the GUI */ - MACH64_WRITE( MACH64_SRC_CNTL, - MACH64_SRC_BM_ENABLE | MACH64_SRC_BM_SYNC | - MACH64_SRC_BM_OP_SYSTEM_TO_REG ); - - /* kick off the transfer */ - MACH64_WRITE( MACH64_DST_HEIGHT_WIDTH, 0 ); - if ( dev_priv->driver_mode == MACH64_MODE_DMA_SYNC ) { - if ( (mach64_do_wait_for_idle( dev_priv )) < 0 ) { - DRM_ERROR( "%s: idle failed, resetting engine\n", - __FUNCTION__); - mach64_dump_engine_info( dev_priv ); - mach64_do_engine_reset( dev_priv ); - return; - } - mach64_do_release_used_buffers( dev_priv ); - } - } -} - -static __inline__ void mach64_ring_tick( drm_mach64_private_t *dev_priv, - drm_mach64_descriptor_ring_t *ring ) -{ - DRM_DEBUG( "%s: head_addr: 0x%08x head: %d tail: %d space: %d\n", - __FUNCTION__, - ring->head_addr, ring->head, ring->tail, ring->space ); - - if ( !dev_priv->ring_running ) { - mach64_ring_start( dev_priv ); - - if ( ring->head != ring->tail ) { - mach64_ring_resume( dev_priv, ring ); - } - } else { - /* GUI_ACTIVE must be read before BM_GUI_TABLE to - * correctly determine the ring head - */ - int gui_active = MACH64_READ(MACH64_GUI_STAT) & MACH64_GUI_ACTIVE; - - ring->head_addr = MACH64_READ(MACH64_BM_GUI_TABLE) & 0xfffffff0; - - if ( gui_active ) { - /* If not idle, BM_GUI_TABLE points one descriptor - * past the current head - */ - if ( ring->head_addr == ring->start_addr ) { - ring->head_addr += ring->size; - } - ring->head_addr -= 4 * sizeof(u32); - } - - if( ring->head_addr < ring->start_addr || - ring->head_addr >= ring->start_addr + ring->size ) { - DRM_ERROR( "bad ring head address: 0x%08x\n", ring->head_addr ); - mach64_dump_ring_info( dev_priv ); - mach64_do_engine_reset( dev_priv ); - return; - } - - ring->head = (ring->head_addr - ring->start_addr) / sizeof(u32); - - if ( !gui_active && ring->head != ring->tail ) { - mach64_ring_resume( dev_priv, ring ); - } - } -} - -static __inline__ void mach64_ring_stop( drm_mach64_private_t *dev_priv ) -{ - DRM_DEBUG( "%s: head_addr: 0x%08x head: %d tail: %d space: %d\n", - __FUNCTION__, - dev_priv->ring.head_addr, dev_priv->ring.head, - dev_priv->ring.tail, dev_priv->ring.space ); - - /* restore previous SRC_CNTL to disable busmastering */ - mach64_do_wait_for_fifo( dev_priv, 1 ); - MACH64_WRITE( MACH64_SRC_CNTL, 0 ); - - /* disable busmastering but keep the block 1 registers enabled */ - mach64_do_wait_for_idle( dev_priv ); - MACH64_WRITE( MACH64_BUS_CNTL, MACH64_READ( MACH64_BUS_CNTL ) - | MACH64_BUS_MASTER_DIS | MACH64_BUS_EXT_REG_EN ); - - dev_priv->ring_running = 0; -} - -static __inline__ void -mach64_update_ring_snapshot( drm_mach64_private_t *dev_priv ) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - mach64_ring_tick( dev_priv, ring ); - - ring->space = (ring->head - ring->tail) * sizeof(u32); - if ( ring->space <= 0 ) { - ring->space += ring->size; - } -} - -/* ================================================================ - * DMA descriptor ring macros - */ - -#define RING_LOCALS \ - int _ring_tail, _ring_write; unsigned int _ring_mask; volatile u32 *_ring - -#define RING_WRITE_OFS _ring_write - -#define BEGIN_RING( n ) \ -do { \ - if ( MACH64_VERBOSE ) { \ - DRM_INFO( "BEGIN_RING( %d ) in %s\n", \ - (n), __FUNCTION__ ); \ - } \ - if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \ - int ret; \ - if ((ret=mach64_wait_ring( dev_priv, (n) * sizeof(u32))) < 0 ) { \ - DRM_ERROR( "wait_ring failed, resetting engine\n"); \ - mach64_dump_engine_info( dev_priv ); \ - mach64_do_engine_reset( dev_priv ); \ - return ret; \ - } \ - } \ - dev_priv->ring.space -= (n) * sizeof(u32); \ - _ring = (u32 *) dev_priv->ring.start; \ - _ring_tail = _ring_write = dev_priv->ring.tail; \ - _ring_mask = dev_priv->ring.tail_mask; \ -} while (0) - -#define OUT_RING( x ) \ -do { \ - if ( MACH64_VERBOSE ) { \ - DRM_INFO( " OUT_RING( 0x%08x ) at 0x%x\n", \ - (unsigned int)(x), _ring_write ); \ - } \ - _ring[_ring_write++] = cpu_to_le32( x ); \ - _ring_write &= _ring_mask; \ -} while (0) - -#define ADVANCE_RING() \ -do { \ - if ( MACH64_VERBOSE ) { \ - DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \ - _ring_write, _ring_tail ); \ - } \ - DRM_MEMORYBARRIER(); \ - mach64_clear_dma_eol( &_ring[(_ring_tail - 2) & _ring_mask] ); \ - DRM_MEMORYBARRIER(); \ - dev_priv->ring.tail = _ring_write; \ - mach64_ring_tick( dev_priv, &(dev_priv)->ring ); \ -} while (0) - - -/* ================================================================ - * DMA macros - */ - -#define DMALOCALS \ - drm_mach64_freelist_t *_entry = NULL; \ - drm_buf_t *_buf = NULL; \ - u32 *_buf_wptr; int _outcount - -#define GETBUFPTR( __buf ) \ -((dev_priv->is_pci) ? \ - ((u32 *)(__buf)->address) : \ - ((u32 *)((char *)dev_priv->dev_buffers->handle + (__buf)->offset))) - -#define GETBUFADDR( __buf ) ((u32)(__buf)->bus_address) - -#define GETRINGOFFSET() (_entry->ring_ofs) - -static __inline__ int mach64_find_pending_buf_entry ( drm_mach64_private_t *dev_priv, - drm_mach64_freelist_t **entry, - drm_buf_t *buf ) -{ - struct list_head *ptr; -#if MACH64_EXTRA_CHECKING - if (list_empty(&dev_priv->pending)) { - DRM_ERROR("Empty pending list in %s\n", __FUNCTION__); - return DRM_ERR(EINVAL); - } -#endif - ptr = dev_priv->pending.prev; - *entry = list_entry(ptr, drm_mach64_freelist_t, list); - while ((*entry)->buf != buf) { - if (ptr == &dev_priv->pending) { - return DRM_ERR(EFAULT); - } - ptr = ptr->prev; - *entry = list_entry(ptr, drm_mach64_freelist_t, list); - } - return 0; -} - -#define DMASETPTR( _p ) \ -do { \ - _buf = (_p); \ - _outcount = 0; \ - _buf_wptr = GETBUFPTR( _buf ); \ -} while(0) - -/* FIXME: use a private set of smaller buffers for state emits, clears, and swaps? */ -#define DMAGETPTR( filp, dev_priv, n ) \ -do { \ - if ( MACH64_VERBOSE ) { \ - DRM_INFO( "DMAGETPTR( %d ) in %s\n", \ - n, __FUNCTION__ ); \ - } \ - _buf = mach64_freelist_get( dev_priv ); \ - if (_buf == NULL) { \ - DRM_ERROR("%s: couldn't get buffer in DMAGETPTR\n", \ - __FUNCTION__ ); \ - return DRM_ERR(EAGAIN); \ - } \ - if (_buf->pending) { \ - DRM_ERROR("%s: pending buf in DMAGETPTR\n", \ - __FUNCTION__ ); \ - return DRM_ERR(EFAULT); \ - } \ - _buf->filp = filp; \ - _outcount = 0; \ - \ - _buf_wptr = GETBUFPTR( _buf ); \ -} while (0) - -#define DMAOUTREG( reg, val ) \ -do { \ - if ( MACH64_VERBOSE ) { \ - DRM_INFO( " DMAOUTREG( 0x%x = 0x%08x )\n", \ - reg, val ); \ - } \ - _buf_wptr[_outcount++] = cpu_to_le32(DMAREG(reg)); \ - _buf_wptr[_outcount++] = cpu_to_le32((val)); \ - _buf->used += 8; \ -} while (0) - -#define DMAADVANCE( dev_priv, _discard ) \ -do { \ - struct list_head *ptr; \ - RING_LOCALS; \ - \ - if ( MACH64_VERBOSE ) { \ - DRM_INFO( "DMAADVANCE() in %s\n", __FUNCTION__ ); \ - } \ - \ - if (_buf->used <= 0) { \ - DRM_ERROR( "DMAADVANCE() in %s: sending empty buf %d\n", \ - __FUNCTION__, _buf->idx ); \ - return DRM_ERR(EFAULT); \ - } \ - if (_buf->pending) { \ - /* This is a resued buffer, so we need to find it in the pending list */ \ - int ret; \ - if ( (ret=mach64_find_pending_buf_entry(dev_priv, &_entry, _buf)) ) { \ - DRM_ERROR( "DMAADVANCE() in %s: couldn't find pending buf %d\n", \ - __FUNCTION__, _buf->idx ); \ - return ret; \ - } \ - if (_entry->discard) { \ - DRM_ERROR( "DMAADVANCE() in %s: sending discarded pending buf %d\n", \ - __FUNCTION__, _buf->idx ); \ - return DRM_ERR(EFAULT); \ - } \ - } else { \ - if (list_empty(&dev_priv->placeholders)) { \ - DRM_ERROR( "DMAADVANCE() in %s: empty placeholder list\n", \ - __FUNCTION__ ); \ - return DRM_ERR(EFAULT); \ - } \ - ptr = dev_priv->placeholders.next; \ - list_del(ptr); \ - _entry = list_entry(ptr, drm_mach64_freelist_t, list); \ - _buf->pending = 1; \ - _entry->buf = _buf; \ - list_add_tail(ptr, &dev_priv->pending); \ - } \ - _entry->discard = (_discard); \ - ADD_BUF_TO_RING( dev_priv ); \ -} while (0) - -#define DMADISCARDBUF() \ -do { \ - if (_entry == NULL) { \ - int ret; \ - if ( (ret=mach64_find_pending_buf_entry(dev_priv, &_entry, _buf)) ) { \ - DRM_ERROR( "%s: couldn't find pending buf %d\n", \ - __FUNCTION__, _buf->idx ); \ - return ret; \ - } \ - } \ - _entry->discard = 1; \ -} while(0) - -#define ADD_BUF_TO_RING( dev_priv ) \ -do { \ - int bytes, pages, remainder; \ - u32 address, page; \ - int i; \ - \ - bytes = _buf->used; \ - address = GETBUFADDR( _buf ); \ - \ - pages = (bytes + MACH64_DMA_CHUNKSIZE - 1) / MACH64_DMA_CHUNKSIZE; \ - \ - BEGIN_RING( pages * 4 ); \ - \ - for ( i = 0 ; i < pages-1 ; i++ ) { \ - page = address + i * MACH64_DMA_CHUNKSIZE; \ - OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_ADDR ); \ - OUT_RING( page ); \ - OUT_RING( MACH64_DMA_CHUNKSIZE | MACH64_DMA_HOLD_OFFSET ); \ - OUT_RING( 0 ); \ - } \ - \ - /* generate the final descriptor for any remaining commands in this buffer */ \ - page = address + i * MACH64_DMA_CHUNKSIZE; \ - remainder = bytes - i * MACH64_DMA_CHUNKSIZE; \ - \ - /* Save dword offset of last descriptor for this buffer. \ - * This is needed to check for completion of the buffer in freelist_get \ - */ \ - _entry->ring_ofs = RING_WRITE_OFS; \ - \ - OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_ADDR ); \ - OUT_RING( page ); \ - OUT_RING( remainder | MACH64_DMA_HOLD_OFFSET | MACH64_DMA_EOL ); \ - OUT_RING( 0 ); \ - \ - ADVANCE_RING(); \ -} while(0) - -#define DMAADVANCEHOSTDATA( dev_priv ) \ -do { \ - struct list_head *ptr; \ - RING_LOCALS; \ - \ - if ( MACH64_VERBOSE ) { \ - DRM_INFO( "DMAADVANCEHOSTDATA() in %s\n", __FUNCTION__ ); \ - } \ - \ - if (_buf->used <= 0) { \ - DRM_ERROR( "DMAADVANCEHOSTDATA() in %s: sending empty buf %d\n", \ - __FUNCTION__, _buf->idx ); \ - return DRM_ERR(EFAULT); \ - } \ - if (list_empty(&dev_priv->placeholders)) { \ - DRM_ERROR( "%s: empty placeholder list in DMAADVANCEHOSTDATA()\n", \ - __FUNCTION__ ); \ - return DRM_ERR(EFAULT); \ - } \ - \ - ptr = dev_priv->placeholders.next; \ - list_del(ptr); \ - _entry = list_entry(ptr, drm_mach64_freelist_t, list); \ - _entry->buf = _buf; \ - _entry->buf->pending = 1; \ - list_add_tail(ptr, &dev_priv->pending); \ - _entry->discard = 1; \ - ADD_HOSTDATA_BUF_TO_RING( dev_priv ); \ -} while (0) - -#define ADD_HOSTDATA_BUF_TO_RING( dev_priv ) \ -do { \ - int bytes, pages, remainder; \ - u32 address, page; \ - int i; \ - \ - bytes = _buf->used - MACH64_HOSTDATA_BLIT_OFFSET; \ - pages = (bytes + MACH64_DMA_CHUNKSIZE - 1) / MACH64_DMA_CHUNKSIZE; \ - address = GETBUFADDR( _buf ); \ - \ - BEGIN_RING( 4 + pages * 4 ); \ - \ - OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_ADDR ); \ - OUT_RING( address ); \ - OUT_RING( MACH64_HOSTDATA_BLIT_OFFSET | MACH64_DMA_HOLD_OFFSET ); \ - OUT_RING( 0 ); \ - \ - address += MACH64_HOSTDATA_BLIT_OFFSET; \ - \ - for ( i = 0 ; i < pages-1 ; i++ ) { \ - page = address + i * MACH64_DMA_CHUNKSIZE; \ - OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_HOSTDATA ); \ - OUT_RING( page ); \ - OUT_RING( MACH64_DMA_CHUNKSIZE | MACH64_DMA_HOLD_OFFSET ); \ - OUT_RING( 0 ); \ - } \ - \ - /* generate the final descriptor for any remaining commands in this buffer */ \ - page = address + i * MACH64_DMA_CHUNKSIZE; \ - remainder = bytes - i * MACH64_DMA_CHUNKSIZE; \ - \ - /* Save dword offset of last descriptor for this buffer. \ - * This is needed to check for completion of the buffer in freelist_get \ - */ \ - _entry->ring_ofs = RING_WRITE_OFS; \ - \ - OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_HOSTDATA ); \ - OUT_RING( page ); \ - OUT_RING( remainder | MACH64_DMA_HOLD_OFFSET | MACH64_DMA_EOL ); \ - OUT_RING( 0 ); \ - \ - ADVANCE_RING(); \ -} while(0) - -#endif /* __MACH64_DRV_H__ */ diff --git a/shared/mach64_irq.c b/shared/mach64_irq.c deleted file mode 100644 index efa0641f7..000000000 --- a/shared/mach64_irq.c +++ /dev/null @@ -1,130 +0,0 @@ -/* mach64_irq.c -- IRQ handling for ATI Mach64 -*- linux-c -*- - * Created: Tue Feb 25, 2003 by Leif Delgass, based on radeon_irq.c/r128_irq.c - * - * Copyright (C) The Weather Channel, Inc. 2002. - * Copyright 2003 Leif Delgass - * All Rights Reserved. - * - * The Weather Channel (TM) funded Tungsten Graphics to develop the - * initial release of the Radeon 8500 driver under the XFree86 license. - * This notice must be preserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - * Eric Anholt <anholt@FreeBSD.org> - * Leif Delgass <ldelgass@retinalburn.net> - */ - -#include "mach64.h" -#include "drmP.h" -#include "drm.h" -#include "mach64_drm.h" -#include "mach64_drv.h" - -irqreturn_t mach64_driver_irq_handler( DRM_IRQ_ARGS ) -{ - drm_device_t *dev = (drm_device_t *) arg; - drm_mach64_private_t *dev_priv = - (drm_mach64_private_t *)dev->dev_private; - int status; - - status = MACH64_READ( MACH64_CRTC_INT_CNTL ); - - /* VBLANK interrupt */ - if (status & MACH64_CRTC_VBLANK_INT) { - /* Mask off all interrupt ack bits before setting the ack bit, since - * there may be other handlers outside the DRM. - * - * NOTE: On mach64, you need to keep the enable bits set when doing - * the ack, despite what the docs say about not acking and enabling - * in a single write. - */ - MACH64_WRITE( MACH64_CRTC_INT_CNTL, (status & ~MACH64_CRTC_INT_ACKS) - | MACH64_CRTC_VBLANK_INT ); - - atomic_inc(&dev->vbl_received); - DRM_WAKEUP(&dev->vbl_queue); - DRM(vbl_send_signals)( dev ); - return IRQ_HANDLED; - } - return IRQ_NONE; -} - -int mach64_driver_vblank_wait(drm_device_t *dev, unsigned int *sequence) -{ - unsigned int cur_vblank; - int ret = 0; - - /* Assume that the user has missed the current sequence number - * by about a day rather than she wants to wait for years - * using vertical blanks... - */ - DRM_WAIT_ON( ret, dev->vbl_queue, 3*DRM_HZ, - ( ( ( cur_vblank = atomic_read(&dev->vbl_received ) ) - - *sequence ) <= (1<<23) ) ); - - *sequence = cur_vblank; - - return ret; -} - -/* drm_dma.h hooks -*/ -void mach64_driver_irq_preinstall( drm_device_t *dev ) { - drm_mach64_private_t *dev_priv = - (drm_mach64_private_t *)dev->dev_private; - - u32 status = MACH64_READ( MACH64_CRTC_INT_CNTL ); - - DRM_DEBUG("before install CRTC_INT_CTNL: 0x%08x\n", status ); - - /* Disable and clear VBLANK interrupt */ - MACH64_WRITE( MACH64_CRTC_INT_CNTL, (status & ~MACH64_CRTC_VBLANK_INT_EN) - | MACH64_CRTC_VBLANK_INT ); -} - -void mach64_driver_irq_postinstall( drm_device_t *dev ) { - drm_mach64_private_t *dev_priv = - (drm_mach64_private_t *)dev->dev_private; - - /* Turn on VBLANK interrupt */ - MACH64_WRITE( MACH64_CRTC_INT_CNTL, MACH64_READ( MACH64_CRTC_INT_CNTL ) - | MACH64_CRTC_VBLANK_INT_EN ); - - DRM_DEBUG("after install CRTC_INT_CTNL: 0x%08x\n", MACH64_READ( MACH64_CRTC_INT_CNTL )); - -} - -void mach64_driver_irq_uninstall( drm_device_t *dev ) { - drm_mach64_private_t *dev_priv = - (drm_mach64_private_t *)dev->dev_private; - if ( !dev_priv ) - return; - - /* Disable and clear VBLANK interrupt */ - MACH64_WRITE( MACH64_CRTC_INT_CNTL, - (MACH64_READ( MACH64_CRTC_INT_CNTL ) & ~MACH64_CRTC_VBLANK_INT_EN) - | MACH64_CRTC_VBLANK_INT ); - - DRM_DEBUG("after uninstall CRTC_INT_CTNL: 0x%08x\n", - MACH64_READ( MACH64_CRTC_INT_CNTL )); -} diff --git a/shared/mach64_state.c b/shared/mach64_state.c deleted file mode 100644 index ef85ffd8d..000000000 --- a/shared/mach64_state.c +++ /dev/null @@ -1,896 +0,0 @@ -/* mach64_state.c -- State support for mach64 (Rage Pro) driver -*- linux-c -*- - * Created: Sun Dec 03 19:20:26 2000 by gareth@valinux.com - * - * Copyright 2000 Gareth Hughes - * Copyright 2002-2003 Leif Delgass - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - * Leif Delgass <ldelgass@retinalburn.net> - * José Fonseca <j_r_fonseca@yahoo.co.uk> - */ - -#include "mach64.h" -#include "drmP.h" -#include "drm.h" -#include "mach64_drm.h" -#include "mach64_drv.h" - - -/* ================================================================ - * DMA hardware state programming functions - */ - -static void mach64_print_dirty( const char *msg, unsigned int flags ) -{ - DRM_DEBUG( "%s: (0x%x) %s%s%s%s%s%s%s%s%s%s%s%s\n", - msg, - flags, - (flags & MACH64_UPLOAD_DST_OFF_PITCH) ? "dst_off_pitch, " : "", - (flags & MACH64_UPLOAD_Z_ALPHA_CNTL) ? "z_alpha_cntl, " : "", - (flags & MACH64_UPLOAD_SCALE_3D_CNTL) ? "scale_3d_cntl, " : "", - (flags & MACH64_UPLOAD_DP_FOG_CLR) ? "dp_fog_clr, " : "", - (flags & MACH64_UPLOAD_DP_WRITE_MASK) ? "dp_write_mask, " : "", - (flags & MACH64_UPLOAD_DP_PIX_WIDTH) ? "dp_pix_width, " : "", - (flags & MACH64_UPLOAD_SETUP_CNTL) ? "setup_cntl, " : "", - (flags & MACH64_UPLOAD_MISC) ? "misc, " : "", - (flags & MACH64_UPLOAD_TEXTURE) ? "texture, " : "", - (flags & MACH64_UPLOAD_TEX0IMAGE) ? "tex0 image, " : "", - (flags & MACH64_UPLOAD_TEX1IMAGE) ? "tex1 image, " : "", - (flags & MACH64_UPLOAD_CLIPRECTS) ? "cliprects, " : "" ); -} - -/* Mach64 doesn't have hardware cliprects, just one hardware scissor, - * so the GL scissor is intersected with each cliprect here - */ -/* This function returns 0 on success, 1 for no intersection, and - * negative for an error - */ -static int mach64_emit_cliprect( DRMFILE filp, drm_mach64_private_t *dev_priv, - drm_clip_rect_t *box ) -{ - u32 sc_left_right, sc_top_bottom; - drm_clip_rect_t scissor; - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mach64_context_regs_t *regs = &sarea_priv->context_state; - DMALOCALS; - - DRM_DEBUG( "%s: box=%p\n", __FUNCTION__, box ); - - /* Get GL scissor */ - /* FIXME: store scissor in SAREA as a cliprect instead of in - * hardware format, or do intersection client-side - */ - scissor.x1 = regs->sc_left_right & 0xffff; - scissor.x2 = (regs->sc_left_right & 0xffff0000) >> 16; - scissor.y1 = regs->sc_top_bottom & 0xffff; - scissor.y2 = (regs->sc_top_bottom & 0xffff0000) >> 16; - - /* Intersect GL scissor with cliprect */ - if ( box->x1 > scissor.x1 ) scissor.x1 = box->x1; - if ( box->y1 > scissor.y1 ) scissor.y1 = box->y1; - if ( box->x2 < scissor.x2 ) scissor.x2 = box->x2; - if ( box->y2 < scissor.y2 ) scissor.y2 = box->y2; - /* positive return means skip */ - if ( scissor.x1 >= scissor.x2 ) return 1; - if ( scissor.y1 >= scissor.y2 ) return 1; - - DMAGETPTR( filp, dev_priv, 2 ); /* returns on failure to get buffer */ - - sc_left_right = ( (scissor.x1 << 0) | (scissor.x2 << 16) ); - sc_top_bottom = ( (scissor.y1 << 0) | (scissor.y2 << 16) ); - - DMAOUTREG( MACH64_SC_LEFT_RIGHT, sc_left_right ); - DMAOUTREG( MACH64_SC_TOP_BOTTOM, sc_top_bottom ); - - DMAADVANCE( dev_priv, 1 ); - - return 0; -} - -static __inline__ int mach64_emit_state( DRMFILE filp, drm_mach64_private_t *dev_priv ) -{ - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mach64_context_regs_t *regs = &sarea_priv->context_state; - unsigned int dirty = sarea_priv->dirty; - u32 offset = ((regs->tex_size_pitch & 0xf0) >> 2); - DMALOCALS; - - if ( MACH64_VERBOSE ) { - mach64_print_dirty( __FUNCTION__, dirty ); - } else { - DRM_DEBUG( "%s: dirty=0x%08x\n", __FUNCTION__, dirty ); - } - - DMAGETPTR( filp, dev_priv, 17 ); /* returns on failure to get buffer */ - - if ( dirty & MACH64_UPLOAD_MISC ) { - DMAOUTREG( MACH64_DP_MIX, regs->dp_mix ); - DMAOUTREG( MACH64_DP_SRC, regs->dp_src ); - DMAOUTREG( MACH64_CLR_CMP_CNTL, regs->clr_cmp_cntl ); - DMAOUTREG( MACH64_GUI_TRAJ_CNTL, regs->gui_traj_cntl ); - sarea_priv->dirty &= ~MACH64_UPLOAD_MISC; - } - - if ( dirty & MACH64_UPLOAD_DST_OFF_PITCH ) { - DMAOUTREG( MACH64_DST_OFF_PITCH, regs->dst_off_pitch ); - sarea_priv->dirty &= ~MACH64_UPLOAD_DST_OFF_PITCH; - } - if ( dirty & MACH64_UPLOAD_Z_OFF_PITCH ) { - DMAOUTREG( MACH64_Z_OFF_PITCH, regs->z_off_pitch ); - sarea_priv->dirty &= ~MACH64_UPLOAD_Z_OFF_PITCH; - } - if ( dirty & MACH64_UPLOAD_Z_ALPHA_CNTL ) { - DMAOUTREG( MACH64_Z_CNTL, regs->z_cntl ); - DMAOUTREG( MACH64_ALPHA_TST_CNTL, regs->alpha_tst_cntl ); - sarea_priv->dirty &= ~MACH64_UPLOAD_Z_ALPHA_CNTL; - } - if ( dirty & MACH64_UPLOAD_SCALE_3D_CNTL ) { - DMAOUTREG( MACH64_SCALE_3D_CNTL, regs->scale_3d_cntl ); - sarea_priv->dirty &= ~MACH64_UPLOAD_SCALE_3D_CNTL; - } - if ( dirty & MACH64_UPLOAD_DP_FOG_CLR ) { - DMAOUTREG( MACH64_DP_FOG_CLR, regs->dp_fog_clr ); - sarea_priv->dirty &= ~MACH64_UPLOAD_DP_FOG_CLR; - } - if ( dirty & MACH64_UPLOAD_DP_WRITE_MASK ) { - DMAOUTREG( MACH64_DP_WRITE_MASK, regs->dp_write_mask ); - sarea_priv->dirty &= ~MACH64_UPLOAD_DP_WRITE_MASK; - } - if ( dirty & MACH64_UPLOAD_DP_PIX_WIDTH ) { - DMAOUTREG( MACH64_DP_PIX_WIDTH, regs->dp_pix_width ); - sarea_priv->dirty &= ~MACH64_UPLOAD_DP_PIX_WIDTH; - } - if ( dirty & MACH64_UPLOAD_SETUP_CNTL ) { - DMAOUTREG( MACH64_SETUP_CNTL, regs->setup_cntl ); - sarea_priv->dirty &= ~MACH64_UPLOAD_SETUP_CNTL; - } - - if ( dirty & MACH64_UPLOAD_TEXTURE ) { - DMAOUTREG( MACH64_TEX_SIZE_PITCH, regs->tex_size_pitch ); - DMAOUTREG( MACH64_TEX_CNTL, regs->tex_cntl ); - DMAOUTREG( MACH64_SECONDARY_TEX_OFF, regs->secondary_tex_off ); - DMAOUTREG( MACH64_TEX_0_OFF + offset, regs->tex_offset ); - sarea_priv->dirty &= ~MACH64_UPLOAD_TEXTURE; - } - - DMAADVANCE( dev_priv, 1 ); - - sarea_priv->dirty &= MACH64_UPLOAD_CLIPRECTS; - - return 0; - -} - - -/* ================================================================ - * DMA command dispatch functions - */ - -static int mach64_dma_dispatch_clear( DRMFILE filp, drm_device_t *dev, - unsigned int flags, - int cx, int cy, int cw, int ch, - unsigned int clear_color, - unsigned int clear_depth ) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mach64_context_regs_t *ctx = &sarea_priv->context_state; - int nbox = sarea_priv->nbox; - drm_clip_rect_t *pbox = sarea_priv->boxes; - u32 fb_bpp, depth_bpp; - int i; - DMALOCALS; - - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - switch ( dev_priv->fb_bpp ) { - case 16: - fb_bpp = MACH64_DATATYPE_RGB565; - break; - case 32: - fb_bpp = MACH64_DATATYPE_ARGB8888; - break; - default: - return DRM_ERR(EINVAL); - } - switch ( dev_priv->depth_bpp ) { - case 16: - depth_bpp = MACH64_DATATYPE_RGB565; - break; - case 24: - case 32: - depth_bpp = MACH64_DATATYPE_ARGB8888; - break; - default: - return DRM_ERR(EINVAL); - } - - if ( !nbox ) - return 0; - - DMAGETPTR( filp, dev_priv, nbox * 31 ); /* returns on failure to get buffer */ - - for ( i = 0 ; i < nbox ; i++ ) { - int x = pbox[i].x1; - int y = pbox[i].y1; - int w = pbox[i].x2 - x; - int h = pbox[i].y2 - y; - - DRM_DEBUG( "dispatch clear %d,%d-%d,%d flags 0x%x\n", - pbox[i].x1, pbox[i].y1, - pbox[i].x2, pbox[i].y2, flags ); - - if ( flags & (MACH64_FRONT | MACH64_BACK) ) { - /* Setup for color buffer clears - */ - - DMAOUTREG( MACH64_Z_CNTL, 0 ); - DMAOUTREG( MACH64_SCALE_3D_CNTL, 0 ); - - DMAOUTREG( MACH64_SC_LEFT_RIGHT, ctx->sc_left_right ); - DMAOUTREG( MACH64_SC_TOP_BOTTOM, ctx->sc_top_bottom ); - - DMAOUTREG( MACH64_CLR_CMP_CNTL, 0 ); - DMAOUTREG( MACH64_GUI_TRAJ_CNTL, - (MACH64_DST_X_LEFT_TO_RIGHT | - MACH64_DST_Y_TOP_TO_BOTTOM) ); - - DMAOUTREG( MACH64_DP_PIX_WIDTH, ((fb_bpp << 0) | - (fb_bpp << 4) | - (fb_bpp << 8) | - (fb_bpp << 16) | - (fb_bpp << 28)) ); - - DMAOUTREG( MACH64_DP_FRGD_CLR, clear_color ); - DMAOUTREG( MACH64_DP_WRITE_MASK, ctx->dp_write_mask ); - DMAOUTREG( MACH64_DP_MIX, (MACH64_BKGD_MIX_D | - MACH64_FRGD_MIX_S) ); - DMAOUTREG( MACH64_DP_SRC, (MACH64_BKGD_SRC_FRGD_CLR | - MACH64_FRGD_SRC_FRGD_CLR | - MACH64_MONO_SRC_ONE) ); - - - } - - if ( flags & MACH64_FRONT ) { - - DMAOUTREG( MACH64_DST_OFF_PITCH, - dev_priv->front_offset_pitch ); - DMAOUTREG( MACH64_DST_X_Y, - (y << 16) | x ); - DMAOUTREG( MACH64_DST_WIDTH_HEIGHT, - (h << 16) | w ); - - } - - if ( flags & MACH64_BACK ) { - - DMAOUTREG( MACH64_DST_OFF_PITCH, - dev_priv->back_offset_pitch ); - DMAOUTREG( MACH64_DST_X_Y, - (y << 16) | x ); - DMAOUTREG( MACH64_DST_WIDTH_HEIGHT, - (h << 16) | w ); - - } - - if ( flags & MACH64_DEPTH ) { - /* Setup for depth buffer clear - */ - DMAOUTREG( MACH64_Z_CNTL, 0 ); - DMAOUTREG( MACH64_SCALE_3D_CNTL, 0 ); - - DMAOUTREG( MACH64_SC_LEFT_RIGHT, ctx->sc_left_right ); - DMAOUTREG( MACH64_SC_TOP_BOTTOM, ctx->sc_top_bottom ); - - DMAOUTREG( MACH64_CLR_CMP_CNTL, 0 ); - DMAOUTREG( MACH64_GUI_TRAJ_CNTL, - (MACH64_DST_X_LEFT_TO_RIGHT | - MACH64_DST_Y_TOP_TO_BOTTOM) ); - - DMAOUTREG( MACH64_DP_PIX_WIDTH, ((depth_bpp << 0) | - (depth_bpp << 4) | - (depth_bpp << 8) | - (depth_bpp << 16) | - (depth_bpp << 28)) ); - - DMAOUTREG( MACH64_DP_FRGD_CLR, clear_depth ); - DMAOUTREG( MACH64_DP_WRITE_MASK, 0xffffffff ); - DMAOUTREG( MACH64_DP_MIX, (MACH64_BKGD_MIX_D | - MACH64_FRGD_MIX_S) ); - DMAOUTREG( MACH64_DP_SRC, (MACH64_BKGD_SRC_FRGD_CLR | - MACH64_FRGD_SRC_FRGD_CLR | - MACH64_MONO_SRC_ONE) ); - - DMAOUTREG( MACH64_DST_OFF_PITCH, - dev_priv->depth_offset_pitch ); - DMAOUTREG( MACH64_DST_X_Y, - (y << 16) | x ); - DMAOUTREG( MACH64_DST_WIDTH_HEIGHT, - (h << 16) | w ); - } - } - - DMAADVANCE( dev_priv, 1 ); - - return 0; -} - -static int mach64_dma_dispatch_swap( DRMFILE filp, drm_device_t *dev ) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - int nbox = sarea_priv->nbox; - drm_clip_rect_t *pbox = sarea_priv->boxes; - u32 fb_bpp; - int i; - DMALOCALS; - - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - switch ( dev_priv->fb_bpp ) { - case 16: - fb_bpp = MACH64_DATATYPE_RGB565; - break; - case 32: - default: - fb_bpp = MACH64_DATATYPE_ARGB8888; - break; - } - - if ( !nbox ) - return 0; - - DMAGETPTR( filp, dev_priv, 13 + nbox * 4 ); /* returns on failure to get buffer */ - - DMAOUTREG( MACH64_Z_CNTL, 0 ); - DMAOUTREG( MACH64_SCALE_3D_CNTL, 0 ); - - DMAOUTREG( MACH64_SC_LEFT_RIGHT, 0 | ( 8191 << 16 ) ); /* no scissor */ - DMAOUTREG( MACH64_SC_TOP_BOTTOM, 0 | ( 16383 << 16 ) ); - - DMAOUTREG( MACH64_CLR_CMP_CNTL, 0 ); - DMAOUTREG( MACH64_GUI_TRAJ_CNTL, (MACH64_DST_X_LEFT_TO_RIGHT | - MACH64_DST_Y_TOP_TO_BOTTOM) ); - - DMAOUTREG( MACH64_DP_PIX_WIDTH, ((fb_bpp << 0) | - (fb_bpp << 4) | - (fb_bpp << 8) | - (fb_bpp << 16) | - (fb_bpp << 28)) ); - - DMAOUTREG( MACH64_DP_WRITE_MASK, 0xffffffff ); - DMAOUTREG( MACH64_DP_MIX, (MACH64_BKGD_MIX_D | - MACH64_FRGD_MIX_S) ); - DMAOUTREG( MACH64_DP_SRC, (MACH64_BKGD_SRC_BKGD_CLR | - MACH64_FRGD_SRC_BLIT | - MACH64_MONO_SRC_ONE) ); - - DMAOUTREG( MACH64_SRC_OFF_PITCH, dev_priv->back_offset_pitch ); - DMAOUTREG( MACH64_DST_OFF_PITCH, dev_priv->front_offset_pitch ); - - for ( i = 0 ; i < nbox ; i++ ) { - int x = pbox[i].x1; - int y = pbox[i].y1; - int w = pbox[i].x2 - x; - int h = pbox[i].y2 - y; - - DRM_DEBUG( "dispatch swap %d,%d-%d,%d\n", - pbox[i].x1, pbox[i].y1, - pbox[i].x2, pbox[i].y2 ); - - DMAOUTREG( MACH64_SRC_WIDTH1, w ); - DMAOUTREG( MACH64_SRC_Y_X, (x << 16) | y ); - DMAOUTREG( MACH64_DST_Y_X, (x << 16) | y ); - DMAOUTREG( MACH64_DST_WIDTH_HEIGHT, (h << 16) | w ); - - } - - DMAADVANCE( dev_priv, 1 ); - - if (dev_priv->driver_mode == MACH64_MODE_DMA_ASYNC) { - for (i = 0; i < MACH64_MAX_QUEUED_FRAMES - 1; i++) { - dev_priv->frame_ofs[i] = dev_priv->frame_ofs[i+1]; - } - dev_priv->frame_ofs[i] = GETRINGOFFSET(); - - dev_priv->sarea_priv->frames_queued++; - } - - return 0; -} - -static int mach64_do_get_frames_queued( drm_mach64_private_t *dev_priv ) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - int i, start; - u32 head, tail, ofs; - - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - if (sarea_priv->frames_queued == 0) - return 0; - - tail = ring->tail; - mach64_ring_tick( dev_priv, ring ); - head = ring->head; - - start = ( MACH64_MAX_QUEUED_FRAMES - - DRM_MIN(MACH64_MAX_QUEUED_FRAMES, sarea_priv->frames_queued) ); - - if ( head == tail ) { - sarea_priv->frames_queued = 0; - for (i = start; i < MACH64_MAX_QUEUED_FRAMES; i++) { - dev_priv->frame_ofs[i] = ~0; - } - return 0; - } - - for ( i = start; i < MACH64_MAX_QUEUED_FRAMES; i++ ) { - ofs = dev_priv->frame_ofs[i]; - DRM_DEBUG( "frame_ofs[%d] ofs: %d\n", i, ofs ); - if ( ofs == ~0 || - ( head < tail && (ofs < head || ofs >= tail) ) || - ( head > tail && (ofs < head && ofs >= tail) ) ) { - sarea_priv->frames_queued = (MACH64_MAX_QUEUED_FRAMES - 1) - i; - dev_priv->frame_ofs[i] = ~0; - } - } - - return sarea_priv->frames_queued; -} - -/* Copy and verify a client submited buffer. - * FIXME: Make an assembly optimized version - */ -static __inline__ int copy_and_verify_from_user( u32 *to, const u32 *from, unsigned long bytes ) -{ - unsigned long n = bytes; /* dwords remaining in buffer */ - - if ( DRM_VERIFYAREA_READ( from, n ) ) { - DRM_ERROR( "%s: verify_area\n", __FUNCTION__ ); - return DRM_ERR(EFAULT); - } - - n >>= 2; - - while ( n > 1 ) { - u32 data, reg, count; - - if ( DRM_GET_USER_UNCHECKED( data, from++ ) ) { - DRM_ERROR( "%s: get_user\n", __FUNCTION__ ); - return DRM_ERR(EFAULT); - } - - n--; - - reg = le32_to_cpu(data); - count = (reg >> 16) + 1; - if( count <= n ) { - n -= count; - reg &= 0xffff; - - /* This is an exact match of Mach64's Setup Engine registers, - * excluding SETUP_CNTL (1_C1). - */ - if( (reg >= 0x0190 && reg < 0x01c1) || - (reg >= 0x01ca && reg <= 0x01cf) ) { - *to++ = data; - if ( DRM_COPY_FROM_USER_UNCHECKED( to, from, count << 2 ) ) { - DRM_ERROR( "%s: copy_from_user\n", __FUNCTION__ ); - return DRM_ERR(EFAULT); - } - to += count; - } else { - DRM_ERROR( "%s: Got bad command: 0x%04x\n", __FUNCTION__, reg ); - return DRM_ERR(EACCES); - } - - from += count; - } else { - DRM_ERROR( "%s: Got bad command count(=%u) dwords remaining=%lu\n", - __FUNCTION__, count, n ); - return DRM_ERR(EINVAL); - } - } - - if (n == 0) - return 0; - else { - DRM_ERROR( "%s: Bad buf->used(=%lu)\n", __FUNCTION__, bytes ); - return DRM_ERR(EINVAL); - } -} - -static int mach64_dma_dispatch_vertex( DRMFILE filp, drm_device_t *dev, int prim, void *buf, - unsigned long used, int discard ) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_buf_t *copy_buf; - int done = 0; - int verify_ret = 0; - DMALOCALS; - - DRM_DEBUG( "%s: buf=%p used=%lu nbox=%d\n", - __FUNCTION__, buf, used, sarea_priv->nbox ); - - if ( used ) { - int ret = 0; - int i = 0; - - copy_buf = mach64_freelist_get( dev_priv ); - if (copy_buf == NULL) { - DRM_ERROR("%s: couldn't get buffer in DMAGETPTR\n", - __FUNCTION__ ); - return DRM_ERR(EAGAIN); - } - - if ( (verify_ret = - copy_and_verify_from_user( GETBUFPTR( copy_buf ), buf, used )) == 0 ) { - - copy_buf->used = used; - - DMASETPTR( copy_buf ); - - if ( sarea_priv->dirty & ~MACH64_UPLOAD_CLIPRECTS ) { - ret = mach64_emit_state( filp, dev_priv ); - if (ret < 0) return ret; - } - - do { - /* Emit the next cliprect */ - if ( i < sarea_priv->nbox ) { - ret = mach64_emit_cliprect(filp, dev_priv, - &sarea_priv->boxes[i]); - if ( ret < 0 ) { - /* failed to get buffer */ - return ret; - } else if ( ret != 0 ) { - /* null intersection with scissor */ - continue; - } - } - if ((i >= sarea_priv->nbox - 1)) - done = 1; - - /* Add the buffer to the DMA queue */ - DMAADVANCE( dev_priv, done ); - - } while ( ++i < sarea_priv->nbox ); - } - - if (copy_buf->pending && !done) { - DMADISCARDBUF(); - } else if (!done) { - /* This buffer wasn't used (no cliprects or verify failed), so place it back - * on the free list - */ - struct list_head *ptr; - drm_mach64_freelist_t *entry; -#if MACH64_EXTRA_CHECKING - list_for_each(ptr, &dev_priv->pending) { - entry = list_entry(ptr, drm_mach64_freelist_t, list); - if (copy_buf == entry->buf) { - DRM_ERROR( "%s: Trying to release a pending buf\n", - __FUNCTION__ ); - return DRM_ERR(EFAULT); - } - } -#endif - ptr = dev_priv->placeholders.next; - entry = list_entry(ptr, drm_mach64_freelist_t, list); - copy_buf->pending = 0; - copy_buf->used = 0; - entry->buf = copy_buf; - entry->discard = 1; - list_del(ptr); - list_add_tail(ptr, &dev_priv->free_list); - } - } - - sarea_priv->dirty &= ~MACH64_UPLOAD_CLIPRECTS; - sarea_priv->nbox = 0; - - return verify_ret; -} - - -static int mach64_dma_dispatch_blit( DRMFILE filp, drm_device_t *dev, - drm_mach64_blit_t *blit ) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_device_dma_t *dma = dev->dma; - int dword_shift, dwords; - drm_buf_t *buf; - DMALOCALS; - - /* The compiler won't optimize away a division by a variable, - * even if the only legal values are powers of two. Thus, we'll - * use a shift instead. - */ - switch ( blit->format ) { - case MACH64_DATATYPE_ARGB8888: - dword_shift = 0; - break; - case MACH64_DATATYPE_ARGB1555: - case MACH64_DATATYPE_RGB565: - case MACH64_DATATYPE_VYUY422: - case MACH64_DATATYPE_YVYU422: - case MACH64_DATATYPE_ARGB4444: - dword_shift = 1; - break; - case MACH64_DATATYPE_CI8: - case MACH64_DATATYPE_RGB8: - dword_shift = 2; - break; - default: - DRM_ERROR( "invalid blit format %d\n", blit->format ); - return DRM_ERR(EINVAL); - } - - /* Dispatch the blit buffer. - */ - buf = dma->buflist[blit->idx]; - - if ( buf->filp != filp ) { - DRM_ERROR( "process %d (filp %p) using buffer with filp %p\n", - DRM_CURRENTPID, filp, buf->filp ); - return DRM_ERR(EINVAL); - } - - if ( buf->pending ) { - DRM_ERROR( "sending pending buffer %d\n", blit->idx ); - return DRM_ERR(EINVAL); - } - - /* Set buf->used to the bytes of blit data based on the blit dimensions - * and verify the size. When the setup is emitted to the buffer with - * the DMA* macros below, buf->used is incremented to include the bytes - * used for setup as well as the blit data. - */ - dwords = (blit->width * blit->height) >> dword_shift; - buf->used = dwords << 2; - if ( buf->used <= 0 || - buf->used > MACH64_BUFFER_SIZE - MACH64_HOSTDATA_BLIT_OFFSET ) { - DRM_ERROR( "Invalid blit size: %d bytes\n", buf->used ); - return DRM_ERR(EINVAL); - } - - /* FIXME: Use a last buffer flag and reduce the state emitted for subsequent, - * continuation buffers? - */ - - /* Blit via BM_HOSTDATA (gui-master) - like HOST_DATA[0-15], but doesn't require - * a register command every 16 dwords. State setup is added at the start of the - * buffer -- the client leaves space for this based on MACH64_HOSTDATA_BLIT_OFFSET - */ - DMASETPTR( buf ); - - DMAOUTREG( MACH64_Z_CNTL, 0 ); - DMAOUTREG( MACH64_SCALE_3D_CNTL, 0 ); - - DMAOUTREG( MACH64_SC_LEFT_RIGHT, 0 | ( 8191 << 16 ) ); /* no scissor */ - DMAOUTREG( MACH64_SC_TOP_BOTTOM, 0 | ( 16383 << 16 ) ); - - DMAOUTREG( MACH64_CLR_CMP_CNTL, 0 ); /* disable */ - DMAOUTREG( MACH64_GUI_TRAJ_CNTL, - MACH64_DST_X_LEFT_TO_RIGHT - | MACH64_DST_Y_TOP_TO_BOTTOM ); - - DMAOUTREG( MACH64_DP_PIX_WIDTH, - ( blit->format << 0 ) /* dst pix width */ - | ( blit->format << 4 ) /* composite pix width */ - | ( blit->format << 8 ) /* src pix width */ - | ( blit->format << 16 ) /* host data pix width */ - | ( blit->format << 28 ) /* scaler/3D pix width */ - ); - - DMAOUTREG( MACH64_DP_WRITE_MASK, 0xffffffff ); /* enable all planes */ - DMAOUTREG( MACH64_DP_MIX, - MACH64_BKGD_MIX_D - | MACH64_FRGD_MIX_S ); - DMAOUTREG( MACH64_DP_SRC, - MACH64_BKGD_SRC_BKGD_CLR - | MACH64_FRGD_SRC_HOST - | MACH64_MONO_SRC_ONE ); - - DMAOUTREG( MACH64_DST_OFF_PITCH, (blit->pitch << 22) | (blit->offset >> 3) ); - DMAOUTREG( MACH64_DST_X_Y, (blit->y << 16) | blit->x ); - DMAOUTREG( MACH64_DST_WIDTH_HEIGHT, (blit->height << 16) | blit->width ); - - DRM_DEBUG( "%s: %d bytes\n", __FUNCTION__, buf->used ); - - /* Add the buffer to the queue */ - DMAADVANCEHOSTDATA( dev_priv ); - - return 0; -} - -/* ================================================================ - * IOCTL functions - */ - -int mach64_dma_clear( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mach64_clear_t clear; - int ret; - - DRM_DEBUG( "%s: pid=%d\n", __FUNCTION__, DRM_CURRENTPID ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( clear, (drm_mach64_clear_t *)data, - sizeof(clear) ); - - if ( sarea_priv->nbox > MACH64_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = MACH64_NR_SAREA_CLIPRECTS; - - ret = mach64_dma_dispatch_clear( filp, dev, clear.flags, - clear.x, clear.y, clear.w, clear.h, - clear.clear_color, clear.clear_depth ); - - /* Make sure we restore the 3D state next time. - */ - sarea_priv->dirty |= (MACH64_UPLOAD_CONTEXT | - MACH64_UPLOAD_MISC); - return ret; -} - -int mach64_dma_swap( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - int ret; - - DRM_DEBUG( "%s: pid=%d\n", __FUNCTION__, DRM_CURRENTPID ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - if ( sarea_priv->nbox > MACH64_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = MACH64_NR_SAREA_CLIPRECTS; - - ret = mach64_dma_dispatch_swap( filp, dev ); - - /* Make sure we restore the 3D state next time. - */ - sarea_priv->dirty |= (MACH64_UPLOAD_CONTEXT | - MACH64_UPLOAD_MISC); - return ret; -} - -int mach64_dma_vertex( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mach64_vertex_t vertex; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL( vertex, (drm_mach64_vertex_t *)data, - sizeof(vertex) ); - - DRM_DEBUG( "%s: pid=%d buf=%p used=%lu discard=%d\n", - __FUNCTION__, DRM_CURRENTPID, - vertex.buf, vertex.used, vertex.discard ); - - if ( vertex.prim < 0 || - vertex.prim > MACH64_PRIM_POLYGON ) { - DRM_ERROR( "buffer prim %d\n", vertex.prim ); - return DRM_ERR(EINVAL); - } - - if ( vertex.used > MACH64_BUFFER_SIZE || (vertex.used & 3) != 0) { - DRM_ERROR( "Invalid vertex buffer size: %lu bytes\n", vertex.used ); - return DRM_ERR(EINVAL); - } - - if ( sarea_priv->nbox > MACH64_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = MACH64_NR_SAREA_CLIPRECTS; - - return mach64_dma_dispatch_vertex( filp, dev, vertex.prim, vertex.buf, - vertex.used, vertex.discard ); -} - -int mach64_dma_blit( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_device_dma_t *dma = dev->dma; - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mach64_blit_t blit; - int ret; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( blit, (drm_mach64_blit_t *)data, - sizeof(blit) ); - - DRM_DEBUG( "%s: pid=%d index=%d\n", - __FUNCTION__, DRM_CURRENTPID, blit.idx ); - - if ( blit.idx < 0 || blit.idx >= dma->buf_count ) { - DRM_ERROR( "buffer index %d (of %d max)\n", - blit.idx, dma->buf_count - 1 ); - return DRM_ERR(EINVAL); - } - - ret = mach64_dma_dispatch_blit( filp, dev, &blit ); - - /* Make sure we restore the 3D state next time. - */ - sarea_priv->dirty |= (MACH64_UPLOAD_CONTEXT | - MACH64_UPLOAD_MISC | - MACH64_UPLOAD_CLIPRECTS); - - return ret; -} - -int mach64_get_param( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_getparam_t param; - int value; - - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL( param, (drm_mach64_getparam_t *)data, - sizeof(param) ); - - switch ( param.param ) { - case MACH64_PARAM_FRAMES_QUEUED: - /* Needs lock since it calls mach64_ring_tick() */ - LOCK_TEST_WITH_RETURN( dev, filp ); - value = mach64_do_get_frames_queued( dev_priv ); - break; - case MACH64_PARAM_IRQ_NR: - value = dev->irq; - break; - default: - return DRM_ERR(EINVAL); - } - - if ( DRM_COPY_TO_USER( param.value, &value, sizeof(int) ) ) { - DRM_ERROR( "copy_to_user\n" ); - return DRM_ERR(EFAULT); - } - - return 0; -} diff --git a/shared/mga.h b/shared/mga.h deleted file mode 100644 index 5356519e5..000000000 --- a/shared/mga.h +++ /dev/null @@ -1,63 +0,0 @@ -/* mga.h -- Matrox G200/G400 DRM template customization -*- linux-c -*- - * Created: Thu Jan 11 21:29:32 2001 by gareth@valinux.com - * - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - -#ifndef __MGA_H__ -#define __MGA_H__ - -/* This remains constant for all DRM template files. - */ -#define DRM(x) mga_##x - -/* General customization: - */ - -#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc." - -#define DRIVER_NAME "mga" -#define DRIVER_DESC "Matrox G200/G400" -#define DRIVER_DATE "20021029" - -#define DRIVER_MAJOR 3 -#define DRIVER_MINOR 1 -#define DRIVER_PATCHLEVEL 0 - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { mga_dma_buffers, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_INIT)] = { mga_dma_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)] = { mga_dma_flush, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_RESET)] = { mga_dma_reset, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_dma_swap, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_dma_clear, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_dma_vertex, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_dma_indices, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_dma_iload, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_BLIT)] = { mga_dma_blit, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_GETPARAM)]= { mga_getparam, 1, 0 }, - -#endif diff --git a/shared/mga_dma.c b/shared/mga_dma.c deleted file mode 100644 index 0288f1c2c..000000000 --- a/shared/mga_dma.c +++ /dev/null @@ -1,829 +0,0 @@ -/* mga_dma.c -- DMA support for mga g200/g400 -*- linux-c -*- - * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Jeff Hartmann <jhartmann@valinux.com> - * Keith Whitwell <keith@tungstengraphics.com> - * - * Rewritten by: - * Gareth Hughes <gareth@valinux.com> - */ - -#include "mga.h" -#include "drmP.h" -#include "drm.h" -#include "mga_drm.h" -#include "mga_drv.h" - -#define MGA_DEFAULT_USEC_TIMEOUT 10000 -#define MGA_FREELIST_DEBUG 0 - - -/* ================================================================ - * Engine control - */ - -int mga_do_wait_for_idle( drm_mga_private_t *dev_priv ) -{ - u32 status = 0; - int i; - DRM_DEBUG( "\n" ); - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK; - if ( status == MGA_ENDPRDMASTS ) { - MGA_WRITE8( MGA_CRTC_INDEX, 0 ); - return 0; - } - DRM_UDELAY( 1 ); - } - -#if MGA_DMA_DEBUG - DRM_ERROR( "failed!\n" ); - DRM_INFO( " status=0x%08x\n", status ); -#endif - return DRM_ERR(EBUSY); -} - -int mga_do_dma_idle( drm_mga_private_t *dev_priv ) -{ - u32 status = 0; - int i; - DRM_DEBUG( "\n" ); - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - status = MGA_READ( MGA_STATUS ) & MGA_DMA_IDLE_MASK; - if ( status == MGA_ENDPRDMASTS ) return 0; - DRM_UDELAY( 1 ); - } - -#if MGA_DMA_DEBUG - DRM_ERROR( "failed! status=0x%08x\n", status ); -#endif - return DRM_ERR(EBUSY); -} - -int mga_do_dma_reset( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_primary_buffer_t *primary = &dev_priv->prim; - - DRM_DEBUG( "\n" ); - - /* The primary DMA stream should look like new right about now. - */ - primary->tail = 0; - primary->space = primary->size; - primary->last_flush = 0; - - sarea_priv->last_wrap = 0; - - /* FIXME: Reset counters, buffer ages etc... - */ - - /* FIXME: What else do we need to reinitialize? WARP stuff? - */ - - return 0; -} - -int mga_do_engine_reset( drm_mga_private_t *dev_priv ) -{ - DRM_DEBUG( "\n" ); - - /* Okay, so we've completely screwed up and locked the engine. - * How about we clean up after ourselves? - */ - MGA_WRITE( MGA_RST, MGA_SOFTRESET ); - DRM_UDELAY( 15 ); /* Wait at least 10 usecs */ - MGA_WRITE( MGA_RST, 0 ); - - /* Initialize the registers that get clobbered by the soft - * reset. Many of the core register values survive a reset, - * but the drawing registers are basically all gone. - * - * 3D clients should probably die after calling this. The X - * server should reset the engine state to known values. - */ -#if 0 - MGA_WRITE( MGA_PRIMPTR, - virt_to_bus((void *)dev_priv->prim.status_page) | - MGA_PRIMPTREN0 | - MGA_PRIMPTREN1 ); -#endif - - MGA_WRITE( MGA_ICLEAR, MGA_SOFTRAPICLR ); - MGA_WRITE( MGA_IEN, MGA_SOFTRAPIEN ); - - /* The primary DMA stream should look like new right about now. - */ - mga_do_dma_reset( dev_priv ); - - /* This bad boy will never fail. - */ - return 0; -} - - -/* ================================================================ - * Primary DMA stream - */ - -void mga_do_dma_flush( drm_mga_private_t *dev_priv ) -{ - drm_mga_primary_buffer_t *primary = &dev_priv->prim; - u32 head, tail; - u32 status = 0; - int i; - DMA_LOCALS; - DRM_DEBUG( "\n" ); - - /* We need to wait so that we can do an safe flush */ - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK; - if ( status == MGA_ENDPRDMASTS ) break; - DRM_UDELAY( 1 ); - } - - if ( primary->tail == primary->last_flush ) { - DRM_DEBUG( " bailing out...\n" ); - return; - } - - tail = primary->tail + dev_priv->primary->offset; - - /* We need to pad the stream between flushes, as the card - * actually (partially?) reads the first of these commands. - * See page 4-16 in the G400 manual, middle of the page or so. - */ - BEGIN_DMA( 1 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000 ); - - ADVANCE_DMA(); - - primary->last_flush = primary->tail; - - head = MGA_READ( MGA_PRIMADDRESS ); - - if ( head <= tail ) { - primary->space = primary->size - primary->tail; - } else { - primary->space = head - tail; - } - - DRM_DEBUG( " head = 0x%06lx\n", head - dev_priv->primary->offset ); - DRM_DEBUG( " tail = 0x%06lx\n", tail - dev_priv->primary->offset ); - DRM_DEBUG( " space = 0x%06x\n", primary->space ); - - mga_flush_write_combine(); - MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER ); - - DRM_DEBUG( "done.\n" ); -} - -void mga_do_dma_wrap_start( drm_mga_private_t *dev_priv ) -{ - drm_mga_primary_buffer_t *primary = &dev_priv->prim; - u32 head, tail; - DMA_LOCALS; - DRM_DEBUG( "\n" ); - - BEGIN_DMA_WRAP(); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000 ); - - ADVANCE_DMA(); - - tail = primary->tail + dev_priv->primary->offset; - - primary->tail = 0; - primary->last_flush = 0; - primary->last_wrap++; - - head = MGA_READ( MGA_PRIMADDRESS ); - - if ( head == dev_priv->primary->offset ) { - primary->space = primary->size; - } else { - primary->space = head - dev_priv->primary->offset; - } - - DRM_DEBUG( " head = 0x%06lx\n", - head - dev_priv->primary->offset ); - DRM_DEBUG( " tail = 0x%06x\n", primary->tail ); - DRM_DEBUG( " wrap = %d\n", primary->last_wrap ); - DRM_DEBUG( " space = 0x%06x\n", primary->space ); - - mga_flush_write_combine(); - MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER ); - - set_bit( 0, &primary->wrapped ); - DRM_DEBUG( "done.\n" ); -} - -void mga_do_dma_wrap_end( drm_mga_private_t *dev_priv ) -{ - drm_mga_primary_buffer_t *primary = &dev_priv->prim; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - u32 head = dev_priv->primary->offset; - DRM_DEBUG( "\n" ); - - sarea_priv->last_wrap++; - DRM_DEBUG( " wrap = %d\n", sarea_priv->last_wrap ); - - mga_flush_write_combine(); - MGA_WRITE( MGA_PRIMADDRESS, head | MGA_DMA_GENERAL ); - - clear_bit( 0, &primary->wrapped ); - DRM_DEBUG( "done.\n" ); -} - - -/* ================================================================ - * Freelist management - */ - -#define MGA_BUFFER_USED ~0 -#define MGA_BUFFER_FREE 0 - -#if MGA_FREELIST_DEBUG -static void mga_freelist_print( drm_device_t *dev ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_freelist_t *entry; - - DRM_INFO( "\n" ); - DRM_INFO( "current dispatch: last=0x%x done=0x%x\n", - dev_priv->sarea_priv->last_dispatch, - (unsigned int)(MGA_READ( MGA_PRIMADDRESS ) - - dev_priv->primary->offset) ); - DRM_INFO( "current freelist:\n" ); - - for ( entry = dev_priv->head->next ; entry ; entry = entry->next ) { - DRM_INFO( " %p idx=%2d age=0x%x 0x%06lx\n", - entry, entry->buf->idx, entry->age.head, - entry->age.head - dev_priv->primary->offset ); - } - DRM_INFO( "\n" ); -} -#endif - -static int mga_freelist_init( drm_device_t *dev, drm_mga_private_t *dev_priv ) -{ - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_mga_buf_priv_t *buf_priv; - drm_mga_freelist_t *entry; - int i; - DRM_DEBUG( "count=%d\n", dma->buf_count ); - - dev_priv->head = DRM(alloc)( sizeof(drm_mga_freelist_t), - DRM_MEM_DRIVER ); - if ( dev_priv->head == NULL ) - return DRM_ERR(ENOMEM); - - memset( dev_priv->head, 0, sizeof(drm_mga_freelist_t) ); - SET_AGE( &dev_priv->head->age, MGA_BUFFER_USED, 0 ); - - for ( i = 0 ; i < dma->buf_count ; i++ ) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - - entry = DRM(alloc)( sizeof(drm_mga_freelist_t), - DRM_MEM_DRIVER ); - if ( entry == NULL ) - return DRM_ERR(ENOMEM); - - memset( entry, 0, sizeof(drm_mga_freelist_t) ); - - entry->next = dev_priv->head->next; - entry->prev = dev_priv->head; - SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 ); - entry->buf = buf; - - if ( dev_priv->head->next != NULL ) - dev_priv->head->next->prev = entry; - if ( entry->next == NULL ) - dev_priv->tail = entry; - - buf_priv->list_entry = entry; - buf_priv->discard = 0; - buf_priv->dispatched = 0; - - dev_priv->head->next = entry; - } - - return 0; -} - -static void mga_freelist_cleanup( drm_device_t *dev ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_freelist_t *entry; - drm_mga_freelist_t *next; - DRM_DEBUG( "\n" ); - - entry = dev_priv->head; - while ( entry ) { - next = entry->next; - DRM(free)( entry, sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER ); - entry = next; - } - - dev_priv->head = dev_priv->tail = NULL; -} - -#if 0 -/* FIXME: Still needed? - */ -static void mga_freelist_reset( drm_device_t *dev ) -{ - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_mga_buf_priv_t *buf_priv; - int i; - - for ( i = 0 ; i < dma->buf_count ; i++ ) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - SET_AGE( &buf_priv->list_entry->age, - MGA_BUFFER_FREE, 0 ); - } -} -#endif - -static drm_buf_t *mga_freelist_get( drm_device_t *dev ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_freelist_t *next; - drm_mga_freelist_t *prev; - drm_mga_freelist_t *tail = dev_priv->tail; - u32 head, wrap; - DRM_DEBUG( "\n" ); - - head = MGA_READ( MGA_PRIMADDRESS ); - wrap = dev_priv->sarea_priv->last_wrap; - - DRM_DEBUG( " tail=0x%06lx %d\n", - tail->age.head ? - tail->age.head - dev_priv->primary->offset : 0, - tail->age.wrap ); - DRM_DEBUG( " head=0x%06lx %d\n", - head - dev_priv->primary->offset, wrap ); - - if ( TEST_AGE( &tail->age, head, wrap ) ) { - prev = dev_priv->tail->prev; - next = dev_priv->tail; - prev->next = NULL; - next->prev = next->next = NULL; - dev_priv->tail = prev; - SET_AGE( &next->age, MGA_BUFFER_USED, 0 ); - return next->buf; - } - - DRM_DEBUG( "returning NULL!\n" ); - return NULL; -} - -int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_buf_priv_t *buf_priv = buf->dev_private; - drm_mga_freelist_t *head, *entry, *prev; - - DRM_DEBUG( "age=0x%06lx wrap=%d\n", - buf_priv->list_entry->age.head - - dev_priv->primary->offset, - buf_priv->list_entry->age.wrap ); - - entry = buf_priv->list_entry; - head = dev_priv->head; - - if ( buf_priv->list_entry->age.head == MGA_BUFFER_USED ) { - SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 ); - prev = dev_priv->tail; - prev->next = entry; - entry->prev = prev; - entry->next = NULL; - } else { - prev = head->next; - head->next = entry; - prev->prev = entry; - entry->prev = head; - entry->next = prev; - } - - return 0; -} - - -/* ================================================================ - * DMA initialization, cleanup - */ - -static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init ) -{ - drm_mga_private_t *dev_priv; - int ret; - DRM_DEBUG( "\n" ); - - dev_priv = DRM(alloc)( sizeof(drm_mga_private_t), DRM_MEM_DRIVER ); - if ( !dev_priv ) - return DRM_ERR(ENOMEM); - - memset( dev_priv, 0, sizeof(drm_mga_private_t) ); - - dev_priv->chipset = init->chipset; - - dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT; - - if ( init->sgram ) { - dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK; - } else { - dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR; - } - dev_priv->maccess = init->maccess; - - dev_priv->fb_cpp = init->fb_cpp; - dev_priv->front_offset = init->front_offset; - dev_priv->front_pitch = init->front_pitch; - dev_priv->back_offset = init->back_offset; - dev_priv->back_pitch = init->back_pitch; - - dev_priv->depth_cpp = init->depth_cpp; - dev_priv->depth_offset = init->depth_offset; - dev_priv->depth_pitch = init->depth_pitch; - - /* FIXME: Need to support AGP textures... - */ - dev_priv->texture_offset = init->texture_offset[0]; - dev_priv->texture_size = init->texture_size[0]; - - DRM_GETSAREA(); - - if(!dev_priv->sarea) { - DRM_ERROR( "failed to find sarea!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - return DRM_ERR(EINVAL); - } - - dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset); - if(!dev_priv->mmio) { - DRM_ERROR( "failed to find mmio region!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - return DRM_ERR(EINVAL); - } - dev_priv->status = drm_core_findmap(dev, init->status_offset); - if(!dev_priv->status) { - DRM_ERROR( "failed to find status page!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - return DRM_ERR(EINVAL); - } - dev_priv->warp = drm_core_findmap(dev, init->warp_offset); - if(!dev_priv->warp) { - DRM_ERROR( "failed to find warp microcode region!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - return DRM_ERR(EINVAL); - } - dev_priv->primary = drm_core_findmap(dev, init->primary_offset); - if(!dev_priv->primary) { - DRM_ERROR( "failed to find primary dma region!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - return DRM_ERR(EINVAL); - } - dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset); - if(!dev->agp_buffer_map) { - DRM_ERROR( "failed to find dma buffer region!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - return DRM_ERR(EINVAL); - } - - dev_priv->sarea_priv = - (drm_mga_sarea_t *)((u8 *)dev_priv->sarea->handle + - init->sarea_priv_offset); - - drm_core_ioremap( dev_priv->warp, dev ); - drm_core_ioremap( dev_priv->primary, dev ); - drm_core_ioremap( dev->agp_buffer_map, dev ); - - if(!dev_priv->warp->handle || - !dev_priv->primary->handle || - !dev->agp_buffer_map->handle ) { - DRM_ERROR( "failed to ioremap agp regions!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - return DRM_ERR(ENOMEM); - } - - ret = mga_warp_install_microcode( dev_priv ); - if ( ret < 0 ) { - DRM_ERROR( "failed to install WARP ucode!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - return ret; - } - - ret = mga_warp_init( dev_priv ); - if ( ret < 0 ) { - DRM_ERROR( "failed to init WARP engine!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - return ret; - } - - dev_priv->prim.status = (u32 *)dev_priv->status->handle; - - mga_do_wait_for_idle( dev_priv ); - - /* Init the primary DMA registers. - */ - MGA_WRITE( MGA_PRIMADDRESS, - dev_priv->primary->offset | MGA_DMA_GENERAL ); -#if 0 - MGA_WRITE( MGA_PRIMPTR, - virt_to_bus((void *)dev_priv->prim.status) | - MGA_PRIMPTREN0 | /* Soft trap, SECEND, SETUPEND */ - MGA_PRIMPTREN1 ); /* DWGSYNC */ -#endif - - dev_priv->prim.start = (u8 *)dev_priv->primary->handle; - dev_priv->prim.end = ((u8 *)dev_priv->primary->handle - + dev_priv->primary->size); - dev_priv->prim.size = dev_priv->primary->size; - - dev_priv->prim.tail = 0; - dev_priv->prim.space = dev_priv->prim.size; - dev_priv->prim.wrapped = 0; - - dev_priv->prim.last_flush = 0; - dev_priv->prim.last_wrap = 0; - - dev_priv->prim.high_mark = 256 * DMA_BLOCK_SIZE; - - dev_priv->prim.status[0] = dev_priv->primary->offset; - dev_priv->prim.status[1] = 0; - - dev_priv->sarea_priv->last_wrap = 0; - dev_priv->sarea_priv->last_frame.head = 0; - dev_priv->sarea_priv->last_frame.wrap = 0; - - if ( mga_freelist_init( dev, dev_priv ) < 0 ) { - DRM_ERROR( "could not initialize freelist\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - return DRM_ERR(ENOMEM); - } - - /* Make dev_private visable to others. */ - dev->dev_private = (void *)dev_priv; - return 0; -} - -int mga_do_cleanup_dma( drm_device_t *dev ) -{ - DRM_DEBUG( "\n" ); - - /* Make sure interrupts are disabled here because the uninstall ioctl - * may not have been called from userspace and after dev_private - * is freed, it's too late. - */ - if ( dev->irq_enabled ) DRM(irq_uninstall)(dev); - - if ( dev->dev_private ) { - drm_mga_private_t *dev_priv = dev->dev_private; - - if ( dev_priv->warp != NULL ) - drm_core_ioremapfree( dev_priv->warp, dev ); - if ( dev_priv->primary != NULL ) - drm_core_ioremapfree( dev_priv->primary, dev ); - if ( dev->agp_buffer_map != NULL ) { - drm_core_ioremapfree( dev->agp_buffer_map, dev ); - dev->agp_buffer_map = NULL; - } - - if ( dev_priv->head != NULL ) { - mga_freelist_cleanup( dev ); - } - - DRM(free)( dev->dev_private, sizeof(drm_mga_private_t), - DRM_MEM_DRIVER ); - dev->dev_private = NULL; - } - - return 0; -} - -int mga_dma_init( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_mga_init_t init; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( init, (drm_mga_init_t __user *)data, sizeof(init) ); - - switch ( init.func ) { - case MGA_INIT_DMA: - return mga_do_init_dma( dev, &init ); - case MGA_CLEANUP_DMA: - return mga_do_cleanup_dma( dev ); - } - - return DRM_ERR(EINVAL); -} - - -/* ================================================================ - * Primary DMA stream management - */ - -int mga_dma_flush( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; - drm_lock_t lock; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( lock, (drm_lock_t __user *)data, sizeof(lock) ); - - DRM_DEBUG( "%s%s%s\n", - (lock.flags & _DRM_LOCK_FLUSH) ? "flush, " : "", - (lock.flags & _DRM_LOCK_FLUSH_ALL) ? "flush all, " : "", - (lock.flags & _DRM_LOCK_QUIESCENT) ? "idle, " : "" ); - - WRAP_WAIT_WITH_RETURN( dev_priv ); - - if ( lock.flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL) ) { - mga_do_dma_flush( dev_priv ); - } - - if ( lock.flags & _DRM_LOCK_QUIESCENT ) { -#if MGA_DMA_DEBUG - int ret = mga_do_wait_for_idle( dev_priv ); - if ( ret < 0 ) - DRM_INFO( "%s: -EBUSY\n", __FUNCTION__ ); - return ret; -#else - return mga_do_wait_for_idle( dev_priv ); -#endif - } else { - return 0; - } -} - -int mga_dma_reset( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - return mga_do_dma_reset( dev_priv ); -} - - -/* ================================================================ - * DMA buffer management - */ - -static int mga_dma_get_buffers( DRMFILE filp, - drm_device_t *dev, drm_dma_t *d ) -{ - drm_buf_t *buf; - int i; - - for ( i = d->granted_count ; i < d->request_count ; i++ ) { - buf = mga_freelist_get( dev ); - if ( !buf ) return DRM_ERR(EAGAIN); - - buf->filp = filp; - - if ( DRM_COPY_TO_USER( &d->request_indices[i], - &buf->idx, sizeof(buf->idx) ) ) - return DRM_ERR(EFAULT); - if ( DRM_COPY_TO_USER( &d->request_sizes[i], - &buf->total, sizeof(buf->total) ) ) - return DRM_ERR(EFAULT); - - d->granted_count++; - } - return 0; -} - -int mga_dma_buffers( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_device_dma_t *dma = dev->dma; - drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; - drm_dma_t __user *argp = (void __user *)data; - drm_dma_t d; - int ret = 0; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( d, argp, sizeof(d) ); - - /* Please don't send us buffers. - */ - if ( d.send_count != 0 ) { - DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n", - DRM_CURRENTPID, d.send_count ); - return DRM_ERR(EINVAL); - } - - /* We'll send you buffers. - */ - if ( d.request_count < 0 || d.request_count > dma->buf_count ) { - DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n", - DRM_CURRENTPID, d.request_count, dma->buf_count ); - return DRM_ERR(EINVAL); - } - - WRAP_TEST_WITH_RETURN( dev_priv ); - - d.granted_count = 0; - - if ( d.request_count ) { - ret = mga_dma_get_buffers( filp, dev, &d ); - } - - DRM_COPY_TO_USER_IOCTL( argp, d, sizeof(d) ); - - return ret; -} - -static void mga_driver_pretakedown(drm_device_t *dev) -{ - mga_do_cleanup_dma( dev ); -} - -static int mga_driver_dma_quiescent(drm_device_t *dev) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - return mga_do_wait_for_idle( dev_priv ); -} - -void mga_driver_register_fns(drm_device_t *dev) -{ - dev->driver_features = DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_IRQ_VBL; - dev->fn_tbl.pretakedown = mga_driver_pretakedown; - dev->fn_tbl.dma_quiescent = mga_driver_dma_quiescent; - dev->fn_tbl.vblank_wait = mga_driver_vblank_wait; - dev->fn_tbl.irq_preinstall = mga_driver_irq_preinstall; - dev->fn_tbl.irq_postinstall = mga_driver_irq_postinstall; - dev->fn_tbl.irq_uninstall = mga_driver_irq_uninstall; - dev->fn_tbl.irq_handler = mga_driver_irq_handler; - - dev->counters += 3; - dev->types[6] = _DRM_STAT_IRQ; - dev->types[7] = _DRM_STAT_PRIMARY; - dev->types[8] = _DRM_STAT_SECONDARY; -} diff --git a/shared/mga_drm.h b/shared/mga_drm.h deleted file mode 100644 index 5b8f1564e..000000000 --- a/shared/mga_drm.h +++ /dev/null @@ -1,425 +0,0 @@ -/* mga_drm.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*- - * Created: Tue Jan 25 01:50:01 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Jeff Hartmann <jhartmann@valinux.com> - * Keith Whitwell <keith@tungstengraphics.com> - * - * Rewritten by: - * Gareth Hughes <gareth@valinux.com> - */ - -#ifndef __MGA_DRM_H__ -#define __MGA_DRM_H__ - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (mga_sarea.h) - */ - -#ifndef __MGA_SAREA_DEFINES__ -#define __MGA_SAREA_DEFINES__ - -/* WARP pipe flags - */ -#define MGA_F 0x1 /* fog */ -#define MGA_A 0x2 /* alpha */ -#define MGA_S 0x4 /* specular */ -#define MGA_T2 0x8 /* multitexture */ - -#define MGA_WARP_TGZ 0 -#define MGA_WARP_TGZF (MGA_F) -#define MGA_WARP_TGZA (MGA_A) -#define MGA_WARP_TGZAF (MGA_F|MGA_A) -#define MGA_WARP_TGZS (MGA_S) -#define MGA_WARP_TGZSF (MGA_S|MGA_F) -#define MGA_WARP_TGZSA (MGA_S|MGA_A) -#define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A) -#define MGA_WARP_T2GZ (MGA_T2) -#define MGA_WARP_T2GZF (MGA_T2|MGA_F) -#define MGA_WARP_T2GZA (MGA_T2|MGA_A) -#define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F) -#define MGA_WARP_T2GZS (MGA_T2|MGA_S) -#define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F) -#define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A) -#define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A) - -#define MGA_MAX_G200_PIPES 8 /* no multitex */ -#define MGA_MAX_G400_PIPES 16 -#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES -#define MGA_WARP_UCODE_SIZE 32768 /* in bytes */ - -#define MGA_CARD_TYPE_G200 1 -#define MGA_CARD_TYPE_G400 2 -#define MGA_CARD_TYPE_G450 3 /* not currently used */ -#define MGA_CARD_TYPE_G550 4 - -#define MGA_FRONT 0x1 -#define MGA_BACK 0x2 -#define MGA_DEPTH 0x4 - -/* What needs to be changed for the current vertex dma buffer? - */ -#define MGA_UPLOAD_CONTEXT 0x1 -#define MGA_UPLOAD_TEX0 0x2 -#define MGA_UPLOAD_TEX1 0x4 -#define MGA_UPLOAD_PIPE 0x8 -#define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */ -#define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */ -#define MGA_UPLOAD_2D 0x40 -#define MGA_WAIT_AGE 0x80 /* handled client-side */ -#define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */ -#if 0 -#define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock - quiescent */ -#endif - -/* 32 buffers of 64k each, total 2 meg. - */ -#define MGA_BUFFER_SIZE (1 << 16) -#define MGA_NUM_BUFFERS 128 - -/* Keep these small for testing. - */ -#define MGA_NR_SAREA_CLIPRECTS 8 - -/* 2 heaps (1 for card, 1 for agp), each divided into upto 128 - * regions, subject to a minimum region size of (1<<16) == 64k. - * - * Clients may subdivide regions internally, but when sharing between - * clients, the region size is the minimum granularity. - */ - -#define MGA_CARD_HEAP 0 -#define MGA_AGP_HEAP 1 -#define MGA_NR_TEX_HEAPS 2 -#define MGA_NR_TEX_REGIONS 16 -#define MGA_LOG_MIN_TEX_REGION_SIZE 16 - -#define DRM_MGA_IDLE_RETRY 2048 - -#endif /* __MGA_SAREA_DEFINES__ */ - -/* Setup registers for 3D context - */ -typedef struct { - unsigned int dstorg; - unsigned int maccess; - unsigned int plnwt; - unsigned int dwgctl; - unsigned int alphactrl; - unsigned int fogcolor; - unsigned int wflag; - unsigned int tdualstage0; - unsigned int tdualstage1; - unsigned int fcol; - unsigned int stencil; - unsigned int stencilctl; -} drm_mga_context_regs_t; - -/* Setup registers for 2D, X server - */ -typedef struct { - unsigned int pitch; -} drm_mga_server_regs_t; - -/* Setup registers for each texture unit - */ -typedef struct { - unsigned int texctl; - unsigned int texctl2; - unsigned int texfilter; - unsigned int texbordercol; - unsigned int texorg; - unsigned int texwidth; - unsigned int texheight; - unsigned int texorg1; - unsigned int texorg2; - unsigned int texorg3; - unsigned int texorg4; -} drm_mga_texture_regs_t; - -/* General aging mechanism - */ -typedef struct { - unsigned int head; /* Position of head pointer */ - unsigned int wrap; /* Primary DMA wrap count */ -} drm_mga_age_t; - -typedef struct _drm_mga_sarea { - /* The channel for communication of state information to the kernel - * on firing a vertex dma buffer. - */ - drm_mga_context_regs_t context_state; - drm_mga_server_regs_t server_state; - drm_mga_texture_regs_t tex_state[2]; - unsigned int warp_pipe; - unsigned int dirty; - unsigned int vertsize; - - /* The current cliprects, or a subset thereof. - */ - drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS]; - unsigned int nbox; - - /* Information about the most recently used 3d drawable. The - * client fills in the req_* fields, the server fills in the - * exported_ fields and puts the cliprects into boxes, above. - * - * The client clears the exported_drawable field before - * clobbering the boxes data. - */ - unsigned int req_drawable; /* the X drawable id */ - unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */ - - unsigned int exported_drawable; - unsigned int exported_index; - unsigned int exported_stamp; - unsigned int exported_buffers; - unsigned int exported_nfront; - unsigned int exported_nback; - int exported_back_x, exported_front_x, exported_w; - int exported_back_y, exported_front_y, exported_h; - drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS]; - - /* Counters for aging textures and for client-side throttling. - */ - unsigned int status[4]; - unsigned int last_wrap; - - drm_mga_age_t last_frame; - unsigned int last_enqueue; /* last time a buffer was enqueued */ - unsigned int last_dispatch; /* age of the most recently dispatched buffer */ - unsigned int last_quiescent; /* */ - - /* LRU lists for texture memory in agp space and on the card. - */ - drm_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS + 1]; - unsigned int texAge[MGA_NR_TEX_HEAPS]; - - /* Mechanism to validate card state. - */ - int ctxOwner; -} drm_mga_sarea_t; - - -/* MGA specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ -#define DRM_MGA_INIT 0x00 -#define DRM_MGA_FLUSH 0x01 -#define DRM_MGA_RESET 0x02 -#define DRM_MGA_SWAP 0x03 -#define DRM_MGA_CLEAR 0x04 -#define DRM_MGA_VERTEX 0x05 -#define DRM_MGA_INDICES 0x06 -#define DRM_MGA_ILOAD 0x07 -#define DRM_MGA_BLIT 0x08 -#define DRM_MGA_GETPARAM 0x09 - -/* 3.2: - * ioctls for operating on fences. - */ -#define DRM_MGA_SET_FENCE 0x0a -#define DRM_MGA_WAIT_FENCE 0x0b -#define DRM_MGA_DMA_BOOTSTRAP 0x0c - - -#define DRM_IOCTL_MGA_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t) -#define DRM_IOCTL_MGA_FLUSH DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_FLUSH, drm_lock_t) -#define DRM_IOCTL_MGA_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MGA_RESET) -#define DRM_IOCTL_MGA_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_MGA_SWAP) -#define DRM_IOCTL_MGA_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_CLEAR, drm_mga_clear_t) -#define DRM_IOCTL_MGA_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_VERTEX, drm_mga_vertex_t) -#define DRM_IOCTL_MGA_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INDICES, drm_mga_indices_t) -#define DRM_IOCTL_MGA_ILOAD DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_ILOAD, drm_mga_iload_t) -#define DRM_IOCTL_MGA_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_BLIT, drm_mga_blit_t) -#define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t) -#define DRM_IOCTL_MGA_SET_FENCE DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_SET_FENCE, uint32_t) -#define DRM_IOCTL_MGA_WAIT_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_WAIT_FENCE, uint32_t) -#define DRM_IOCTL_MGA_DMA_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_DMA_BOOTSTRAP, drm_mga_dma_bootstrap_t) - -typedef struct _drm_mga_warp_index { - int installed; - unsigned long phys_addr; - int size; -} drm_mga_warp_index_t; - -typedef struct drm_mga_init { - enum { - MGA_INIT_DMA = 0x01, - MGA_CLEANUP_DMA = 0x02 - } func; - - unsigned long sarea_priv_offset; - - int chipset; - int sgram; - - unsigned int maccess; - - unsigned int fb_cpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - - unsigned int depth_cpp; - unsigned int depth_offset, depth_pitch; - - unsigned int texture_offset[MGA_NR_TEX_HEAPS]; - unsigned int texture_size[MGA_NR_TEX_HEAPS]; - - unsigned long fb_offset; - unsigned long mmio_offset; - unsigned long status_offset; - unsigned long warp_offset; - unsigned long primary_offset; - unsigned long buffers_offset; -} drm_mga_init_t; - - -typedef struct drm_mga_dma_bootstrap { - /** - * \name AGP texture region - * - * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, these fields will - * be filled in with the actual AGP texture settings. - * - * \warning - * If these fields are non-zero, but dma_mga_dma_bootstrap::agp_mode - * is zero, it means that PCI memory (most likely through the use of - * an IOMMU) is being used for "AGP" textures. - */ - /*@{*/ - drm_handle_t texture_handle; /**< Handle used to map AGP textures. */ - uint32_t texture_size; /**< Size of the AGP texture region. */ - /*@}*/ - - - /** - * Requested size of the primary DMA region. - * - * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be - * filled in with the actual AGP mode. If AGP was not available - */ - uint32_t primary_size; - - - /** - * Requested number of secondary DMA buffers. - * - * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be - * filled in with the actual number of secondary DMA buffers - * allocated. Particularly when PCI DMA is used, this may be - * (subtantially) less than the number requested. - */ - uint32_t secondary_bin_count; - - - /** - * Requested size of each secondary DMA buffer. - * - * While the kernel \b is free to reduce - * dma_mga_dma_bootstrap::secondary_bin_count, it is \b not allowed - * to reduce dma_mga_dma_bootstrap::secondary_bin_size. - */ - uint32_t secondary_bin_size; - - - /** - * Bit-wise mask of AGPSTAT2_* values. Currently only \c AGPSTAT2_1X, - * \c AGPSTAT2_2X, and \c AGPSTAT2_4X are supported. If this value is - * zero, it means that PCI DMA should be used, even if AGP is - * possible. - * - * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be - * filled in with the actual AGP mode. If AGP was not available - * (i.e., PCI DMA was used), this value will be zero. - */ - uint32_t agp_mode; - - - /** - * Desired AGP GART size, measured in megabytes. - */ - uint8_t agp_size; -} drm_mga_dma_bootstrap_t; - -typedef struct drm_mga_clear { - unsigned int flags; - unsigned int clear_color; - unsigned int clear_depth; - unsigned int color_mask; - unsigned int depth_mask; -} drm_mga_clear_t; - -typedef struct drm_mga_vertex { - int idx; /* buffer to queue */ - int used; /* bytes in use */ - int discard; /* client finished with buffer? */ -} drm_mga_vertex_t; - -typedef struct drm_mga_indices { - int idx; /* buffer to queue */ - unsigned int start; - unsigned int end; - int discard; /* client finished with buffer? */ -} drm_mga_indices_t; - -typedef struct drm_mga_iload { - int idx; - unsigned int dstorg; - unsigned int length; -} drm_mga_iload_t; - -typedef struct _drm_mga_blit { - unsigned int planemask; - unsigned int srcorg; - unsigned int dstorg; - int src_pitch, dst_pitch; - int delta_sx, delta_sy; - int delta_dx, delta_dy; - int height, ydir; /* flip image vertically */ - int source_pitch, dest_pitch; -} drm_mga_blit_t; - -/* 3.1: An ioctl to get parameters that aren't available to the 3d - * client any other way. - */ -#define MGA_PARAM_IRQ_NR 1 - -/* 3.2: Query the actual card type. The DDX only distinguishes between - * G200 chips and non-G200 chips, which it calls G400. It turns out that - * there are some very sublte differences between the G4x0 chips and the G550 - * chips. Using this parameter query, a client-side driver can detect the - * difference between a G4x0 and a G550. - */ -#define MGA_PARAM_CARD_TYPE 2 - -typedef struct drm_mga_getparam { - int param; - void __user *value; -} drm_mga_getparam_t; - -#endif diff --git a/shared/mga_drv.h b/shared/mga_drv.h deleted file mode 100644 index 75dcb0e93..000000000 --- a/shared/mga_drv.h +++ /dev/null @@ -1,636 +0,0 @@ -/* mga_drv.h -- Private header for the Matrox G200/G400 driver -*- linux-c -*- - * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - -#ifndef __MGA_DRV_H__ -#define __MGA_DRV_H__ - -typedef struct drm_mga_primary_buffer { - u8 *start; - u8 *end; - int size; - - u32 tail; - int space; - volatile long wrapped; - - volatile u32 *status; - - u32 last_flush; - u32 last_wrap; - - u32 high_mark; -} drm_mga_primary_buffer_t; - -typedef struct drm_mga_freelist { - struct drm_mga_freelist *next; - struct drm_mga_freelist *prev; - drm_mga_age_t age; - drm_buf_t *buf; -} drm_mga_freelist_t; - -typedef struct { - drm_mga_freelist_t *list_entry; - int discard; - int dispatched; -} drm_mga_buf_priv_t; - -typedef struct drm_mga_private { - drm_mga_primary_buffer_t prim; - drm_mga_sarea_t *sarea_priv; - - drm_mga_freelist_t *head; - drm_mga_freelist_t *tail; - - unsigned int warp_pipe; - unsigned long warp_pipe_phys[MGA_MAX_WARP_PIPES]; - - int chipset; - int usec_timeout; - - u32 clear_cmd; - u32 maccess; - - unsigned int fb_cpp; - unsigned int front_offset; - unsigned int front_pitch; - unsigned int back_offset; - unsigned int back_pitch; - - unsigned int depth_cpp; - unsigned int depth_offset; - unsigned int depth_pitch; - - unsigned int texture_offset; - unsigned int texture_size; - - drm_local_map_t *sarea; - drm_local_map_t *mmio; - drm_local_map_t *status; - drm_local_map_t *warp; - drm_local_map_t *primary; - drm_local_map_t *buffers; - drm_local_map_t *agp_textures; -} drm_mga_private_t; - - /* mga_dma.c */ -extern int mga_dma_init( DRM_IOCTL_ARGS ); -extern int mga_dma_flush( DRM_IOCTL_ARGS ); -extern int mga_dma_reset( DRM_IOCTL_ARGS ); -extern int mga_dma_buffers( DRM_IOCTL_ARGS ); - -extern int mga_do_wait_for_idle( drm_mga_private_t *dev_priv ); -extern int mga_do_dma_idle( drm_mga_private_t *dev_priv ); -extern int mga_do_dma_reset( drm_mga_private_t *dev_priv ); -extern int mga_do_engine_reset( drm_mga_private_t *dev_priv ); -extern int mga_do_cleanup_dma( drm_device_t *dev ); - -extern void mga_do_dma_flush( drm_mga_private_t *dev_priv ); -extern void mga_do_dma_wrap_start( drm_mga_private_t *dev_priv ); -extern void mga_do_dma_wrap_end( drm_mga_private_t *dev_priv ); - -extern int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf ); - - /* mga_state.c */ -extern int mga_dma_clear( DRM_IOCTL_ARGS ); -extern int mga_dma_swap( DRM_IOCTL_ARGS ); -extern int mga_dma_vertex( DRM_IOCTL_ARGS ); -extern int mga_dma_indices( DRM_IOCTL_ARGS ); -extern int mga_dma_iload( DRM_IOCTL_ARGS ); -extern int mga_dma_blit( DRM_IOCTL_ARGS ); -extern int mga_getparam( DRM_IOCTL_ARGS ); - - /* mga_warp.c */ -extern int mga_warp_install_microcode( drm_mga_private_t *dev_priv ); -extern int mga_warp_init( drm_mga_private_t *dev_priv ); - -extern int mga_driver_vblank_wait(drm_device_t *dev, unsigned int *sequence); -extern irqreturn_t mga_driver_irq_handler( DRM_IRQ_ARGS ); -extern void mga_driver_irq_preinstall( drm_device_t *dev ); -extern void mga_driver_irq_postinstall( drm_device_t *dev ); -extern void mga_driver_irq_uninstall( drm_device_t *dev ); - -#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER() - -#if defined(__linux__) && defined(__alpha__) -#define MGA_BASE( reg ) ((unsigned long)(dev_priv->mmio->handle)) -#define MGA_ADDR( reg ) (MGA_BASE(reg) + reg) - -#define MGA_DEREF( reg ) *(volatile u32 *)MGA_ADDR( reg ) -#define MGA_DEREF8( reg ) *(volatile u8 *)MGA_ADDR( reg ) - -#define MGA_READ( reg ) (_MGA_READ((u32 *)MGA_ADDR(reg))) -#define MGA_READ8( reg ) (_MGA_READ((u8 *)MGA_ADDR(reg))) -#define MGA_WRITE( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF( reg ) = val; } while (0) -#define MGA_WRITE8( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8( reg ) = val; } while (0) - -static inline u32 _MGA_READ(u32 *addr) -{ - DRM_MEMORYBARRIER(); - return *(volatile u32 *)addr; -} -#else -#define MGA_READ8( reg ) DRM_READ8(dev_priv->mmio, (reg)) -#define MGA_READ( reg ) DRM_READ32(dev_priv->mmio, (reg)) -#define MGA_WRITE8( reg, val ) DRM_WRITE8(dev_priv->mmio, (reg), (val)) -#define MGA_WRITE( reg, val ) DRM_WRITE32(dev_priv->mmio, (reg), (val)) -#endif - -#define DWGREG0 0x1c00 -#define DWGREG0_END 0x1dff -#define DWGREG1 0x2c00 -#define DWGREG1_END 0x2dff - -#define ISREG0(r) (r >= DWGREG0 && r <= DWGREG0_END) -#define DMAREG0(r) (u8)((r - DWGREG0) >> 2) -#define DMAREG1(r) (u8)(((r - DWGREG1) >> 2) | 0x80) -#define DMAREG(r) (ISREG0(r) ? DMAREG0(r) : DMAREG1(r)) - - - -/* ================================================================ - * Helper macross... - */ - -#define MGA_EMIT_STATE( dev_priv, dirty ) \ -do { \ - if ( (dirty) & ~MGA_UPLOAD_CLIPRECTS ) { \ - if ( dev_priv->chipset == MGA_CARD_TYPE_G400 ) { \ - mga_g400_emit_state( dev_priv ); \ - } else { \ - mga_g200_emit_state( dev_priv ); \ - } \ - } \ -} while (0) - -#define WRAP_TEST_WITH_RETURN( dev_priv ) \ -do { \ - if ( test_bit( 0, &dev_priv->prim.wrapped ) ) { \ - if ( mga_is_idle( dev_priv ) ) { \ - mga_do_dma_wrap_end( dev_priv ); \ - } else if ( dev_priv->prim.space < \ - dev_priv->prim.high_mark ) { \ - if ( MGA_DMA_DEBUG ) \ - DRM_INFO( "%s: wrap...\n", __FUNCTION__ ); \ - return DRM_ERR(EBUSY); \ - } \ - } \ -} while (0) - -#define WRAP_WAIT_WITH_RETURN( dev_priv ) \ -do { \ - if ( test_bit( 0, &dev_priv->prim.wrapped ) ) { \ - if ( mga_do_wait_for_idle( dev_priv ) < 0 ) { \ - if ( MGA_DMA_DEBUG ) \ - DRM_INFO( "%s: wrap...\n", __FUNCTION__ ); \ - return DRM_ERR(EBUSY); \ - } \ - mga_do_dma_wrap_end( dev_priv ); \ - } \ -} while (0) - - -/* ================================================================ - * Primary DMA command stream - */ - -#define MGA_VERBOSE 0 - -#define DMA_LOCALS unsigned int write; volatile u8 *prim; - -#define DMA_BLOCK_SIZE (5 * sizeof(u32)) - -#define BEGIN_DMA( n ) \ -do { \ - if ( MGA_VERBOSE ) { \ - DRM_INFO( "BEGIN_DMA( %d ) in %s\n", \ - (n), __FUNCTION__ ); \ - DRM_INFO( " space=0x%x req=0x%Zx\n", \ - dev_priv->prim.space, (n) * DMA_BLOCK_SIZE ); \ - } \ - prim = dev_priv->prim.start; \ - write = dev_priv->prim.tail; \ -} while (0) - -#define BEGIN_DMA_WRAP() \ -do { \ - if ( MGA_VERBOSE ) { \ - DRM_INFO( "BEGIN_DMA() in %s\n", __FUNCTION__ ); \ - DRM_INFO( " space=0x%x\n", dev_priv->prim.space ); \ - } \ - prim = dev_priv->prim.start; \ - write = dev_priv->prim.tail; \ -} while (0) - -#define ADVANCE_DMA() \ -do { \ - dev_priv->prim.tail = write; \ - if ( MGA_VERBOSE ) { \ - DRM_INFO( "ADVANCE_DMA() tail=0x%05x sp=0x%x\n", \ - write, dev_priv->prim.space ); \ - } \ -} while (0) - -#define FLUSH_DMA() \ -do { \ - if ( 0 ) { \ - DRM_INFO( "%s:\n", __FUNCTION__ ); \ - DRM_INFO( " tail=0x%06x head=0x%06lx\n", \ - dev_priv->prim.tail, \ - MGA_READ( MGA_PRIMADDRESS ) - \ - dev_priv->primary->offset ); \ - } \ - if ( !test_bit( 0, &dev_priv->prim.wrapped ) ) { \ - if ( dev_priv->prim.space < \ - dev_priv->prim.high_mark ) { \ - mga_do_dma_wrap_start( dev_priv ); \ - } else { \ - mga_do_dma_flush( dev_priv ); \ - } \ - } \ -} while (0) - -/* Never use this, always use DMA_BLOCK(...) for primary DMA output. - */ -#define DMA_WRITE( offset, val ) \ -do { \ - if ( MGA_VERBOSE ) { \ - DRM_INFO( " DMA_WRITE( 0x%08x ) at 0x%04Zx\n", \ - (u32)(val), write + (offset) * sizeof(u32) ); \ - } \ - *(volatile u32 *)(prim + write + (offset) * sizeof(u32)) = val; \ -} while (0) - -#define DMA_BLOCK( reg0, val0, reg1, val1, reg2, val2, reg3, val3 ) \ -do { \ - DMA_WRITE( 0, ((DMAREG( reg0 ) << 0) | \ - (DMAREG( reg1 ) << 8) | \ - (DMAREG( reg2 ) << 16) | \ - (DMAREG( reg3 ) << 24)) ); \ - DMA_WRITE( 1, val0 ); \ - DMA_WRITE( 2, val1 ); \ - DMA_WRITE( 3, val2 ); \ - DMA_WRITE( 4, val3 ); \ - write += DMA_BLOCK_SIZE; \ -} while (0) - - -/* Buffer aging via primary DMA stream head pointer. - */ - -#define SET_AGE( age, h, w ) \ -do { \ - (age)->head = h; \ - (age)->wrap = w; \ -} while (0) - -#define TEST_AGE( age, h, w ) ( (age)->wrap < w || \ - ( (age)->wrap == w && \ - (age)->head < h ) ) - -#define AGE_BUFFER( buf_priv ) \ -do { \ - drm_mga_freelist_t *entry = (buf_priv)->list_entry; \ - if ( (buf_priv)->dispatched ) { \ - entry->age.head = (dev_priv->prim.tail + \ - dev_priv->primary->offset); \ - entry->age.wrap = dev_priv->sarea_priv->last_wrap; \ - } else { \ - entry->age.head = 0; \ - entry->age.wrap = 0; \ - } \ -} while (0) - - -#define MGA_ENGINE_IDLE_MASK (MGA_SOFTRAPEN | \ - MGA_DWGENGSTS | \ - MGA_ENDPRDMASTS) -#define MGA_DMA_IDLE_MASK (MGA_SOFTRAPEN | \ - MGA_ENDPRDMASTS) - -#define MGA_DMA_DEBUG 0 - - - -/* A reduced set of the mga registers. - */ -#define MGA_CRTC_INDEX 0x1fd4 -#define MGA_CRTC_DATA 0x1fd5 - -/* CRTC11 */ -#define MGA_VINTCLR (1 << 4) -#define MGA_VINTEN (1 << 5) - -#define MGA_ALPHACTRL 0x2c7c -#define MGA_AR0 0x1c60 -#define MGA_AR1 0x1c64 -#define MGA_AR2 0x1c68 -#define MGA_AR3 0x1c6c -#define MGA_AR4 0x1c70 -#define MGA_AR5 0x1c74 -#define MGA_AR6 0x1c78 - -#define MGA_CXBNDRY 0x1c80 -#define MGA_CXLEFT 0x1ca0 -#define MGA_CXRIGHT 0x1ca4 - -#define MGA_DMAPAD 0x1c54 -#define MGA_DSTORG 0x2cb8 -#define MGA_DWGCTL 0x1c00 -# define MGA_OPCOD_MASK (15 << 0) -# define MGA_OPCOD_TRAP (4 << 0) -# define MGA_OPCOD_TEXTURE_TRAP (6 << 0) -# define MGA_OPCOD_BITBLT (8 << 0) -# define MGA_OPCOD_ILOAD (9 << 0) -# define MGA_ATYPE_MASK (7 << 4) -# define MGA_ATYPE_RPL (0 << 4) -# define MGA_ATYPE_RSTR (1 << 4) -# define MGA_ATYPE_ZI (3 << 4) -# define MGA_ATYPE_BLK (4 << 4) -# define MGA_ATYPE_I (7 << 4) -# define MGA_LINEAR (1 << 7) -# define MGA_ZMODE_MASK (7 << 8) -# define MGA_ZMODE_NOZCMP (0 << 8) -# define MGA_ZMODE_ZE (2 << 8) -# define MGA_ZMODE_ZNE (3 << 8) -# define MGA_ZMODE_ZLT (4 << 8) -# define MGA_ZMODE_ZLTE (5 << 8) -# define MGA_ZMODE_ZGT (6 << 8) -# define MGA_ZMODE_ZGTE (7 << 8) -# define MGA_SOLID (1 << 11) -# define MGA_ARZERO (1 << 12) -# define MGA_SGNZERO (1 << 13) -# define MGA_SHIFTZERO (1 << 14) -# define MGA_BOP_MASK (15 << 16) -# define MGA_BOP_ZERO (0 << 16) -# define MGA_BOP_DST (10 << 16) -# define MGA_BOP_SRC (12 << 16) -# define MGA_BOP_ONE (15 << 16) -# define MGA_TRANS_SHIFT 20 -# define MGA_TRANS_MASK (15 << 20) -# define MGA_BLTMOD_MASK (15 << 25) -# define MGA_BLTMOD_BMONOLEF (0 << 25) -# define MGA_BLTMOD_BMONOWF (4 << 25) -# define MGA_BLTMOD_PLAN (1 << 25) -# define MGA_BLTMOD_BFCOL (2 << 25) -# define MGA_BLTMOD_BU32BGR (3 << 25) -# define MGA_BLTMOD_BU32RGB (7 << 25) -# define MGA_BLTMOD_BU24BGR (11 << 25) -# define MGA_BLTMOD_BU24RGB (15 << 25) -# define MGA_PATTERN (1 << 29) -# define MGA_TRANSC (1 << 30) -# define MGA_CLIPDIS (1 << 31) -#define MGA_DWGSYNC 0x2c4c - -#define MGA_FCOL 0x1c24 -#define MGA_FIFOSTATUS 0x1e10 -#define MGA_FOGCOL 0x1cf4 -#define MGA_FXBNDRY 0x1c84 -#define MGA_FXLEFT 0x1ca8 -#define MGA_FXRIGHT 0x1cac - -#define MGA_ICLEAR 0x1e18 -# define MGA_SOFTRAPICLR (1 << 0) -# define MGA_VLINEICLR (1 << 5) -#define MGA_IEN 0x1e1c -# define MGA_SOFTRAPIEN (1 << 0) -# define MGA_VLINEIEN (1 << 5) - -#define MGA_LEN 0x1c5c - -#define MGA_MACCESS 0x1c04 - -#define MGA_PITCH 0x1c8c -#define MGA_PLNWT 0x1c1c -#define MGA_PRIMADDRESS 0x1e58 -# define MGA_DMA_GENERAL (0 << 0) -# define MGA_DMA_BLIT (1 << 0) -# define MGA_DMA_VECTOR (2 << 0) -# define MGA_DMA_VERTEX (3 << 0) -#define MGA_PRIMEND 0x1e5c -# define MGA_PRIMNOSTART (1 << 0) -# define MGA_PAGPXFER (1 << 1) -#define MGA_PRIMPTR 0x1e50 -# define MGA_PRIMPTREN0 (1 << 0) -# define MGA_PRIMPTREN1 (1 << 1) - -#define MGA_RST 0x1e40 -# define MGA_SOFTRESET (1 << 0) -# define MGA_SOFTEXTRST (1 << 1) - -#define MGA_SECADDRESS 0x2c40 -#define MGA_SECEND 0x2c44 -#define MGA_SETUPADDRESS 0x2cd0 -#define MGA_SETUPEND 0x2cd4 -#define MGA_SGN 0x1c58 -#define MGA_SOFTRAP 0x2c48 -#define MGA_SRCORG 0x2cb4 -# define MGA_SRMMAP_MASK (1 << 0) -# define MGA_SRCMAP_FB (0 << 0) -# define MGA_SRCMAP_SYSMEM (1 << 0) -# define MGA_SRCACC_MASK (1 << 1) -# define MGA_SRCACC_PCI (0 << 1) -# define MGA_SRCACC_AGP (1 << 1) -#define MGA_STATUS 0x1e14 -# define MGA_SOFTRAPEN (1 << 0) -# define MGA_VSYNCPEN (1 << 4) -# define MGA_VLINEPEN (1 << 5) -# define MGA_DWGENGSTS (1 << 16) -# define MGA_ENDPRDMASTS (1 << 17) -#define MGA_STENCIL 0x2cc8 -#define MGA_STENCILCTL 0x2ccc - -#define MGA_TDUALSTAGE0 0x2cf8 -#define MGA_TDUALSTAGE1 0x2cfc -#define MGA_TEXBORDERCOL 0x2c5c -#define MGA_TEXCTL 0x2c30 -#define MGA_TEXCTL2 0x2c3c -# define MGA_DUALTEX (1 << 7) -# define MGA_G400_TC2_MAGIC (1 << 15) -# define MGA_MAP1_ENABLE (1 << 31) -#define MGA_TEXFILTER 0x2c58 -#define MGA_TEXHEIGHT 0x2c2c -#define MGA_TEXORG 0x2c24 -# define MGA_TEXORGMAP_MASK (1 << 0) -# define MGA_TEXORGMAP_FB (0 << 0) -# define MGA_TEXORGMAP_SYSMEM (1 << 0) -# define MGA_TEXORGACC_MASK (1 << 1) -# define MGA_TEXORGACC_PCI (0 << 1) -# define MGA_TEXORGACC_AGP (1 << 1) -#define MGA_TEXORG1 0x2ca4 -#define MGA_TEXORG2 0x2ca8 -#define MGA_TEXORG3 0x2cac -#define MGA_TEXORG4 0x2cb0 -#define MGA_TEXTRANS 0x2c34 -#define MGA_TEXTRANSHIGH 0x2c38 -#define MGA_TEXWIDTH 0x2c28 - -#define MGA_WACCEPTSEQ 0x1dd4 -#define MGA_WCODEADDR 0x1e6c -#define MGA_WFLAG 0x1dc4 -#define MGA_WFLAG1 0x1de0 -#define MGA_WFLAGNB 0x1e64 -#define MGA_WFLAGNB1 0x1e08 -#define MGA_WGETMSB 0x1dc8 -#define MGA_WIADDR 0x1dc0 -#define MGA_WIADDR2 0x1dd8 -# define MGA_WMODE_SUSPEND (0 << 0) -# define MGA_WMODE_RESUME (1 << 0) -# define MGA_WMODE_JUMP (2 << 0) -# define MGA_WMODE_START (3 << 0) -# define MGA_WAGP_ENABLE (1 << 2) -#define MGA_WMISC 0x1e70 -# define MGA_WUCODECACHE_ENABLE (1 << 0) -# define MGA_WMASTER_ENABLE (1 << 1) -# define MGA_WCACHEFLUSH_ENABLE (1 << 3) -#define MGA_WVRTXSZ 0x1dcc - -#define MGA_YBOT 0x1c9c -#define MGA_YDST 0x1c90 -#define MGA_YDSTLEN 0x1c88 -#define MGA_YDSTORG 0x1c94 -#define MGA_YTOP 0x1c98 - -#define MGA_ZORG 0x1c0c - -/* This finishes the current batch of commands - */ -#define MGA_EXEC 0x0100 - -/* Warp registers - */ -#define MGA_WR0 0x2d00 -#define MGA_WR1 0x2d04 -#define MGA_WR2 0x2d08 -#define MGA_WR3 0x2d0c -#define MGA_WR4 0x2d10 -#define MGA_WR5 0x2d14 -#define MGA_WR6 0x2d18 -#define MGA_WR7 0x2d1c -#define MGA_WR8 0x2d20 -#define MGA_WR9 0x2d24 -#define MGA_WR10 0x2d28 -#define MGA_WR11 0x2d2c -#define MGA_WR12 0x2d30 -#define MGA_WR13 0x2d34 -#define MGA_WR14 0x2d38 -#define MGA_WR15 0x2d3c -#define MGA_WR16 0x2d40 -#define MGA_WR17 0x2d44 -#define MGA_WR18 0x2d48 -#define MGA_WR19 0x2d4c -#define MGA_WR20 0x2d50 -#define MGA_WR21 0x2d54 -#define MGA_WR22 0x2d58 -#define MGA_WR23 0x2d5c -#define MGA_WR24 0x2d60 -#define MGA_WR25 0x2d64 -#define MGA_WR26 0x2d68 -#define MGA_WR27 0x2d6c -#define MGA_WR28 0x2d70 -#define MGA_WR29 0x2d74 -#define MGA_WR30 0x2d78 -#define MGA_WR31 0x2d7c -#define MGA_WR32 0x2d80 -#define MGA_WR33 0x2d84 -#define MGA_WR34 0x2d88 -#define MGA_WR35 0x2d8c -#define MGA_WR36 0x2d90 -#define MGA_WR37 0x2d94 -#define MGA_WR38 0x2d98 -#define MGA_WR39 0x2d9c -#define MGA_WR40 0x2da0 -#define MGA_WR41 0x2da4 -#define MGA_WR42 0x2da8 -#define MGA_WR43 0x2dac -#define MGA_WR44 0x2db0 -#define MGA_WR45 0x2db4 -#define MGA_WR46 0x2db8 -#define MGA_WR47 0x2dbc -#define MGA_WR48 0x2dc0 -#define MGA_WR49 0x2dc4 -#define MGA_WR50 0x2dc8 -#define MGA_WR51 0x2dcc -#define MGA_WR52 0x2dd0 -#define MGA_WR53 0x2dd4 -#define MGA_WR54 0x2dd8 -#define MGA_WR55 0x2ddc -#define MGA_WR56 0x2de0 -#define MGA_WR57 0x2de4 -#define MGA_WR58 0x2de8 -#define MGA_WR59 0x2dec -#define MGA_WR60 0x2df0 -#define MGA_WR61 0x2df4 -#define MGA_WR62 0x2df8 -#define MGA_WR63 0x2dfc -# define MGA_G400_WR_MAGIC (1 << 6) -# define MGA_G400_WR56_MAGIC 0x46480000 /* 12800.0f */ - - -#define MGA_ILOAD_ALIGN 64 -#define MGA_ILOAD_MASK (MGA_ILOAD_ALIGN - 1) - -#define MGA_DWGCTL_FLUSH (MGA_OPCOD_TEXTURE_TRAP | \ - MGA_ATYPE_I | \ - MGA_ZMODE_NOZCMP | \ - MGA_ARZERO | \ - MGA_SGNZERO | \ - MGA_BOP_SRC | \ - (15 << MGA_TRANS_SHIFT)) - -#define MGA_DWGCTL_CLEAR (MGA_OPCOD_TRAP | \ - MGA_ZMODE_NOZCMP | \ - MGA_SOLID | \ - MGA_ARZERO | \ - MGA_SGNZERO | \ - MGA_SHIFTZERO | \ - MGA_BOP_SRC | \ - (0 << MGA_TRANS_SHIFT) | \ - MGA_BLTMOD_BMONOLEF | \ - MGA_TRANSC | \ - MGA_CLIPDIS) - -#define MGA_DWGCTL_COPY (MGA_OPCOD_BITBLT | \ - MGA_ATYPE_RPL | \ - MGA_SGNZERO | \ - MGA_SHIFTZERO | \ - MGA_BOP_SRC | \ - (0 << MGA_TRANS_SHIFT) | \ - MGA_BLTMOD_BFCOL | \ - MGA_CLIPDIS) - -/* Simple idle test. - */ -static __inline__ int mga_is_idle( drm_mga_private_t *dev_priv ) -{ - u32 status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK; - return ( status == MGA_ENDPRDMASTS ); -} - -#endif diff --git a/shared/mga_irq.c b/shared/mga_irq.c deleted file mode 100644 index c3185b0b8..000000000 --- a/shared/mga_irq.c +++ /dev/null @@ -1,103 +0,0 @@ -/* mga_irq.c -- IRQ handling for radeon -*- linux-c -*- - * - * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. - * - * The Weather Channel (TM) funded Tungsten Graphics to develop the - * initial release of the Radeon 8500 driver under the XFree86 license. - * This notice must be preserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - * Eric Anholt <anholt@FreeBSD.org> - */ - -#include "mga.h" -#include "drmP.h" -#include "drm.h" -#include "mga_drm.h" -#include "mga_drv.h" - -irqreturn_t mga_driver_irq_handler( DRM_IRQ_ARGS ) -{ - drm_device_t *dev = (drm_device_t *) arg; - drm_mga_private_t *dev_priv = - (drm_mga_private_t *)dev->dev_private; - int status; - - status = MGA_READ( MGA_STATUS ); - - /* VBLANK interrupt */ - if ( status & MGA_VLINEPEN ) { - MGA_WRITE( MGA_ICLEAR, MGA_VLINEICLR ); - atomic_inc(&dev->vbl_received); - DRM_WAKEUP(&dev->vbl_queue); - DRM(vbl_send_signals)( dev ); - return IRQ_HANDLED; - } - return IRQ_NONE; -} - -int mga_driver_vblank_wait(drm_device_t *dev, unsigned int *sequence) -{ - unsigned int cur_vblank; - int ret = 0; - - /* Assume that the user has missed the current sequence number - * by about a day rather than she wants to wait for years - * using vertical blanks... - */ - DRM_WAIT_ON( ret, dev->vbl_queue, 3*DRM_HZ, - ( ( ( cur_vblank = atomic_read(&dev->vbl_received ) ) - - *sequence ) <= (1<<23) ) ); - - *sequence = cur_vblank; - - return ret; -} - -void mga_driver_irq_preinstall( drm_device_t *dev ) { - drm_mga_private_t *dev_priv = - (drm_mga_private_t *)dev->dev_private; - - /* Disable *all* interrupts */ - MGA_WRITE( MGA_IEN, 0 ); - /* Clear bits if they're already high */ - MGA_WRITE( MGA_ICLEAR, ~0 ); -} - -void mga_driver_irq_postinstall( drm_device_t *dev ) { - drm_mga_private_t *dev_priv = - (drm_mga_private_t *)dev->dev_private; - - /* Turn on VBL interrupt */ - MGA_WRITE( MGA_IEN, MGA_VLINEIEN ); -} - -void mga_driver_irq_uninstall( drm_device_t *dev ) { - drm_mga_private_t *dev_priv = - (drm_mga_private_t *)dev->dev_private; - if (!dev_priv) - return; - - /* Disable *all* interrupts */ - MGA_WRITE( MGA_IEN, 0 ); -} diff --git a/shared/mga_state.c b/shared/mga_state.c deleted file mode 100644 index 3dc1999a3..000000000 --- a/shared/mga_state.c +++ /dev/null @@ -1,1110 +0,0 @@ -/* mga_state.c -- State support for MGA G200/G400 -*- linux-c -*- - * Created: Thu Jan 27 02:53:43 2000 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Jeff Hartmann <jhartmann@valinux.com> - * Keith Whitwell <keith@tungstengraphics.com> - * - * Rewritten by: - * Gareth Hughes <gareth@valinux.com> - */ - -#include "mga.h" -#include "drmP.h" -#include "drm.h" -#include "mga_drm.h" -#include "mga_drv.h" - - -/* ================================================================ - * DMA hardware state programming functions - */ - -static void mga_emit_clip_rect( drm_mga_private_t *dev_priv, - drm_clip_rect_t *box ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - unsigned int pitch = dev_priv->front_pitch; - DMA_LOCALS; - - BEGIN_DMA( 2 ); - - /* Force reset of DWGCTL on G400 (eliminates clip disable bit). - */ - if ( dev_priv->chipset == MGA_CARD_TYPE_G400 ) { - DMA_BLOCK( MGA_DWGCTL, ctx->dwgctl, - MGA_LEN + MGA_EXEC, 0x80000000, - MGA_DWGCTL, ctx->dwgctl, - MGA_LEN + MGA_EXEC, 0x80000000 ); - } - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_CXBNDRY, ((box->x2 - 1) << 16) | box->x1, - MGA_YTOP, box->y1 * pitch, - MGA_YBOT, (box->y2 - 1) * pitch ); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g200_emit_context( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - DMA_LOCALS; - - BEGIN_DMA( 3 ); - - DMA_BLOCK( MGA_DSTORG, ctx->dstorg, - MGA_MACCESS, ctx->maccess, - MGA_PLNWT, ctx->plnwt, - MGA_DWGCTL, ctx->dwgctl ); - - DMA_BLOCK( MGA_ALPHACTRL, ctx->alphactrl, - MGA_FOGCOL, ctx->fogcolor, - MGA_WFLAG, ctx->wflag, - MGA_ZORG, dev_priv->depth_offset ); - - DMA_BLOCK( MGA_FCOL, ctx->fcol, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000 ); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g400_emit_context( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - DMA_LOCALS; - - BEGIN_DMA( 4 ); - - DMA_BLOCK( MGA_DSTORG, ctx->dstorg, - MGA_MACCESS, ctx->maccess, - MGA_PLNWT, ctx->plnwt, - MGA_DWGCTL, ctx->dwgctl ); - - DMA_BLOCK( MGA_ALPHACTRL, ctx->alphactrl, - MGA_FOGCOL, ctx->fogcolor, - MGA_WFLAG, ctx->wflag, - MGA_ZORG, dev_priv->depth_offset ); - - DMA_BLOCK( MGA_WFLAG1, ctx->wflag, - MGA_TDUALSTAGE0, ctx->tdualstage0, - MGA_TDUALSTAGE1, ctx->tdualstage1, - MGA_FCOL, ctx->fcol ); - - DMA_BLOCK( MGA_STENCIL, ctx->stencil, - MGA_STENCILCTL, ctx->stencilctl, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000 ); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g200_emit_tex0( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0]; - DMA_LOCALS; - - BEGIN_DMA( 4 ); - - DMA_BLOCK( MGA_TEXCTL2, tex->texctl2, - MGA_TEXCTL, tex->texctl, - MGA_TEXFILTER, tex->texfilter, - MGA_TEXBORDERCOL, tex->texbordercol ); - - DMA_BLOCK( MGA_TEXORG, tex->texorg, - MGA_TEXORG1, tex->texorg1, - MGA_TEXORG2, tex->texorg2, - MGA_TEXORG3, tex->texorg3 ); - - DMA_BLOCK( MGA_TEXORG4, tex->texorg4, - MGA_TEXWIDTH, tex->texwidth, - MGA_TEXHEIGHT, tex->texheight, - MGA_WR24, tex->texwidth ); - - DMA_BLOCK( MGA_WR34, tex->texheight, - MGA_TEXTRANS, 0x0000ffff, - MGA_TEXTRANSHIGH, 0x0000ffff, - MGA_DMAPAD, 0x00000000 ); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g400_emit_tex0( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0]; - DMA_LOCALS; - -/* printk("mga_g400_emit_tex0 %x %x %x\n", tex->texorg, */ -/* tex->texctl, tex->texctl2); */ - - BEGIN_DMA( 6 ); - - DMA_BLOCK( MGA_TEXCTL2, tex->texctl2 | MGA_G400_TC2_MAGIC, - MGA_TEXCTL, tex->texctl, - MGA_TEXFILTER, tex->texfilter, - MGA_TEXBORDERCOL, tex->texbordercol ); - - DMA_BLOCK( MGA_TEXORG, tex->texorg, - MGA_TEXORG1, tex->texorg1, - MGA_TEXORG2, tex->texorg2, - MGA_TEXORG3, tex->texorg3 ); - - DMA_BLOCK( MGA_TEXORG4, tex->texorg4, - MGA_TEXWIDTH, tex->texwidth, - MGA_TEXHEIGHT, tex->texheight, - MGA_WR49, 0x00000000 ); - - DMA_BLOCK( MGA_WR57, 0x00000000, - MGA_WR53, 0x00000000, - MGA_WR61, 0x00000000, - MGA_WR52, MGA_G400_WR_MAGIC ); - - DMA_BLOCK( MGA_WR60, MGA_G400_WR_MAGIC, - MGA_WR54, tex->texwidth | MGA_G400_WR_MAGIC, - MGA_WR62, tex->texheight | MGA_G400_WR_MAGIC, - MGA_DMAPAD, 0x00000000 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_TEXTRANS, 0x0000ffff, - MGA_TEXTRANSHIGH, 0x0000ffff ); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g400_emit_tex1( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1]; - DMA_LOCALS; - -/* printk("mga_g400_emit_tex1 %x %x %x\n", tex->texorg, */ -/* tex->texctl, tex->texctl2); */ - - BEGIN_DMA( 5 ); - - DMA_BLOCK( MGA_TEXCTL2, (tex->texctl2 | - MGA_MAP1_ENABLE | - MGA_G400_TC2_MAGIC), - MGA_TEXCTL, tex->texctl, - MGA_TEXFILTER, tex->texfilter, - MGA_TEXBORDERCOL, tex->texbordercol ); - - DMA_BLOCK( MGA_TEXORG, tex->texorg, - MGA_TEXORG1, tex->texorg1, - MGA_TEXORG2, tex->texorg2, - MGA_TEXORG3, tex->texorg3 ); - - DMA_BLOCK( MGA_TEXORG4, tex->texorg4, - MGA_TEXWIDTH, tex->texwidth, - MGA_TEXHEIGHT, tex->texheight, - MGA_WR49, 0x00000000 ); - - DMA_BLOCK( MGA_WR57, 0x00000000, - MGA_WR53, 0x00000000, - MGA_WR61, 0x00000000, - MGA_WR52, tex->texwidth | MGA_G400_WR_MAGIC ); - - DMA_BLOCK( MGA_WR60, tex->texheight | MGA_G400_WR_MAGIC, - MGA_TEXTRANS, 0x0000ffff, - MGA_TEXTRANSHIGH, 0x0000ffff, - MGA_TEXCTL2, tex->texctl2 | MGA_G400_TC2_MAGIC ); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g200_emit_pipe( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int pipe = sarea_priv->warp_pipe; - DMA_LOCALS; - - BEGIN_DMA( 3 ); - - DMA_BLOCK( MGA_WIADDR, MGA_WMODE_SUSPEND, - MGA_WVRTXSZ, 0x00000007, - MGA_WFLAG, 0x00000000, - MGA_WR24, 0x00000000 ); - - DMA_BLOCK( MGA_WR25, 0x00000100, - MGA_WR34, 0x00000000, - MGA_WR42, 0x0000ffff, - MGA_WR60, 0x0000ffff ); - - /* Padding required to to hardware bug. - */ - DMA_BLOCK( MGA_DMAPAD, 0xffffffff, - MGA_DMAPAD, 0xffffffff, - MGA_DMAPAD, 0xffffffff, - MGA_WIADDR, (dev_priv->warp_pipe_phys[pipe] | - MGA_WMODE_START | - MGA_WAGP_ENABLE) ); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g400_emit_pipe( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int pipe = sarea_priv->warp_pipe; - DMA_LOCALS; - -/* printk("mga_g400_emit_pipe %x\n", pipe); */ - - BEGIN_DMA( 10 ); - - DMA_BLOCK( MGA_WIADDR2, MGA_WMODE_SUSPEND, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000 ); - - if ( pipe & MGA_T2 ) { - DMA_BLOCK( MGA_WVRTXSZ, 0x00001e09, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000 ); - - DMA_BLOCK( MGA_WACCEPTSEQ, 0x00000000, - MGA_WACCEPTSEQ, 0x00000000, - MGA_WACCEPTSEQ, 0x00000000, - MGA_WACCEPTSEQ, 0x1e000000 ); - } else { - if ( dev_priv->warp_pipe & MGA_T2 ) { - /* Flush the WARP pipe */ - DMA_BLOCK( MGA_YDST, 0x00000000, - MGA_FXLEFT, 0x00000000, - MGA_FXRIGHT, 0x00000001, - MGA_DWGCTL, MGA_DWGCTL_FLUSH ); - - DMA_BLOCK( MGA_LEN + MGA_EXEC, 0x00000001, - MGA_DWGSYNC, 0x00007000, - MGA_TEXCTL2, MGA_G400_TC2_MAGIC, - MGA_LEN + MGA_EXEC, 0x00000000 ); - - DMA_BLOCK( MGA_TEXCTL2, (MGA_DUALTEX | - MGA_G400_TC2_MAGIC), - MGA_LEN + MGA_EXEC, 0x00000000, - MGA_TEXCTL2, MGA_G400_TC2_MAGIC, - MGA_DMAPAD, 0x00000000 ); - } - - DMA_BLOCK( MGA_WVRTXSZ, 0x00001807, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000 ); - - DMA_BLOCK( MGA_WACCEPTSEQ, 0x00000000, - MGA_WACCEPTSEQ, 0x00000000, - MGA_WACCEPTSEQ, 0x00000000, - MGA_WACCEPTSEQ, 0x18000000 ); - } - - DMA_BLOCK( MGA_WFLAG, 0x00000000, - MGA_WFLAG1, 0x00000000, - MGA_WR56, MGA_G400_WR56_MAGIC, - MGA_DMAPAD, 0x00000000 ); - - DMA_BLOCK( MGA_WR49, 0x00000000, /* tex0 */ - MGA_WR57, 0x00000000, /* tex0 */ - MGA_WR53, 0x00000000, /* tex1 */ - MGA_WR61, 0x00000000 ); /* tex1 */ - - DMA_BLOCK( MGA_WR54, MGA_G400_WR_MAGIC, /* tex0 width */ - MGA_WR62, MGA_G400_WR_MAGIC, /* tex0 height */ - MGA_WR52, MGA_G400_WR_MAGIC, /* tex1 width */ - MGA_WR60, MGA_G400_WR_MAGIC ); /* tex1 height */ - - /* Padding required to to hardware bug */ - DMA_BLOCK( MGA_DMAPAD, 0xffffffff, - MGA_DMAPAD, 0xffffffff, - MGA_DMAPAD, 0xffffffff, - MGA_WIADDR2, (dev_priv->warp_pipe_phys[pipe] | - MGA_WMODE_START | - MGA_WAGP_ENABLE) ); - - ADVANCE_DMA(); -} - -static void mga_g200_emit_state( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int dirty = sarea_priv->dirty; - - if ( sarea_priv->warp_pipe != dev_priv->warp_pipe ) { - mga_g200_emit_pipe( dev_priv ); - dev_priv->warp_pipe = sarea_priv->warp_pipe; - } - - if ( dirty & MGA_UPLOAD_CONTEXT ) { - mga_g200_emit_context( dev_priv ); - sarea_priv->dirty &= ~MGA_UPLOAD_CONTEXT; - } - - if ( dirty & MGA_UPLOAD_TEX0 ) { - mga_g200_emit_tex0( dev_priv ); - sarea_priv->dirty &= ~MGA_UPLOAD_TEX0; - } -} - -static void mga_g400_emit_state( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int dirty = sarea_priv->dirty; - int multitex = sarea_priv->warp_pipe & MGA_T2; - - if ( sarea_priv->warp_pipe != dev_priv->warp_pipe ) { - mga_g400_emit_pipe( dev_priv ); - dev_priv->warp_pipe = sarea_priv->warp_pipe; - } - - if ( dirty & MGA_UPLOAD_CONTEXT ) { - mga_g400_emit_context( dev_priv ); - sarea_priv->dirty &= ~MGA_UPLOAD_CONTEXT; - } - - if ( dirty & MGA_UPLOAD_TEX0 ) { - mga_g400_emit_tex0( dev_priv ); - sarea_priv->dirty &= ~MGA_UPLOAD_TEX0; - } - - if ( (dirty & MGA_UPLOAD_TEX1) && multitex ) { - mga_g400_emit_tex1( dev_priv ); - sarea_priv->dirty &= ~MGA_UPLOAD_TEX1; - } -} - - -/* ================================================================ - * SAREA state verification - */ - -/* Disallow all write destinations except the front and backbuffer. - */ -static int mga_verify_context( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - - if ( ctx->dstorg != dev_priv->front_offset && - ctx->dstorg != dev_priv->back_offset ) { - DRM_ERROR( "*** bad DSTORG: %x (front %x, back %x)\n\n", - ctx->dstorg, dev_priv->front_offset, - dev_priv->back_offset ); - ctx->dstorg = 0; - return DRM_ERR(EINVAL); - } - - return 0; -} - -/* Disallow texture reads from PCI space. - */ -static int mga_verify_tex( drm_mga_private_t *dev_priv, int unit ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[unit]; - unsigned int org; - - org = tex->texorg & (MGA_TEXORGMAP_MASK | MGA_TEXORGACC_MASK); - - if ( org == (MGA_TEXORGMAP_SYSMEM | MGA_TEXORGACC_PCI) ) { - DRM_ERROR( "*** bad TEXORG: 0x%x, unit %d\n", - tex->texorg, unit ); - tex->texorg = 0; - return DRM_ERR(EINVAL); - } - - return 0; -} - -static int mga_verify_state( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int dirty = sarea_priv->dirty; - int ret = 0; - - if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; - - if ( dirty & MGA_UPLOAD_CONTEXT ) - ret |= mga_verify_context( dev_priv ); - - if ( dirty & MGA_UPLOAD_TEX0 ) - ret |= mga_verify_tex( dev_priv, 0 ); - - if ( dev_priv->chipset == MGA_CARD_TYPE_G400 ) { - if ( dirty & MGA_UPLOAD_TEX1 ) - ret |= mga_verify_tex( dev_priv, 1 ); - - if ( dirty & MGA_UPLOAD_PIPE ) - ret |= ( sarea_priv->warp_pipe > MGA_MAX_G400_PIPES ); - } else { - if ( dirty & MGA_UPLOAD_PIPE ) - ret |= ( sarea_priv->warp_pipe > MGA_MAX_G200_PIPES ); - } - - return ( ret == 0 ); -} - -static int mga_verify_iload( drm_mga_private_t *dev_priv, - unsigned int dstorg, unsigned int length ) -{ - if ( dstorg < dev_priv->texture_offset || - dstorg + length > (dev_priv->texture_offset + - dev_priv->texture_size) ) { - DRM_ERROR( "*** bad iload DSTORG: 0x%x\n", dstorg ); - return DRM_ERR(EINVAL); - } - - if ( length & MGA_ILOAD_MASK ) { - DRM_ERROR( "*** bad iload length: 0x%x\n", - length & MGA_ILOAD_MASK ); - return DRM_ERR(EINVAL); - } - - return 0; -} - -static int mga_verify_blit( drm_mga_private_t *dev_priv, - unsigned int srcorg, unsigned int dstorg ) -{ - if ( (srcorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) || - (dstorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ) { - DRM_ERROR( "*** bad blit: src=0x%x dst=0x%x\n", - srcorg, dstorg ); - return DRM_ERR(EINVAL); - } - return 0; -} - - -/* ================================================================ - * - */ - -static void mga_dma_dispatch_clear( drm_device_t *dev, - drm_mga_clear_t *clear ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - drm_clip_rect_t *pbox = sarea_priv->boxes; - int nbox = sarea_priv->nbox; - int i; - DMA_LOCALS; - DRM_DEBUG( "\n" ); - - BEGIN_DMA( 1 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DWGSYNC, 0x00007100, - MGA_DWGSYNC, 0x00007000 ); - - ADVANCE_DMA(); - - for ( i = 0 ; i < nbox ; i++ ) { - drm_clip_rect_t *box = &pbox[i]; - u32 height = box->y2 - box->y1; - - DRM_DEBUG( " from=%d,%d to=%d,%d\n", - box->x1, box->y1, box->x2, box->y2 ); - - if ( clear->flags & MGA_FRONT ) { - BEGIN_DMA( 2 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_PLNWT, clear->color_mask, - MGA_YDSTLEN, (box->y1 << 16) | height, - MGA_FXBNDRY, (box->x2 << 16) | box->x1 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_FCOL, clear->clear_color, - MGA_DSTORG, dev_priv->front_offset, - MGA_DWGCTL + MGA_EXEC, - dev_priv->clear_cmd ); - - ADVANCE_DMA(); - } - - - if ( clear->flags & MGA_BACK ) { - BEGIN_DMA( 2 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_PLNWT, clear->color_mask, - MGA_YDSTLEN, (box->y1 << 16) | height, - MGA_FXBNDRY, (box->x2 << 16) | box->x1 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_FCOL, clear->clear_color, - MGA_DSTORG, dev_priv->back_offset, - MGA_DWGCTL + MGA_EXEC, - dev_priv->clear_cmd ); - - ADVANCE_DMA(); - } - - if ( clear->flags & MGA_DEPTH ) { - BEGIN_DMA( 2 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_PLNWT, clear->depth_mask, - MGA_YDSTLEN, (box->y1 << 16) | height, - MGA_FXBNDRY, (box->x2 << 16) | box->x1 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_FCOL, clear->clear_depth, - MGA_DSTORG, dev_priv->depth_offset, - MGA_DWGCTL + MGA_EXEC, - dev_priv->clear_cmd ); - - ADVANCE_DMA(); - } - - } - - BEGIN_DMA( 1 ); - - /* Force reset of DWGCTL */ - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_PLNWT, ctx->plnwt, - MGA_DWGCTL, ctx->dwgctl ); - - ADVANCE_DMA(); - - FLUSH_DMA(); -} - -static void mga_dma_dispatch_swap( drm_device_t *dev ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - drm_clip_rect_t *pbox = sarea_priv->boxes; - int nbox = sarea_priv->nbox; - int i; - DMA_LOCALS; - DRM_DEBUG( "\n" ); - - sarea_priv->last_frame.head = dev_priv->prim.tail; - sarea_priv->last_frame.wrap = dev_priv->prim.last_wrap; - - BEGIN_DMA( 4 + nbox ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DWGSYNC, 0x00007100, - MGA_DWGSYNC, 0x00007000 ); - - DMA_BLOCK( MGA_DSTORG, dev_priv->front_offset, - MGA_MACCESS, dev_priv->maccess, - MGA_SRCORG, dev_priv->back_offset, - MGA_AR5, dev_priv->front_pitch ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_PLNWT, 0xffffffff, - MGA_DWGCTL, MGA_DWGCTL_COPY ); - - for ( i = 0 ; i < nbox ; i++ ) { - drm_clip_rect_t *box = &pbox[i]; - u32 height = box->y2 - box->y1; - u32 start = box->y1 * dev_priv->front_pitch; - - DRM_DEBUG( " from=%d,%d to=%d,%d\n", - box->x1, box->y1, box->x2, box->y2 ); - - DMA_BLOCK( MGA_AR0, start + box->x2 - 1, - MGA_AR3, start + box->x1, - MGA_FXBNDRY, ((box->x2 - 1) << 16) | box->x1, - MGA_YDSTLEN + MGA_EXEC, - (box->y1 << 16) | height ); - } - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_PLNWT, ctx->plnwt, - MGA_SRCORG, dev_priv->front_offset, - MGA_DWGCTL, ctx->dwgctl ); - - ADVANCE_DMA(); - - FLUSH_DMA(); - - DRM_DEBUG( "%s... done.\n", __FUNCTION__ ); -} - -static void mga_dma_dispatch_vertex( drm_device_t *dev, drm_buf_t *buf ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_buf_priv_t *buf_priv = buf->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - u32 address = (u32) buf->bus_address; - u32 length = (u32) buf->used; - int i = 0; - DMA_LOCALS; - DRM_DEBUG( "vertex: buf=%d used=%d\n", buf->idx, buf->used ); - - if ( buf->used ) { - buf_priv->dispatched = 1; - - MGA_EMIT_STATE( dev_priv, sarea_priv->dirty ); - - do { - if ( i < sarea_priv->nbox ) { - mga_emit_clip_rect( dev_priv, - &sarea_priv->boxes[i] ); - } - - BEGIN_DMA( 1 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_SECADDRESS, (address | - MGA_DMA_VERTEX), - MGA_SECEND, ((address + length) | - MGA_PAGPXFER) ); - - ADVANCE_DMA(); - } while ( ++i < sarea_priv->nbox ); - } - - if ( buf_priv->discard ) { - AGE_BUFFER( buf_priv ); - buf->pending = 0; - buf->used = 0; - buf_priv->dispatched = 0; - - mga_freelist_put( dev, buf ); - } - - FLUSH_DMA(); -} - -static void mga_dma_dispatch_indices( drm_device_t *dev, drm_buf_t *buf, - unsigned int start, unsigned int end ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_buf_priv_t *buf_priv = buf->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - u32 address = (u32) buf->bus_address; - int i = 0; - DMA_LOCALS; - DRM_DEBUG( "indices: buf=%d start=%d end=%d\n", buf->idx, start, end ); - - if ( start != end ) { - buf_priv->dispatched = 1; - - MGA_EMIT_STATE( dev_priv, sarea_priv->dirty ); - - do { - if ( i < sarea_priv->nbox ) { - mga_emit_clip_rect( dev_priv, - &sarea_priv->boxes[i] ); - } - - BEGIN_DMA( 1 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_SETUPADDRESS, address + start, - MGA_SETUPEND, ((address + end) | - MGA_PAGPXFER) ); - - ADVANCE_DMA(); - } while ( ++i < sarea_priv->nbox ); - } - - if ( buf_priv->discard ) { - AGE_BUFFER( buf_priv ); - buf->pending = 0; - buf->used = 0; - buf_priv->dispatched = 0; - - mga_freelist_put( dev, buf ); - } - - FLUSH_DMA(); -} - -/* This copies a 64 byte aligned agp region to the frambuffer with a - * standard blit, the ioctl needs to do checking. - */ -static void mga_dma_dispatch_iload( drm_device_t *dev, drm_buf_t *buf, - unsigned int dstorg, unsigned int length ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_buf_priv_t *buf_priv = buf->dev_private; - drm_mga_context_regs_t *ctx = &dev_priv->sarea_priv->context_state; - u32 srcorg = buf->bus_address | MGA_SRCACC_AGP | MGA_SRCMAP_SYSMEM; - u32 y2; - DMA_LOCALS; - DRM_DEBUG( "buf=%d used=%d\n", buf->idx, buf->used ); - - y2 = length / 64; - - BEGIN_DMA( 5 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DWGSYNC, 0x00007100, - MGA_DWGSYNC, 0x00007000 ); - - DMA_BLOCK( MGA_DSTORG, dstorg, - MGA_MACCESS, 0x00000000, - MGA_SRCORG, srcorg, - MGA_AR5, 64 ); - - DMA_BLOCK( MGA_PITCH, 64, - MGA_PLNWT, 0xffffffff, - MGA_DMAPAD, 0x00000000, - MGA_DWGCTL, MGA_DWGCTL_COPY ); - - DMA_BLOCK( MGA_AR0, 63, - MGA_AR3, 0, - MGA_FXBNDRY, (63 << 16) | 0, - MGA_YDSTLEN + MGA_EXEC, y2 ); - - DMA_BLOCK( MGA_PLNWT, ctx->plnwt, - MGA_SRCORG, dev_priv->front_offset, - MGA_PITCH, dev_priv->front_pitch, - MGA_DWGSYNC, 0x00007000 ); - - ADVANCE_DMA(); - - AGE_BUFFER( buf_priv ); - - buf->pending = 0; - buf->used = 0; - buf_priv->dispatched = 0; - - mga_freelist_put( dev, buf ); - - FLUSH_DMA(); -} - -static void mga_dma_dispatch_blit( drm_device_t *dev, - drm_mga_blit_t *blit ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - drm_clip_rect_t *pbox = sarea_priv->boxes; - int nbox = sarea_priv->nbox; - u32 scandir = 0, i; - DMA_LOCALS; - DRM_DEBUG( "\n" ); - - BEGIN_DMA( 4 + nbox ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DWGSYNC, 0x00007100, - MGA_DWGSYNC, 0x00007000 ); - - DMA_BLOCK( MGA_DWGCTL, MGA_DWGCTL_COPY, - MGA_PLNWT, blit->planemask, - MGA_SRCORG, blit->srcorg, - MGA_DSTORG, blit->dstorg ); - - DMA_BLOCK( MGA_SGN, scandir, - MGA_MACCESS, dev_priv->maccess, - MGA_AR5, blit->ydir * blit->src_pitch, - MGA_PITCH, blit->dst_pitch ); - - for ( i = 0 ; i < nbox ; i++ ) { - int srcx = pbox[i].x1 + blit->delta_sx; - int srcy = pbox[i].y1 + blit->delta_sy; - int dstx = pbox[i].x1 + blit->delta_dx; - int dsty = pbox[i].y1 + blit->delta_dy; - int h = pbox[i].y2 - pbox[i].y1; - int w = pbox[i].x2 - pbox[i].x1 - 1; - int start; - - if ( blit->ydir == -1 ) { - srcy = blit->height - srcy - 1; - } - - start = srcy * blit->src_pitch + srcx; - - DMA_BLOCK( MGA_AR0, start + w, - MGA_AR3, start, - MGA_FXBNDRY, ((dstx + w) << 16) | (dstx & 0xffff), - MGA_YDSTLEN + MGA_EXEC, (dsty << 16) | h ); - } - - /* Do something to flush AGP? - */ - - /* Force reset of DWGCTL */ - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_PLNWT, ctx->plnwt, - MGA_PITCH, dev_priv->front_pitch, - MGA_DWGCTL, ctx->dwgctl ); - - ADVANCE_DMA(); -} - - -/* ================================================================ - * - */ - -int mga_dma_clear( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_clear_t clear; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( clear, (drm_mga_clear_t __user *)data, sizeof(clear) ); - - if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; - - WRAP_TEST_WITH_RETURN( dev_priv ); - - mga_dma_dispatch_clear( dev, &clear ); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT; - - return 0; -} - -int mga_dma_swap( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; - - WRAP_TEST_WITH_RETURN( dev_priv ); - - mga_dma_dispatch_swap( dev ); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT; - - return 0; -} - -int mga_dma_vertex( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_mga_private_t *dev_priv = dev->dev_private; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_mga_buf_priv_t *buf_priv; - drm_mga_vertex_t vertex; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( vertex, - (drm_mga_vertex_t __user *)data, - sizeof(vertex) ); - - if(vertex.idx < 0 || vertex.idx > dma->buf_count) return DRM_ERR(EINVAL); - buf = dma->buflist[vertex.idx]; - buf_priv = buf->dev_private; - - buf->used = vertex.used; - buf_priv->discard = vertex.discard; - - if ( !mga_verify_state( dev_priv ) ) { - if ( vertex.discard ) { - if ( buf_priv->dispatched == 1 ) - AGE_BUFFER( buf_priv ); - buf_priv->dispatched = 0; - mga_freelist_put( dev, buf ); - } - return DRM_ERR(EINVAL); - } - - WRAP_TEST_WITH_RETURN( dev_priv ); - - mga_dma_dispatch_vertex( dev, buf ); - - return 0; -} - -int mga_dma_indices( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_mga_private_t *dev_priv = dev->dev_private; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_mga_buf_priv_t *buf_priv; - drm_mga_indices_t indices; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( indices, - (drm_mga_indices_t __user *)data, - sizeof(indices) ); - - if(indices.idx < 0 || indices.idx > dma->buf_count) return DRM_ERR(EINVAL); - - buf = dma->buflist[indices.idx]; - buf_priv = buf->dev_private; - - buf_priv->discard = indices.discard; - - if ( !mga_verify_state( dev_priv ) ) { - if ( indices.discard ) { - if ( buf_priv->dispatched == 1 ) - AGE_BUFFER( buf_priv ); - buf_priv->dispatched = 0; - mga_freelist_put( dev, buf ); - } - return DRM_ERR(EINVAL); - } - - WRAP_TEST_WITH_RETURN( dev_priv ); - - mga_dma_dispatch_indices( dev, buf, indices.start, indices.end ); - - return 0; -} - -int mga_dma_iload( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_device_dma_t *dma = dev->dma; - drm_mga_private_t *dev_priv = dev->dev_private; - drm_buf_t *buf; - drm_mga_buf_priv_t *buf_priv; - drm_mga_iload_t iload; - DRM_DEBUG( "\n" ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( iload, (drm_mga_iload_t __user *)data, sizeof(iload) ); - -#if 0 - if ( mga_do_wait_for_idle( dev_priv ) < 0 ) { - if ( MGA_DMA_DEBUG ) - DRM_INFO( "%s: -EBUSY\n", __FUNCTION__ ); - return DRM_ERR(EBUSY); - } -#endif - if(iload.idx < 0 || iload.idx > dma->buf_count) return DRM_ERR(EINVAL); - - buf = dma->buflist[iload.idx]; - buf_priv = buf->dev_private; - - if ( mga_verify_iload( dev_priv, iload.dstorg, iload.length ) ) { - mga_freelist_put( dev, buf ); - return DRM_ERR(EINVAL); - } - - WRAP_TEST_WITH_RETURN( dev_priv ); - - mga_dma_dispatch_iload( dev, buf, iload.dstorg, iload.length ); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT; - - return 0; -} - -int mga_dma_blit( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_blit_t blit; - DRM_DEBUG( "\n" ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( blit, (drm_mga_blit_t __user *)data, sizeof(blit) ); - - if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; - - if ( mga_verify_blit( dev_priv, blit.srcorg, blit.dstorg ) ) - return DRM_ERR(EINVAL); - - WRAP_TEST_WITH_RETURN( dev_priv ); - - mga_dma_dispatch_blit( dev, &blit ); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT; - - return 0; -} - -int mga_getparam( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_getparam_t param; - int value; - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL( param, (drm_mga_getparam_t __user *)data, - sizeof(param) ); - - DRM_DEBUG( "pid=%d\n", DRM_CURRENTPID ); - - switch( param.param ) { - case MGA_PARAM_IRQ_NR: - value = dev->irq; - break; - default: - return DRM_ERR(EINVAL); - } - - if ( DRM_COPY_TO_USER( param.value, &value, sizeof(int) ) ) { - DRM_ERROR( "copy_to_user\n" ); - return DRM_ERR(EFAULT); - } - - return 0; -} diff --git a/shared/mga_ucode.h b/shared/mga_ucode.h deleted file mode 100644 index fa0f82ec9..000000000 --- a/shared/mga_ucode.h +++ /dev/null @@ -1,11645 +0,0 @@ -/* mga_ucode.h -- Matrox G200/G400 WARP engine microcode -*- linux-c -*- - * Created: Thu Jan 11 21:20:43 2001 by gareth@valinux.com - * - * Copyright 1999 Matrox Graphics Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included - * in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * MATROX GRAPHICS INC., OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE - * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Kernel-based WARP engine management: - * Gareth Hughes <gareth@valinux.com> - */ - -/* - * WARP pipes are named according to the functions they perform, where: - * - * - T stands for computation of texture stage 0 - * - T2 stands for computation of both texture stage 0 and texture stage 1 - * - G stands for computation of triangle intensity (Gouraud interpolation) - * - Z stands for computation of Z buffer interpolation - * - S stands for computation of specular highlight - * - A stands for computation of the alpha channel - * - F stands for computation of vertex fog interpolation - */ - -static unsigned char warp_g200_tgz[] = { - -0x00, 0x80, 0x00, 0xE8, -0x00, 0x80, 0x00, 0xE8, - -0x00, 0x80, 0x00, 0xE8, -0x00, 0x80, 0x00, 0xE8, - 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-0x8B, 0xFF, 0x20, 0xEA, -0x57, 0xC0, 0xBF, 0xEA, - -0x00, 0x80, 0xA0, 0xE9, -0x00, 0x00, 0xD8, 0xEC, - -}; diff --git a/shared/mga_warp.c b/shared/mga_warp.c deleted file mode 100644 index de1b911f8..000000000 --- a/shared/mga_warp.c +++ /dev/null @@ -1,211 +0,0 @@ -/* mga_warp.c -- Matrox G200/G400 WARP engine management -*- linux-c -*- - * Created: Thu Jan 11 21:29:32 2001 by gareth@valinux.com - * - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - -#include "mga.h" -#include "drmP.h" -#include "drm.h" -#include "mga_drm.h" -#include "mga_drv.h" -#include "mga_ucode.h" - - -#define MGA_WARP_CODE_ALIGN 256 /* in bytes */ - -#define WARP_UCODE_SIZE( which ) \ - ((sizeof(which) / MGA_WARP_CODE_ALIGN + 1) * MGA_WARP_CODE_ALIGN) - -#define WARP_UCODE_INSTALL( which, where ) \ -do { \ - DRM_DEBUG( " pcbase = 0x%08lx vcbase = %p\n", pcbase, vcbase );\ - dev_priv->warp_pipe_phys[where] = pcbase; \ - memcpy( vcbase, which, sizeof(which) ); \ - pcbase += WARP_UCODE_SIZE( which ); \ - vcbase += WARP_UCODE_SIZE( which ); \ -} while (0) - - -static unsigned int mga_warp_g400_microcode_size( drm_mga_private_t *dev_priv ) -{ - unsigned int size; - - size = ( WARP_UCODE_SIZE( warp_g400_tgz ) + - WARP_UCODE_SIZE( warp_g400_tgza ) + - WARP_UCODE_SIZE( warp_g400_tgzaf ) + - WARP_UCODE_SIZE( warp_g400_tgzf ) + - WARP_UCODE_SIZE( warp_g400_tgzs ) + - WARP_UCODE_SIZE( warp_g400_tgzsa ) + - WARP_UCODE_SIZE( warp_g400_tgzsaf ) + - WARP_UCODE_SIZE( warp_g400_tgzsf ) + - WARP_UCODE_SIZE( warp_g400_t2gz ) + - WARP_UCODE_SIZE( warp_g400_t2gza ) + - WARP_UCODE_SIZE( warp_g400_t2gzaf ) + - WARP_UCODE_SIZE( warp_g400_t2gzf ) + - WARP_UCODE_SIZE( warp_g400_t2gzs ) + - WARP_UCODE_SIZE( warp_g400_t2gzsa ) + - WARP_UCODE_SIZE( warp_g400_t2gzsaf ) + - WARP_UCODE_SIZE( warp_g400_t2gzsf ) ); - - size = PAGE_ALIGN( size ); - - DRM_DEBUG( "G400 ucode size = %d bytes\n", size ); - return size; -} - -static unsigned int mga_warp_g200_microcode_size( drm_mga_private_t *dev_priv ) -{ - unsigned int size; - - size = ( WARP_UCODE_SIZE( warp_g200_tgz ) + - WARP_UCODE_SIZE( warp_g200_tgza ) + - WARP_UCODE_SIZE( warp_g200_tgzaf ) + - WARP_UCODE_SIZE( warp_g200_tgzf ) + - WARP_UCODE_SIZE( warp_g200_tgzs ) + - WARP_UCODE_SIZE( warp_g200_tgzsa ) + - WARP_UCODE_SIZE( warp_g200_tgzsaf ) + - WARP_UCODE_SIZE( warp_g200_tgzsf ) ); - - size = PAGE_ALIGN( size ); - - DRM_DEBUG( "G200 ucode size = %d bytes\n", size ); - return size; -} - -static int mga_warp_install_g400_microcode( drm_mga_private_t *dev_priv ) -{ - unsigned char *vcbase = dev_priv->warp->handle; - unsigned long pcbase = dev_priv->warp->offset; - unsigned int size; - - size = mga_warp_g400_microcode_size( dev_priv ); - if ( size > dev_priv->warp->size ) { - DRM_ERROR( "microcode too large! (%u > %lu)\n", - size, dev_priv->warp->size ); - return DRM_ERR(ENOMEM); - } - - memset( dev_priv->warp_pipe_phys, 0, - sizeof(dev_priv->warp_pipe_phys) ); - - WARP_UCODE_INSTALL( warp_g400_tgz, MGA_WARP_TGZ ); - WARP_UCODE_INSTALL( warp_g400_tgzf, MGA_WARP_TGZF ); - WARP_UCODE_INSTALL( warp_g400_tgza, MGA_WARP_TGZA ); - WARP_UCODE_INSTALL( warp_g400_tgzaf, MGA_WARP_TGZAF ); - WARP_UCODE_INSTALL( warp_g400_tgzs, MGA_WARP_TGZS ); - WARP_UCODE_INSTALL( warp_g400_tgzsf, MGA_WARP_TGZSF ); - WARP_UCODE_INSTALL( warp_g400_tgzsa, MGA_WARP_TGZSA ); - WARP_UCODE_INSTALL( warp_g400_tgzsaf, MGA_WARP_TGZSAF ); - - WARP_UCODE_INSTALL( warp_g400_t2gz, MGA_WARP_T2GZ ); - WARP_UCODE_INSTALL( warp_g400_t2gzf, MGA_WARP_T2GZF ); - WARP_UCODE_INSTALL( warp_g400_t2gza, MGA_WARP_T2GZA ); - WARP_UCODE_INSTALL( warp_g400_t2gzaf, MGA_WARP_T2GZAF ); - WARP_UCODE_INSTALL( warp_g400_t2gzs, MGA_WARP_T2GZS ); - WARP_UCODE_INSTALL( warp_g400_t2gzsf, MGA_WARP_T2GZSF ); - WARP_UCODE_INSTALL( warp_g400_t2gzsa, MGA_WARP_T2GZSA ); - WARP_UCODE_INSTALL( warp_g400_t2gzsaf, MGA_WARP_T2GZSAF ); - - return 0; -} - -static int mga_warp_install_g200_microcode( drm_mga_private_t *dev_priv ) -{ - unsigned char *vcbase = dev_priv->warp->handle; - unsigned long pcbase = dev_priv->warp->offset; - unsigned int size; - - size = mga_warp_g200_microcode_size( dev_priv ); - if ( size > dev_priv->warp->size ) { - DRM_ERROR( "microcode too large! (%u > %lu)\n", - size, dev_priv->warp->size ); - return DRM_ERR(ENOMEM); - } - - memset( dev_priv->warp_pipe_phys, 0, - sizeof(dev_priv->warp_pipe_phys) ); - - WARP_UCODE_INSTALL( warp_g200_tgz, MGA_WARP_TGZ ); - WARP_UCODE_INSTALL( warp_g200_tgzf, MGA_WARP_TGZF ); - WARP_UCODE_INSTALL( warp_g200_tgza, MGA_WARP_TGZA ); - WARP_UCODE_INSTALL( warp_g200_tgzaf, MGA_WARP_TGZAF ); - WARP_UCODE_INSTALL( warp_g200_tgzs, MGA_WARP_TGZS ); - WARP_UCODE_INSTALL( warp_g200_tgzsf, MGA_WARP_TGZSF ); - WARP_UCODE_INSTALL( warp_g200_tgzsa, MGA_WARP_TGZSA ); - WARP_UCODE_INSTALL( warp_g200_tgzsaf, MGA_WARP_TGZSAF ); - - return 0; -} - -int mga_warp_install_microcode( drm_mga_private_t *dev_priv ) -{ - switch ( dev_priv->chipset ) { - case MGA_CARD_TYPE_G400: - return mga_warp_install_g400_microcode( dev_priv ); - case MGA_CARD_TYPE_G200: - return mga_warp_install_g200_microcode( dev_priv ); - default: - return DRM_ERR(EINVAL); - } -} - -#define WMISC_EXPECTED (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE) - -int mga_warp_init( drm_mga_private_t *dev_priv ) -{ - u32 wmisc; - - /* FIXME: Get rid of these damned magic numbers... - */ - switch ( dev_priv->chipset ) { - case MGA_CARD_TYPE_G400: - MGA_WRITE( MGA_WIADDR2, MGA_WMODE_SUSPEND ); - MGA_WRITE( MGA_WGETMSB, 0x00000E00 ); - MGA_WRITE( MGA_WVRTXSZ, 0x00001807 ); - MGA_WRITE( MGA_WACCEPTSEQ, 0x18000000 ); - break; - case MGA_CARD_TYPE_G200: - MGA_WRITE( MGA_WIADDR, MGA_WMODE_SUSPEND ); - MGA_WRITE( MGA_WGETMSB, 0x1606 ); - MGA_WRITE( MGA_WVRTXSZ, 7 ); - break; - default: - return DRM_ERR(EINVAL); - } - - MGA_WRITE( MGA_WMISC, (MGA_WUCODECACHE_ENABLE | - MGA_WMASTER_ENABLE | - MGA_WCACHEFLUSH_ENABLE) ); - wmisc = MGA_READ( MGA_WMISC ); - if ( wmisc != WMISC_EXPECTED ) { - DRM_ERROR( "WARP engine config failed! 0x%x != 0x%x\n", - wmisc, WMISC_EXPECTED ); - return DRM_ERR(EINVAL); - } - - return 0; -} diff --git a/shared/r128.h b/shared/r128.h deleted file mode 100644 index 1df7042a2..000000000 --- a/shared/r128.h +++ /dev/null @@ -1,75 +0,0 @@ -/* r128.h -- ATI Rage 128 DRM template customization -*- linux-c -*- - * Created: Wed Feb 14 16:07:10 2001 by gareth@valinux.com - * - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - -#ifndef __R128_H__ -#define __R128_H__ - -/* This remains constant for all DRM template files. - */ -#define DRM(x) r128_##x - -/* General customization: - */ -#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc." - -#define DRIVER_NAME "r128" -#define DRIVER_DESC "ATI Rage 128" -#define DRIVER_DATE "20030725" - -#define DRIVER_MAJOR 2 -#define DRIVER_MINOR 5 -#define DRIVER_PATCHLEVEL 0 - -/* Interface history: - * - * ?? - ?? - * 2.4 - Add support for ycbcr textures (no new ioctls) - * 2.5 - Add FLIP ioctl, disable FULLSCREEN. - */ -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { r128_cce_buffers, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_INIT)] = { r128_cce_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_START)] = { r128_cce_start, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_STOP)] = { r128_cce_stop, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_RESET)] = { r128_cce_reset, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_IDLE)] = { r128_cce_idle, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_RESET)] = { r128_engine_reset, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_FULLSCREEN)] = { r128_fullscreen, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_SWAP)] = { r128_cce_swap, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_FLIP)] = { r128_cce_flip, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_CLEAR)] = { r128_cce_clear, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_VERTEX)] = { r128_cce_vertex, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_INDICES)] = { r128_cce_indices, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_BLIT)] = { r128_cce_blit, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_DEPTH)] = { r128_cce_depth, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_STIPPLE)] = { r128_cce_stipple, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_INDIRECT)] = { r128_cce_indirect, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_GETPARAM)] = { r128_getparam, 1, 0 }, - -#endif diff --git a/shared/r128_cce.c b/shared/r128_cce.c deleted file mode 100644 index 64c9b8be7..000000000 --- a/shared/r128_cce.c +++ /dev/null @@ -1,946 +0,0 @@ -/* r128_cce.c -- ATI Rage 128 driver -*- linux-c -*- - * Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com - * - * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - -#include "r128.h" -#include "drmP.h" -#include "drm.h" -#include "r128_drm.h" -#include "r128_drv.h" - -#define R128_FIFO_DEBUG 0 - -/* CCE microcode (from ATI) */ -static u32 r128_cce_microcode[] = { - 0, 276838400, 0, 268449792, 2, 142, 2, 145, 0, 1076765731, 0, - 1617039951, 0, 774592877, 0, 1987540286, 0, 2307490946U, 0, - 599558925, 0, 589505315, 0, 596487092, 0, 589505315, 1, - 11544576, 1, 206848, 1, 311296, 1, 198656, 2, 912273422, 11, - 262144, 0, 0, 1, 33559837, 1, 7438, 1, 14809, 1, 6615, 12, 28, - 1, 6614, 12, 28, 2, 23, 11, 18874368, 0, 16790922, 1, 409600, 9, - 30, 1, 147854772, 16, 420483072, 3, 8192, 0, 10240, 1, 198656, - 1, 15630, 1, 51200, 10, 34858, 9, 42, 1, 33559823, 2, 10276, 1, - 15717, 1, 15718, 2, 43, 1, 15936948, 1, 570480831, 1, 14715071, - 12, 322123831, 1, 33953125, 12, 55, 1, 33559908, 1, 15718, 2, - 46, 4, 2099258, 1, 526336, 1, 442623, 4, 4194365, 1, 509952, 1, - 459007, 3, 0, 12, 92, 2, 46, 12, 176, 1, 15734, 1, 206848, 1, - 18432, 1, 133120, 1, 100670734, 1, 149504, 1, 165888, 1, - 15975928, 1, 1048576, 6, 3145806, 1, 15715, 16, 2150645232U, 2, - 268449859, 2, 10307, 12, 176, 1, 15734, 1, 15735, 1, 15630, 1, - 15631, 1, 5253120, 6, 3145810, 16, 2150645232U, 1, 15864, 2, 82, - 1, 343310, 1, 1064207, 2, 3145813, 1, 15728, 1, 7817, 1, 15729, - 3, 15730, 12, 92, 2, 98, 1, 16168, 1, 16167, 1, 16002, 1, 16008, - 1, 15974, 1, 15975, 1, 15990, 1, 15976, 1, 15977, 1, 15980, 0, - 15981, 1, 10240, 1, 5253120, 1, 15720, 1, 198656, 6, 110, 1, - 180224, 1, 103824738, 2, 112, 2, 3145839, 0, 536885440, 1, - 114880, 14, 125, 12, 206975, 1, 33559995, 12, 198784, 0, - 33570236, 1, 15803, 0, 15804, 3, 294912, 1, 294912, 3, 442370, - 1, 11544576, 0, 811612160, 1, 12593152, 1, 11536384, 1, - 14024704, 7, 310382726, 0, 10240, 1, 14796, 1, 14797, 1, 14793, - 1, 14794, 0, 14795, 1, 268679168, 1, 9437184, 1, 268449792, 1, - 198656, 1, 9452827, 1, 1075854602, 1, 1075854603, 1, 557056, 1, - 114880, 14, 159, 12, 198784, 1, 1109409213, 12, 198783, 1, - 1107312059, 12, 198784, 1, 1109409212, 2, 162, 1, 1075854781, 1, - 1073757627, 1, 1075854780, 1, 540672, 1, 10485760, 6, 3145894, - 16, 274741248, 9, 168, 3, 4194304, 3, 4209949, 0, 0, 0, 256, 14, - 174, 1, 114857, 1, 33560007, 12, 176, 0, 10240, 1, 114858, 1, - 33560018, 1, 114857, 3, 33560007, 1, 16008, 1, 114874, 1, - 33560360, 1, 114875, 1, 33560154, 0, 15963, 0, 256, 0, 4096, 1, - 409611, 9, 188, 0, 10240, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 -}; - -int R128_READ_PLL(drm_device_t *dev, int addr) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - - R128_WRITE8(R128_CLOCK_CNTL_INDEX, addr & 0x1f); - return R128_READ(R128_CLOCK_CNTL_DATA); -} - -#if R128_FIFO_DEBUG -static void r128_status( drm_r128_private_t *dev_priv ) -{ - printk( "GUI_STAT = 0x%08x\n", - (unsigned int)R128_READ( R128_GUI_STAT ) ); - printk( "PM4_STAT = 0x%08x\n", - (unsigned int)R128_READ( R128_PM4_STAT ) ); - printk( "PM4_BUFFER_DL_WPTR = 0x%08x\n", - (unsigned int)R128_READ( R128_PM4_BUFFER_DL_WPTR ) ); - printk( "PM4_BUFFER_DL_RPTR = 0x%08x\n", - (unsigned int)R128_READ( R128_PM4_BUFFER_DL_RPTR ) ); - printk( "PM4_MICRO_CNTL = 0x%08x\n", - (unsigned int)R128_READ( R128_PM4_MICRO_CNTL ) ); - printk( "PM4_BUFFER_CNTL = 0x%08x\n", - (unsigned int)R128_READ( R128_PM4_BUFFER_CNTL ) ); -} -#endif - - -/* ================================================================ - * Engine, FIFO control - */ - -static int r128_do_pixcache_flush( drm_r128_private_t *dev_priv ) -{ - u32 tmp; - int i; - - tmp = R128_READ( R128_PC_NGUI_CTLSTAT ) | R128_PC_FLUSH_ALL; - R128_WRITE( R128_PC_NGUI_CTLSTAT, tmp ); - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - if ( !(R128_READ( R128_PC_NGUI_CTLSTAT ) & R128_PC_BUSY) ) { - return 0; - } - DRM_UDELAY( 1 ); - } - -#if R128_FIFO_DEBUG - DRM_ERROR( "failed!\n" ); -#endif - return DRM_ERR(EBUSY); -} - -static int r128_do_wait_for_fifo( drm_r128_private_t *dev_priv, int entries ) -{ - int i; - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - int slots = R128_READ( R128_GUI_STAT ) & R128_GUI_FIFOCNT_MASK; - if ( slots >= entries ) return 0; - DRM_UDELAY( 1 ); - } - -#if R128_FIFO_DEBUG - DRM_ERROR( "failed!\n" ); -#endif - return DRM_ERR(EBUSY); -} - -static int r128_do_wait_for_idle( drm_r128_private_t *dev_priv ) -{ - int i, ret; - - ret = r128_do_wait_for_fifo( dev_priv, 64 ); - if ( ret ) return ret; - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - if ( !(R128_READ( R128_GUI_STAT ) & R128_GUI_ACTIVE) ) { - r128_do_pixcache_flush( dev_priv ); - return 0; - } - DRM_UDELAY( 1 ); - } - -#if R128_FIFO_DEBUG - DRM_ERROR( "failed!\n" ); -#endif - return DRM_ERR(EBUSY); -} - - -/* ================================================================ - * CCE control, initialization - */ - -/* Load the microcode for the CCE */ -static void r128_cce_load_microcode( drm_r128_private_t *dev_priv ) -{ - int i; - - DRM_DEBUG( "\n" ); - - r128_do_wait_for_idle( dev_priv ); - - R128_WRITE( R128_PM4_MICROCODE_ADDR, 0 ); - for ( i = 0 ; i < 256 ; i++ ) { - R128_WRITE( R128_PM4_MICROCODE_DATAH, - r128_cce_microcode[i * 2] ); - R128_WRITE( R128_PM4_MICROCODE_DATAL, - r128_cce_microcode[i * 2 + 1] ); - } -} - -/* Flush any pending commands to the CCE. This should only be used just - * prior to a wait for idle, as it informs the engine that the command - * stream is ending. - */ -static void r128_do_cce_flush( drm_r128_private_t *dev_priv ) -{ - u32 tmp; - - tmp = R128_READ( R128_PM4_BUFFER_DL_WPTR ) | R128_PM4_BUFFER_DL_DONE; - R128_WRITE( R128_PM4_BUFFER_DL_WPTR, tmp ); -} - -/* Wait for the CCE to go idle. - */ -int r128_do_cce_idle( drm_r128_private_t *dev_priv ) -{ - int i; - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - if ( GET_RING_HEAD( dev_priv ) == dev_priv->ring.tail ) { - int pm4stat = R128_READ( R128_PM4_STAT ); - if ( ( (pm4stat & R128_PM4_FIFOCNT_MASK) >= - dev_priv->cce_fifo_size ) && - !(pm4stat & (R128_PM4_BUSY | - R128_PM4_GUI_ACTIVE)) ) { - return r128_do_pixcache_flush( dev_priv ); - } - } - DRM_UDELAY( 1 ); - } - -#if R128_FIFO_DEBUG - DRM_ERROR( "failed!\n" ); - r128_status( dev_priv ); -#endif - return DRM_ERR(EBUSY); -} - -/* Start the Concurrent Command Engine. - */ -static void r128_do_cce_start( drm_r128_private_t *dev_priv ) -{ - r128_do_wait_for_idle( dev_priv ); - - R128_WRITE( R128_PM4_BUFFER_CNTL, - dev_priv->cce_mode | dev_priv->ring.size_l2qw - | R128_PM4_BUFFER_CNTL_NOUPDATE ); - R128_READ( R128_PM4_BUFFER_ADDR ); /* as per the sample code */ - R128_WRITE( R128_PM4_MICRO_CNTL, R128_PM4_MICRO_FREERUN ); - - dev_priv->cce_running = 1; -} - -/* Reset the Concurrent Command Engine. This will not flush any pending - * commands, so you must wait for the CCE command stream to complete - * before calling this routine. - */ -static void r128_do_cce_reset( drm_r128_private_t *dev_priv ) -{ - R128_WRITE( R128_PM4_BUFFER_DL_WPTR, 0 ); - R128_WRITE( R128_PM4_BUFFER_DL_RPTR, 0 ); - dev_priv->ring.tail = 0; -} - -/* Stop the Concurrent Command Engine. This will not flush any pending - * commands, so you must flush the command stream and wait for the CCE - * to go idle before calling this routine. - */ -static void r128_do_cce_stop( drm_r128_private_t *dev_priv ) -{ - R128_WRITE( R128_PM4_MICRO_CNTL, 0 ); - R128_WRITE( R128_PM4_BUFFER_CNTL, - R128_PM4_NONPM4 | R128_PM4_BUFFER_CNTL_NOUPDATE ); - - dev_priv->cce_running = 0; -} - -/* Reset the engine. This will stop the CCE if it is running. - */ -static int r128_do_engine_reset( drm_device_t *dev ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - u32 clock_cntl_index, mclk_cntl, gen_reset_cntl; - - r128_do_pixcache_flush( dev_priv ); - - clock_cntl_index = R128_READ( R128_CLOCK_CNTL_INDEX ); - mclk_cntl = R128_READ_PLL( dev, R128_MCLK_CNTL ); - - R128_WRITE_PLL( R128_MCLK_CNTL, - mclk_cntl | R128_FORCE_GCP | R128_FORCE_PIPE3D_CP ); - - gen_reset_cntl = R128_READ( R128_GEN_RESET_CNTL ); - - /* Taken from the sample code - do not change */ - R128_WRITE( R128_GEN_RESET_CNTL, - gen_reset_cntl | R128_SOFT_RESET_GUI ); - R128_READ( R128_GEN_RESET_CNTL ); - R128_WRITE( R128_GEN_RESET_CNTL, - gen_reset_cntl & ~R128_SOFT_RESET_GUI ); - R128_READ( R128_GEN_RESET_CNTL ); - - R128_WRITE_PLL( R128_MCLK_CNTL, mclk_cntl ); - R128_WRITE( R128_CLOCK_CNTL_INDEX, clock_cntl_index ); - R128_WRITE( R128_GEN_RESET_CNTL, gen_reset_cntl ); - - /* Reset the CCE ring */ - r128_do_cce_reset( dev_priv ); - - /* The CCE is no longer running after an engine reset */ - dev_priv->cce_running = 0; - - /* Reset any pending vertex, indirect buffers */ - r128_freelist_reset( dev ); - - return 0; -} - -static void r128_cce_init_ring_buffer( drm_device_t *dev, - drm_r128_private_t *dev_priv ) -{ - u32 ring_start; - u32 tmp; - - DRM_DEBUG( "\n" ); - - /* The manual (p. 2) says this address is in "VM space". This - * means it's an offset from the start of AGP space. - */ -#if __OS_HAS_AGP - if ( !dev_priv->is_pci ) - ring_start = dev_priv->cce_ring->offset - dev->agp->base; - else -#endif - ring_start = dev_priv->cce_ring->offset - dev->sg->handle; - - R128_WRITE( R128_PM4_BUFFER_OFFSET, ring_start | R128_AGP_OFFSET ); - - R128_WRITE( R128_PM4_BUFFER_DL_WPTR, 0 ); - R128_WRITE( R128_PM4_BUFFER_DL_RPTR, 0 ); - - /* Set watermark control */ - R128_WRITE( R128_PM4_BUFFER_WM_CNTL, - ((R128_WATERMARK_L/4) << R128_WMA_SHIFT) - | ((R128_WATERMARK_M/4) << R128_WMB_SHIFT) - | ((R128_WATERMARK_N/4) << R128_WMC_SHIFT) - | ((R128_WATERMARK_K/64) << R128_WB_WM_SHIFT) ); - - /* Force read. Why? Because it's in the examples... */ - R128_READ( R128_PM4_BUFFER_ADDR ); - - /* Turn on bus mastering */ - tmp = R128_READ( R128_BUS_CNTL ) & ~R128_BUS_MASTER_DIS; - R128_WRITE( R128_BUS_CNTL, tmp ); -} - -static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init ) -{ - drm_r128_private_t *dev_priv; - - DRM_DEBUG( "\n" ); - - dev_priv = DRM(alloc)( sizeof(drm_r128_private_t), DRM_MEM_DRIVER ); - if ( dev_priv == NULL ) - return DRM_ERR(ENOMEM); - - memset( dev_priv, 0, sizeof(drm_r128_private_t) ); - - dev_priv->is_pci = init->is_pci; - - if ( dev_priv->is_pci && !dev->sg ) { - DRM_ERROR( "PCI GART memory not allocated!\n" ); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - return DRM_ERR(EINVAL); - } - - dev_priv->usec_timeout = init->usec_timeout; - if ( dev_priv->usec_timeout < 1 || - dev_priv->usec_timeout > R128_MAX_USEC_TIMEOUT ) { - DRM_DEBUG( "TIMEOUT problem!\n" ); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - return DRM_ERR(EINVAL); - } - - dev_priv->cce_mode = init->cce_mode; - - /* GH: Simple idle check. - */ - atomic_set( &dev_priv->idle_count, 0 ); - - /* We don't support anything other than bus-mastering ring mode, - * but the ring can be in either AGP or PCI space for the ring - * read pointer. - */ - if ( ( init->cce_mode != R128_PM4_192BM ) && - ( init->cce_mode != R128_PM4_128BM_64INDBM ) && - ( init->cce_mode != R128_PM4_64BM_128INDBM ) && - ( init->cce_mode != R128_PM4_64BM_64VCBM_64INDBM ) ) { - DRM_DEBUG( "Bad cce_mode!\n" ); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - return DRM_ERR(EINVAL); - } - - switch ( init->cce_mode ) { - case R128_PM4_NONPM4: - dev_priv->cce_fifo_size = 0; - break; - case R128_PM4_192PIO: - case R128_PM4_192BM: - dev_priv->cce_fifo_size = 192; - break; - case R128_PM4_128PIO_64INDBM: - case R128_PM4_128BM_64INDBM: - dev_priv->cce_fifo_size = 128; - break; - case R128_PM4_64PIO_128INDBM: - case R128_PM4_64BM_128INDBM: - case R128_PM4_64PIO_64VCBM_64INDBM: - case R128_PM4_64BM_64VCBM_64INDBM: - case R128_PM4_64PIO_64VCPIO_64INDPIO: - dev_priv->cce_fifo_size = 64; - break; - } - - switch ( init->fb_bpp ) { - case 16: - dev_priv->color_fmt = R128_DATATYPE_RGB565; - break; - case 32: - default: - dev_priv->color_fmt = R128_DATATYPE_ARGB8888; - break; - } - dev_priv->front_offset = init->front_offset; - dev_priv->front_pitch = init->front_pitch; - dev_priv->back_offset = init->back_offset; - dev_priv->back_pitch = init->back_pitch; - - switch ( init->depth_bpp ) { - case 16: - dev_priv->depth_fmt = R128_DATATYPE_RGB565; - break; - case 24: - case 32: - default: - dev_priv->depth_fmt = R128_DATATYPE_ARGB8888; - break; - } - dev_priv->depth_offset = init->depth_offset; - dev_priv->depth_pitch = init->depth_pitch; - dev_priv->span_offset = init->span_offset; - - dev_priv->front_pitch_offset_c = (((dev_priv->front_pitch/8) << 21) | - (dev_priv->front_offset >> 5)); - dev_priv->back_pitch_offset_c = (((dev_priv->back_pitch/8) << 21) | - (dev_priv->back_offset >> 5)); - dev_priv->depth_pitch_offset_c = (((dev_priv->depth_pitch/8) << 21) | - (dev_priv->depth_offset >> 5) | - R128_DST_TILE); - dev_priv->span_pitch_offset_c = (((dev_priv->depth_pitch/8) << 21) | - (dev_priv->span_offset >> 5)); - - DRM_GETSAREA(); - - if(!dev_priv->sarea) { - DRM_ERROR("could not find sarea!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - return DRM_ERR(EINVAL); - } - - dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset); - if(!dev_priv->mmio) { - DRM_ERROR("could not find mmio region!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - return DRM_ERR(EINVAL); - } - dev_priv->cce_ring = drm_core_findmap(dev, init->ring_offset); - if(!dev_priv->cce_ring) { - DRM_ERROR("could not find cce ring region!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - return DRM_ERR(EINVAL); - } - dev_priv->ring_rptr = drm_core_findmap(dev, init->ring_rptr_offset); - if(!dev_priv->ring_rptr) { - DRM_ERROR("could not find ring read pointer!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - return DRM_ERR(EINVAL); - } - dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset); - if(!dev->agp_buffer_map) { - DRM_ERROR("could not find dma buffer region!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - return DRM_ERR(EINVAL); - } - - if ( !dev_priv->is_pci ) { - dev_priv->agp_textures = drm_core_findmap(dev, init->agp_textures_offset); - if(!dev_priv->agp_textures) { - DRM_ERROR("could not find agp texture region!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - return DRM_ERR(EINVAL); - } - } - - dev_priv->sarea_priv = - (drm_r128_sarea_t *)((u8 *)dev_priv->sarea->handle + - init->sarea_priv_offset); - -#if __OS_HAS_AGP - if ( !dev_priv->is_pci ) { - drm_core_ioremap( dev_priv->cce_ring, dev ); - drm_core_ioremap( dev_priv->ring_rptr, dev ); - drm_core_ioremap( dev->agp_buffer_map, dev ); - if(!dev_priv->cce_ring->handle || - !dev_priv->ring_rptr->handle || - !dev->agp_buffer_map->handle) { - DRM_ERROR("Could not ioremap agp regions!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - return DRM_ERR(ENOMEM); - } - } else -#endif - { - dev_priv->cce_ring->handle = - (void *)dev_priv->cce_ring->offset; - dev_priv->ring_rptr->handle = - (void *)dev_priv->ring_rptr->offset; - dev->agp_buffer_map->handle = (void *)dev->agp_buffer_map->offset; - } - -#if __OS_HAS_AGP - if ( !dev_priv->is_pci ) - dev_priv->cce_buffers_offset = dev->agp->base; - else -#endif - dev_priv->cce_buffers_offset = dev->sg->handle; - - dev_priv->ring.start = (u32 *)dev_priv->cce_ring->handle; - dev_priv->ring.end = ((u32 *)dev_priv->cce_ring->handle - + init->ring_size / sizeof(u32)); - dev_priv->ring.size = init->ring_size; - dev_priv->ring.size_l2qw = DRM(order)( init->ring_size / 8 ); - - dev_priv->ring.tail_mask = - (dev_priv->ring.size / sizeof(u32)) - 1; - - dev_priv->ring.high_mark = 128; - - dev_priv->sarea_priv->last_frame = 0; - R128_WRITE( R128_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame ); - - dev_priv->sarea_priv->last_dispatch = 0; - R128_WRITE( R128_LAST_DISPATCH_REG, - dev_priv->sarea_priv->last_dispatch ); - -#if __OS_HAS_AGP - if ( dev_priv->is_pci ) { -#endif - if (!DRM(ati_pcigart_init)( dev, &dev_priv->phys_pci_gart, - &dev_priv->bus_pci_gart) ) { - DRM_ERROR( "failed to init PCI GART!\n" ); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - return DRM_ERR(ENOMEM); - } - R128_WRITE( R128_PCI_GART_PAGE, dev_priv->bus_pci_gart ); -#if __OS_HAS_AGP - } -#endif - - r128_cce_init_ring_buffer( dev, dev_priv ); - r128_cce_load_microcode( dev_priv ); - - dev->dev_private = (void *)dev_priv; - - r128_do_engine_reset( dev ); - - return 0; -} - -int r128_do_cleanup_cce( drm_device_t *dev ) -{ - - /* Make sure interrupts are disabled here because the uninstall ioctl - * may not have been called from userspace and after dev_private - * is freed, it's too late. - */ - if ( dev->irq_enabled ) DRM(irq_uninstall)(dev); - - if ( dev->dev_private ) { - drm_r128_private_t *dev_priv = dev->dev_private; - -#if __OS_HAS_AGP - if ( !dev_priv->is_pci ) { - if ( dev_priv->cce_ring != NULL ) - drm_core_ioremapfree( dev_priv->cce_ring, dev ); - if ( dev_priv->ring_rptr != NULL ) - drm_core_ioremapfree( dev_priv->ring_rptr, dev ); - if ( dev->agp_buffer_map != NULL ) { - drm_core_ioremapfree( dev->agp_buffer_map, dev ); - dev->agp_buffer_map = NULL; - } - } else -#endif - { - if (!DRM(ati_pcigart_cleanup)( dev, - dev_priv->phys_pci_gart, - dev_priv->bus_pci_gart )) - DRM_ERROR( "failed to cleanup PCI GART!\n" ); - } - - DRM(free)( dev->dev_private, sizeof(drm_r128_private_t), - DRM_MEM_DRIVER ); - dev->dev_private = NULL; - } - - return 0; -} - -int r128_cce_init( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_r128_init_t init; - - DRM_DEBUG( "\n" ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( init, (drm_r128_init_t __user *)data, sizeof(init) ); - - switch ( init.func ) { - case R128_INIT_CCE: - return r128_do_init_cce( dev, &init ); - case R128_CLEANUP_CCE: - return r128_do_cleanup_cce( dev ); - } - - return DRM_ERR(EINVAL); -} - -int r128_cce_start( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "\n" ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - if ( dev_priv->cce_running || dev_priv->cce_mode == R128_PM4_NONPM4 ) { - DRM_DEBUG( "%s while CCE running\n", __FUNCTION__ ); - return 0; - } - - r128_do_cce_start( dev_priv ); - - return 0; -} - -/* Stop the CCE. The engine must have been idled before calling this - * routine. - */ -int r128_cce_stop( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_cce_stop_t stop; - int ret; - DRM_DEBUG( "\n" ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL(stop, (drm_r128_cce_stop_t __user *)data, sizeof(stop) ); - - /* Flush any pending CCE commands. This ensures any outstanding - * commands are exectuted by the engine before we turn it off. - */ - if ( stop.flush ) { - r128_do_cce_flush( dev_priv ); - } - - /* If we fail to make the engine go idle, we return an error - * code so that the DRM ioctl wrapper can try again. - */ - if ( stop.idle ) { - ret = r128_do_cce_idle( dev_priv ); - if ( ret ) return ret; - } - - /* Finally, we can turn off the CCE. If the engine isn't idle, - * we will get some dropped triangles as they won't be fully - * rendered before the CCE is shut down. - */ - r128_do_cce_stop( dev_priv ); - - /* Reset the engine */ - r128_do_engine_reset( dev ); - - return 0; -} - -/* Just reset the CCE ring. Called as part of an X Server engine reset. - */ -int r128_cce_reset( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "\n" ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - if ( !dev_priv ) { - DRM_DEBUG( "%s called before init done\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - r128_do_cce_reset( dev_priv ); - - /* The CCE is no longer running after an engine reset */ - dev_priv->cce_running = 0; - - return 0; -} - -int r128_cce_idle( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "\n" ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - if ( dev_priv->cce_running ) { - r128_do_cce_flush( dev_priv ); - } - - return r128_do_cce_idle( dev_priv ); -} - -int r128_engine_reset( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - DRM_DEBUG( "\n" ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - return r128_do_engine_reset( dev ); -} - -int r128_fullscreen( DRM_IOCTL_ARGS ) -{ - return DRM_ERR(EINVAL); -} - - -/* ================================================================ - * Freelist management - */ -#define R128_BUFFER_USED 0xffffffff -#define R128_BUFFER_FREE 0 - -#if 0 -static int r128_freelist_init( drm_device_t *dev ) -{ - drm_device_dma_t *dma = dev->dma; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_buf_t *buf; - drm_r128_buf_priv_t *buf_priv; - drm_r128_freelist_t *entry; - int i; - - dev_priv->head = DRM(alloc)( sizeof(drm_r128_freelist_t), - DRM_MEM_DRIVER ); - if ( dev_priv->head == NULL ) - return DRM_ERR(ENOMEM); - - memset( dev_priv->head, 0, sizeof(drm_r128_freelist_t) ); - dev_priv->head->age = R128_BUFFER_USED; - - for ( i = 0 ; i < dma->buf_count ; i++ ) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - - entry = DRM(alloc)( sizeof(drm_r128_freelist_t), - DRM_MEM_DRIVER ); - if ( !entry ) return DRM_ERR(ENOMEM); - - entry->age = R128_BUFFER_FREE; - entry->buf = buf; - entry->prev = dev_priv->head; - entry->next = dev_priv->head->next; - if ( !entry->next ) - dev_priv->tail = entry; - - buf_priv->discard = 0; - buf_priv->dispatched = 0; - buf_priv->list_entry = entry; - - dev_priv->head->next = entry; - - if ( dev_priv->head->next ) - dev_priv->head->next->prev = entry; - } - - return 0; - -} -#endif - -drm_buf_t *r128_freelist_get( drm_device_t *dev ) -{ - drm_device_dma_t *dma = dev->dma; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_buf_priv_t *buf_priv; - drm_buf_t *buf; - int i, t; - - /* FIXME: Optimize -- use freelist code */ - - for ( i = 0 ; i < dma->buf_count ; i++ ) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - if ( buf->filp == 0 ) - return buf; - } - - for ( t = 0 ; t < dev_priv->usec_timeout ; t++ ) { - u32 done_age = R128_READ( R128_LAST_DISPATCH_REG ); - - for ( i = 0 ; i < dma->buf_count ; i++ ) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - if ( buf->pending && buf_priv->age <= done_age ) { - /* The buffer has been processed, so it - * can now be used. - */ - buf->pending = 0; - return buf; - } - } - DRM_UDELAY( 1 ); - } - - DRM_DEBUG( "returning NULL!\n" ); - return NULL; -} - -void r128_freelist_reset( drm_device_t *dev ) -{ - drm_device_dma_t *dma = dev->dma; - int i; - - for ( i = 0 ; i < dma->buf_count ; i++ ) { - drm_buf_t *buf = dma->buflist[i]; - drm_r128_buf_priv_t *buf_priv = buf->dev_private; - buf_priv->age = 0; - } -} - - -/* ================================================================ - * CCE command submission - */ - -int r128_wait_ring( drm_r128_private_t *dev_priv, int n ) -{ - drm_r128_ring_buffer_t *ring = &dev_priv->ring; - int i; - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - r128_update_ring_snapshot( dev_priv ); - if ( ring->space >= n ) - return 0; - DRM_UDELAY( 1 ); - } - - /* FIXME: This is being ignored... */ - DRM_ERROR( "failed!\n" ); - return DRM_ERR(EBUSY); -} - -static int r128_cce_get_buffers( DRMFILE filp, drm_device_t *dev, drm_dma_t *d ) -{ - int i; - drm_buf_t *buf; - - for ( i = d->granted_count ; i < d->request_count ; i++ ) { - buf = r128_freelist_get( dev ); - if ( !buf ) return DRM_ERR(EAGAIN); - - buf->filp = filp; - - if ( DRM_COPY_TO_USER( &d->request_indices[i], &buf->idx, - sizeof(buf->idx) ) ) - return DRM_ERR(EFAULT); - if ( DRM_COPY_TO_USER( &d->request_sizes[i], &buf->total, - sizeof(buf->total) ) ) - return DRM_ERR(EFAULT); - - d->granted_count++; - } - return 0; -} - -int r128_cce_buffers( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_device_dma_t *dma = dev->dma; - int ret = 0; - drm_dma_t __user *argp = (void __user *)data; - drm_dma_t d; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( d, argp, sizeof(d) ); - - /* Please don't send us buffers. - */ - if ( d.send_count != 0 ) { - DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n", - DRM_CURRENTPID, d.send_count ); - return DRM_ERR(EINVAL); - } - - /* We'll send you buffers. - */ - if ( d.request_count < 0 || d.request_count > dma->buf_count ) { - DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n", - DRM_CURRENTPID, d.request_count, dma->buf_count ); - return DRM_ERR(EINVAL); - } - - d.granted_count = 0; - - if ( d.request_count ) { - ret = r128_cce_get_buffers( filp, dev, &d ); - } - - DRM_COPY_TO_USER_IOCTL(argp, d, sizeof(d) ); - - return ret; -} diff --git a/shared/r128_drm.h b/shared/r128_drm.h deleted file mode 100644 index 0cba17d1e..000000000 --- a/shared/r128_drm.h +++ /dev/null @@ -1,345 +0,0 @@ -/* r128_drm.h -- Public header for the r128 driver -*- linux-c -*- - * Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com - * - * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - * Kevin E. Martin <martin@valinux.com> - */ - -#ifndef __R128_DRM_H__ -#define __R128_DRM_H__ - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the X server file (r128_sarea.h) - */ -#ifndef __R128_SAREA_DEFINES__ -#define __R128_SAREA_DEFINES__ - -/* What needs to be changed for the current vertex buffer? - */ -#define R128_UPLOAD_CONTEXT 0x001 -#define R128_UPLOAD_SETUP 0x002 -#define R128_UPLOAD_TEX0 0x004 -#define R128_UPLOAD_TEX1 0x008 -#define R128_UPLOAD_TEX0IMAGES 0x010 -#define R128_UPLOAD_TEX1IMAGES 0x020 -#define R128_UPLOAD_CORE 0x040 -#define R128_UPLOAD_MASKS 0x080 -#define R128_UPLOAD_WINDOW 0x100 -#define R128_UPLOAD_CLIPRECTS 0x200 /* handled client-side */ -#define R128_REQUIRE_QUIESCENCE 0x400 -#define R128_UPLOAD_ALL 0x7ff - -#define R128_FRONT 0x1 -#define R128_BACK 0x2 -#define R128_DEPTH 0x4 - -/* Primitive types - */ -#define R128_POINTS 0x1 -#define R128_LINES 0x2 -#define R128_LINE_STRIP 0x3 -#define R128_TRIANGLES 0x4 -#define R128_TRIANGLE_FAN 0x5 -#define R128_TRIANGLE_STRIP 0x6 - -/* Vertex/indirect buffer size - */ -#define R128_BUFFER_SIZE 16384 - -/* Byte offsets for indirect buffer data - */ -#define R128_INDEX_PRIM_OFFSET 20 -#define R128_HOSTDATA_BLIT_OFFSET 32 - -/* Keep these small for testing. - */ -#define R128_NR_SAREA_CLIPRECTS 12 - -/* There are 2 heaps (local/AGP). Each region within a heap is a - * minimum of 64k, and there are at most 64 of them per heap. - */ -#define R128_LOCAL_TEX_HEAP 0 -#define R128_AGP_TEX_HEAP 1 -#define R128_NR_TEX_HEAPS 2 -#define R128_NR_TEX_REGIONS 64 -#define R128_LOG_TEX_GRANULARITY 16 - -#define R128_NR_CONTEXT_REGS 12 - -#define R128_MAX_TEXTURE_LEVELS 11 -#define R128_MAX_TEXTURE_UNITS 2 - -#endif /* __R128_SAREA_DEFINES__ */ - -typedef struct { - /* Context state - can be written in one large chunk */ - unsigned int dst_pitch_offset_c; - unsigned int dp_gui_master_cntl_c; - unsigned int sc_top_left_c; - unsigned int sc_bottom_right_c; - unsigned int z_offset_c; - unsigned int z_pitch_c; - unsigned int z_sten_cntl_c; - unsigned int tex_cntl_c; - unsigned int misc_3d_state_cntl_reg; - unsigned int texture_clr_cmp_clr_c; - unsigned int texture_clr_cmp_msk_c; - unsigned int fog_color_c; - - /* Texture state */ - unsigned int tex_size_pitch_c; - unsigned int constant_color_c; - - /* Setup state */ - unsigned int pm4_vc_fpu_setup; - unsigned int setup_cntl; - - /* Mask state */ - unsigned int dp_write_mask; - unsigned int sten_ref_mask_c; - unsigned int plane_3d_mask_c; - - /* Window state */ - unsigned int window_xy_offset; - - /* Core state */ - unsigned int scale_3d_cntl; -} drm_r128_context_regs_t; - -/* Setup registers for each texture unit - */ -typedef struct { - unsigned int tex_cntl; - unsigned int tex_combine_cntl; - unsigned int tex_size_pitch; - unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS]; - unsigned int tex_border_color; -} drm_r128_texture_regs_t; - - -typedef struct drm_r128_sarea { - /* The channel for communication of state information to the kernel - * on firing a vertex buffer. - */ - drm_r128_context_regs_t context_state; - drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS]; - unsigned int dirty; - unsigned int vertsize; - unsigned int vc_format; - - /* The current cliprects, or a subset thereof. - */ - drm_clip_rect_t boxes[R128_NR_SAREA_CLIPRECTS]; - unsigned int nbox; - - /* Counters for client-side throttling of rendering clients. - */ - unsigned int last_frame; - unsigned int last_dispatch; - - drm_tex_region_t tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS+1]; - unsigned int tex_age[R128_NR_TEX_HEAPS]; - int ctx_owner; - int pfAllowPageFlip; /* number of 3d windows (0,1,2 or more) */ - int pfCurrentPage; /* which buffer is being displayed? */ -} drm_r128_sarea_t; - - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (xf86drmR128.h) - */ - -/* Rage 128 specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ -#define DRM_R128_INIT 0x00 -#define DRM_R128_CCE_START 0x01 -#define DRM_R128_CCE_STOP 0x02 -#define DRM_R128_CCE_RESET 0x03 -#define DRM_R128_CCE_IDLE 0x04 -/* 0x05 not used */ -#define DRM_R128_RESET 0x06 -#define DRM_R128_SWAP 0x07 -#define DRM_R128_CLEAR 0x08 -#define DRM_R128_VERTEX 0x09 -#define DRM_R128_INDICES 0x0a -#define DRM_R128_BLIT 0x0b -#define DRM_R128_DEPTH 0x0c -#define DRM_R128_STIPPLE 0x0d -/* 0x0e not used */ -#define DRM_R128_INDIRECT 0x0f -#define DRM_R128_FULLSCREEN 0x10 -#define DRM_R128_CLEAR2 0x11 -#define DRM_R128_GETPARAM 0x12 -#define DRM_R128_FLIP 0x13 - -#define DRM_IOCTL_R128_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INIT, drm_r128_init_t) -#define DRM_IOCTL_R128_CCE_START DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_START) -#define DRM_IOCTL_R128_CCE_STOP DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CCE_STOP, drm_r128_cce_stop_t) -#define DRM_IOCTL_R128_CCE_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_RESET) -#define DRM_IOCTL_R128_CCE_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_IDLE) -/* 0x05 not used */ -#define DRM_IOCTL_R128_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_RESET) -#define DRM_IOCTL_R128_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_R128_SWAP) -#define DRM_IOCTL_R128_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR, drm_r128_clear_t) -#define DRM_IOCTL_R128_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_R128_VERTEX, drm_r128_vertex_t) -#define DRM_IOCTL_R128_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INDICES, drm_r128_indices_t) -#define DRM_IOCTL_R128_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_BLIT, drm_r128_blit_t) -#define DRM_IOCTL_R128_DEPTH DRM_IOW( DRM_COMMAND_BASE + DRM_R128_DEPTH, drm_r128_depth_t) -#define DRM_IOCTL_R128_STIPPLE DRM_IOW( DRM_COMMAND_BASE + DRM_R128_STIPPLE, drm_r128_stipple_t) -/* 0x0e not used */ -#define DRM_IOCTL_R128_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_R128_INDIRECT, drm_r128_indirect_t) -#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_R128_FULLSCREEN, drm_r128_fullscreen_t) -#define DRM_IOCTL_R128_CLEAR2 DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t) -#define DRM_IOCTL_R128_GETPARAM DRM_IOW( DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t) -#define DRM_IOCTL_R128_FLIP DRM_IO( DRM_COMMAND_BASE + DRM_R128_FLIP) - -typedef struct drm_r128_init { - enum { - R128_INIT_CCE = 0x01, - R128_CLEANUP_CCE = 0x02 - } func; -#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0) - int sarea_priv_offset; -#else - unsigned long sarea_priv_offset; -#endif - int is_pci; - int cce_mode; - int cce_secure; - int ring_size; - int usec_timeout; - - unsigned int fb_bpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - unsigned int depth_bpp; - unsigned int depth_offset, depth_pitch; - unsigned int span_offset; - -#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0) - unsigned int fb_offset; - unsigned int mmio_offset; - unsigned int ring_offset; - unsigned int ring_rptr_offset; - unsigned int buffers_offset; - unsigned int agp_textures_offset; -#else - unsigned long fb_offset; - unsigned long mmio_offset; - unsigned long ring_offset; - unsigned long ring_rptr_offset; - unsigned long buffers_offset; - unsigned long agp_textures_offset; -#endif -} drm_r128_init_t; - -typedef struct drm_r128_cce_stop { - int flush; - int idle; -} drm_r128_cce_stop_t; - -typedef struct drm_r128_clear { - unsigned int flags; -#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0) - int x, y, w, h; -#endif - unsigned int clear_color; - unsigned int clear_depth; -#if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0) - unsigned int color_mask; - unsigned int depth_mask; -#endif -} drm_r128_clear_t; - -typedef struct drm_r128_vertex { - int prim; - int idx; /* Index of vertex buffer */ - int count; /* Number of vertices in buffer */ - int discard; /* Client finished with buffer? */ -} drm_r128_vertex_t; - -typedef struct drm_r128_indices { - int prim; - int idx; - int start; - int end; - int discard; /* Client finished with buffer? */ -} drm_r128_indices_t; - -typedef struct drm_r128_blit { - int idx; - int pitch; - int offset; - int format; - unsigned short x, y; - unsigned short width, height; -} drm_r128_blit_t; - -typedef struct drm_r128_depth { - enum { - R128_WRITE_SPAN = 0x01, - R128_WRITE_PIXELS = 0x02, - R128_READ_SPAN = 0x03, - R128_READ_PIXELS = 0x04 - } func; - int n; - int __user *x; - int __user *y; - unsigned int __user *buffer; - unsigned char __user *mask; -} drm_r128_depth_t; - -typedef struct drm_r128_stipple { - unsigned int __user *mask; -} drm_r128_stipple_t; - -typedef struct drm_r128_indirect { - int idx; - int start; - int end; - int discard; -} drm_r128_indirect_t; - -typedef struct drm_r128_fullscreen { - enum { - R128_INIT_FULLSCREEN = 0x01, - R128_CLEANUP_FULLSCREEN = 0x02 - } func; -} drm_r128_fullscreen_t; - -/* 2.3: An ioctl to get parameters that aren't available to the 3d - * client any other way. - */ -#define R128_PARAM_IRQ_NR 1 - -typedef struct drm_r128_getparam { - int param; - void __user *value; -} drm_r128_getparam_t; - -#endif diff --git a/shared/r128_drv.h b/shared/r128_drv.h deleted file mode 100644 index 5b91256c1..000000000 --- a/shared/r128_drv.h +++ /dev/null @@ -1,516 +0,0 @@ -/* r128_drv.h -- Private header for r128 driver -*- linux-c -*- - * Created: Mon Dec 13 09:51:11 1999 by faith@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Kevin E. Martin <martin@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * Michel Dänzer <daenzerm@student.ethz.ch> - */ - -#ifndef __R128_DRV_H__ -#define __R128_DRV_H__ - -#define GET_RING_HEAD(dev_priv) R128_READ( R128_PM4_BUFFER_DL_RPTR ) - -typedef struct drm_r128_freelist { - unsigned int age; - drm_buf_t *buf; - struct drm_r128_freelist *next; - struct drm_r128_freelist *prev; -} drm_r128_freelist_t; - -typedef struct drm_r128_ring_buffer { - u32 *start; - u32 *end; - int size; - int size_l2qw; - - u32 tail; - u32 tail_mask; - int space; - - int high_mark; -} drm_r128_ring_buffer_t; - -typedef struct drm_r128_private { - drm_r128_ring_buffer_t ring; - drm_r128_sarea_t *sarea_priv; - - int cce_mode; - int cce_fifo_size; - int cce_running; - - drm_r128_freelist_t *head; - drm_r128_freelist_t *tail; - - int usec_timeout; - int is_pci; - unsigned long phys_pci_gart; - dma_addr_t bus_pci_gart; - unsigned long cce_buffers_offset; - - atomic_t idle_count; - - int page_flipping; - int current_page; - u32 crtc_offset; - u32 crtc_offset_cntl; - - u32 color_fmt; - unsigned int front_offset; - unsigned int front_pitch; - unsigned int back_offset; - unsigned int back_pitch; - - u32 depth_fmt; - unsigned int depth_offset; - unsigned int depth_pitch; - unsigned int span_offset; - - u32 front_pitch_offset_c; - u32 back_pitch_offset_c; - u32 depth_pitch_offset_c; - u32 span_pitch_offset_c; - - drm_local_map_t *sarea; - drm_local_map_t *mmio; - drm_local_map_t *cce_ring; - drm_local_map_t *ring_rptr; - drm_local_map_t *agp_textures; -} drm_r128_private_t; - -typedef struct drm_r128_buf_priv { - u32 age; - int prim; - int discard; - int dispatched; - drm_r128_freelist_t *list_entry; -} drm_r128_buf_priv_t; - - /* r128_cce.c */ -extern int r128_cce_init( DRM_IOCTL_ARGS ); -extern int r128_cce_start( DRM_IOCTL_ARGS ); -extern int r128_cce_stop( DRM_IOCTL_ARGS ); -extern int r128_cce_reset( DRM_IOCTL_ARGS ); -extern int r128_cce_idle( DRM_IOCTL_ARGS ); -extern int r128_engine_reset( DRM_IOCTL_ARGS ); -extern int r128_fullscreen( DRM_IOCTL_ARGS ); -extern int r128_cce_buffers( DRM_IOCTL_ARGS ); -extern int r128_getparam( DRM_IOCTL_ARGS ); - -extern void r128_freelist_reset( drm_device_t *dev ); -extern drm_buf_t *r128_freelist_get( drm_device_t *dev ); - -extern int r128_wait_ring( drm_r128_private_t *dev_priv, int n ); - -extern int r128_do_cce_idle( drm_r128_private_t *dev_priv ); -extern int r128_do_cleanup_cce( drm_device_t *dev ); -extern int r128_do_cleanup_pageflip( drm_device_t *dev ); - - /* r128_state.c */ -extern int r128_cce_clear( DRM_IOCTL_ARGS ); -extern int r128_cce_swap( DRM_IOCTL_ARGS ); -extern int r128_cce_flip( DRM_IOCTL_ARGS ); -extern int r128_cce_vertex( DRM_IOCTL_ARGS ); -extern int r128_cce_indices( DRM_IOCTL_ARGS ); -extern int r128_cce_blit( DRM_IOCTL_ARGS ); -extern int r128_cce_depth( DRM_IOCTL_ARGS ); -extern int r128_cce_stipple( DRM_IOCTL_ARGS ); -extern int r128_cce_indirect( DRM_IOCTL_ARGS ); - -extern int r128_driver_vblank_wait(drm_device_t *dev, unsigned int *sequence); - -extern irqreturn_t r128_driver_irq_handler( DRM_IRQ_ARGS ); -extern void r128_driver_irq_preinstall( drm_device_t *dev ); -extern void r128_driver_irq_postinstall( drm_device_t *dev ); -extern void r128_driver_irq_uninstall( drm_device_t *dev ); - -/* Register definitions, register access macros and drmAddMap constants - * for Rage 128 kernel driver. - */ - -#define R128_AUX_SC_CNTL 0x1660 -# define R128_AUX1_SC_EN (1 << 0) -# define R128_AUX1_SC_MODE_OR (0 << 1) -# define R128_AUX1_SC_MODE_NAND (1 << 1) -# define R128_AUX2_SC_EN (1 << 2) -# define R128_AUX2_SC_MODE_OR (0 << 3) -# define R128_AUX2_SC_MODE_NAND (1 << 3) -# define R128_AUX3_SC_EN (1 << 4) -# define R128_AUX3_SC_MODE_OR (0 << 5) -# define R128_AUX3_SC_MODE_NAND (1 << 5) -#define R128_AUX1_SC_LEFT 0x1664 -#define R128_AUX1_SC_RIGHT 0x1668 -#define R128_AUX1_SC_TOP 0x166c -#define R128_AUX1_SC_BOTTOM 0x1670 -#define R128_AUX2_SC_LEFT 0x1674 -#define R128_AUX2_SC_RIGHT 0x1678 -#define R128_AUX2_SC_TOP 0x167c -#define R128_AUX2_SC_BOTTOM 0x1680 -#define R128_AUX3_SC_LEFT 0x1684 -#define R128_AUX3_SC_RIGHT 0x1688 -#define R128_AUX3_SC_TOP 0x168c -#define R128_AUX3_SC_BOTTOM 0x1690 - -#define R128_BRUSH_DATA0 0x1480 -#define R128_BUS_CNTL 0x0030 -# define R128_BUS_MASTER_DIS (1 << 6) - -#define R128_CLOCK_CNTL_INDEX 0x0008 -#define R128_CLOCK_CNTL_DATA 0x000c -# define R128_PLL_WR_EN (1 << 7) -#define R128_CONSTANT_COLOR_C 0x1d34 -#define R128_CRTC_OFFSET 0x0224 -#define R128_CRTC_OFFSET_CNTL 0x0228 -# define R128_CRTC_OFFSET_FLIP_CNTL (1 << 16) - -#define R128_DP_GUI_MASTER_CNTL 0x146c -# define R128_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0) -# define R128_GMC_DST_PITCH_OFFSET_CNTL (1 << 1) -# define R128_GMC_BRUSH_SOLID_COLOR (13 << 4) -# define R128_GMC_BRUSH_NONE (15 << 4) -# define R128_GMC_DST_16BPP (4 << 8) -# define R128_GMC_DST_24BPP (5 << 8) -# define R128_GMC_DST_32BPP (6 << 8) -# define R128_GMC_DST_DATATYPE_SHIFT 8 -# define R128_GMC_SRC_DATATYPE_COLOR (3 << 12) -# define R128_DP_SRC_SOURCE_MEMORY (2 << 24) -# define R128_DP_SRC_SOURCE_HOST_DATA (3 << 24) -# define R128_GMC_CLR_CMP_CNTL_DIS (1 << 28) -# define R128_GMC_AUX_CLIP_DIS (1 << 29) -# define R128_GMC_WR_MSK_DIS (1 << 30) -# define R128_ROP3_S 0x00cc0000 -# define R128_ROP3_P 0x00f00000 -#define R128_DP_WRITE_MASK 0x16cc -#define R128_DST_PITCH_OFFSET_C 0x1c80 -# define R128_DST_TILE (1 << 31) - -#define R128_GEN_INT_CNTL 0x0040 -# define R128_CRTC_VBLANK_INT_EN (1 << 0) -#define R128_GEN_INT_STATUS 0x0044 -# define R128_CRTC_VBLANK_INT (1 << 0) -# define R128_CRTC_VBLANK_INT_AK (1 << 0) -#define R128_GEN_RESET_CNTL 0x00f0 -# define R128_SOFT_RESET_GUI (1 << 0) - -#define R128_GUI_SCRATCH_REG0 0x15e0 -#define R128_GUI_SCRATCH_REG1 0x15e4 -#define R128_GUI_SCRATCH_REG2 0x15e8 -#define R128_GUI_SCRATCH_REG3 0x15ec -#define R128_GUI_SCRATCH_REG4 0x15f0 -#define R128_GUI_SCRATCH_REG5 0x15f4 - -#define R128_GUI_STAT 0x1740 -# define R128_GUI_FIFOCNT_MASK 0x0fff -# define R128_GUI_ACTIVE (1 << 31) - -#define R128_MCLK_CNTL 0x000f -# define R128_FORCE_GCP (1 << 16) -# define R128_FORCE_PIPE3D_CP (1 << 17) -# define R128_FORCE_RCP (1 << 18) - -#define R128_PC_GUI_CTLSTAT 0x1748 -#define R128_PC_NGUI_CTLSTAT 0x0184 -# define R128_PC_FLUSH_GUI (3 << 0) -# define R128_PC_RI_GUI (1 << 2) -# define R128_PC_FLUSH_ALL 0x00ff -# define R128_PC_BUSY (1 << 31) - -#define R128_PCI_GART_PAGE 0x017c -#define R128_PRIM_TEX_CNTL_C 0x1cb0 - -#define R128_SCALE_3D_CNTL 0x1a00 -#define R128_SEC_TEX_CNTL_C 0x1d00 -#define R128_SEC_TEXTURE_BORDER_COLOR_C 0x1d3c -#define R128_SETUP_CNTL 0x1bc4 -#define R128_STEN_REF_MASK_C 0x1d40 - -#define R128_TEX_CNTL_C 0x1c9c -# define R128_TEX_CACHE_FLUSH (1 << 23) - -#define R128_WAIT_UNTIL 0x1720 -# define R128_EVENT_CRTC_OFFSET (1 << 0) -#define R128_WINDOW_XY_OFFSET 0x1bcc - - -/* CCE registers - */ -#define R128_PM4_BUFFER_OFFSET 0x0700 -#define R128_PM4_BUFFER_CNTL 0x0704 -# define R128_PM4_MASK (15 << 28) -# define R128_PM4_NONPM4 (0 << 28) -# define R128_PM4_192PIO (1 << 28) -# define R128_PM4_192BM (2 << 28) -# define R128_PM4_128PIO_64INDBM (3 << 28) -# define R128_PM4_128BM_64INDBM (4 << 28) -# define R128_PM4_64PIO_128INDBM (5 << 28) -# define R128_PM4_64BM_128INDBM (6 << 28) -# define R128_PM4_64PIO_64VCBM_64INDBM (7 << 28) -# define R128_PM4_64BM_64VCBM_64INDBM (8 << 28) -# define R128_PM4_64PIO_64VCPIO_64INDPIO (15 << 28) -# define R128_PM4_BUFFER_CNTL_NOUPDATE (1 << 27) - -#define R128_PM4_BUFFER_WM_CNTL 0x0708 -# define R128_WMA_SHIFT 0 -# define R128_WMB_SHIFT 8 -# define R128_WMC_SHIFT 16 -# define R128_WB_WM_SHIFT 24 - -#define R128_PM4_BUFFER_DL_RPTR_ADDR 0x070c -#define R128_PM4_BUFFER_DL_RPTR 0x0710 -#define R128_PM4_BUFFER_DL_WPTR 0x0714 -# define R128_PM4_BUFFER_DL_DONE (1 << 31) - -#define R128_PM4_VC_FPU_SETUP 0x071c - -#define R128_PM4_IW_INDOFF 0x0738 -#define R128_PM4_IW_INDSIZE 0x073c - -#define R128_PM4_STAT 0x07b8 -# define R128_PM4_FIFOCNT_MASK 0x0fff -# define R128_PM4_BUSY (1 << 16) -# define R128_PM4_GUI_ACTIVE (1 << 31) - -#define R128_PM4_MICROCODE_ADDR 0x07d4 -#define R128_PM4_MICROCODE_RADDR 0x07d8 -#define R128_PM4_MICROCODE_DATAH 0x07dc -#define R128_PM4_MICROCODE_DATAL 0x07e0 - -#define R128_PM4_BUFFER_ADDR 0x07f0 -#define R128_PM4_MICRO_CNTL 0x07fc -# define R128_PM4_MICRO_FREERUN (1 << 30) - -#define R128_PM4_FIFO_DATA_EVEN 0x1000 -#define R128_PM4_FIFO_DATA_ODD 0x1004 - - -/* CCE command packets - */ -#define R128_CCE_PACKET0 0x00000000 -#define R128_CCE_PACKET1 0x40000000 -#define R128_CCE_PACKET2 0x80000000 -#define R128_CCE_PACKET3 0xC0000000 -# define R128_CNTL_HOSTDATA_BLT 0x00009400 -# define R128_CNTL_PAINT_MULTI 0x00009A00 -# define R128_CNTL_BITBLT_MULTI 0x00009B00 -# define R128_3D_RNDR_GEN_INDX_PRIM 0x00002300 - -#define R128_CCE_PACKET_MASK 0xC0000000 -#define R128_CCE_PACKET_COUNT_MASK 0x3fff0000 -#define R128_CCE_PACKET0_REG_MASK 0x000007ff -#define R128_CCE_PACKET1_REG0_MASK 0x000007ff -#define R128_CCE_PACKET1_REG1_MASK 0x003ff800 - -#define R128_CCE_VC_CNTL_PRIM_TYPE_NONE 0x00000000 -#define R128_CCE_VC_CNTL_PRIM_TYPE_POINT 0x00000001 -#define R128_CCE_VC_CNTL_PRIM_TYPE_LINE 0x00000002 -#define R128_CCE_VC_CNTL_PRIM_TYPE_POLY_LINE 0x00000003 -#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST 0x00000004 -#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_FAN 0x00000005 -#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_STRIP 0x00000006 -#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 0x00000007 -#define R128_CCE_VC_CNTL_PRIM_WALK_IND 0x00000010 -#define R128_CCE_VC_CNTL_PRIM_WALK_LIST 0x00000020 -#define R128_CCE_VC_CNTL_PRIM_WALK_RING 0x00000030 -#define R128_CCE_VC_CNTL_NUM_SHIFT 16 - -#define R128_DATATYPE_VQ 0 -#define R128_DATATYPE_CI4 1 -#define R128_DATATYPE_CI8 2 -#define R128_DATATYPE_ARGB1555 3 -#define R128_DATATYPE_RGB565 4 -#define R128_DATATYPE_RGB888 5 -#define R128_DATATYPE_ARGB8888 6 -#define R128_DATATYPE_RGB332 7 -#define R128_DATATYPE_Y8 8 -#define R128_DATATYPE_RGB8 9 -#define R128_DATATYPE_CI16 10 -#define R128_DATATYPE_YVYU422 11 -#define R128_DATATYPE_VYUY422 12 -#define R128_DATATYPE_AYUV444 14 -#define R128_DATATYPE_ARGB4444 15 - -/* Constants */ -#define R128_AGP_OFFSET 0x02000000 - -#define R128_WATERMARK_L 16 -#define R128_WATERMARK_M 8 -#define R128_WATERMARK_N 8 -#define R128_WATERMARK_K 128 - -#define R128_MAX_USEC_TIMEOUT 100000 /* 100 ms */ - -#define R128_LAST_FRAME_REG R128_GUI_SCRATCH_REG0 -#define R128_LAST_DISPATCH_REG R128_GUI_SCRATCH_REG1 -#define R128_MAX_VB_AGE 0x7fffffff -#define R128_MAX_VB_VERTS (0xffff) - -#define R128_RING_HIGH_MARK 128 - -#define R128_PERFORMANCE_BOXES 0 - -#define R128_READ(reg) DRM_READ32( dev_priv->mmio, (reg) ) -#define R128_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) ) -#define R128_READ8(reg) DRM_READ8( dev_priv->mmio, (reg) ) -#define R128_WRITE8(reg,val) DRM_WRITE8( dev_priv->mmio, (reg), (val) ) - -#define R128_WRITE_PLL(addr,val) \ -do { \ - R128_WRITE8(R128_CLOCK_CNTL_INDEX, \ - ((addr) & 0x1f) | R128_PLL_WR_EN); \ - R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \ -} while (0) - -extern int R128_READ_PLL(drm_device_t *dev, int addr); - - -#define CCE_PACKET0( reg, n ) (R128_CCE_PACKET0 | \ - ((n) << 16) | ((reg) >> 2)) -#define CCE_PACKET1( reg0, reg1 ) (R128_CCE_PACKET1 | \ - (((reg1) >> 2) << 11) | ((reg0) >> 2)) -#define CCE_PACKET2() (R128_CCE_PACKET2) -#define CCE_PACKET3( pkt, n ) (R128_CCE_PACKET3 | \ - (pkt) | ((n) << 16)) - - -static __inline__ void -r128_update_ring_snapshot( drm_r128_private_t *dev_priv ) -{ - drm_r128_ring_buffer_t *ring = &dev_priv->ring; - ring->space = (GET_RING_HEAD( dev_priv ) - ring->tail) * sizeof(u32); - if ( ring->space <= 0 ) - ring->space += ring->size; -} - -/* ================================================================ - * Misc helper macros - */ - -#define RING_SPACE_TEST_WITH_RETURN( dev_priv ) \ -do { \ - drm_r128_ring_buffer_t *ring = &dev_priv->ring; int i; \ - if ( ring->space < ring->high_mark ) { \ - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { \ - r128_update_ring_snapshot( dev_priv ); \ - if ( ring->space >= ring->high_mark ) \ - goto __ring_space_done; \ - DRM_UDELAY(1); \ - } \ - DRM_ERROR( "ring space check failed!\n" ); \ - return DRM_ERR(EBUSY); \ - } \ - __ring_space_done: \ - ; \ -} while (0) - -#define VB_AGE_TEST_WITH_RETURN( dev_priv ) \ -do { \ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; \ - if ( sarea_priv->last_dispatch >= R128_MAX_VB_AGE ) { \ - int __ret = r128_do_cce_idle( dev_priv ); \ - if ( __ret ) return __ret; \ - sarea_priv->last_dispatch = 0; \ - r128_freelist_reset( dev ); \ - } \ -} while (0) - -#define R128_WAIT_UNTIL_PAGE_FLIPPED() do { \ - OUT_RING( CCE_PACKET0( R128_WAIT_UNTIL, 0 ) ); \ - OUT_RING( R128_EVENT_CRTC_OFFSET ); \ -} while (0) - - -/* ================================================================ - * Ring control - */ - -#define R128_VERBOSE 0 - -#define RING_LOCALS \ - int write, _nr; unsigned int tail_mask; volatile u32 *ring; - -#define BEGIN_RING( n ) do { \ - if ( R128_VERBOSE ) { \ - DRM_INFO( "BEGIN_RING( %d ) in %s\n", \ - (n), __FUNCTION__ ); \ - } \ - if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \ - COMMIT_RING(); \ - r128_wait_ring( dev_priv, (n) * sizeof(u32) ); \ - } \ - _nr = n; dev_priv->ring.space -= (n) * sizeof(u32); \ - ring = dev_priv->ring.start; \ - write = dev_priv->ring.tail; \ - tail_mask = dev_priv->ring.tail_mask; \ -} while (0) - -/* You can set this to zero if you want. If the card locks up, you'll - * need to keep this set. It works around a bug in early revs of the - * Rage 128 chipset, where the CCE would read 32 dwords past the end of - * the ring buffer before wrapping around. - */ -#define R128_BROKEN_CCE 1 - -#define ADVANCE_RING() do { \ - if ( R128_VERBOSE ) { \ - DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \ - write, dev_priv->ring.tail ); \ - } \ - if ( R128_BROKEN_CCE && write < 32 ) { \ - memcpy( dev_priv->ring.end, \ - dev_priv->ring.start, \ - write * sizeof(u32) ); \ - } \ - if (((dev_priv->ring.tail + _nr) & tail_mask) != write) { \ - DRM_ERROR( \ - "ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n", \ - ((dev_priv->ring.tail + _nr) & tail_mask), \ - write, __LINE__); \ - } else \ - dev_priv->ring.tail = write; \ -} while (0) - -#define COMMIT_RING() do { \ - if ( R128_VERBOSE ) { \ - DRM_INFO( "COMMIT_RING() tail=0x%06x\n", \ - dev_priv->ring.tail ); \ - } \ - DRM_MEMORYBARRIER(); \ - R128_WRITE( R128_PM4_BUFFER_DL_WPTR, dev_priv->ring.tail ); \ - R128_READ( R128_PM4_BUFFER_DL_WPTR ); \ -} while (0) - -#define OUT_RING( x ) do { \ - if ( R128_VERBOSE ) { \ - DRM_INFO( " OUT_RING( 0x%08x ) at 0x%x\n", \ - (unsigned int)(x), write ); \ - } \ - ring[write++] = cpu_to_le32( x ); \ - write &= tail_mask; \ -} while (0) - -#endif /* __R128_DRV_H__ */ diff --git a/shared/r128_irq.c b/shared/r128_irq.c deleted file mode 100644 index be1b9dac6..000000000 --- a/shared/r128_irq.c +++ /dev/null @@ -1,103 +0,0 @@ -/* r128_irq.c -- IRQ handling for radeon -*- linux-c -*- - * - * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. - * - * The Weather Channel (TM) funded Tungsten Graphics to develop the - * initial release of the Radeon 8500 driver under the XFree86 license. - * This notice must be preserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - * Eric Anholt <anholt@FreeBSD.org> - */ - -#include "r128.h" -#include "drmP.h" -#include "drm.h" -#include "r128_drm.h" -#include "r128_drv.h" - -irqreturn_t r128_driver_irq_handler( DRM_IRQ_ARGS ) -{ - drm_device_t *dev = (drm_device_t *) arg; - drm_r128_private_t *dev_priv = - (drm_r128_private_t *)dev->dev_private; - int status; - - status = R128_READ( R128_GEN_INT_STATUS ); - - /* VBLANK interrupt */ - if ( status & R128_CRTC_VBLANK_INT ) { - R128_WRITE( R128_GEN_INT_STATUS, R128_CRTC_VBLANK_INT_AK ); - atomic_inc(&dev->vbl_received); - DRM_WAKEUP(&dev->vbl_queue); - DRM(vbl_send_signals)( dev ); - return IRQ_HANDLED; - } - return IRQ_NONE; -} - -int r128_driver_vblank_wait(drm_device_t *dev, unsigned int *sequence) -{ - unsigned int cur_vblank; - int ret = 0; - - /* Assume that the user has missed the current sequence number - * by about a day rather than she wants to wait for years - * using vertical blanks... - */ - DRM_WAIT_ON( ret, dev->vbl_queue, 3*DRM_HZ, - ( ( ( cur_vblank = atomic_read(&dev->vbl_received ) ) - - *sequence ) <= (1<<23) ) ); - - *sequence = cur_vblank; - - return ret; -} - -void r128_driver_irq_preinstall( drm_device_t *dev ) { - drm_r128_private_t *dev_priv = - (drm_r128_private_t *)dev->dev_private; - - /* Disable *all* interrupts */ - R128_WRITE( R128_GEN_INT_CNTL, 0 ); - /* Clear vblank bit if it's already high */ - R128_WRITE( R128_GEN_INT_STATUS, R128_CRTC_VBLANK_INT_AK ); -} - -void r128_driver_irq_postinstall( drm_device_t *dev ) { - drm_r128_private_t *dev_priv = - (drm_r128_private_t *)dev->dev_private; - - /* Turn on VBL interrupt */ - R128_WRITE( R128_GEN_INT_CNTL, R128_CRTC_VBLANK_INT_EN ); -} - -void r128_driver_irq_uninstall( drm_device_t *dev ) { - drm_r128_private_t *dev_priv = - (drm_r128_private_t *)dev->dev_private; - if (!dev_priv) - return; - - /* Disable *all* interrupts */ - R128_WRITE( R128_GEN_INT_CNTL, 0 ); -} diff --git a/shared/r128_state.c b/shared/r128_state.c deleted file mode 100644 index 5b8af9f99..000000000 --- a/shared/r128_state.c +++ /dev/null @@ -1,1724 +0,0 @@ -/* r128_state.c -- State support for r128 -*- linux-c -*- - * Created: Thu Jan 27 02:53:43 2000 by gareth@valinux.com - * - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - -#include "r128.h" -#include "drmP.h" -#include "drm.h" -#include "r128_drm.h" -#include "r128_drv.h" - - -/* ================================================================ - * CCE hardware state programming functions - */ - -static void r128_emit_clip_rects( drm_r128_private_t *dev_priv, - drm_clip_rect_t *boxes, int count ) -{ - u32 aux_sc_cntl = 0x00000000; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( (count < 3? count: 3) * 5 + 2 ); - - if ( count >= 1 ) { - OUT_RING( CCE_PACKET0( R128_AUX1_SC_LEFT, 3 ) ); - OUT_RING( boxes[0].x1 ); - OUT_RING( boxes[0].x2 - 1 ); - OUT_RING( boxes[0].y1 ); - OUT_RING( boxes[0].y2 - 1 ); - - aux_sc_cntl |= (R128_AUX1_SC_EN | R128_AUX1_SC_MODE_OR); - } - if ( count >= 2 ) { - OUT_RING( CCE_PACKET0( R128_AUX2_SC_LEFT, 3 ) ); - OUT_RING( boxes[1].x1 ); - OUT_RING( boxes[1].x2 - 1 ); - OUT_RING( boxes[1].y1 ); - OUT_RING( boxes[1].y2 - 1 ); - - aux_sc_cntl |= (R128_AUX2_SC_EN | R128_AUX2_SC_MODE_OR); - } - if ( count >= 3 ) { - OUT_RING( CCE_PACKET0( R128_AUX3_SC_LEFT, 3 ) ); - OUT_RING( boxes[2].x1 ); - OUT_RING( boxes[2].x2 - 1 ); - OUT_RING( boxes[2].y1 ); - OUT_RING( boxes[2].y2 - 1 ); - - aux_sc_cntl |= (R128_AUX3_SC_EN | R128_AUX3_SC_MODE_OR); - } - - OUT_RING( CCE_PACKET0( R128_AUX_SC_CNTL, 0 ) ); - OUT_RING( aux_sc_cntl ); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_core( drm_r128_private_t *dev_priv ) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_SCALE_3D_CNTL, 0 ) ); - OUT_RING( ctx->scale_3d_cntl ); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_context( drm_r128_private_t *dev_priv ) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 13 ); - - OUT_RING( CCE_PACKET0( R128_DST_PITCH_OFFSET_C, 11 ) ); - OUT_RING( ctx->dst_pitch_offset_c ); - OUT_RING( ctx->dp_gui_master_cntl_c ); - OUT_RING( ctx->sc_top_left_c ); - OUT_RING( ctx->sc_bottom_right_c ); - OUT_RING( ctx->z_offset_c ); - OUT_RING( ctx->z_pitch_c ); - OUT_RING( ctx->z_sten_cntl_c ); - OUT_RING( ctx->tex_cntl_c ); - OUT_RING( ctx->misc_3d_state_cntl_reg ); - OUT_RING( ctx->texture_clr_cmp_clr_c ); - OUT_RING( ctx->texture_clr_cmp_msk_c ); - OUT_RING( ctx->fog_color_c ); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_setup( drm_r128_private_t *dev_priv ) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 3 ); - - OUT_RING( CCE_PACKET1( R128_SETUP_CNTL, R128_PM4_VC_FPU_SETUP ) ); - OUT_RING( ctx->setup_cntl ); - OUT_RING( ctx->pm4_vc_fpu_setup ); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_masks( drm_r128_private_t *dev_priv ) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 5 ); - - OUT_RING( CCE_PACKET0( R128_DP_WRITE_MASK, 0 ) ); - OUT_RING( ctx->dp_write_mask ); - - OUT_RING( CCE_PACKET0( R128_STEN_REF_MASK_C, 1 ) ); - OUT_RING( ctx->sten_ref_mask_c ); - OUT_RING( ctx->plane_3d_mask_c ); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_window( drm_r128_private_t *dev_priv ) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_WINDOW_XY_OFFSET, 0 ) ); - OUT_RING( ctx->window_xy_offset ); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_tex0( drm_r128_private_t *dev_priv ) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_context_regs_t *ctx = &sarea_priv->context_state; - drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[0]; - int i; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 7 + R128_MAX_TEXTURE_LEVELS ); - - OUT_RING( CCE_PACKET0( R128_PRIM_TEX_CNTL_C, - 2 + R128_MAX_TEXTURE_LEVELS ) ); - OUT_RING( tex->tex_cntl ); - OUT_RING( tex->tex_combine_cntl ); - OUT_RING( ctx->tex_size_pitch_c ); - for ( i = 0 ; i < R128_MAX_TEXTURE_LEVELS ; i++ ) { - OUT_RING( tex->tex_offset[i] ); - } - - OUT_RING( CCE_PACKET0( R128_CONSTANT_COLOR_C, 1 ) ); - OUT_RING( ctx->constant_color_c ); - OUT_RING( tex->tex_border_color ); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_tex1( drm_r128_private_t *dev_priv ) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[1]; - int i; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 5 + R128_MAX_TEXTURE_LEVELS ); - - OUT_RING( CCE_PACKET0( R128_SEC_TEX_CNTL_C, - 1 + R128_MAX_TEXTURE_LEVELS ) ); - OUT_RING( tex->tex_cntl ); - OUT_RING( tex->tex_combine_cntl ); - for ( i = 0 ; i < R128_MAX_TEXTURE_LEVELS ; i++ ) { - OUT_RING( tex->tex_offset[i] ); - } - - OUT_RING( CCE_PACKET0( R128_SEC_TEXTURE_BORDER_COLOR_C, 0 ) ); - OUT_RING( tex->tex_border_color ); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_state( drm_r128_private_t *dev_priv ) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int dirty = sarea_priv->dirty; - - DRM_DEBUG( "%s: dirty=0x%08x\n", __FUNCTION__, dirty ); - - if ( dirty & R128_UPLOAD_CORE ) { - r128_emit_core( dev_priv ); - sarea_priv->dirty &= ~R128_UPLOAD_CORE; - } - - if ( dirty & R128_UPLOAD_CONTEXT ) { - r128_emit_context( dev_priv ); - sarea_priv->dirty &= ~R128_UPLOAD_CONTEXT; - } - - if ( dirty & R128_UPLOAD_SETUP ) { - r128_emit_setup( dev_priv ); - sarea_priv->dirty &= ~R128_UPLOAD_SETUP; - } - - if ( dirty & R128_UPLOAD_MASKS ) { - r128_emit_masks( dev_priv ); - sarea_priv->dirty &= ~R128_UPLOAD_MASKS; - } - - if ( dirty & R128_UPLOAD_WINDOW ) { - r128_emit_window( dev_priv ); - sarea_priv->dirty &= ~R128_UPLOAD_WINDOW; - } - - if ( dirty & R128_UPLOAD_TEX0 ) { - r128_emit_tex0( dev_priv ); - sarea_priv->dirty &= ~R128_UPLOAD_TEX0; - } - - if ( dirty & R128_UPLOAD_TEX1 ) { - r128_emit_tex1( dev_priv ); - sarea_priv->dirty &= ~R128_UPLOAD_TEX1; - } - - /* Turn off the texture cache flushing */ - sarea_priv->context_state.tex_cntl_c &= ~R128_TEX_CACHE_FLUSH; - - sarea_priv->dirty &= ~R128_REQUIRE_QUIESCENCE; -} - - -#if R128_PERFORMANCE_BOXES -/* ================================================================ - * Performance monitoring functions - */ - -static void r128_clear_box( drm_r128_private_t *dev_priv, - int x, int y, int w, int h, - int r, int g, int b ) -{ - u32 pitch, offset; - u32 fb_bpp, color; - RING_LOCALS; - - switch ( dev_priv->fb_bpp ) { - case 16: - fb_bpp = R128_GMC_DST_16BPP; - color = (((r & 0xf8) << 8) | - ((g & 0xfc) << 3) | - ((b & 0xf8) >> 3)); - break; - case 24: - fb_bpp = R128_GMC_DST_24BPP; - color = ((r << 16) | (g << 8) | b); - break; - case 32: - fb_bpp = R128_GMC_DST_32BPP; - color = (((0xff) << 24) | (r << 16) | (g << 8) | b); - break; - default: - return; - } - - offset = dev_priv->back_offset; - pitch = dev_priv->back_pitch >> 3; - - BEGIN_RING( 6 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - fb_bpp | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_AUX_CLIP_DIS ); - - OUT_RING( (pitch << 21) | (offset >> 5) ); - OUT_RING( color ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); - - ADVANCE_RING(); -} - -static void r128_cce_performance_boxes( drm_r128_private_t *dev_priv ) -{ - if ( atomic_read( &dev_priv->idle_count ) == 0 ) { - r128_clear_box( dev_priv, 64, 4, 8, 8, 0, 255, 0 ); - } else { - atomic_set( &dev_priv->idle_count, 0 ); - } -} - -#endif - - -/* ================================================================ - * CCE command dispatch functions - */ - -static void r128_print_dirty( const char *msg, unsigned int flags ) -{ - DRM_INFO( "%s: (0x%x) %s%s%s%s%s%s%s%s%s\n", - msg, - flags, - (flags & R128_UPLOAD_CORE) ? "core, " : "", - (flags & R128_UPLOAD_CONTEXT) ? "context, " : "", - (flags & R128_UPLOAD_SETUP) ? "setup, " : "", - (flags & R128_UPLOAD_TEX0) ? "tex0, " : "", - (flags & R128_UPLOAD_TEX1) ? "tex1, " : "", - (flags & R128_UPLOAD_MASKS) ? "masks, " : "", - (flags & R128_UPLOAD_WINDOW) ? "window, " : "", - (flags & R128_UPLOAD_CLIPRECTS) ? "cliprects, " : "", - (flags & R128_REQUIRE_QUIESCENCE) ? "quiescence, " : "" ); -} - -static void r128_cce_dispatch_clear( drm_device_t *dev, - drm_r128_clear_t *clear ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - int nbox = sarea_priv->nbox; - drm_clip_rect_t *pbox = sarea_priv->boxes; - unsigned int flags = clear->flags; - int i; - RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) { - unsigned int tmp = flags; - - flags &= ~(R128_FRONT | R128_BACK); - if ( tmp & R128_FRONT ) flags |= R128_BACK; - if ( tmp & R128_BACK ) flags |= R128_FRONT; - } - - for ( i = 0 ; i < nbox ; i++ ) { - int x = pbox[i].x1; - int y = pbox[i].y1; - int w = pbox[i].x2 - x; - int h = pbox[i].y2 - y; - - DRM_DEBUG( "dispatch clear %d,%d-%d,%d flags 0x%x\n", - pbox[i].x1, pbox[i].y1, pbox[i].x2, - pbox[i].y2, flags ); - - if ( flags & (R128_FRONT | R128_BACK) ) { - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_DP_WRITE_MASK, 0 ) ); - OUT_RING( clear->color_mask ); - - ADVANCE_RING(); - } - - if ( flags & R128_FRONT ) { - BEGIN_RING( 6 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->color_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_AUX_CLIP_DIS ); - - OUT_RING( dev_priv->front_pitch_offset_c ); - OUT_RING( clear->clear_color ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); - - ADVANCE_RING(); - } - - if ( flags & R128_BACK ) { - BEGIN_RING( 6 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->color_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_AUX_CLIP_DIS ); - - OUT_RING( dev_priv->back_pitch_offset_c ); - OUT_RING( clear->clear_color ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); - - ADVANCE_RING(); - } - - if ( flags & R128_DEPTH ) { - BEGIN_RING( 6 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_AUX_CLIP_DIS | - R128_GMC_WR_MSK_DIS ); - - OUT_RING( dev_priv->depth_pitch_offset_c ); - OUT_RING( clear->clear_depth ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); - - ADVANCE_RING(); - } - } -} - -static void r128_cce_dispatch_swap( drm_device_t *dev ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - int nbox = sarea_priv->nbox; - drm_clip_rect_t *pbox = sarea_priv->boxes; - int i; - RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - -#if R128_PERFORMANCE_BOXES - /* Do some trivial performance monitoring... - */ - r128_cce_performance_boxes( dev_priv ); -#endif - - for ( i = 0 ; i < nbox ; i++ ) { - int x = pbox[i].x1; - int y = pbox[i].y1; - int w = pbox[i].x2 - x; - int h = pbox[i].y2 - y; - - BEGIN_RING( 7 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_BITBLT_MULTI, 5 ) ); - OUT_RING( R128_GMC_SRC_PITCH_OFFSET_CNTL | - R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_NONE | - (dev_priv->color_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_S | - R128_DP_SRC_SOURCE_MEMORY | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_AUX_CLIP_DIS | - R128_GMC_WR_MSK_DIS ); - - /* Make this work even if front & back are flipped: - */ - if (dev_priv->current_page == 0) { - OUT_RING( dev_priv->back_pitch_offset_c ); - OUT_RING( dev_priv->front_pitch_offset_c ); - } - else { - OUT_RING( dev_priv->front_pitch_offset_c ); - OUT_RING( dev_priv->back_pitch_offset_c ); - } - - OUT_RING( (x << 16) | y ); - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); - - ADVANCE_RING(); - } - - /* Increment the frame counter. The client-side 3D driver must - * throttle the framerate by waiting for this value before - * performing the swapbuffer ioctl. - */ - dev_priv->sarea_priv->last_frame++; - - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_LAST_FRAME_REG, 0 ) ); - OUT_RING( dev_priv->sarea_priv->last_frame ); - - ADVANCE_RING(); -} - -static void r128_cce_dispatch_flip( drm_device_t *dev ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n", - __FUNCTION__, - dev_priv->current_page, - dev_priv->sarea_priv->pfCurrentPage); - -#if R128_PERFORMANCE_BOXES - /* Do some trivial performance monitoring... - */ - r128_cce_performance_boxes( dev_priv ); -#endif - - BEGIN_RING( 4 ); - - R128_WAIT_UNTIL_PAGE_FLIPPED(); - OUT_RING( CCE_PACKET0( R128_CRTC_OFFSET, 0 ) ); - - if ( dev_priv->current_page == 0 ) { - OUT_RING( dev_priv->back_offset ); - } else { - OUT_RING( dev_priv->front_offset ); - } - - ADVANCE_RING(); - - /* Increment the frame counter. The client-side 3D driver must - * throttle the framerate by waiting for this value before - * performing the swapbuffer ioctl. - */ - dev_priv->sarea_priv->last_frame++; - dev_priv->sarea_priv->pfCurrentPage = dev_priv->current_page = - 1 - dev_priv->current_page; - - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_LAST_FRAME_REG, 0 ) ); - OUT_RING( dev_priv->sarea_priv->last_frame ); - - ADVANCE_RING(); -} - -static void r128_cce_dispatch_vertex( drm_device_t *dev, - drm_buf_t *buf ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_buf_priv_t *buf_priv = buf->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - int format = sarea_priv->vc_format; - int offset = buf->bus_address; - int size = buf->used; - int prim = buf_priv->prim; - int i = 0; - RING_LOCALS; - DRM_DEBUG( "buf=%d nbox=%d\n", buf->idx, sarea_priv->nbox ); - - if ( 0 ) - r128_print_dirty( "dispatch_vertex", sarea_priv->dirty ); - - if ( buf->used ) { - buf_priv->dispatched = 1; - - if ( sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS ) { - r128_emit_state( dev_priv ); - } - - do { - /* Emit the next set of up to three cliprects */ - if ( i < sarea_priv->nbox ) { - r128_emit_clip_rects( dev_priv, - &sarea_priv->boxes[i], - sarea_priv->nbox - i ); - } - - /* Emit the vertex buffer rendering commands */ - BEGIN_RING( 5 ); - - OUT_RING( CCE_PACKET3( R128_3D_RNDR_GEN_INDX_PRIM, 3 ) ); - OUT_RING( offset ); - OUT_RING( size ); - OUT_RING( format ); - OUT_RING( prim | R128_CCE_VC_CNTL_PRIM_WALK_LIST | - (size << R128_CCE_VC_CNTL_NUM_SHIFT) ); - - ADVANCE_RING(); - - i += 3; - } while ( i < sarea_priv->nbox ); - } - - if ( buf_priv->discard ) { - buf_priv->age = dev_priv->sarea_priv->last_dispatch; - - /* Emit the vertex buffer age */ - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_LAST_DISPATCH_REG, 0 ) ); - OUT_RING( buf_priv->age ); - - ADVANCE_RING(); - - buf->pending = 1; - buf->used = 0; - /* FIXME: Check dispatched field */ - buf_priv->dispatched = 0; - } - - dev_priv->sarea_priv->last_dispatch++; - - sarea_priv->dirty &= ~R128_UPLOAD_CLIPRECTS; - sarea_priv->nbox = 0; -} - -static void r128_cce_dispatch_indirect( drm_device_t *dev, - drm_buf_t *buf, - int start, int end ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_buf_priv_t *buf_priv = buf->dev_private; - RING_LOCALS; - DRM_DEBUG( "indirect: buf=%d s=0x%x e=0x%x\n", - buf->idx, start, end ); - - if ( start != end ) { - int offset = buf->bus_address + start; - int dwords = (end - start + 3) / sizeof(u32); - - /* Indirect buffer data must be an even number of - * dwords, so if we've been given an odd number we must - * pad the data with a Type-2 CCE packet. - */ - if ( dwords & 1 ) { - u32 *data = (u32 *) - ((char *)dev->agp_buffer_map->handle - + buf->offset + start); - data[dwords++] = cpu_to_le32( R128_CCE_PACKET2 ); - } - - buf_priv->dispatched = 1; - - /* Fire off the indirect buffer */ - BEGIN_RING( 3 ); - - OUT_RING( CCE_PACKET0( R128_PM4_IW_INDOFF, 1 ) ); - OUT_RING( offset ); - OUT_RING( dwords ); - - ADVANCE_RING(); - } - - if ( buf_priv->discard ) { - buf_priv->age = dev_priv->sarea_priv->last_dispatch; - - /* Emit the indirect buffer age */ - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_LAST_DISPATCH_REG, 0 ) ); - OUT_RING( buf_priv->age ); - - ADVANCE_RING(); - - buf->pending = 1; - buf->used = 0; - /* FIXME: Check dispatched field */ - buf_priv->dispatched = 0; - } - - dev_priv->sarea_priv->last_dispatch++; -} - -static void r128_cce_dispatch_indices( drm_device_t *dev, - drm_buf_t *buf, - int start, int end, - int count ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_buf_priv_t *buf_priv = buf->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - int format = sarea_priv->vc_format; - int offset = dev->agp_buffer_map->offset - dev_priv->cce_buffers_offset; - int prim = buf_priv->prim; - u32 *data; - int dwords; - int i = 0; - RING_LOCALS; - DRM_DEBUG( "indices: s=%d e=%d c=%d\n", start, end, count ); - - if ( 0 ) - r128_print_dirty( "dispatch_indices", sarea_priv->dirty ); - - if ( start != end ) { - buf_priv->dispatched = 1; - - if ( sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS ) { - r128_emit_state( dev_priv ); - } - - dwords = (end - start + 3) / sizeof(u32); - - data = (u32 *)((char *)dev->agp_buffer_map->handle - + buf->offset + start); - - data[0] = cpu_to_le32( CCE_PACKET3( R128_3D_RNDR_GEN_INDX_PRIM, - dwords-2 ) ); - - data[1] = cpu_to_le32( offset ); - data[2] = cpu_to_le32( R128_MAX_VB_VERTS ); - data[3] = cpu_to_le32( format ); - data[4] = cpu_to_le32( (prim | R128_CCE_VC_CNTL_PRIM_WALK_IND | - (count << 16)) ); - - if ( count & 0x1 ) { -#ifdef __LITTLE_ENDIAN - data[dwords-1] &= 0x0000ffff; -#else - data[dwords-1] &= 0xffff0000; -#endif - } - - do { - /* Emit the next set of up to three cliprects */ - if ( i < sarea_priv->nbox ) { - r128_emit_clip_rects( dev_priv, - &sarea_priv->boxes[i], - sarea_priv->nbox - i ); - } - - r128_cce_dispatch_indirect( dev, buf, start, end ); - - i += 3; - } while ( i < sarea_priv->nbox ); - } - - if ( buf_priv->discard ) { - buf_priv->age = dev_priv->sarea_priv->last_dispatch; - - /* Emit the vertex buffer age */ - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_LAST_DISPATCH_REG, 0 ) ); - OUT_RING( buf_priv->age ); - - ADVANCE_RING(); - - buf->pending = 1; - /* FIXME: Check dispatched field */ - buf_priv->dispatched = 0; - } - - dev_priv->sarea_priv->last_dispatch++; - - sarea_priv->dirty &= ~R128_UPLOAD_CLIPRECTS; - sarea_priv->nbox = 0; -} - -static int r128_cce_dispatch_blit( DRMFILE filp, - drm_device_t *dev, - drm_r128_blit_t *blit ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_r128_buf_priv_t *buf_priv; - u32 *data; - int dword_shift, dwords; - RING_LOCALS; - DRM_DEBUG( "\n" ); - - /* The compiler won't optimize away a division by a variable, - * even if the only legal values are powers of two. Thus, we'll - * use a shift instead. - */ - switch ( blit->format ) { - case R128_DATATYPE_ARGB8888: - dword_shift = 0; - break; - case R128_DATATYPE_ARGB1555: - case R128_DATATYPE_RGB565: - case R128_DATATYPE_ARGB4444: - case R128_DATATYPE_YVYU422: - case R128_DATATYPE_VYUY422: - dword_shift = 1; - break; - case R128_DATATYPE_CI8: - case R128_DATATYPE_RGB8: - dword_shift = 2; - break; - default: - DRM_ERROR( "invalid blit format %d\n", blit->format ); - return DRM_ERR(EINVAL); - } - - /* Flush the pixel cache, and mark the contents as Read Invalid. - * This ensures no pixel data gets mixed up with the texture - * data from the host data blit, otherwise part of the texture - * image may be corrupted. - */ - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_PC_GUI_CTLSTAT, 0 ) ); - OUT_RING( R128_PC_RI_GUI | R128_PC_FLUSH_GUI ); - - ADVANCE_RING(); - - /* Dispatch the indirect buffer. - */ - buf = dma->buflist[blit->idx]; - buf_priv = buf->dev_private; - - if ( buf->filp != filp ) { - DRM_ERROR( "process %d using buffer owned by %p\n", - DRM_CURRENTPID, buf->filp ); - return DRM_ERR(EINVAL); - } - if ( buf->pending ) { - DRM_ERROR( "sending pending buffer %d\n", blit->idx ); - return DRM_ERR(EINVAL); - } - - buf_priv->discard = 1; - - dwords = (blit->width * blit->height) >> dword_shift; - - data = (u32 *)((char *)dev->agp_buffer_map->handle + buf->offset); - - data[0] = cpu_to_le32( CCE_PACKET3( R128_CNTL_HOSTDATA_BLT, dwords + 6 ) ); - data[1] = cpu_to_le32( (R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_NONE | - (blit->format << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_S | - R128_DP_SRC_SOURCE_HOST_DATA | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_AUX_CLIP_DIS | - R128_GMC_WR_MSK_DIS) ); - - data[2] = cpu_to_le32( (blit->pitch << 21) | (blit->offset >> 5) ); - data[3] = cpu_to_le32( 0xffffffff ); - data[4] = cpu_to_le32( 0xffffffff ); - data[5] = cpu_to_le32( (blit->y << 16) | blit->x ); - data[6] = cpu_to_le32( (blit->height << 16) | blit->width ); - data[7] = cpu_to_le32( dwords ); - - buf->used = (dwords + 8) * sizeof(u32); - - r128_cce_dispatch_indirect( dev, buf, 0, buf->used ); - - /* Flush the pixel cache after the blit completes. This ensures - * the texture data is written out to memory before rendering - * continues. - */ - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_PC_GUI_CTLSTAT, 0 ) ); - OUT_RING( R128_PC_FLUSH_GUI ); - - ADVANCE_RING(); - - return 0; -} - - -/* ================================================================ - * Tiled depth buffer management - * - * FIXME: These should all set the destination write mask for when we - * have hardware stencil support. - */ - -static int r128_cce_dispatch_write_span( drm_device_t *dev, - drm_r128_depth_t *depth ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - int count, x, y; - u32 *buffer; - u8 *mask; - int i, buffer_size, mask_size; - RING_LOCALS; - DRM_DEBUG( "\n" ); - - count = depth->n; - if (count > 4096 || count <= 0) - return DRM_ERR(EMSGSIZE); - - if ( DRM_COPY_FROM_USER( &x, depth->x, sizeof(x) ) ) { - return DRM_ERR(EFAULT); - } - if ( DRM_COPY_FROM_USER( &y, depth->y, sizeof(y) ) ) { - return DRM_ERR(EFAULT); - } - - buffer_size = depth->n * sizeof(u32); - buffer = DRM(alloc)( buffer_size, DRM_MEM_BUFS ); - if ( buffer == NULL ) - return DRM_ERR(ENOMEM); - if ( DRM_COPY_FROM_USER( buffer, depth->buffer, buffer_size ) ) { - DRM(free)( buffer, buffer_size, DRM_MEM_BUFS); - return DRM_ERR(EFAULT); - } - - mask_size = depth->n * sizeof(u8); - if ( depth->mask ) { - mask = DRM(alloc)( mask_size, DRM_MEM_BUFS ); - if ( mask == NULL ) { - DRM(free)( buffer, buffer_size, DRM_MEM_BUFS ); - return DRM_ERR(ENOMEM); - } - if ( DRM_COPY_FROM_USER( mask, depth->mask, mask_size ) ) { - DRM(free)( buffer, buffer_size, DRM_MEM_BUFS ); - DRM(free)( mask, mask_size, DRM_MEM_BUFS ); - return DRM_ERR(EFAULT); - } - - for ( i = 0 ; i < count ; i++, x++ ) { - if ( mask[i] ) { - BEGIN_RING( 6 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_WR_MSK_DIS ); - - OUT_RING( dev_priv->depth_pitch_offset_c ); - OUT_RING( buffer[i] ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (1 << 16) | 1 ); - - ADVANCE_RING(); - } - } - - DRM(free)( mask, mask_size, DRM_MEM_BUFS ); - } else { - for ( i = 0 ; i < count ; i++, x++ ) { - BEGIN_RING( 6 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_WR_MSK_DIS ); - - OUT_RING( dev_priv->depth_pitch_offset_c ); - OUT_RING( buffer[i] ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (1 << 16) | 1 ); - - ADVANCE_RING(); - } - } - - DRM(free)( buffer, buffer_size, DRM_MEM_BUFS ); - - return 0; -} - -static int r128_cce_dispatch_write_pixels( drm_device_t *dev, - drm_r128_depth_t *depth ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - int count, *x, *y; - u32 *buffer; - u8 *mask; - int i, xbuf_size, ybuf_size, buffer_size, mask_size; - RING_LOCALS; - DRM_DEBUG( "\n" ); - - count = depth->n; - if (count > 4096 || count <= 0) - return DRM_ERR(EMSGSIZE); - - xbuf_size = count * sizeof(*x); - ybuf_size = count * sizeof(*y); - x = DRM(alloc)( xbuf_size, DRM_MEM_BUFS ); - if ( x == NULL ) { - return DRM_ERR(ENOMEM); - } - y = DRM(alloc)( ybuf_size, DRM_MEM_BUFS ); - if ( y == NULL ) { - DRM(free)( x, xbuf_size, DRM_MEM_BUFS ); - return DRM_ERR(ENOMEM); - } - if ( DRM_COPY_FROM_USER( x, depth->x, xbuf_size ) ) { - DRM(free)( x, xbuf_size, DRM_MEM_BUFS ); - DRM(free)( y, ybuf_size, DRM_MEM_BUFS ); - return DRM_ERR(EFAULT); - } - if ( DRM_COPY_FROM_USER( y, depth->y, xbuf_size ) ) { - DRM(free)( x, xbuf_size, DRM_MEM_BUFS ); - DRM(free)( y, ybuf_size, DRM_MEM_BUFS ); - return DRM_ERR(EFAULT); - } - - buffer_size = depth->n * sizeof(u32); - buffer = DRM(alloc)( buffer_size, DRM_MEM_BUFS ); - if ( buffer == NULL ) { - DRM(free)( x, xbuf_size, DRM_MEM_BUFS ); - DRM(free)( y, ybuf_size, DRM_MEM_BUFS ); - return DRM_ERR(ENOMEM); - } - if ( DRM_COPY_FROM_USER( buffer, depth->buffer, buffer_size ) ) { - DRM(free)( x, xbuf_size, DRM_MEM_BUFS ); - DRM(free)( y, ybuf_size, DRM_MEM_BUFS ); - DRM(free)( buffer, buffer_size, DRM_MEM_BUFS ); - return DRM_ERR(EFAULT); - } - - if ( depth->mask ) { - mask_size = depth->n * sizeof(u8); - mask = DRM(alloc)( mask_size, DRM_MEM_BUFS ); - if ( mask == NULL ) { - DRM(free)( x, xbuf_size, DRM_MEM_BUFS ); - DRM(free)( y, ybuf_size, DRM_MEM_BUFS ); - DRM(free)( buffer, buffer_size, DRM_MEM_BUFS ); - return DRM_ERR(ENOMEM); - } - if ( DRM_COPY_FROM_USER( mask, depth->mask, mask_size ) ) { - DRM(free)( x, xbuf_size, DRM_MEM_BUFS ); - DRM(free)( y, ybuf_size, DRM_MEM_BUFS ); - DRM(free)( buffer, buffer_size, DRM_MEM_BUFS ); - DRM(free)( mask, mask_size, DRM_MEM_BUFS ); - return DRM_ERR(EFAULT); - } - - for ( i = 0 ; i < count ; i++ ) { - if ( mask[i] ) { - BEGIN_RING( 6 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_WR_MSK_DIS ); - - OUT_RING( dev_priv->depth_pitch_offset_c ); - OUT_RING( buffer[i] ); - - OUT_RING( (x[i] << 16) | y[i] ); - OUT_RING( (1 << 16) | 1 ); - - ADVANCE_RING(); - } - } - - DRM(free)( mask, mask_size, DRM_MEM_BUFS ); - } else { - for ( i = 0 ; i < count ; i++ ) { - BEGIN_RING( 6 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_WR_MSK_DIS ); - - OUT_RING( dev_priv->depth_pitch_offset_c ); - OUT_RING( buffer[i] ); - - OUT_RING( (x[i] << 16) | y[i] ); - OUT_RING( (1 << 16) | 1 ); - - ADVANCE_RING(); - } - } - - DRM(free)( x, xbuf_size, DRM_MEM_BUFS ); - DRM(free)( y, ybuf_size, DRM_MEM_BUFS ); - DRM(free)( buffer, buffer_size, DRM_MEM_BUFS ); - - return 0; -} - -static int r128_cce_dispatch_read_span( drm_device_t *dev, - drm_r128_depth_t *depth ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - int count, x, y; - RING_LOCALS; - DRM_DEBUG( "\n" ); - - count = depth->n; - if (count > 4096 || count <= 0) - return DRM_ERR(EMSGSIZE); - - if ( DRM_COPY_FROM_USER( &x, depth->x, sizeof(x) ) ) { - return DRM_ERR(EFAULT); - } - if ( DRM_COPY_FROM_USER( &y, depth->y, sizeof(y) ) ) { - return DRM_ERR(EFAULT); - } - - BEGIN_RING( 7 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_BITBLT_MULTI, 5 ) ); - OUT_RING( R128_GMC_SRC_PITCH_OFFSET_CNTL | - R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_NONE | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_S | - R128_DP_SRC_SOURCE_MEMORY | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_WR_MSK_DIS ); - - OUT_RING( dev_priv->depth_pitch_offset_c ); - OUT_RING( dev_priv->span_pitch_offset_c ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (0 << 16) | 0 ); - OUT_RING( (count << 16) | 1 ); - - ADVANCE_RING(); - - return 0; -} - -static int r128_cce_dispatch_read_pixels( drm_device_t *dev, - drm_r128_depth_t *depth ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - int count, *x, *y; - int i, xbuf_size, ybuf_size; - RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - count = depth->n; - if (count > 4096 || count <= 0) - return DRM_ERR(EMSGSIZE); - - if ( count > dev_priv->depth_pitch ) { - count = dev_priv->depth_pitch; - } - - xbuf_size = count * sizeof(*x); - ybuf_size = count * sizeof(*y); - x = DRM(alloc)( xbuf_size, DRM_MEM_BUFS ); - if ( x == NULL ) { - return DRM_ERR(ENOMEM); - } - y = DRM(alloc)( ybuf_size, DRM_MEM_BUFS ); - if ( y == NULL ) { - DRM(free)( x, xbuf_size, DRM_MEM_BUFS ); - return DRM_ERR(ENOMEM); - } - if ( DRM_COPY_FROM_USER( x, depth->x, xbuf_size ) ) { - DRM(free)( x, xbuf_size, DRM_MEM_BUFS ); - DRM(free)( y, ybuf_size, DRM_MEM_BUFS ); - return DRM_ERR(EFAULT); - } - if ( DRM_COPY_FROM_USER( y, depth->y, ybuf_size ) ) { - DRM(free)( x, xbuf_size, DRM_MEM_BUFS ); - DRM(free)( y, ybuf_size, DRM_MEM_BUFS ); - return DRM_ERR(EFAULT); - } - - for ( i = 0 ; i < count ; i++ ) { - BEGIN_RING( 7 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_BITBLT_MULTI, 5 ) ); - OUT_RING( R128_GMC_SRC_PITCH_OFFSET_CNTL | - R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_NONE | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_S | - R128_DP_SRC_SOURCE_MEMORY | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_WR_MSK_DIS ); - - OUT_RING( dev_priv->depth_pitch_offset_c ); - OUT_RING( dev_priv->span_pitch_offset_c ); - - OUT_RING( (x[i] << 16) | y[i] ); - OUT_RING( (i << 16) | 0 ); - OUT_RING( (1 << 16) | 1 ); - - ADVANCE_RING(); - } - - DRM(free)( x, xbuf_size, DRM_MEM_BUFS ); - DRM(free)( y, ybuf_size, DRM_MEM_BUFS ); - - return 0; -} - - -/* ================================================================ - * Polygon stipple - */ - -static void r128_cce_dispatch_stipple( drm_device_t *dev, u32 *stipple ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - int i; - RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - BEGIN_RING( 33 ); - - OUT_RING( CCE_PACKET0( R128_BRUSH_DATA0, 31 ) ); - for ( i = 0 ; i < 32 ; i++ ) { - OUT_RING( stipple[i] ); - } - - ADVANCE_RING(); -} - - -/* ================================================================ - * IOCTL functions - */ - -int r128_cce_clear( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_clear_t clear; - DRM_DEBUG( "\n" ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( clear, (drm_r128_clear_t __user *) data, - sizeof(clear) ); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - - if ( sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS; - - r128_cce_dispatch_clear( dev, &clear ); - COMMIT_RING(); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->dirty |= R128_UPLOAD_CONTEXT | R128_UPLOAD_MASKS; - - return 0; -} - -static int r128_do_init_pageflip( drm_device_t *dev ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "\n" ); - - dev_priv->crtc_offset = R128_READ( R128_CRTC_OFFSET ); - dev_priv->crtc_offset_cntl = R128_READ( R128_CRTC_OFFSET_CNTL ); - - R128_WRITE( R128_CRTC_OFFSET, dev_priv->front_offset ); - R128_WRITE( R128_CRTC_OFFSET_CNTL, - dev_priv->crtc_offset_cntl | R128_CRTC_OFFSET_FLIP_CNTL ); - - dev_priv->page_flipping = 1; - dev_priv->current_page = 0; - dev_priv->sarea_priv->pfCurrentPage = dev_priv->current_page; - - return 0; -} - -int r128_do_cleanup_pageflip( drm_device_t *dev ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "\n" ); - - R128_WRITE( R128_CRTC_OFFSET, dev_priv->crtc_offset ); - R128_WRITE( R128_CRTC_OFFSET_CNTL, dev_priv->crtc_offset_cntl ); - - if (dev_priv->current_page != 0) { - r128_cce_dispatch_flip( dev ); - COMMIT_RING(); - } - - dev_priv->page_flipping = 0; - return 0; -} - -/* Swapping and flipping are different operations, need different ioctls. - * They can & should be intermixed to support multiple 3d windows. - */ - -int r128_cce_flip( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - - if (!dev_priv->page_flipping) - r128_do_init_pageflip( dev ); - - r128_cce_dispatch_flip( dev ); - - COMMIT_RING(); - return 0; -} - -int r128_cce_swap( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - - if ( sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS; - - r128_cce_dispatch_swap( dev ); - dev_priv->sarea_priv->dirty |= (R128_UPLOAD_CONTEXT | - R128_UPLOAD_MASKS); - - COMMIT_RING(); - return 0; -} - -int r128_cce_vertex( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_r128_buf_priv_t *buf_priv; - drm_r128_vertex_t vertex; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL( vertex, (drm_r128_vertex_t __user *) data, - sizeof(vertex) ); - - DRM_DEBUG( "pid=%d index=%d count=%d discard=%d\n", - DRM_CURRENTPID, - vertex.idx, vertex.count, vertex.discard ); - - if ( vertex.idx < 0 || vertex.idx >= dma->buf_count ) { - DRM_ERROR( "buffer index %d (of %d max)\n", - vertex.idx, dma->buf_count - 1 ); - return DRM_ERR(EINVAL); - } - if ( vertex.prim < 0 || - vertex.prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 ) { - DRM_ERROR( "buffer prim %d\n", vertex.prim ); - return DRM_ERR(EINVAL); - } - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - buf = dma->buflist[vertex.idx]; - buf_priv = buf->dev_private; - - if ( buf->filp != filp ) { - DRM_ERROR( "process %d using buffer owned by %p\n", - DRM_CURRENTPID, buf->filp ); - return DRM_ERR(EINVAL); - } - if ( buf->pending ) { - DRM_ERROR( "sending pending buffer %d\n", vertex.idx ); - return DRM_ERR(EINVAL); - } - - buf->used = vertex.count; - buf_priv->prim = vertex.prim; - buf_priv->discard = vertex.discard; - - r128_cce_dispatch_vertex( dev, buf ); - - COMMIT_RING(); - return 0; -} - -int r128_cce_indices( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_r128_buf_priv_t *buf_priv; - drm_r128_indices_t elts; - int count; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL( elts, (drm_r128_indices_t __user *) data, - sizeof(elts) ); - - DRM_DEBUG( "pid=%d buf=%d s=%d e=%d d=%d\n", DRM_CURRENTPID, - elts.idx, elts.start, elts.end, elts.discard ); - - if ( elts.idx < 0 || elts.idx >= dma->buf_count ) { - DRM_ERROR( "buffer index %d (of %d max)\n", - elts.idx, dma->buf_count - 1 ); - return DRM_ERR(EINVAL); - } - if ( elts.prim < 0 || - elts.prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 ) { - DRM_ERROR( "buffer prim %d\n", elts.prim ); - return DRM_ERR(EINVAL); - } - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - buf = dma->buflist[elts.idx]; - buf_priv = buf->dev_private; - - if ( buf->filp != filp ) { - DRM_ERROR( "process %d using buffer owned by %p\n", - DRM_CURRENTPID, buf->filp ); - return DRM_ERR(EINVAL); - } - if ( buf->pending ) { - DRM_ERROR( "sending pending buffer %d\n", elts.idx ); - return DRM_ERR(EINVAL); - } - - count = (elts.end - elts.start) / sizeof(u16); - elts.start -= R128_INDEX_PRIM_OFFSET; - - if ( elts.start & 0x7 ) { - DRM_ERROR( "misaligned buffer 0x%x\n", elts.start ); - return DRM_ERR(EINVAL); - } - if ( elts.start < buf->used ) { - DRM_ERROR( "no header 0x%x - 0x%x\n", elts.start, buf->used ); - return DRM_ERR(EINVAL); - } - - buf->used = elts.end; - buf_priv->prim = elts.prim; - buf_priv->discard = elts.discard; - - r128_cce_dispatch_indices( dev, buf, elts.start, elts.end, count ); - - COMMIT_RING(); - return 0; -} - -int r128_cce_blit( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_device_dma_t *dma = dev->dma; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_blit_t blit; - int ret; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( blit, (drm_r128_blit_t __user *) data, - sizeof(blit) ); - - DRM_DEBUG( "pid=%d index=%d\n", DRM_CURRENTPID, blit.idx ); - - if ( blit.idx < 0 || blit.idx >= dma->buf_count ) { - DRM_ERROR( "buffer index %d (of %d max)\n", - blit.idx, dma->buf_count - 1 ); - return DRM_ERR(EINVAL); - } - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - ret = r128_cce_dispatch_blit( filp, dev, &blit ); - - COMMIT_RING(); - return ret; -} - -int r128_cce_depth( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_depth_t depth; - int ret; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( depth, (drm_r128_depth_t __user *) data, - sizeof(depth) ); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - - ret = DRM_ERR(EINVAL); - switch ( depth.func ) { - case R128_WRITE_SPAN: - ret = r128_cce_dispatch_write_span( dev, &depth ); - case R128_WRITE_PIXELS: - ret = r128_cce_dispatch_write_pixels( dev, &depth ); - case R128_READ_SPAN: - ret = r128_cce_dispatch_read_span( dev, &depth ); - case R128_READ_PIXELS: - ret = r128_cce_dispatch_read_pixels( dev, &depth ); - } - - COMMIT_RING(); - return ret; -} - -int r128_cce_stipple( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_stipple_t stipple; - u32 mask[32]; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( stipple, (drm_r128_stipple_t __user *) data, - sizeof(stipple) ); - - if ( DRM_COPY_FROM_USER( &mask, stipple.mask, - 32 * sizeof(u32) ) ) - return DRM_ERR( EFAULT ); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - - r128_cce_dispatch_stipple( dev, mask ); - - COMMIT_RING(); - return 0; -} - -int r128_cce_indirect( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_r128_buf_priv_t *buf_priv; - drm_r128_indirect_t indirect; -#if 0 - RING_LOCALS; -#endif - - LOCK_TEST_WITH_RETURN( dev, filp ); - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL( indirect, (drm_r128_indirect_t __user *) data, - sizeof(indirect) ); - - DRM_DEBUG( "indirect: idx=%d s=%d e=%d d=%d\n", - indirect.idx, indirect.start, - indirect.end, indirect.discard ); - - if ( indirect.idx < 0 || indirect.idx >= dma->buf_count ) { - DRM_ERROR( "buffer index %d (of %d max)\n", - indirect.idx, dma->buf_count - 1 ); - return DRM_ERR(EINVAL); - } - - buf = dma->buflist[indirect.idx]; - buf_priv = buf->dev_private; - - if ( buf->filp != filp ) { - DRM_ERROR( "process %d using buffer owned by %p\n", - DRM_CURRENTPID, buf->filp ); - return DRM_ERR(EINVAL); - } - if ( buf->pending ) { - DRM_ERROR( "sending pending buffer %d\n", indirect.idx ); - return DRM_ERR(EINVAL); - } - - if ( indirect.start < buf->used ) { - DRM_ERROR( "reusing indirect: start=0x%x actual=0x%x\n", - indirect.start, buf->used ); - return DRM_ERR(EINVAL); - } - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - buf->used = indirect.end; - buf_priv->discard = indirect.discard; - -#if 0 - /* Wait for the 3D stream to idle before the indirect buffer - * containing 2D acceleration commands is processed. - */ - BEGIN_RING( 2 ); - RADEON_WAIT_UNTIL_3D_IDLE(); - ADVANCE_RING(); -#endif - - /* Dispatch the indirect buffer full of commands from the - * X server. This is insecure and is thus only available to - * privileged clients. - */ - r128_cce_dispatch_indirect( dev, buf, indirect.start, indirect.end ); - - COMMIT_RING(); - return 0; -} - -int r128_getparam( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_getparam_t param; - int value; - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL( param, (drm_r128_getparam_t __user *)data, - sizeof(param) ); - - DRM_DEBUG( "pid=%d\n", DRM_CURRENTPID ); - - switch( param.param ) { - case R128_PARAM_IRQ_NR: - value = dev->irq; - break; - default: - return DRM_ERR(EINVAL); - } - - if ( DRM_COPY_TO_USER( param.value, &value, sizeof(int) ) ) { - DRM_ERROR( "copy_to_user\n" ); - return DRM_ERR(EFAULT); - } - - return 0; -} - -static void r128_driver_prerelease(drm_device_t *dev, DRMFILE filp) -{ - if ( dev->dev_private ) { - drm_r128_private_t *dev_priv = dev->dev_private; - if ( dev_priv->page_flipping ) { - r128_do_cleanup_pageflip( dev ); - } - } -} - -static void r128_driver_pretakedown(drm_device_t *dev) -{ - r128_do_cleanup_cce( dev ); -} - -void r128_driver_register_fns(drm_device_t *dev) -{ - dev->driver_features = DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG | DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_IRQ_VBL; - dev->dev_priv_size = sizeof(drm_r128_buf_priv_t); - dev->fn_tbl.prerelease = r128_driver_prerelease; - dev->fn_tbl.pretakedown = r128_driver_pretakedown; - dev->fn_tbl.vblank_wait = r128_driver_vblank_wait; - dev->fn_tbl.irq_preinstall = r128_driver_irq_preinstall; - dev->fn_tbl.irq_postinstall = r128_driver_irq_postinstall; - dev->fn_tbl.irq_uninstall = r128_driver_irq_uninstall; - dev->fn_tbl.irq_handler = r128_driver_irq_handler; -} diff --git a/shared/radeon.h b/shared/radeon.h deleted file mode 100644 index 23946a8ad..000000000 --- a/shared/radeon.h +++ /dev/null @@ -1,124 +0,0 @@ -/* radeon.h -- ATI Radeon DRM template customization -*- linux-c -*- - * Created: Wed Feb 14 17:07:34 2001 by gareth@valinux.com - * - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - * Keith Whitwell <keith@tungstengraphics.com> - */ - -#ifndef __RADEON_H__ -#define __RADEON_H__ - -/* This remains constant for all DRM template files. - */ -#define DRM(x) radeon_##x - -/* General customization: - */ - -#define DRIVER_AUTHOR "Gareth Hughes, Keith Whitwell, others." - -#define DRIVER_NAME "radeon" -#define DRIVER_DESC "ATI Radeon" -#define DRIVER_DATE "20050311" - -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 16 -#define DRIVER_PATCHLEVEL 0 - -/* Interface history: - * - * 1.1 - ?? - * 1.2 - Add vertex2 ioctl (keith) - * - Add stencil capability to clear ioctl (gareth, keith) - * - Increase MAX_TEXTURE_LEVELS (brian) - * 1.3 - Add cmdbuf ioctl (keith) - * - Add support for new radeon packets (keith) - * - Add getparam ioctl (keith) - * - Add flip-buffers ioctl, deprecate fullscreen foo (keith). - * 1.4 - Add scratch registers to get_param ioctl. - * 1.5 - Add r200 packets to cmdbuf ioctl - * - Add r200 function to init ioctl - * - Add 'scalar2' instruction to cmdbuf - * 1.6 - Add static GART memory manager - * Add irq handler (won't be turned on unless X server knows to) - * Add irq ioctls and irq_active getparam. - * Add wait command for cmdbuf ioctl - * Add GART offset query for getparam - * 1.7 - Add support for cube map registers: R200_PP_CUBIC_FACES_[0..5] - * and R200_PP_CUBIC_OFFSET_F1_[0..5]. - * Added packets R200_EMIT_PP_CUBIC_FACES_[0..5] and - * R200_EMIT_PP_CUBIC_OFFSETS_[0..5]. (brian) - * 1.8 - Remove need to call cleanup ioctls on last client exit (keith) - * Add 'GET' queries for starting additional clients on different VT's. - * 1.9 - Add DRM_IOCTL_RADEON_CP_RESUME ioctl. - * Add texture rectangle support for r100. - * 1.10- Add SETPARAM ioctl; first parameter to set is FB_LOCATION, which - * clients use to tell the DRM where they think the framebuffer is - * located in the card's address space - * 1.11- Add packet R200_EMIT_RB3D_BLENDCOLOR to support GL_EXT_blend_color - * and GL_EXT_blend_[func|equation]_separate on r200 - * 1.12- Add R300 CP microcode support - this just loads the CP on r300 - * (No 3D support yet - just microcode loading). - * 1.13- Add packet R200_EMIT_TCL_POINT_SPRITE_CNTL for ARB_point_parameters - * - Add hyperz support, add hyperz flags to clear ioctl. - * 1.14- Add support for color tiling - * - Add R100/R200 surface allocation/free support - * 1.15- Add support for texture micro tiling - * - Add support for r100 cube maps - * 1.16- Add R200_EMIT_PP_TRI_PERF_CNTL packet to support brilinear - * texture filtering on r200 - */ -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { radeon_cp_buffers, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_INIT)] = { radeon_cp_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_START)] = { radeon_cp_start, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_STOP)] = { radeon_cp_stop, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_RESET)] = { radeon_cp_reset, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_IDLE)] = { radeon_cp_idle, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_RESUME)] = { radeon_cp_resume, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_RESET)] = { radeon_engine_reset, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FULLSCREEN)] = { radeon_fullscreen, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_SWAP)] = { radeon_cp_swap, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CLEAR)] = { radeon_cp_clear, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX)] = { radeon_cp_vertex, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDICES)] = { radeon_cp_indices, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_TEXTURE)] = { radeon_cp_texture, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_STIPPLE)] = { radeon_cp_stipple, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDIRECT)] = { radeon_cp_indirect, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX2)] = { radeon_cp_vertex2, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CMDBUF)] = { radeon_cp_cmdbuf, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_GETPARAM)] = { radeon_cp_getparam, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FLIP)] = { radeon_cp_flip, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_ALLOC)] = { radeon_mem_alloc, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FREE)] = { radeon_mem_free, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INIT_HEAP)] = { radeon_mem_init_heap, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_IRQ_EMIT)] = { radeon_irq_emit, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_IRQ_WAIT)] = { radeon_irq_wait, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_SETPARAM)] = { radeon_cp_setparam, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_SURF_ALLOC)] = { radeon_surface_alloc, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_SURF_FREE)] = { radeon_surface_free, 1, 0 }, \ - -#endif diff --git a/shared/radeon_cp.c b/shared/radeon_cp.c deleted file mode 100644 index dfb8b734a..000000000 --- a/shared/radeon_cp.c +++ /dev/null @@ -1,2092 +0,0 @@ -/* radeon_cp.c -- CP support for Radeon -*- linux-c -*- - * - * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Fremont, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Kevin E. Martin <martin@valinux.com> - * Gareth Hughes <gareth@valinux.com> - */ - -#include "radeon.h" -#include "drmP.h" -#include "drm.h" -#include "radeon_drm.h" -#include "radeon_drv.h" - -#define RADEON_FIFO_DEBUG 0 - -/* CP microcode (from ATI) */ -static u32 R200_cp_microcode[][2] = { - { 0x21007000, 0000000000 }, - { 0x20007000, 0000000000 }, - { 0x000000ab, 0x00000004 }, - { 0x000000af, 0x00000004 }, - { 0x66544a49, 0000000000 }, - { 0x49494174, 0000000000 }, - { 0x54517d83, 0000000000 }, - { 0x498d8b64, 0000000000 }, - { 0x49494949, 0000000000 }, - { 0x49da493c, 0000000000 }, - { 0x49989898, 0000000000 }, - { 0xd34949d5, 0000000000 }, - { 0x9dc90e11, 0000000000 }, - { 0xce9b9b9b, 0000000000 }, - { 0x000f0000, 0x00000016 }, - { 0x352e232c, 0000000000 }, - { 0x00000013, 0x00000004 }, - { 0x000f0000, 0x00000016 }, - { 0x352e272c, 0000000000 }, - { 0x000f0001, 0x00000016 }, - { 0x3239362f, 0000000000 }, - { 0x000077ef, 0x00000002 }, - { 0x00061000, 0x00000002 }, - { 0x00000020, 0x0000001a }, - { 0x00004000, 0x0000001e }, - { 0x00061000, 0x00000002 }, - { 0x00000020, 0x0000001a }, - { 0x00004000, 0x0000001e }, - { 0x00061000, 0x00000002 }, - { 0x00000020, 0x0000001a }, - { 0x00004000, 0x0000001e }, - { 0x00000016, 0x00000004 }, - { 0x0003802a, 0x00000002 }, - { 0x040067e0, 0x00000002 }, - { 0x00000016, 0x00000004 }, - { 0x000077e0, 0x00000002 }, - { 0x00065000, 0x00000002 }, - { 0x000037e1, 0x00000002 }, - { 0x040067e1, 0x00000006 }, - { 0x000077e0, 0x00000002 }, - { 0x000077e1, 0x00000002 }, - { 0x000077e1, 0x00000006 }, - { 0xffffffff, 0000000000 }, - { 0x10000000, 0000000000 }, - { 0x0003802a, 0x00000002 }, - { 0x040067e0, 0x00000006 }, - { 0x00007675, 0x00000002 }, - { 0x00007676, 0x00000002 }, - { 0x00007677, 0x00000002 }, - { 0x00007678, 0x00000006 }, - { 0x0003802b, 0x00000002 }, - { 0x04002676, 0x00000002 }, - { 0x00007677, 0x00000002 }, - { 0x00007678, 0x00000006 }, - { 0x0000002e, 0x00000018 }, - { 0x0000002e, 0x00000018 }, - { 0000000000, 0x00000006 }, - { 0x0000002f, 0x00000018 }, - { 0x0000002f, 0x00000018 }, - { 0000000000, 0x00000006 }, - { 0x01605000, 0x00000002 }, - { 0x00065000, 0x00000002 }, - { 0x00098000, 0x00000002 }, - { 0x00061000, 0x00000002 }, - { 0x64c0603d, 0x00000004 }, - { 0x00080000, 0x00000016 }, - { 0000000000, 0000000000 }, - { 0x0400251d, 0x00000002 }, - { 0x00007580, 0x00000002 }, - { 0x00067581, 0x00000002 }, - { 0x04002580, 0x00000002 }, - { 0x00067581, 0x00000002 }, - { 0x00000046, 0x00000004 }, - { 0x00005000, 0000000000 }, - { 0x00061000, 0x00000002 }, - { 0x0000750e, 0x00000002 }, - { 0x00019000, 0x00000002 }, - { 0x00011055, 0x00000014 }, - { 0x00000055, 0x00000012 }, - { 0x0400250f, 0x00000002 }, - { 0x0000504a, 0x00000004 }, - { 0x00007565, 0x00000002 }, - { 0x00007566, 0x00000002 }, - { 0x00000051, 0x00000004 }, - { 0x01e655b4, 0x00000002 }, - { 0x4401b0dc, 0x00000002 }, - { 0x01c110dc, 0x00000002 }, - { 0x2666705d, 0x00000018 }, - { 0x040c2565, 0x00000002 }, - { 0x0000005d, 0x00000018 }, - { 0x04002564, 0x00000002 }, - { 0x00007566, 0x00000002 }, - { 0x00000054, 0x00000004 }, - { 0x00401060, 0x00000008 }, - { 0x00101000, 0x00000002 }, - { 0x000d80ff, 0x00000002 }, - { 0x00800063, 0x00000008 }, - { 0x000f9000, 0x00000002 }, - { 0x000e00ff, 0x00000002 }, - { 0000000000, 0x00000006 }, - { 0x00000080, 0x00000018 }, - { 0x00000054, 0x00000004 }, - { 0x00007576, 0x00000002 }, - { 0x00065000, 0x00000002 }, - { 0x00009000, 0x00000002 }, - { 0x00041000, 0x00000002 }, - { 0x0c00350e, 0x00000002 }, - { 0x00049000, 0x00000002 }, - { 0x00051000, 0x00000002 }, - { 0x01e785f8, 0x00000002 }, - { 0x00200000, 0x00000002 }, - { 0x00600073, 0x0000000c }, - { 0x00007563, 0x00000002 }, - { 0x006075f0, 0x00000021 }, - { 0x20007068, 0x00000004 }, - { 0x00005068, 0x00000004 }, - { 0x00007576, 0x00000002 }, - { 0x00007577, 0x00000002 }, - { 0x0000750e, 0x00000002 }, - { 0x0000750f, 0x00000002 }, - { 0x00a05000, 0x00000002 }, - { 0x00600076, 0x0000000c }, - { 0x006075f0, 0x00000021 }, - { 0x000075f8, 0x00000002 }, - { 0x00000076, 0x00000004 }, - { 0x000a750e, 0x00000002 }, - { 0x0020750f, 0x00000002 }, - { 0x00600079, 0x00000004 }, - { 0x00007570, 0x00000002 }, - { 0x00007571, 0x00000002 }, - { 0x00007572, 0x00000006 }, - { 0x00005000, 0x00000002 }, - { 0x00a05000, 0x00000002 }, - { 0x00007568, 0x00000002 }, - { 0x00061000, 0x00000002 }, - { 0x00000084, 0x0000000c }, - { 0x00058000, 0x00000002 }, - { 0x0c607562, 0x00000002 }, - { 0x00000086, 0x00000004 }, - { 0x00600085, 0x00000004 }, - { 0x400070dd, 0000000000 }, - { 0x000380dd, 0x00000002 }, - { 0x00000093, 0x0000001c }, - { 0x00065095, 0x00000018 }, - { 0x040025bb, 0x00000002 }, - { 0x00061096, 0x00000018 }, - { 0x040075bc, 0000000000 }, - { 0x000075bb, 0x00000002 }, - { 0x000075bc, 0000000000 }, - { 0x00090000, 0x00000006 }, - { 0x00090000, 0x00000002 }, - { 0x000d8002, 0x00000006 }, - { 0x00005000, 0x00000002 }, - { 0x00007821, 0x00000002 }, - { 0x00007800, 0000000000 }, - { 0x00007821, 0x00000002 }, - { 0x00007800, 0000000000 }, - { 0x01665000, 0x00000002 }, - { 0x000a0000, 0x00000002 }, - { 0x000671cc, 0x00000002 }, - { 0x0286f1cd, 0x00000002 }, - { 0x000000a3, 0x00000010 }, - { 0x21007000, 0000000000 }, - { 0x000000aa, 0x0000001c }, - { 0x00065000, 0x00000002 }, - { 0x000a0000, 0x00000002 }, - { 0x00061000, 0x00000002 }, - { 0x000b0000, 0x00000002 }, - { 0x38067000, 0x00000002 }, - { 0x000a00a6, 0x00000004 }, - { 0x20007000, 0000000000 }, - { 0x01200000, 0x00000002 }, - { 0x20077000, 0x00000002 }, - { 0x01200000, 0x00000002 }, - { 0x20007000, 0000000000 }, - { 0x00061000, 0x00000002 }, - { 0x0120751b, 0x00000002 }, - { 0x8040750a, 0x00000002 }, - { 0x8040750b, 0x00000002 }, - { 0x00110000, 0x00000002 }, - { 0x000380dd, 0x00000002 }, - { 0x000000bd, 0x0000001c }, - { 0x00061096, 0x00000018 }, - { 0x844075bd, 0x00000002 }, - { 0x00061095, 0x00000018 }, - { 0x840075bb, 0x00000002 }, - { 0x00061096, 0x00000018 }, - { 0x844075bc, 0x00000002 }, - { 0x000000c0, 0x00000004 }, - { 0x804075bd, 0x00000002 }, - { 0x800075bb, 0x00000002 }, - { 0x804075bc, 0x00000002 }, - { 0x00108000, 0x00000002 }, - { 0x01400000, 0x00000002 }, - { 0x006000c4, 0x0000000c }, - { 0x20c07000, 0x00000020 }, - { 0x000000c6, 0x00000012 }, - { 0x00800000, 0x00000006 }, - { 0x0080751d, 0x00000006 }, - { 0x000025bb, 0x00000002 }, - { 0x000040c0, 0x00000004 }, - { 0x0000775c, 0x00000002 }, - { 0x00a05000, 0x00000002 }, - { 0x00661000, 0x00000002 }, - { 0x0460275d, 0x00000020 }, - { 0x00004000, 0000000000 }, - { 0x00007999, 0x00000002 }, - { 0x00a05000, 0x00000002 }, - { 0x00661000, 0x00000002 }, - { 0x0460299b, 0x00000020 }, - { 0x00004000, 0000000000 }, - { 0x01e00830, 0x00000002 }, - { 0x21007000, 0000000000 }, - { 0x00005000, 0x00000002 }, - { 0x00038042, 0x00000002 }, - { 0x040025e0, 0x00000002 }, - { 0x000075e1, 0000000000 }, - { 0x00000001, 0000000000 }, - { 0x000380d9, 0x00000002 }, - { 0x04007394, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, -}; - - -static u32 radeon_cp_microcode[][2] = { - { 0x21007000, 0000000000 }, - { 0x20007000, 0000000000 }, - { 0x000000b4, 0x00000004 }, - { 0x000000b8, 0x00000004 }, - { 0x6f5b4d4c, 0000000000 }, - { 0x4c4c427f, 0000000000 }, - { 0x5b568a92, 0000000000 }, - { 0x4ca09c6d, 0000000000 }, - { 0xad4c4c4c, 0000000000 }, - { 0x4ce1af3d, 0000000000 }, - { 0xd8afafaf, 0000000000 }, - { 0xd64c4cdc, 0000000000 }, - { 0x4cd10d10, 0000000000 }, - { 0x000f0000, 0x00000016 }, - { 0x362f242d, 0000000000 }, - { 0x00000012, 0x00000004 }, - { 0x000f0000, 0x00000016 }, - { 0x362f282d, 0000000000 }, - { 0x000380e7, 0x00000002 }, - { 0x04002c97, 0x00000002 }, - { 0x000f0001, 0x00000016 }, - { 0x333a3730, 0000000000 }, - { 0x000077ef, 0x00000002 }, - { 0x00061000, 0x00000002 }, - { 0x00000021, 0x0000001a }, - { 0x00004000, 0x0000001e }, - { 0x00061000, 0x00000002 }, - { 0x00000021, 0x0000001a }, - { 0x00004000, 0x0000001e }, - { 0x00061000, 0x00000002 }, - { 0x00000021, 0x0000001a }, - { 0x00004000, 0x0000001e }, - { 0x00000017, 0x00000004 }, - { 0x0003802b, 0x00000002 }, - { 0x040067e0, 0x00000002 }, - { 0x00000017, 0x00000004 }, - { 0x000077e0, 0x00000002 }, - { 0x00065000, 0x00000002 }, - { 0x000037e1, 0x00000002 }, - { 0x040067e1, 0x00000006 }, - { 0x000077e0, 0x00000002 }, - { 0x000077e1, 0x00000002 }, - { 0x000077e1, 0x00000006 }, - { 0xffffffff, 0000000000 }, - { 0x10000000, 0000000000 }, - { 0x0003802b, 0x00000002 }, - { 0x040067e0, 0x00000006 }, - { 0x00007675, 0x00000002 }, - { 0x00007676, 0x00000002 }, - { 0x00007677, 0x00000002 }, - { 0x00007678, 0x00000006 }, - { 0x0003802c, 0x00000002 }, - { 0x04002676, 0x00000002 }, - { 0x00007677, 0x00000002 }, - { 0x00007678, 0x00000006 }, - { 0x0000002f, 0x00000018 }, - { 0x0000002f, 0x00000018 }, - { 0000000000, 0x00000006 }, - { 0x00000030, 0x00000018 }, - { 0x00000030, 0x00000018 }, - { 0000000000, 0x00000006 }, - { 0x01605000, 0x00000002 }, - { 0x00065000, 0x00000002 }, - { 0x00098000, 0x00000002 }, - { 0x00061000, 0x00000002 }, - { 0x64c0603e, 0x00000004 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x00080000, 0x00000016 }, - { 0000000000, 0000000000 }, - { 0x0400251d, 0x00000002 }, - { 0x00007580, 0x00000002 }, - { 0x00067581, 0x00000002 }, - { 0x04002580, 0x00000002 }, - { 0x00067581, 0x00000002 }, - { 0x00000049, 0x00000004 }, - { 0x00005000, 0000000000 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x00061000, 0x00000002 }, - { 0x0000750e, 0x00000002 }, - { 0x00019000, 0x00000002 }, - { 0x00011055, 0x00000014 }, - { 0x00000055, 0x00000012 }, - { 0x0400250f, 0x00000002 }, - { 0x0000504f, 0x00000004 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x00007565, 0x00000002 }, - { 0x00007566, 0x00000002 }, - { 0x00000058, 0x00000004 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x01e655b4, 0x00000002 }, - { 0x4401b0e4, 0x00000002 }, - { 0x01c110e4, 0x00000002 }, - { 0x26667066, 0x00000018 }, - { 0x040c2565, 0x00000002 }, - { 0x00000066, 0x00000018 }, - { 0x04002564, 0x00000002 }, - { 0x00007566, 0x00000002 }, - { 0x0000005d, 0x00000004 }, - { 0x00401069, 0x00000008 }, - { 0x00101000, 0x00000002 }, - { 0x000d80ff, 0x00000002 }, - { 0x0080006c, 0x00000008 }, - { 0x000f9000, 0x00000002 }, - { 0x000e00ff, 0x00000002 }, - { 0000000000, 0x00000006 }, - { 0x0000008f, 0x00000018 }, - { 0x0000005b, 0x00000004 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x00007576, 0x00000002 }, - { 0x00065000, 0x00000002 }, - { 0x00009000, 0x00000002 }, - { 0x00041000, 0x00000002 }, - { 0x0c00350e, 0x00000002 }, - { 0x00049000, 0x00000002 }, - { 0x00051000, 0x00000002 }, - { 0x01e785f8, 0x00000002 }, - { 0x00200000, 0x00000002 }, - { 0x0060007e, 0x0000000c }, - { 0x00007563, 0x00000002 }, - { 0x006075f0, 0x00000021 }, - { 0x20007073, 0x00000004 }, - { 0x00005073, 0x00000004 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x00007576, 0x00000002 }, - { 0x00007577, 0x00000002 }, - { 0x0000750e, 0x00000002 }, - { 0x0000750f, 0x00000002 }, - { 0x00a05000, 0x00000002 }, - { 0x00600083, 0x0000000c }, - { 0x006075f0, 0x00000021 }, - { 0x000075f8, 0x00000002 }, - { 0x00000083, 0x00000004 }, - { 0x000a750e, 0x00000002 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x0020750f, 0x00000002 }, - { 0x00600086, 0x00000004 }, - { 0x00007570, 0x00000002 }, - { 0x00007571, 0x00000002 }, - { 0x00007572, 0x00000006 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x00005000, 0x00000002 }, - { 0x00a05000, 0x00000002 }, - { 0x00007568, 0x00000002 }, - { 0x00061000, 0x00000002 }, - { 0x00000095, 0x0000000c }, - { 0x00058000, 0x00000002 }, - { 0x0c607562, 0x00000002 }, - { 0x00000097, 0x00000004 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x00600096, 0x00000004 }, - { 0x400070e5, 0000000000 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x000380e5, 0x00000002 }, - { 0x000000a8, 0x0000001c }, - { 0x000650aa, 0x00000018 }, - { 0x040025bb, 0x00000002 }, - { 0x000610ab, 0x00000018 }, - { 0x040075bc, 0000000000 }, - { 0x000075bb, 0x00000002 }, - { 0x000075bc, 0000000000 }, - { 0x00090000, 0x00000006 }, - { 0x00090000, 0x00000002 }, - { 0x000d8002, 0x00000006 }, - { 0x00007832, 0x00000002 }, - { 0x00005000, 0x00000002 }, - { 0x000380e7, 0x00000002 }, - { 0x04002c97, 0x00000002 }, - { 0x00007820, 0x00000002 }, - { 0x00007821, 0x00000002 }, - { 0x00007800, 0000000000 }, - { 0x01200000, 0x00000002 }, - { 0x20077000, 0x00000002 }, - { 0x01200000, 0x00000002 }, - { 0x20007000, 0x00000002 }, - { 0x00061000, 0x00000002 }, - { 0x0120751b, 0x00000002 }, - { 0x8040750a, 0x00000002 }, - { 0x8040750b, 0x00000002 }, - { 0x00110000, 0x00000002 }, - { 0x000380e5, 0x00000002 }, - { 0x000000c6, 0x0000001c }, - { 0x000610ab, 0x00000018 }, - { 0x844075bd, 0x00000002 }, - { 0x000610aa, 0x00000018 }, - { 0x840075bb, 0x00000002 }, - { 0x000610ab, 0x00000018 }, - { 0x844075bc, 0x00000002 }, - { 0x000000c9, 0x00000004 }, - { 0x804075bd, 0x00000002 }, - { 0x800075bb, 0x00000002 }, - { 0x804075bc, 0x00000002 }, - { 0x00108000, 0x00000002 }, - { 0x01400000, 0x00000002 }, - { 0x006000cd, 0x0000000c }, - { 0x20c07000, 0x00000020 }, - { 0x000000cf, 0x00000012 }, - { 0x00800000, 0x00000006 }, - { 0x0080751d, 0x00000006 }, - { 0000000000, 0000000000 }, - { 0x0000775c, 0x00000002 }, - { 0x00a05000, 0x00000002 }, - { 0x00661000, 0x00000002 }, - { 0x0460275d, 0x00000020 }, - { 0x00004000, 0000000000 }, - { 0x01e00830, 0x00000002 }, - { 0x21007000, 0000000000 }, - { 0x6464614d, 0000000000 }, - { 0x69687420, 0000000000 }, - { 0x00000073, 0000000000 }, - { 0000000000, 0000000000 }, - { 0x00005000, 0x00000002 }, - { 0x000380d0, 0x00000002 }, - { 0x040025e0, 0x00000002 }, - { 0x000075e1, 0000000000 }, - { 0x00000001, 0000000000 }, - { 0x000380e0, 0x00000002 }, - { 0x04002394, 0x00000002 }, - { 0x00005000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0x00000008, 0000000000 }, - { 0x00000004, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, -}; - -static u32 R300_cp_microcode[][2] = { - { 0x4200e000, 0000000000 }, - { 0x4000e000, 0000000000 }, - { 0x000000af, 0x00000008 }, - { 0x000000b3, 0x00000008 }, - { 0x6c5a504f, 0000000000 }, - { 0x4f4f497a, 0000000000 }, - { 0x5a578288, 0000000000 }, - { 0x4f91906a, 0000000000 }, - { 0x4f4f4f4f, 0000000000 }, - { 0x4fe24f44, 0000000000 }, - { 0x4f9c9c9c, 0000000000 }, - { 0xdc4f4fde, 0000000000 }, - { 0xa1cd4f4f, 0000000000 }, - { 0xd29d9d9d, 0000000000 }, - { 0x4f0f9fd7, 0000000000 }, - { 0x000ca000, 0x00000004 }, - { 0x000d0012, 0x00000038 }, - { 0x0000e8b4, 0x00000004 }, - { 0x000d0014, 0x00000038 }, - { 0x0000e8b6, 0x00000004 }, - { 0x000d0016, 0x00000038 }, - { 0x0000e854, 0x00000004 }, - { 0x000d0018, 0x00000038 }, - { 0x0000e855, 0x00000004 }, - { 0x000d001a, 0x00000038 }, - { 0x0000e856, 0x00000004 }, - { 0x000d001c, 0x00000038 }, - { 0x0000e857, 0x00000004 }, - { 0x000d001e, 0x00000038 }, - { 0x0000e824, 0x00000004 }, - { 0x000d0020, 0x00000038 }, - { 0x0000e825, 0x00000004 }, - { 0x000d0022, 0x00000038 }, - { 0x0000e830, 0x00000004 }, - { 0x000d0024, 0x00000038 }, - { 0x0000f0c0, 0x00000004 }, - { 0x000d0026, 0x00000038 }, - { 0x0000f0c1, 0x00000004 }, - { 0x000d0028, 0x00000038 }, - { 0x0000f041, 0x00000004 }, - { 0x000d002a, 0x00000038 }, - { 0x0000f184, 0x00000004 }, - { 0x000d002c, 0x00000038 }, - { 0x0000f185, 0x00000004 }, - { 0x000d002e, 0x00000038 }, - { 0x0000f186, 0x00000004 }, - { 0x000d0030, 0x00000038 }, - { 0x0000f187, 0x00000004 }, - { 0x000d0032, 0x00000038 }, - { 0x0000f180, 0x00000004 }, - { 0x000d0034, 0x00000038 }, - { 0x0000f393, 0x00000004 }, - { 0x000d0036, 0x00000038 }, - { 0x0000f38a, 0x00000004 }, - { 0x000d0038, 0x00000038 }, - { 0x0000f38e, 0x00000004 }, - { 0x0000e821, 0x00000004 }, - { 0x0140a000, 0x00000004 }, - { 0x00000043, 0x00000018 }, - { 0x00cce800, 0x00000004 }, - { 0x001b0001, 0x00000004 }, - { 0x08004800, 0x00000004 }, - { 0x001b0001, 0x00000004 }, - { 0x08004800, 0x00000004 }, - { 0x001b0001, 0x00000004 }, - { 0x08004800, 0x00000004 }, - { 0x0000003a, 0x00000008 }, - { 0x0000a000, 0000000000 }, - { 0x02c0a000, 0x00000004 }, - { 0x000ca000, 0x00000004 }, - { 0x00130000, 0x00000004 }, - { 0x000c2000, 0x00000004 }, - { 0xc980c045, 0x00000008 }, - { 0x2000451d, 0x00000004 }, - { 0x0000e580, 0x00000004 }, - { 0x000ce581, 0x00000004 }, - { 0x08004580, 0x00000004 }, - { 0x000ce581, 0x00000004 }, - { 0x0000004c, 0x00000008 }, - { 0x0000a000, 0000000000 }, - { 0x000c2000, 0x00000004 }, - { 0x0000e50e, 0x00000004 }, - { 0x00032000, 0x00000004 }, - { 0x00022056, 0x00000028 }, - { 0x00000056, 0x00000024 }, - { 0x0800450f, 0x00000004 }, - { 0x0000a050, 0x00000008 }, - { 0x0000e565, 0x00000004 }, - { 0x0000e566, 0x00000004 }, - { 0x00000057, 0x00000008 }, - { 0x03cca5b4, 0x00000004 }, - { 0x05432000, 0x00000004 }, - { 0x00022000, 0x00000004 }, - { 0x4ccce063, 0x00000030 }, - { 0x08274565, 0x00000004 }, - { 0x00000063, 0x00000030 }, - { 0x08004564, 0x00000004 }, - { 0x0000e566, 0x00000004 }, - { 0x0000005a, 0x00000008 }, - { 0x00802066, 0x00000010 }, - { 0x00202000, 0x00000004 }, - { 0x001b00ff, 0x00000004 }, - { 0x01000069, 0x00000010 }, - { 0x001f2000, 0x00000004 }, - { 0x001c00ff, 0x00000004 }, - { 0000000000, 0x0000000c }, - { 0x00000085, 0x00000030 }, - { 0x0000005a, 0x00000008 }, - { 0x0000e576, 0x00000004 }, - { 0x000ca000, 0x00000004 }, - { 0x00012000, 0x00000004 }, - { 0x00082000, 0x00000004 }, - { 0x1800650e, 0x00000004 }, - { 0x00092000, 0x00000004 }, - { 0x000a2000, 0x00000004 }, - { 0x000f0000, 0x00000004 }, - { 0x00400000, 0x00000004 }, - { 0x00000079, 0x00000018 }, - { 0x0000e563, 0x00000004 }, - { 0x00c0e5f9, 0x000000c2 }, - { 0x0000006e, 0x00000008 }, - { 0x0000a06e, 0x00000008 }, - { 0x0000e576, 0x00000004 }, - { 0x0000e577, 0x00000004 }, - { 0x0000e50e, 0x00000004 }, - { 0x0000e50f, 0x00000004 }, - { 0x0140a000, 0x00000004 }, - { 0x0000007c, 0x00000018 }, - { 0x00c0e5f9, 0x000000c2 }, - { 0x0000007c, 0x00000008 }, - { 0x0014e50e, 0x00000004 }, - { 0x0040e50f, 0x00000004 }, - { 0x00c0007f, 0x00000008 }, - { 0x0000e570, 0x00000004 }, - { 0x0000e571, 0x00000004 }, - { 0x0000e572, 0x0000000c }, - { 0x0000a000, 0x00000004 }, - { 0x0140a000, 0x00000004 }, - { 0x0000e568, 0x00000004 }, - { 0x000c2000, 0x00000004 }, - { 0x00000089, 0x00000018 }, - { 0x000b0000, 0x00000004 }, - { 0x18c0e562, 0x00000004 }, - { 0x0000008b, 0x00000008 }, - { 0x00c0008a, 0x00000008 }, - { 0x000700e4, 0x00000004 }, - { 0x00000097, 0x00000038 }, - { 0x000ca099, 0x00000030 }, - { 0x080045bb, 0x00000004 }, - { 0x000c209a, 0x00000030 }, - { 0x0800e5bc, 0000000000 }, - { 0x0000e5bb, 0x00000004 }, - { 0x0000e5bc, 0000000000 }, - { 0x00120000, 0x0000000c }, - { 0x00120000, 0x00000004 }, - { 0x001b0002, 0x0000000c }, - { 0x0000a000, 0x00000004 }, - { 0x0000e821, 0x00000004 }, - { 0x0000e800, 0000000000 }, - { 0x0000e821, 0x00000004 }, - { 0x0000e82e, 0000000000 }, - { 0x02cca000, 0x00000004 }, - { 0x00140000, 0x00000004 }, - { 0x000ce1cc, 0x00000004 }, - { 0x050de1cd, 0x00000004 }, - { 0x000000a7, 0x00000020 }, - { 0x4200e000, 0000000000 }, - { 0x000000ae, 0x00000038 }, - { 0x000ca000, 0x00000004 }, - { 0x00140000, 0x00000004 }, - { 0x000c2000, 0x00000004 }, - { 0x00160000, 0x00000004 }, - { 0x700ce000, 0x00000004 }, - { 0x001400aa, 0x00000008 }, - { 0x4000e000, 0000000000 }, - { 0x02400000, 0x00000004 }, - { 0x400ee000, 0x00000004 }, - { 0x02400000, 0x00000004 }, - { 0x4000e000, 0000000000 }, - { 0x000c2000, 0x00000004 }, - { 0x0240e51b, 0x00000004 }, - { 0x0080e50a, 0x00000005 }, - { 0x0080e50b, 0x00000005 }, - { 0x00220000, 0x00000004 }, - { 0x000700e4, 0x00000004 }, - { 0x000000c1, 0x00000038 }, - { 0x000c209a, 0x00000030 }, - { 0x0880e5bd, 0x00000005 }, - { 0x000c2099, 0x00000030 }, - { 0x0800e5bb, 0x00000005 }, - { 0x000c209a, 0x00000030 }, - { 0x0880e5bc, 0x00000005 }, - { 0x000000c4, 0x00000008 }, - { 0x0080e5bd, 0x00000005 }, - { 0x0000e5bb, 0x00000005 }, - { 0x0080e5bc, 0x00000005 }, - { 0x00210000, 0x00000004 }, - { 0x02800000, 0x00000004 }, - { 0x00c000c8, 0x00000018 }, - { 0x4180e000, 0x00000040 }, - { 0x000000ca, 0x00000024 }, - { 0x01000000, 0x0000000c }, - { 0x0100e51d, 0x0000000c }, - { 0x000045bb, 0x00000004 }, - { 0x000080c4, 0x00000008 }, - { 0x0000f3ce, 0x00000004 }, - { 0x0140a000, 0x00000004 }, - { 0x00cc2000, 0x00000004 }, - { 0x08c053cf, 0x00000040 }, - { 0x00008000, 0000000000 }, - { 0x0000f3d2, 0x00000004 }, - { 0x0140a000, 0x00000004 }, - { 0x00cc2000, 0x00000004 }, - { 0x08c053d3, 0x00000040 }, - { 0x00008000, 0000000000 }, - { 0x0000f39d, 0x00000004 }, - { 0x0140a000, 0x00000004 }, - { 0x00cc2000, 0x00000004 }, - { 0x08c0539e, 0x00000040 }, - { 0x00008000, 0000000000 }, - { 0x03c00830, 0x00000004 }, - { 0x4200e000, 0000000000 }, - { 0x0000a000, 0x00000004 }, - { 0x200045e0, 0x00000004 }, - { 0x0000e5e1, 0000000000 }, - { 0x00000001, 0000000000 }, - { 0x000700e1, 0x00000004 }, - { 0x0800e394, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, -}; - -int RADEON_READ_PLL(drm_device_t *dev, int addr) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - - RADEON_WRITE8(RADEON_CLOCK_CNTL_INDEX, addr & 0x1f); - return RADEON_READ(RADEON_CLOCK_CNTL_DATA); -} - -#if RADEON_FIFO_DEBUG -static void radeon_status( drm_radeon_private_t *dev_priv ) -{ - printk( "%s:\n", __FUNCTION__ ); - printk( "RBBM_STATUS = 0x%08x\n", - (unsigned int)RADEON_READ( RADEON_RBBM_STATUS ) ); - printk( "CP_RB_RTPR = 0x%08x\n", - (unsigned int)RADEON_READ( RADEON_CP_RB_RPTR ) ); - printk( "CP_RB_WTPR = 0x%08x\n", - (unsigned int)RADEON_READ( RADEON_CP_RB_WPTR ) ); - printk( "AIC_CNTL = 0x%08x\n", - (unsigned int)RADEON_READ( RADEON_AIC_CNTL ) ); - printk( "AIC_STAT = 0x%08x\n", - (unsigned int)RADEON_READ( RADEON_AIC_STAT ) ); - printk( "AIC_PT_BASE = 0x%08x\n", - (unsigned int)RADEON_READ( RADEON_AIC_PT_BASE ) ); - printk( "TLB_ADDR = 0x%08x\n", - (unsigned int)RADEON_READ( RADEON_AIC_TLB_ADDR ) ); - printk( "TLB_DATA = 0x%08x\n", - (unsigned int)RADEON_READ( RADEON_AIC_TLB_DATA ) ); -} -#endif - - -/* ================================================================ - * Engine, FIFO control - */ - -static int radeon_do_pixcache_flush( drm_radeon_private_t *dev_priv ) -{ - u32 tmp; - int i; - - dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; - - tmp = RADEON_READ( RADEON_RB2D_DSTCACHE_CTLSTAT ); - tmp |= RADEON_RB2D_DC_FLUSH_ALL; - RADEON_WRITE( RADEON_RB2D_DSTCACHE_CTLSTAT, tmp ); - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - if ( !(RADEON_READ( RADEON_RB2D_DSTCACHE_CTLSTAT ) - & RADEON_RB2D_DC_BUSY) ) { - return 0; - } - DRM_UDELAY( 1 ); - } - -#if RADEON_FIFO_DEBUG - DRM_ERROR( "failed!\n" ); - radeon_status( dev_priv ); -#endif - return DRM_ERR(EBUSY); -} - -static int radeon_do_wait_for_fifo( drm_radeon_private_t *dev_priv, - int entries ) -{ - int i; - - dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - int slots = ( RADEON_READ( RADEON_RBBM_STATUS ) - & RADEON_RBBM_FIFOCNT_MASK ); - if ( slots >= entries ) return 0; - DRM_UDELAY( 1 ); - } - -#if RADEON_FIFO_DEBUG - DRM_ERROR( "failed!\n" ); - radeon_status( dev_priv ); -#endif - return DRM_ERR(EBUSY); -} - -static int radeon_do_wait_for_idle( drm_radeon_private_t *dev_priv ) -{ - int i, ret; - - dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; - - ret = radeon_do_wait_for_fifo( dev_priv, 64 ); - if ( ret ) return ret; - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - if ( !(RADEON_READ( RADEON_RBBM_STATUS ) - & RADEON_RBBM_ACTIVE) ) { - radeon_do_pixcache_flush( dev_priv ); - return 0; - } - DRM_UDELAY( 1 ); - } - -#if RADEON_FIFO_DEBUG - DRM_ERROR( "failed!\n" ); - radeon_status( dev_priv ); -#endif - return DRM_ERR(EBUSY); -} - - -/* ================================================================ - * CP control, initialization - */ - -/* Load the microcode for the CP */ -static void radeon_cp_load_microcode( drm_radeon_private_t *dev_priv ) -{ - int i; - DRM_DEBUG( "\n" ); - - radeon_do_wait_for_idle( dev_priv ); - - RADEON_WRITE( RADEON_CP_ME_RAM_ADDR, 0 ); - - if (dev_priv->microcode_version==UCODE_R200) { - DRM_INFO("Loading R200 Microcode\n"); - for ( i = 0 ; i < 256 ; i++ ) - { - RADEON_WRITE( RADEON_CP_ME_RAM_DATAH, - R200_cp_microcode[i][1] ); - RADEON_WRITE( RADEON_CP_ME_RAM_DATAL, - R200_cp_microcode[i][0] ); - } - } else if (dev_priv->microcode_version==UCODE_R300) { - DRM_INFO("Loading R300 Microcode\n"); - for ( i = 0 ; i < 256 ; i++ ) { - RADEON_WRITE( RADEON_CP_ME_RAM_DATAH, - R300_cp_microcode[i][1] ); - RADEON_WRITE( RADEON_CP_ME_RAM_DATAL, - R300_cp_microcode[i][0] ); - } - } else { - for ( i = 0 ; i < 256 ; i++ ) { - RADEON_WRITE( RADEON_CP_ME_RAM_DATAH, - radeon_cp_microcode[i][1] ); - RADEON_WRITE( RADEON_CP_ME_RAM_DATAL, - radeon_cp_microcode[i][0] ); - } - } -} - -/* Flush any pending commands to the CP. This should only be used just - * prior to a wait for idle, as it informs the engine that the command - * stream is ending. - */ -static void radeon_do_cp_flush( drm_radeon_private_t *dev_priv ) -{ - DRM_DEBUG( "\n" ); -#if 0 - u32 tmp; - - tmp = RADEON_READ( RADEON_CP_RB_WPTR ) | (1 << 31); - RADEON_WRITE( RADEON_CP_RB_WPTR, tmp ); -#endif -} - -/* Wait for the CP to go idle. - */ -int radeon_do_cp_idle( drm_radeon_private_t *dev_priv ) -{ - RING_LOCALS; - DRM_DEBUG( "\n" ); - - BEGIN_RING( 6 ); - - RADEON_PURGE_CACHE(); - RADEON_PURGE_ZCACHE(); - RADEON_WAIT_UNTIL_IDLE(); - - ADVANCE_RING(); - COMMIT_RING(); - - return radeon_do_wait_for_idle( dev_priv ); -} - -/* Start the Command Processor. - */ -static void radeon_do_cp_start( drm_radeon_private_t *dev_priv ) -{ - RING_LOCALS; - DRM_DEBUG( "\n" ); - - radeon_do_wait_for_idle( dev_priv ); - - RADEON_WRITE( RADEON_CP_CSQ_CNTL, dev_priv->cp_mode ); - - dev_priv->cp_running = 1; - - BEGIN_RING( 6 ); - - RADEON_PURGE_CACHE(); - RADEON_PURGE_ZCACHE(); - RADEON_WAIT_UNTIL_IDLE(); - - ADVANCE_RING(); - COMMIT_RING(); -} - -/* Reset the Command Processor. This will not flush any pending - * commands, so you must wait for the CP command stream to complete - * before calling this routine. - */ -static void radeon_do_cp_reset( drm_radeon_private_t *dev_priv ) -{ - u32 cur_read_ptr; - DRM_DEBUG( "\n" ); - - cur_read_ptr = RADEON_READ( RADEON_CP_RB_RPTR ); - RADEON_WRITE( RADEON_CP_RB_WPTR, cur_read_ptr ); - SET_RING_HEAD( dev_priv, cur_read_ptr ); - dev_priv->ring.tail = cur_read_ptr; -} - -/* Stop the Command Processor. This will not flush any pending - * commands, so you must flush the command stream and wait for the CP - * to go idle before calling this routine. - */ -static void radeon_do_cp_stop( drm_radeon_private_t *dev_priv ) -{ - DRM_DEBUG( "\n" ); - - RADEON_WRITE( RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIDIS_INDDIS ); - - dev_priv->cp_running = 0; -} - -/* Reset the engine. This will stop the CP if it is running. - */ -static int radeon_do_engine_reset( drm_device_t *dev ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - u32 clock_cntl_index, mclk_cntl, rbbm_soft_reset; - DRM_DEBUG( "\n" ); - - radeon_do_pixcache_flush( dev_priv ); - - clock_cntl_index = RADEON_READ( RADEON_CLOCK_CNTL_INDEX ); - mclk_cntl = RADEON_READ_PLL( dev, RADEON_MCLK_CNTL ); - - RADEON_WRITE_PLL( RADEON_MCLK_CNTL, ( mclk_cntl | - RADEON_FORCEON_MCLKA | - RADEON_FORCEON_MCLKB | - RADEON_FORCEON_YCLKA | - RADEON_FORCEON_YCLKB | - RADEON_FORCEON_MC | - RADEON_FORCEON_AIC ) ); - - rbbm_soft_reset = RADEON_READ( RADEON_RBBM_SOFT_RESET ); - - RADEON_WRITE( RADEON_RBBM_SOFT_RESET, ( rbbm_soft_reset | - RADEON_SOFT_RESET_CP | - RADEON_SOFT_RESET_HI | - RADEON_SOFT_RESET_SE | - RADEON_SOFT_RESET_RE | - RADEON_SOFT_RESET_PP | - RADEON_SOFT_RESET_E2 | - RADEON_SOFT_RESET_RB ) ); - RADEON_READ( RADEON_RBBM_SOFT_RESET ); - RADEON_WRITE( RADEON_RBBM_SOFT_RESET, ( rbbm_soft_reset & - ~( RADEON_SOFT_RESET_CP | - RADEON_SOFT_RESET_HI | - RADEON_SOFT_RESET_SE | - RADEON_SOFT_RESET_RE | - RADEON_SOFT_RESET_PP | - RADEON_SOFT_RESET_E2 | - RADEON_SOFT_RESET_RB ) ) ); - RADEON_READ( RADEON_RBBM_SOFT_RESET ); - - - RADEON_WRITE_PLL( RADEON_MCLK_CNTL, mclk_cntl ); - RADEON_WRITE( RADEON_CLOCK_CNTL_INDEX, clock_cntl_index ); - RADEON_WRITE( RADEON_RBBM_SOFT_RESET, rbbm_soft_reset ); - - /* Reset the CP ring */ - radeon_do_cp_reset( dev_priv ); - - /* The CP is no longer running after an engine reset */ - dev_priv->cp_running = 0; - - /* Reset any pending vertex, indirect buffers */ - radeon_freelist_reset( dev ); - - return 0; -} - -static void radeon_cp_init_ring_buffer( drm_device_t *dev, - drm_radeon_private_t *dev_priv ) -{ - u32 ring_start, cur_read_ptr; - u32 tmp; - - /* Initialize the memory controller */ - RADEON_WRITE( RADEON_MC_FB_LOCATION, - ( ( dev_priv->gart_vm_start - 1 ) & 0xffff0000 ) - | ( dev_priv->fb_location >> 16 ) ); - -#if __OS_HAS_AGP - if (dev_priv->flags & CHIP_IS_AGP) { - RADEON_WRITE( RADEON_MC_AGP_LOCATION, - (((dev_priv->gart_vm_start - 1 + - dev_priv->gart_size) & 0xffff0000) | - (dev_priv->gart_vm_start >> 16)) ); - - ring_start = (dev_priv->cp_ring->offset - - dev->agp->base - + dev_priv->gart_vm_start); - } else -#endif - ring_start = (dev_priv->cp_ring->offset - - dev->sg->handle - + dev_priv->gart_vm_start); - - RADEON_WRITE( RADEON_CP_RB_BASE, ring_start ); - - /* Set the write pointer delay */ - RADEON_WRITE( RADEON_CP_RB_WPTR_DELAY, 0 ); - - /* Initialize the ring buffer's read and write pointers */ - cur_read_ptr = RADEON_READ( RADEON_CP_RB_RPTR ); - RADEON_WRITE( RADEON_CP_RB_WPTR, cur_read_ptr ); - SET_RING_HEAD( dev_priv, cur_read_ptr ); - dev_priv->ring.tail = cur_read_ptr; - -#if __OS_HAS_AGP - if (dev_priv->flags & CHIP_IS_AGP) { - /* set RADEON_AGP_BASE here instead of relying on X from user space */ - RADEON_WRITE( RADEON_AGP_BASE, (unsigned int)dev->agp->base ); - RADEON_WRITE( RADEON_CP_RB_RPTR_ADDR, - dev_priv->ring_rptr->offset - - dev->agp->base - + dev_priv->gart_vm_start); - } else -#endif - { - drm_sg_mem_t *entry = dev->sg; - unsigned long tmp_ofs, page_ofs; - - tmp_ofs = dev_priv->ring_rptr->offset - dev->sg->handle; - page_ofs = tmp_ofs >> PAGE_SHIFT; - - RADEON_WRITE( RADEON_CP_RB_RPTR_ADDR, - entry->busaddr[page_ofs]); - DRM_DEBUG( "ring rptr: offset=0x%08lx handle=0x%08lx\n", - (unsigned long) entry->busaddr[page_ofs], - entry->handle + tmp_ofs ); - } - - /* Initialize the scratch register pointer. This will cause - * the scratch register values to be written out to memory - * whenever they are updated. - * - * We simply put this behind the ring read pointer, this works - * with PCI GART as well as (whatever kind of) AGP GART - */ - RADEON_WRITE( RADEON_SCRATCH_ADDR, RADEON_READ( RADEON_CP_RB_RPTR_ADDR ) - + RADEON_SCRATCH_REG_OFFSET ); - - dev_priv->scratch = ((__volatile__ u32 *) - dev_priv->ring_rptr->handle + - (RADEON_SCRATCH_REG_OFFSET / sizeof(u32))); - - RADEON_WRITE( RADEON_SCRATCH_UMSK, 0x7 ); - - /* Writeback doesn't seem to work everywhere, test it first */ - DRM_WRITE32( dev_priv->ring_rptr, RADEON_SCRATCHOFF(1), 0 ); - RADEON_WRITE( RADEON_SCRATCH_REG1, 0xdeadbeef ); - - for ( tmp = 0 ; tmp < dev_priv->usec_timeout ; tmp++ ) { - if ( DRM_READ32( dev_priv->ring_rptr, RADEON_SCRATCHOFF(1) ) == 0xdeadbeef ) - break; - DRM_UDELAY( 1 ); - } - - if ( tmp < dev_priv->usec_timeout ) { - dev_priv->writeback_works = 1; - DRM_DEBUG( "writeback test succeeded, tmp=%d\n", tmp ); - } else { - dev_priv->writeback_works = 0; - DRM_DEBUG( "writeback test failed\n" ); - } - - dev_priv->sarea_priv->last_frame = dev_priv->scratch[0] = 0; - RADEON_WRITE( RADEON_LAST_FRAME_REG, - dev_priv->sarea_priv->last_frame ); - - dev_priv->sarea_priv->last_dispatch = dev_priv->scratch[1] = 0; - RADEON_WRITE( RADEON_LAST_DISPATCH_REG, - dev_priv->sarea_priv->last_dispatch ); - - dev_priv->sarea_priv->last_clear = dev_priv->scratch[2] = 0; - RADEON_WRITE( RADEON_LAST_CLEAR_REG, - dev_priv->sarea_priv->last_clear ); - - /* Set ring buffer size */ -#ifdef __BIG_ENDIAN - RADEON_WRITE( RADEON_CP_RB_CNTL, dev_priv->ring.size_l2qw | RADEON_BUF_SWAP_32BIT ); -#else - RADEON_WRITE( RADEON_CP_RB_CNTL, dev_priv->ring.size_l2qw ); -#endif - - radeon_do_wait_for_idle( dev_priv ); - - /* Turn on bus mastering */ - tmp = RADEON_READ( RADEON_BUS_CNTL ) & ~RADEON_BUS_MASTER_DIS; - RADEON_WRITE( RADEON_BUS_CNTL, tmp ); - - /* Sync everything up */ - RADEON_WRITE( RADEON_ISYNC_CNTL, - (RADEON_ISYNC_ANY2D_IDLE3D | - RADEON_ISYNC_ANY3D_IDLE2D | - RADEON_ISYNC_WAIT_IDLEGUI | - RADEON_ISYNC_CPSCRATCH_IDLEGUI) ); -} - -/* Enable or disable PCI GART on the chip */ -static void radeon_set_pcigart( drm_radeon_private_t *dev_priv, int on ) -{ - u32 tmp = RADEON_READ( RADEON_AIC_CNTL ); - - if ( on ) { - RADEON_WRITE( RADEON_AIC_CNTL, tmp | RADEON_PCIGART_TRANSLATE_EN ); - - /* set PCI GART page-table base address - */ - RADEON_WRITE( RADEON_AIC_PT_BASE, dev_priv->bus_pci_gart ); - - /* set address range for PCI address translate - */ - RADEON_WRITE( RADEON_AIC_LO_ADDR, dev_priv->gart_vm_start ); - RADEON_WRITE( RADEON_AIC_HI_ADDR, dev_priv->gart_vm_start - + dev_priv->gart_size - 1); - - /* Turn off AGP aperture -- is this required for PCI GART? - */ - RADEON_WRITE( RADEON_MC_AGP_LOCATION, 0xffffffc0 ); /* ?? */ - RADEON_WRITE( RADEON_AGP_COMMAND, 0 ); /* clear AGP_COMMAND */ - } else { - RADEON_WRITE( RADEON_AIC_CNTL, tmp & ~RADEON_PCIGART_TRANSLATE_EN ); - } -} - -static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "\n" ); - - if ( (!(dev_priv->flags & CHIP_IS_AGP)) && !dev->sg ) { - DRM_ERROR( "PCI GART memory not allocated!\n" ); - radeon_do_cleanup_cp(dev); - return DRM_ERR(EINVAL); - } - - dev_priv->usec_timeout = init->usec_timeout; - if ( dev_priv->usec_timeout < 1 || - dev_priv->usec_timeout > RADEON_MAX_USEC_TIMEOUT ) { - DRM_DEBUG( "TIMEOUT problem!\n" ); - radeon_do_cleanup_cp(dev); - return DRM_ERR(EINVAL); - } - - switch(init->func) { - case RADEON_INIT_R200_CP: - dev_priv->microcode_version=UCODE_R200; - break; - case RADEON_INIT_R300_CP: - dev_priv->microcode_version=UCODE_R300; - break; - default: - dev_priv->microcode_version=UCODE_R100; - break; - } - - dev_priv->do_boxes = 0; - dev_priv->cp_mode = init->cp_mode; - - /* We don't support anything other than bus-mastering ring mode, - * but the ring can be in either AGP or PCI space for the ring - * read pointer. - */ - if ( ( init->cp_mode != RADEON_CSQ_PRIBM_INDDIS ) && - ( init->cp_mode != RADEON_CSQ_PRIBM_INDBM ) ) { - DRM_DEBUG( "BAD cp_mode (%x)!\n", init->cp_mode ); - radeon_do_cleanup_cp(dev); - return DRM_ERR(EINVAL); - } - - switch ( init->fb_bpp ) { - case 16: - dev_priv->color_fmt = RADEON_COLOR_FORMAT_RGB565; - break; - case 32: - default: - dev_priv->color_fmt = RADEON_COLOR_FORMAT_ARGB8888; - break; - } - dev_priv->front_offset = init->front_offset; - dev_priv->front_pitch = init->front_pitch; - dev_priv->back_offset = init->back_offset; - dev_priv->back_pitch = init->back_pitch; - - switch ( init->depth_bpp ) { - case 16: - dev_priv->depth_fmt = RADEON_DEPTH_FORMAT_16BIT_INT_Z; - break; - case 32: - default: - dev_priv->depth_fmt = RADEON_DEPTH_FORMAT_24BIT_INT_Z; - break; - } - dev_priv->depth_offset = init->depth_offset; - dev_priv->depth_pitch = init->depth_pitch; - - /* Hardware state for depth clears. Remove this if/when we no - * longer clear the depth buffer with a 3D rectangle. Hard-code - * all values to prevent unwanted 3D state from slipping through - * and screwing with the clear operation. - */ - dev_priv->depth_clear.rb3d_cntl = (RADEON_PLANE_MASK_ENABLE | - (dev_priv->color_fmt << 10) | - (dev_priv->microcode_version == UCODE_R100 ? - RADEON_ZBLOCK16 : 0)); - - dev_priv->depth_clear.rb3d_zstencilcntl = - (dev_priv->depth_fmt | - RADEON_Z_TEST_ALWAYS | - RADEON_STENCIL_TEST_ALWAYS | - RADEON_STENCIL_S_FAIL_REPLACE | - RADEON_STENCIL_ZPASS_REPLACE | - RADEON_STENCIL_ZFAIL_REPLACE | - RADEON_Z_WRITE_ENABLE); - - dev_priv->depth_clear.se_cntl = (RADEON_FFACE_CULL_CW | - RADEON_BFACE_SOLID | - RADEON_FFACE_SOLID | - RADEON_FLAT_SHADE_VTX_LAST | - RADEON_DIFFUSE_SHADE_FLAT | - RADEON_ALPHA_SHADE_FLAT | - RADEON_SPECULAR_SHADE_FLAT | - RADEON_FOG_SHADE_FLAT | - RADEON_VTX_PIX_CENTER_OGL | - RADEON_ROUND_MODE_TRUNC | - RADEON_ROUND_PREC_8TH_PIX); - - DRM_GETSAREA(); - - dev_priv->fb_offset = init->fb_offset; - dev_priv->mmio_offset = init->mmio_offset; - dev_priv->ring_offset = init->ring_offset; - dev_priv->ring_rptr_offset = init->ring_rptr_offset; - dev_priv->buffers_offset = init->buffers_offset; - dev_priv->gart_textures_offset = init->gart_textures_offset; - - if(!dev_priv->sarea) { - DRM_ERROR("could not find sarea!\n"); - radeon_do_cleanup_cp(dev); - return DRM_ERR(EINVAL); - } - - dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset); - if(!dev_priv->mmio) { - DRM_ERROR("could not find mmio region!\n"); - radeon_do_cleanup_cp(dev); - return DRM_ERR(EINVAL); - } - dev_priv->cp_ring = drm_core_findmap(dev, init->ring_offset); - if(!dev_priv->cp_ring) { - DRM_ERROR("could not find cp ring region!\n"); - radeon_do_cleanup_cp(dev); - return DRM_ERR(EINVAL); - } - dev_priv->ring_rptr = drm_core_findmap(dev, init->ring_rptr_offset); - if(!dev_priv->ring_rptr) { - DRM_ERROR("could not find ring read pointer!\n"); - radeon_do_cleanup_cp(dev); - return DRM_ERR(EINVAL); - } - dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset); - if(!dev->agp_buffer_map) { - DRM_ERROR("could not find dma buffer region!\n"); - radeon_do_cleanup_cp(dev); - return DRM_ERR(EINVAL); - } - - if ( init->gart_textures_offset ) { - dev_priv->gart_textures = drm_core_findmap(dev, init->gart_textures_offset); - if ( !dev_priv->gart_textures ) { - DRM_ERROR("could not find GART texture region!\n"); - radeon_do_cleanup_cp(dev); - return DRM_ERR(EINVAL); - } - } - - dev_priv->sarea_priv = - (drm_radeon_sarea_t *)((u8 *)dev_priv->sarea->handle + - init->sarea_priv_offset); - -#if __OS_HAS_AGP - if ( dev_priv->flags & CHIP_IS_AGP ) { - drm_core_ioremap( dev_priv->cp_ring, dev ); - drm_core_ioremap( dev_priv->ring_rptr, dev ); - drm_core_ioremap( dev->agp_buffer_map, dev ); - if(!dev_priv->cp_ring->handle || - !dev_priv->ring_rptr->handle || - !dev->agp_buffer_map->handle) { - DRM_ERROR("could not find ioremap agp regions!\n"); - radeon_do_cleanup_cp(dev); - return DRM_ERR(EINVAL); - } - } else -#endif - { - dev_priv->cp_ring->handle = - (void *)dev_priv->cp_ring->offset; - dev_priv->ring_rptr->handle = - (void *)dev_priv->ring_rptr->offset; - dev->agp_buffer_map->handle = (void *)dev->agp_buffer_map->offset; - - DRM_DEBUG( "dev_priv->cp_ring->handle %p\n", - dev_priv->cp_ring->handle ); - DRM_DEBUG( "dev_priv->ring_rptr->handle %p\n", - dev_priv->ring_rptr->handle ); - DRM_DEBUG( "dev->agp_buffer_map->handle %p\n", - dev->agp_buffer_map->handle ); - } - - dev_priv->fb_location = ( RADEON_READ( RADEON_MC_FB_LOCATION ) - & 0xffff ) << 16; - - dev_priv->front_pitch_offset = (((dev_priv->front_pitch/64) << 22) | - ( ( dev_priv->front_offset - + dev_priv->fb_location ) >> 10 ) ); - - dev_priv->back_pitch_offset = (((dev_priv->back_pitch/64) << 22) | - ( ( dev_priv->back_offset - + dev_priv->fb_location ) >> 10 ) ); - - dev_priv->depth_pitch_offset = (((dev_priv->depth_pitch/64) << 22) | - ( ( dev_priv->depth_offset - + dev_priv->fb_location ) >> 10 ) ); - - - dev_priv->gart_size = init->gart_size; - dev_priv->gart_vm_start = dev_priv->fb_location - + RADEON_READ( RADEON_CONFIG_APER_SIZE ); - -#if __OS_HAS_AGP - if (dev_priv->flags & CHIP_IS_AGP) - dev_priv->gart_buffers_offset = (dev->agp_buffer_map->offset - - dev->agp->base - + dev_priv->gart_vm_start); - else -#endif - dev_priv->gart_buffers_offset = (dev->agp_buffer_map->offset - - dev->sg->handle - + dev_priv->gart_vm_start); - - DRM_DEBUG( "dev_priv->gart_size %d\n", - dev_priv->gart_size ); - DRM_DEBUG( "dev_priv->gart_vm_start 0x%x\n", - dev_priv->gart_vm_start ); - DRM_DEBUG( "dev_priv->gart_buffers_offset 0x%lx\n", - dev_priv->gart_buffers_offset ); - - dev_priv->ring.start = (u32 *)dev_priv->cp_ring->handle; - dev_priv->ring.end = ((u32 *)dev_priv->cp_ring->handle - + init->ring_size / sizeof(u32)); - dev_priv->ring.size = init->ring_size; - dev_priv->ring.size_l2qw = DRM(order)( init->ring_size / 8 ); - - dev_priv->ring.tail_mask = - (dev_priv->ring.size / sizeof(u32)) - 1; - - dev_priv->ring.high_mark = RADEON_RING_HIGH_MARK; - -#if __OS_HAS_AGP - if (dev_priv->flags & CHIP_IS_AGP) { - /* Turn off PCI GART */ - radeon_set_pcigart( dev_priv, 0 ); - } else -#endif - { - if (!DRM(ati_pcigart_init)( dev, &dev_priv->phys_pci_gart, - &dev_priv->bus_pci_gart)) { - DRM_ERROR( "failed to init PCI GART!\n" ); - radeon_do_cleanup_cp(dev); - return DRM_ERR(ENOMEM); - } - - /* Turn on PCI GART */ - radeon_set_pcigart( dev_priv, 1 ); - } - - radeon_cp_load_microcode( dev_priv ); - radeon_cp_init_ring_buffer( dev, dev_priv ); - - dev_priv->last_buf = 0; - - radeon_do_engine_reset( dev ); - - return 0; -} - -int radeon_do_cleanup_cp( drm_device_t *dev ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "\n" ); - - /* Make sure interrupts are disabled here because the uninstall ioctl - * may not have been called from userspace and after dev_private - * is freed, it's too late. - */ - if ( dev->irq_enabled ) DRM(irq_uninstall)(dev); - -#if __OS_HAS_AGP - if (dev_priv->flags & CHIP_IS_AGP) { - if ( dev_priv->cp_ring != NULL ) { - drm_core_ioremapfree( dev_priv->cp_ring, dev ); - dev_priv->cp_ring = NULL; - } - if ( dev_priv->ring_rptr != NULL ) { - drm_core_ioremapfree( dev_priv->ring_rptr, dev ); - dev_priv->ring_rptr = NULL; - } - if ( dev->agp_buffer_map != NULL ) { - drm_core_ioremapfree( dev->agp_buffer_map, dev ); - dev->agp_buffer_map = NULL; - } - } else -#endif - { - if (!DRM(ati_pcigart_cleanup)( dev, - dev_priv->phys_pci_gart, - dev_priv->bus_pci_gart )) - DRM_ERROR( "failed to cleanup PCI GART!\n" ); - } - /* only clear to the start of flags */ - memset(dev_priv, 0, offsetof(drm_radeon_private_t, flags)); - - return 0; -} - -/* This code will reinit the Radeon CP hardware after a resume from disc. - * AFAIK, it would be very difficult to pickle the state at suspend time, so - * here we make sure that all Radeon hardware initialisation is re-done without - * affecting running applications. - * - * Charl P. Botha <http://cpbotha.net> - */ -static int radeon_do_resume_cp( drm_device_t *dev ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - - if ( !dev_priv ) { - DRM_ERROR( "Called with no initialization\n" ); - return DRM_ERR( EINVAL ); - } - - DRM_DEBUG("Starting radeon_do_resume_cp()\n"); - -#if __OS_HAS_AGP - if (dev_priv->flags & CHIP_IS_AGP) { - /* Turn off PCI GART */ - radeon_set_pcigart( dev_priv, 0 ); - } else -#endif - { - /* Turn on PCI GART */ - radeon_set_pcigart( dev_priv, 1 ); - } - - radeon_cp_load_microcode( dev_priv ); - radeon_cp_init_ring_buffer( dev, dev_priv ); - - radeon_do_engine_reset( dev ); - - DRM_DEBUG("radeon_do_resume_cp() complete\n"); - - return 0; -} - - -int radeon_cp_init( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_init_t init; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( init, (drm_radeon_init_t __user *)data, sizeof(init) ); - - switch ( init.func ) { - case RADEON_INIT_CP: - case RADEON_INIT_R200_CP: - case RADEON_INIT_R300_CP: - return radeon_do_init_cp( dev, &init ); - case RADEON_CLEANUP_CP: - return radeon_do_cleanup_cp( dev ); - } - - return DRM_ERR(EINVAL); -} - -int radeon_cp_start( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "\n" ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - if ( dev_priv->cp_running ) { - DRM_DEBUG( "%s while CP running\n", __FUNCTION__ ); - return 0; - } - if ( dev_priv->cp_mode == RADEON_CSQ_PRIDIS_INDDIS ) { - DRM_DEBUG( "%s called with bogus CP mode (%d)\n", - __FUNCTION__, dev_priv->cp_mode ); - return 0; - } - - radeon_do_cp_start( dev_priv ); - - return 0; -} - -/* Stop the CP. The engine must have been idled before calling this - * routine. - */ -int radeon_cp_stop( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_cp_stop_t stop; - int ret; - DRM_DEBUG( "\n" ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( stop, (drm_radeon_cp_stop_t __user *)data, sizeof(stop) ); - - if (!dev_priv->cp_running) - return 0; - - /* Flush any pending CP commands. This ensures any outstanding - * commands are exectuted by the engine before we turn it off. - */ - if ( stop.flush ) { - radeon_do_cp_flush( dev_priv ); - } - - /* If we fail to make the engine go idle, we return an error - * code so that the DRM ioctl wrapper can try again. - */ - if ( stop.idle ) { - ret = radeon_do_cp_idle( dev_priv ); - if ( ret ) return ret; - } - - /* Finally, we can turn off the CP. If the engine isn't idle, - * we will get some dropped triangles as they won't be fully - * rendered before the CP is shut down. - */ - radeon_do_cp_stop( dev_priv ); - - /* Reset the engine */ - radeon_do_engine_reset( dev ); - - return 0; -} - - -void radeon_do_release( drm_device_t *dev ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - int i, ret; - - if (dev_priv) { - - if (dev_priv->cp_running) { - /* Stop the cp */ - while ((ret = radeon_do_cp_idle( dev_priv )) != 0) { - DRM_DEBUG("radeon_do_cp_idle %d\n", ret); -#ifdef __linux__ - schedule(); -#else - tsleep(&ret, PZERO, "rdnrel", 1); -#endif - } - radeon_do_cp_stop( dev_priv ); - radeon_do_engine_reset( dev ); - } - - /* Disable *all* interrupts */ - if (dev_priv->mmio) /* remove this after permanent addmaps */ - RADEON_WRITE( RADEON_GEN_INT_CNTL, 0 ); - - if (dev_priv->mmio) {/* remove all surfaces */ - for (i = 0; i < RADEON_MAX_SURFACES; i++) { - RADEON_WRITE(RADEON_SURFACE0_INFO + 16*i, 0); - RADEON_WRITE(RADEON_SURFACE0_LOWER_BOUND + 16*i, 0); - RADEON_WRITE(RADEON_SURFACE0_UPPER_BOUND + 16*i, 0); - } - } - - /* Free memory heap structures */ - radeon_mem_takedown( &(dev_priv->gart_heap) ); - radeon_mem_takedown( &(dev_priv->fb_heap) ); - - /* deallocate kernel resources */ - radeon_do_cleanup_cp( dev ); - } -} - -/* Just reset the CP ring. Called as part of an X Server engine reset. - */ -int radeon_cp_reset( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "\n" ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - if ( !dev_priv ) { - DRM_DEBUG( "%s called before init done\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - radeon_do_cp_reset( dev_priv ); - - /* The CP is no longer running after an engine reset */ - dev_priv->cp_running = 0; - - return 0; -} - -int radeon_cp_idle( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "\n" ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - return radeon_do_cp_idle( dev_priv ); -} - -/* Added by Charl P. Botha to call radeon_do_resume_cp(). - */ -int radeon_cp_resume( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - - return radeon_do_resume_cp(dev); -} - - -int radeon_engine_reset( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - DRM_DEBUG( "\n" ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - return radeon_do_engine_reset( dev ); -} - - -/* ================================================================ - * Fullscreen mode - */ - -/* KW: Deprecated to say the least: - */ -int radeon_fullscreen( DRM_IOCTL_ARGS ) -{ - return 0; -} - - -/* ================================================================ - * Freelist management - */ - -/* Original comment: FIXME: ROTATE_BUFS is a hack to cycle through - * bufs until freelist code is used. Note this hides a problem with - * the scratch register * (used to keep track of last buffer - * completed) being written to before * the last buffer has actually - * completed rendering. - * - * KW: It's also a good way to find free buffers quickly. - * - * KW: Ideally this loop wouldn't exist, and freelist_get wouldn't - * sleep. However, bugs in older versions of radeon_accel.c mean that - * we essentially have to do this, else old clients will break. - * - * However, it does leave open a potential deadlock where all the - * buffers are held by other clients, which can't release them because - * they can't get the lock. - */ - -drm_buf_t *radeon_freelist_get( drm_device_t *dev ) -{ - drm_device_dma_t *dma = dev->dma; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_buf_priv_t *buf_priv; - drm_buf_t *buf; - int i, t; - int start; - - if ( ++dev_priv->last_buf >= dma->buf_count ) - dev_priv->last_buf = 0; - - start = dev_priv->last_buf; - - for ( t = 0 ; t < dev_priv->usec_timeout ; t++ ) { - u32 done_age = GET_SCRATCH( 1 ); - DRM_DEBUG("done_age = %d\n",done_age); - for ( i = start ; i < dma->buf_count ; i++ ) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - if ( buf->filp == 0 || (buf->pending && - buf_priv->age <= done_age) ) { - dev_priv->stats.requested_bufs++; - buf->pending = 0; - return buf; - } - start = 0; - } - - if (t) { - DRM_UDELAY( 1 ); - dev_priv->stats.freelist_loops++; - } - } - - DRM_DEBUG( "returning NULL!\n" ); - return NULL; -} -#if 0 -drm_buf_t *radeon_freelist_get( drm_device_t *dev ) -{ - drm_device_dma_t *dma = dev->dma; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_buf_priv_t *buf_priv; - drm_buf_t *buf; - int i, t; - int start; - u32 done_age = DRM_READ32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1)); - - if ( ++dev_priv->last_buf >= dma->buf_count ) - dev_priv->last_buf = 0; - - start = dev_priv->last_buf; - dev_priv->stats.freelist_loops++; - - for ( t = 0 ; t < 2 ; t++ ) { - for ( i = start ; i < dma->buf_count ; i++ ) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - if ( buf->filp == 0 || (buf->pending && - buf_priv->age <= done_age) ) { - dev_priv->stats.requested_bufs++; - buf->pending = 0; - return buf; - } - } - start = 0; - } - - return NULL; -} -#endif - -void radeon_freelist_reset( drm_device_t *dev ) -{ - drm_device_dma_t *dma = dev->dma; - drm_radeon_private_t *dev_priv = dev->dev_private; - int i; - - dev_priv->last_buf = 0; - for ( i = 0 ; i < dma->buf_count ; i++ ) { - drm_buf_t *buf = dma->buflist[i]; - drm_radeon_buf_priv_t *buf_priv = buf->dev_private; - buf_priv->age = 0; - } -} - - -/* ================================================================ - * CP command submission - */ - -int radeon_wait_ring( drm_radeon_private_t *dev_priv, int n ) -{ - drm_radeon_ring_buffer_t *ring = &dev_priv->ring; - int i; - u32 last_head = GET_RING_HEAD( dev_priv ); - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - u32 head = GET_RING_HEAD( dev_priv ); - - ring->space = (head - ring->tail) * sizeof(u32); - if ( ring->space <= 0 ) - ring->space += ring->size; - if ( ring->space > n ) - return 0; - - dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; - - if (head != last_head) - i = 0; - last_head = head; - - DRM_UDELAY( 1 ); - } - - /* FIXME: This return value is ignored in the BEGIN_RING macro! */ -#if RADEON_FIFO_DEBUG - radeon_status( dev_priv ); - DRM_ERROR( "failed!\n" ); -#endif - return DRM_ERR(EBUSY); -} - -static int radeon_cp_get_buffers( DRMFILE filp, drm_device_t *dev, drm_dma_t *d ) -{ - int i; - drm_buf_t *buf; - - for ( i = d->granted_count ; i < d->request_count ; i++ ) { - buf = radeon_freelist_get( dev ); - if ( !buf ) return DRM_ERR(EBUSY); /* NOTE: broken client */ - - buf->filp = filp; - - if ( DRM_COPY_TO_USER( &d->request_indices[i], &buf->idx, - sizeof(buf->idx) ) ) - return DRM_ERR(EFAULT); - if ( DRM_COPY_TO_USER( &d->request_sizes[i], &buf->total, - sizeof(buf->total) ) ) - return DRM_ERR(EFAULT); - - d->granted_count++; - } - return 0; -} - -int radeon_cp_buffers( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_device_dma_t *dma = dev->dma; - int ret = 0; - drm_dma_t __user *argp = (void __user *)data; - drm_dma_t d; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( d, argp, sizeof(d) ); - - /* Please don't send us buffers. - */ - if ( d.send_count != 0 ) { - DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n", - DRM_CURRENTPID, d.send_count ); - return DRM_ERR(EINVAL); - } - - /* We'll send you buffers. - */ - if ( d.request_count < 0 || d.request_count > dma->buf_count ) { - DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n", - DRM_CURRENTPID, d.request_count, dma->buf_count ); - return DRM_ERR(EINVAL); - } - - d.granted_count = 0; - - if ( d.request_count ) { - ret = radeon_cp_get_buffers( filp, dev, &d ); - } - - DRM_COPY_TO_USER_IOCTL( argp, d, sizeof(d) ); - - return ret; -} - -/* Always create a map record for MMIO and FB memory, done from DRIVER_POSTINIT */ -int radeon_preinit( struct drm_device *dev, unsigned long flags ) -{ - u32 save, temp; - drm_radeon_private_t *dev_priv; - int ret = 0; - - dev_priv = DRM(alloc)( sizeof(drm_radeon_private_t), DRM_MEM_DRIVER ); - if ( dev_priv == NULL ) - return DRM_ERR(ENOMEM); - - memset( dev_priv, 0, sizeof(drm_radeon_private_t) ); - dev->dev_private = (void *)dev_priv; - dev_priv->flags = flags; - - switch (flags & CHIP_FAMILY_MASK) { - case CHIP_R100: - case CHIP_RV200: - case CHIP_R200: - case CHIP_R300: - dev_priv->flags |= CHIP_HAS_HIERZ; - break; - default: - /* all other chips have no hierarchical z buffer */ - break; - } - - /* registers */ - if( (ret = DRM(initmap)( dev, pci_resource_start( dev->pdev, 2 ), - pci_resource_len( dev->pdev, 2 ), _DRM_REGISTERS, 0 ))) - return ret; - - /* framebuffer */ - if( (ret = DRM(initmap)( dev, pci_resource_start( dev->pdev, 0 ), - pci_resource_len( dev->pdev, 0 ), _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING ))) - return ret; - - /* There are signatures in BIOS and PCI-SSID for a PCI card, but they are not very reliable. - Following detection method works for all cards tested so far. - Note, checking AGP_ENABLE bit after drmAgpEnable call can also give the correct result. - However, calling drmAgpEnable on a PCI card can cause some strange lockup when the server - restarts next time. - */ - pci_read_config_dword(dev->pdev, RADEON_AGP_COMMAND_PCI_CONFIG, &save); - pci_write_config_dword(dev->pdev, RADEON_AGP_COMMAND_PCI_CONFIG, save | RADEON_AGP_ENABLE); - pci_read_config_dword(dev->pdev, RADEON_AGP_COMMAND_PCI_CONFIG, &temp); - if (temp & RADEON_AGP_ENABLE) - dev_priv->flags |= CHIP_IS_AGP; - DRM_DEBUG("%s card detected\n", ((dev_priv->flags & CHIP_IS_AGP) ? "AGP" : "PCI")); - pci_write_config_dword(dev->pdev, RADEON_AGP_COMMAND_PCI_CONFIG, save); - - /* Check if we need a reset */ - if (!(dev_priv->mmio = drm_core_findmap(dev , pci_resource_start( dev->pdev, 2 )))) - return DRM_ERR(ENOMEM); - -#if defined(__linux__) - ret = radeon_create_i2c_busses(dev); -#endif - return ret; -} - -int radeon_postinit( struct drm_device *dev, unsigned long flags ) -{ - return 0; -} - -int radeon_postcleanup( struct drm_device *dev ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - - DRM_DEBUG("\n"); -#if defined(__linux__) - radeon_delete_i2c_busses(dev); -#endif - DRM(free)( dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER ); - - dev->dev_private = NULL; - return 0; -} diff --git a/shared/radeon_drm.h b/shared/radeon_drm.h deleted file mode 100644 index 0253a4ead..000000000 --- a/shared/radeon_drm.h +++ /dev/null @@ -1,661 +0,0 @@ -/* radeon_drm.h -- Public header for the radeon driver -*- linux-c -*- - * - * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Fremont, California. - * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Kevin E. Martin <martin@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * Keith Whitwell <keith@tungstengraphics.com> - */ - -#ifndef __RADEON_DRM_H__ -#define __RADEON_DRM_H__ - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the X server file (radeon_sarea.h) - */ -#ifndef __RADEON_SAREA_DEFINES__ -#define __RADEON_SAREA_DEFINES__ - -/* Old style state flags, required for sarea interface (1.1 and 1.2 - * clears) and 1.2 drm_vertex2 ioctl. - */ -#define RADEON_UPLOAD_CONTEXT 0x00000001 -#define RADEON_UPLOAD_VERTFMT 0x00000002 -#define RADEON_UPLOAD_LINE 0x00000004 -#define RADEON_UPLOAD_BUMPMAP 0x00000008 -#define RADEON_UPLOAD_MASKS 0x00000010 -#define RADEON_UPLOAD_VIEWPORT 0x00000020 -#define RADEON_UPLOAD_SETUP 0x00000040 -#define RADEON_UPLOAD_TCL 0x00000080 -#define RADEON_UPLOAD_MISC 0x00000100 -#define RADEON_UPLOAD_TEX0 0x00000200 -#define RADEON_UPLOAD_TEX1 0x00000400 -#define RADEON_UPLOAD_TEX2 0x00000800 -#define RADEON_UPLOAD_TEX0IMAGES 0x00001000 -#define RADEON_UPLOAD_TEX1IMAGES 0x00002000 -#define RADEON_UPLOAD_TEX2IMAGES 0x00004000 -#define RADEON_UPLOAD_CLIPRECTS 0x00008000 /* handled client-side */ -#define RADEON_REQUIRE_QUIESCENCE 0x00010000 -#define RADEON_UPLOAD_ZBIAS 0x00020000 /* version 1.2 and newer */ -#define RADEON_UPLOAD_ALL 0x003effff -#define RADEON_UPLOAD_CONTEXT_ALL 0x003e01ff - - -/* New style per-packet identifiers for use in cmd_buffer ioctl with - * the RADEON_EMIT_PACKET command. Comments relate new packets to old - * state bits and the packet size: - */ -#define RADEON_EMIT_PP_MISC 0 /* context/7 */ -#define RADEON_EMIT_PP_CNTL 1 /* context/3 */ -#define RADEON_EMIT_RB3D_COLORPITCH 2 /* context/1 */ -#define RADEON_EMIT_RE_LINE_PATTERN 3 /* line/2 */ -#define RADEON_EMIT_SE_LINE_WIDTH 4 /* line/1 */ -#define RADEON_EMIT_PP_LUM_MATRIX 5 /* bumpmap/1 */ -#define RADEON_EMIT_PP_ROT_MATRIX_0 6 /* bumpmap/2 */ -#define RADEON_EMIT_RB3D_STENCILREFMASK 7 /* masks/3 */ -#define RADEON_EMIT_SE_VPORT_XSCALE 8 /* viewport/6 */ -#define RADEON_EMIT_SE_CNTL 9 /* setup/2 */ -#define RADEON_EMIT_SE_CNTL_STATUS 10 /* setup/1 */ -#define RADEON_EMIT_RE_MISC 11 /* misc/1 */ -#define RADEON_EMIT_PP_TXFILTER_0 12 /* tex0/6 */ -#define RADEON_EMIT_PP_BORDER_COLOR_0 13 /* tex0/1 */ -#define RADEON_EMIT_PP_TXFILTER_1 14 /* tex1/6 */ -#define RADEON_EMIT_PP_BORDER_COLOR_1 15 /* tex1/1 */ -#define RADEON_EMIT_PP_TXFILTER_2 16 /* tex2/6 */ -#define RADEON_EMIT_PP_BORDER_COLOR_2 17 /* tex2/1 */ -#define RADEON_EMIT_SE_ZBIAS_FACTOR 18 /* zbias/2 */ -#define RADEON_EMIT_SE_TCL_OUTPUT_VTX_FMT 19 /* tcl/11 */ -#define RADEON_EMIT_SE_TCL_MATERIAL_EMMISSIVE_RED 20 /* material/17 */ -#define R200_EMIT_PP_TXCBLEND_0 21 /* tex0/4 */ -#define R200_EMIT_PP_TXCBLEND_1 22 /* tex1/4 */ -#define R200_EMIT_PP_TXCBLEND_2 23 /* tex2/4 */ -#define R200_EMIT_PP_TXCBLEND_3 24 /* tex3/4 */ -#define R200_EMIT_PP_TXCBLEND_4 25 /* tex4/4 */ -#define R200_EMIT_PP_TXCBLEND_5 26 /* tex5/4 */ -#define R200_EMIT_PP_TXCBLEND_6 27 /* /4 */ -#define R200_EMIT_PP_TXCBLEND_7 28 /* /4 */ -#define R200_EMIT_TCL_LIGHT_MODEL_CTL_0 29 /* tcl/7 */ -#define R200_EMIT_TFACTOR_0 30 /* tf/7 */ -#define R200_EMIT_VTX_FMT_0 31 /* vtx/5 */ -#define R200_EMIT_VAP_CTL 32 /* vap/1 */ -#define R200_EMIT_MATRIX_SELECT_0 33 /* msl/5 */ -#define R200_EMIT_TEX_PROC_CTL_2 34 /* tcg/5 */ -#define R200_EMIT_TCL_UCP_VERT_BLEND_CTL 35 /* tcl/1 */ -#define R200_EMIT_PP_TXFILTER_0 36 /* tex0/6 */ -#define R200_EMIT_PP_TXFILTER_1 37 /* tex1/6 */ -#define R200_EMIT_PP_TXFILTER_2 38 /* tex2/6 */ -#define R200_EMIT_PP_TXFILTER_3 39 /* tex3/6 */ -#define R200_EMIT_PP_TXFILTER_4 40 /* tex4/6 */ -#define R200_EMIT_PP_TXFILTER_5 41 /* tex5/6 */ -#define R200_EMIT_PP_TXOFFSET_0 42 /* tex0/1 */ -#define R200_EMIT_PP_TXOFFSET_1 43 /* tex1/1 */ -#define R200_EMIT_PP_TXOFFSET_2 44 /* tex2/1 */ -#define R200_EMIT_PP_TXOFFSET_3 45 /* tex3/1 */ -#define R200_EMIT_PP_TXOFFSET_4 46 /* tex4/1 */ -#define R200_EMIT_PP_TXOFFSET_5 47 /* tex5/1 */ -#define R200_EMIT_VTE_CNTL 48 /* vte/1 */ -#define R200_EMIT_OUTPUT_VTX_COMP_SEL 49 /* vtx/1 */ -#define R200_EMIT_PP_TAM_DEBUG3 50 /* tam/1 */ -#define R200_EMIT_PP_CNTL_X 51 /* cst/1 */ -#define R200_EMIT_RB3D_DEPTHXY_OFFSET 52 /* cst/1 */ -#define R200_EMIT_RE_AUX_SCISSOR_CNTL 53 /* cst/1 */ -#define R200_EMIT_RE_SCISSOR_TL_0 54 /* cst/2 */ -#define R200_EMIT_RE_SCISSOR_TL_1 55 /* cst/2 */ -#define R200_EMIT_RE_SCISSOR_TL_2 56 /* cst/2 */ -#define R200_EMIT_SE_VAP_CNTL_STATUS 57 /* cst/1 */ -#define R200_EMIT_SE_VTX_STATE_CNTL 58 /* cst/1 */ -#define R200_EMIT_RE_POINTSIZE 59 /* cst/1 */ -#define R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0 60 /* cst/4 */ -#define R200_EMIT_PP_CUBIC_FACES_0 61 -#define R200_EMIT_PP_CUBIC_OFFSETS_0 62 -#define R200_EMIT_PP_CUBIC_FACES_1 63 -#define R200_EMIT_PP_CUBIC_OFFSETS_1 64 -#define R200_EMIT_PP_CUBIC_FACES_2 65 -#define R200_EMIT_PP_CUBIC_OFFSETS_2 66 -#define R200_EMIT_PP_CUBIC_FACES_3 67 -#define R200_EMIT_PP_CUBIC_OFFSETS_3 68 -#define R200_EMIT_PP_CUBIC_FACES_4 69 -#define R200_EMIT_PP_CUBIC_OFFSETS_4 70 -#define R200_EMIT_PP_CUBIC_FACES_5 71 -#define R200_EMIT_PP_CUBIC_OFFSETS_5 72 -#define RADEON_EMIT_PP_TEX_SIZE_0 73 -#define RADEON_EMIT_PP_TEX_SIZE_1 74 -#define RADEON_EMIT_PP_TEX_SIZE_2 75 -#define R200_EMIT_RB3D_BLENDCOLOR 76 -#define R200_EMIT_TCL_POINT_SPRITE_CNTL 77 -#define RADEON_EMIT_PP_CUBIC_FACES_0 78 -#define RADEON_EMIT_PP_CUBIC_OFFSETS_T0 79 -#define RADEON_EMIT_PP_CUBIC_FACES_1 80 -#define RADEON_EMIT_PP_CUBIC_OFFSETS_T1 81 -#define RADEON_EMIT_PP_CUBIC_FACES_2 82 -#define RADEON_EMIT_PP_CUBIC_OFFSETS_T2 83 -#define R200_EMIT_PP_TRI_PERF_CNTL 84 -#define RADEON_MAX_STATE_PACKETS 85 - - -/* Commands understood by cmd_buffer ioctl. More can be added but - * obviously these can't be removed or changed: - */ -#define RADEON_CMD_PACKET 1 /* emit one of the register packets above */ -#define RADEON_CMD_SCALARS 2 /* emit scalar data */ -#define RADEON_CMD_VECTORS 3 /* emit vector data */ -#define RADEON_CMD_DMA_DISCARD 4 /* discard current dma buf */ -#define RADEON_CMD_PACKET3 5 /* emit hw packet */ -#define RADEON_CMD_PACKET3_CLIP 6 /* emit hw packet wrapped in cliprects */ -#define RADEON_CMD_SCALARS2 7 /* r200 stopgap */ -#define RADEON_CMD_WAIT 8 /* emit hw wait commands -- note: - * doesn't make the cpu wait, just - * the graphics hardware */ - - -typedef union { - int i; - struct { - unsigned char cmd_type, pad0, pad1, pad2; - } header; - struct { - unsigned char cmd_type, packet_id, pad0, pad1; - } packet; - struct { - unsigned char cmd_type, offset, stride, count; - } scalars; - struct { - unsigned char cmd_type, offset, stride, count; - } vectors; - struct { - unsigned char cmd_type, buf_idx, pad0, pad1; - } dma; - struct { - unsigned char cmd_type, flags, pad0, pad1; - } wait; -} drm_radeon_cmd_header_t; - -#define RADEON_WAIT_2D 0x1 -#define RADEON_WAIT_3D 0x2 - - -#define RADEON_FRONT 0x1 -#define RADEON_BACK 0x2 -#define RADEON_DEPTH 0x4 -#define RADEON_STENCIL 0x8 -#define RADEON_CLEAR_FASTZ 0x80000000 -#define RADEON_USE_HIERZ 0x40000000 -#define RADEON_USE_COMP_ZBUF 0x20000000 - -/* Primitive types - */ -#define RADEON_POINTS 0x1 -#define RADEON_LINES 0x2 -#define RADEON_LINE_STRIP 0x3 -#define RADEON_TRIANGLES 0x4 -#define RADEON_TRIANGLE_FAN 0x5 -#define RADEON_TRIANGLE_STRIP 0x6 - -/* Vertex/indirect buffer size - */ -#define RADEON_BUFFER_SIZE 65536 - -/* Byte offsets for indirect buffer data - */ -#define RADEON_INDEX_PRIM_OFFSET 20 - -#define RADEON_SCRATCH_REG_OFFSET 32 - -#define RADEON_NR_SAREA_CLIPRECTS 12 - -/* There are 2 heaps (local/GART). Each region within a heap is a - * minimum of 64k, and there are at most 64 of them per heap. - */ -#define RADEON_LOCAL_TEX_HEAP 0 -#define RADEON_GART_TEX_HEAP 1 -#define RADEON_NR_TEX_HEAPS 2 -#define RADEON_NR_TEX_REGIONS 64 -#define RADEON_LOG_TEX_GRANULARITY 16 - -#define RADEON_MAX_TEXTURE_LEVELS 12 -#define RADEON_MAX_TEXTURE_UNITS 3 - -#define RADEON_MAX_SURFACES 8 - -/* Blits have strict offset rules. All blit offset must be aligned on - * a 1K-byte boundary. - */ -#define RADEON_OFFSET_SHIFT 10 -#define RADEON_OFFSET_ALIGN (1 << RADEON_OFFSET_SHIFT) -#define RADEON_OFFSET_MASK (RADEON_OFFSET_ALIGN - 1) - -#endif /* __RADEON_SAREA_DEFINES__ */ - -typedef struct { - unsigned int red; - unsigned int green; - unsigned int blue; - unsigned int alpha; -} radeon_color_regs_t; - -typedef struct { - /* Context state */ - unsigned int pp_misc; /* 0x1c14 */ - unsigned int pp_fog_color; - unsigned int re_solid_color; - unsigned int rb3d_blendcntl; - unsigned int rb3d_depthoffset; - unsigned int rb3d_depthpitch; - unsigned int rb3d_zstencilcntl; - - unsigned int pp_cntl; /* 0x1c38 */ - unsigned int rb3d_cntl; - unsigned int rb3d_coloroffset; - unsigned int re_width_height; - unsigned int rb3d_colorpitch; - unsigned int se_cntl; - - /* Vertex format state */ - unsigned int se_coord_fmt; /* 0x1c50 */ - - /* Line state */ - unsigned int re_line_pattern; /* 0x1cd0 */ - unsigned int re_line_state; - - unsigned int se_line_width; /* 0x1db8 */ - - /* Bumpmap state */ - unsigned int pp_lum_matrix; /* 0x1d00 */ - - unsigned int pp_rot_matrix_0; /* 0x1d58 */ - unsigned int pp_rot_matrix_1; - - /* Mask state */ - unsigned int rb3d_stencilrefmask; /* 0x1d7c */ - unsigned int rb3d_ropcntl; - unsigned int rb3d_planemask; - - /* Viewport state */ - unsigned int se_vport_xscale; /* 0x1d98 */ - unsigned int se_vport_xoffset; - unsigned int se_vport_yscale; - unsigned int se_vport_yoffset; - unsigned int se_vport_zscale; - unsigned int se_vport_zoffset; - - /* Setup state */ - unsigned int se_cntl_status; /* 0x2140 */ - - /* Misc state */ - unsigned int re_top_left; /* 0x26c0 */ - unsigned int re_misc; -} drm_radeon_context_regs_t; - -typedef struct { - /* Zbias state */ - unsigned int se_zbias_factor; /* 0x1dac */ - unsigned int se_zbias_constant; -} drm_radeon_context2_regs_t; - - -/* Setup registers for each texture unit - */ -typedef struct { - unsigned int pp_txfilter; - unsigned int pp_txformat; - unsigned int pp_txoffset; - unsigned int pp_txcblend; - unsigned int pp_txablend; - unsigned int pp_tfactor; - unsigned int pp_border_color; -} drm_radeon_texture_regs_t; - -typedef struct { - unsigned int start; - unsigned int finish; - unsigned int prim:8; - unsigned int stateidx:8; - unsigned int numverts:16; /* overloaded as offset/64 for elt prims */ - unsigned int vc_format; /* vertex format */ -} drm_radeon_prim_t; - - -typedef struct { - drm_radeon_context_regs_t context; - drm_radeon_texture_regs_t tex[RADEON_MAX_TEXTURE_UNITS]; - drm_radeon_context2_regs_t context2; - unsigned int dirty; -} drm_radeon_state_t; - - -typedef struct { - /* The channel for communication of state information to the - * kernel on firing a vertex buffer with either of the - * obsoleted vertex/index ioctls. - */ - drm_radeon_context_regs_t context_state; - drm_radeon_texture_regs_t tex_state[RADEON_MAX_TEXTURE_UNITS]; - unsigned int dirty; - unsigned int vertsize; - unsigned int vc_format; - - /* The current cliprects, or a subset thereof. - */ - drm_clip_rect_t boxes[RADEON_NR_SAREA_CLIPRECTS]; - unsigned int nbox; - - /* Counters for client-side throttling of rendering clients. - */ - unsigned int last_frame; - unsigned int last_dispatch; - unsigned int last_clear; - - drm_tex_region_t tex_list[RADEON_NR_TEX_HEAPS][RADEON_NR_TEX_REGIONS+1]; - unsigned int tex_age[RADEON_NR_TEX_HEAPS]; - int ctx_owner; - int pfState; /* number of 3d windows (0,1,2ormore) */ - int pfCurrentPage; /* which buffer is being displayed? */ - int crtc2_base; /* CRTC2 frame offset */ - int tiling_enabled; /* set by drm, read by 2d + 3d clients */ -} drm_radeon_sarea_t; - - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (xf86drmRadeon.h) - * - * KW: actually it's illegal to change any of this (backwards compatibility). - */ - -/* Radeon specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ -#define DRM_RADEON_CP_INIT 0x00 -#define DRM_RADEON_CP_START 0x01 -#define DRM_RADEON_CP_STOP 0x02 -#define DRM_RADEON_CP_RESET 0x03 -#define DRM_RADEON_CP_IDLE 0x04 -#define DRM_RADEON_RESET 0x05 -#define DRM_RADEON_FULLSCREEN 0x06 -#define DRM_RADEON_SWAP 0x07 -#define DRM_RADEON_CLEAR 0x08 -#define DRM_RADEON_VERTEX 0x09 -#define DRM_RADEON_INDICES 0x0A -#define DRM_RADEON_NOT_USED -#define DRM_RADEON_STIPPLE 0x0C -#define DRM_RADEON_INDIRECT 0x0D -#define DRM_RADEON_TEXTURE 0x0E -#define DRM_RADEON_VERTEX2 0x0F -#define DRM_RADEON_CMDBUF 0x10 -#define DRM_RADEON_GETPARAM 0x11 -#define DRM_RADEON_FLIP 0x12 -#define DRM_RADEON_ALLOC 0x13 -#define DRM_RADEON_FREE 0x14 -#define DRM_RADEON_INIT_HEAP 0x15 -#define DRM_RADEON_IRQ_EMIT 0x16 -#define DRM_RADEON_IRQ_WAIT 0x17 -#define DRM_RADEON_CP_RESUME 0x18 -#define DRM_RADEON_SETPARAM 0x19 -#define DRM_RADEON_SURF_ALLOC 0x1a -#define DRM_RADEON_SURF_FREE 0x1b - -#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t) -#define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START) -#define DRM_IOCTL_RADEON_CP_STOP DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_STOP, drm_radeon_cp_stop_t) -#define DRM_IOCTL_RADEON_CP_RESET DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_RESET) -#define DRM_IOCTL_RADEON_CP_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_IDLE) -#define DRM_IOCTL_RADEON_RESET DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_RESET) -#define DRM_IOCTL_RADEON_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_FULLSCREEN, drm_radeon_fullscreen_t) -#define DRM_IOCTL_RADEON_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_SWAP) -#define DRM_IOCTL_RADEON_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CLEAR, drm_radeon_clear_t) -#define DRM_IOCTL_RADEON_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_VERTEX, drm_radeon_vertex_t) -#define DRM_IOCTL_RADEON_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_INDICES, drm_radeon_indices_t) -#define DRM_IOCTL_RADEON_STIPPLE DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_STIPPLE, drm_radeon_stipple_t) -#define DRM_IOCTL_RADEON_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INDIRECT, drm_radeon_indirect_t) -#define DRM_IOCTL_RADEON_TEXTURE DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_TEXTURE, drm_radeon_texture_t) -#define DRM_IOCTL_RADEON_VERTEX2 DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_VERTEX2, drm_radeon_vertex2_t) -#define DRM_IOCTL_RADEON_CMDBUF DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CMDBUF, drm_radeon_cmd_buffer_t) -#define DRM_IOCTL_RADEON_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GETPARAM, drm_radeon_getparam_t) -#define DRM_IOCTL_RADEON_FLIP DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_FLIP) -#define DRM_IOCTL_RADEON_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_ALLOC, drm_radeon_mem_alloc_t) -#define DRM_IOCTL_RADEON_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_FREE, drm_radeon_mem_free_t) -#define DRM_IOCTL_RADEON_INIT_HEAP DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_INIT_HEAP, drm_radeon_mem_init_heap_t) -#define DRM_IOCTL_RADEON_IRQ_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_IRQ_EMIT, drm_radeon_irq_emit_t) -#define DRM_IOCTL_RADEON_IRQ_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_IRQ_WAIT, drm_radeon_irq_wait_t) -#define DRM_IOCTL_RADEON_CP_RESUME DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_RESUME) -#define DRM_IOCTL_RADEON_SETPARAM DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SETPARAM, drm_radeon_setparam_t) -#define DRM_IOCTL_RADEON_SURF_ALLOC DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SURF_ALLOC, drm_radeon_surface_alloc_t) -#define DRM_IOCTL_RADEON_SURF_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SURF_FREE, drm_radeon_surface_free_t) - -typedef struct drm_radeon_init { - enum { - RADEON_INIT_CP = 0x01, - RADEON_CLEANUP_CP = 0x02, - RADEON_INIT_R200_CP = 0x03, - RADEON_INIT_R300_CP = 0x04 - } func; - unsigned long sarea_priv_offset; - int is_pci; /* not used, driver asks hardware */ - int cp_mode; - int gart_size; - int ring_size; - int usec_timeout; - - unsigned int fb_bpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - unsigned int depth_bpp; - unsigned int depth_offset, depth_pitch; - - unsigned long fb_offset; - unsigned long mmio_offset; - unsigned long ring_offset; - unsigned long ring_rptr_offset; - unsigned long buffers_offset; - unsigned long gart_textures_offset; -} drm_radeon_init_t; - -typedef struct drm_radeon_cp_stop { - int flush; - int idle; -} drm_radeon_cp_stop_t; - -typedef struct drm_radeon_fullscreen { - enum { - RADEON_INIT_FULLSCREEN = 0x01, - RADEON_CLEANUP_FULLSCREEN = 0x02 - } func; -} drm_radeon_fullscreen_t; - -#define CLEAR_X1 0 -#define CLEAR_Y1 1 -#define CLEAR_X2 2 -#define CLEAR_Y2 3 -#define CLEAR_DEPTH 4 - -typedef union drm_radeon_clear_rect { - float f[5]; - unsigned int ui[5]; -} drm_radeon_clear_rect_t; - -typedef struct drm_radeon_clear { - unsigned int flags; - unsigned int clear_color; - unsigned int clear_depth; - unsigned int color_mask; - unsigned int depth_mask; /* misnamed field: should be stencil */ - drm_radeon_clear_rect_t __user *depth_boxes; -} drm_radeon_clear_t; - -typedef struct drm_radeon_vertex { - int prim; - int idx; /* Index of vertex buffer */ - int count; /* Number of vertices in buffer */ - int discard; /* Client finished with buffer? */ -} drm_radeon_vertex_t; - -typedef struct drm_radeon_indices { - int prim; - int idx; - int start; - int end; - int discard; /* Client finished with buffer? */ -} drm_radeon_indices_t; - -/* v1.2 - obsoletes drm_radeon_vertex and drm_radeon_indices - * - allows multiple primitives and state changes in a single ioctl - * - supports driver change to emit native primitives - */ -typedef struct drm_radeon_vertex2 { - int idx; /* Index of vertex buffer */ - int discard; /* Client finished with buffer? */ - int nr_states; - drm_radeon_state_t __user *state; - int nr_prims; - drm_radeon_prim_t __user *prim; -} drm_radeon_vertex2_t; - -/* v1.3 - obsoletes drm_radeon_vertex2 - * - allows arbitarily large cliprect list - * - allows updating of tcl packet, vector and scalar state - * - allows memory-efficient description of state updates - * - allows state to be emitted without a primitive - * (for clears, ctx switches) - * - allows more than one dma buffer to be referenced per ioctl - * - supports tcl driver - * - may be extended in future versions with new cmd types, packets - */ -typedef struct drm_radeon_cmd_buffer { - int bufsz; - char __user *buf; - int nbox; - drm_clip_rect_t __user *boxes; -} drm_radeon_cmd_buffer_t; - -typedef struct drm_radeon_tex_image { - unsigned int x, y; /* Blit coordinates */ - unsigned int width, height; - const void __user *data; -} drm_radeon_tex_image_t; - -typedef struct drm_radeon_texture { - unsigned int offset; - int pitch; - int format; - int width; /* Texture image coordinates */ - int height; - drm_radeon_tex_image_t __user *image; -} drm_radeon_texture_t; - -typedef struct drm_radeon_stipple { - unsigned int __user *mask; -} drm_radeon_stipple_t; - -typedef struct drm_radeon_indirect { - int idx; - int start; - int end; - int discard; -} drm_radeon_indirect_t; - - -/* 1.3: An ioctl to get parameters that aren't available to the 3d - * client any other way. - */ -#define RADEON_PARAM_GART_BUFFER_OFFSET 1 /* card offset of 1st GART buffer */ -#define RADEON_PARAM_LAST_FRAME 2 -#define RADEON_PARAM_LAST_DISPATCH 3 -#define RADEON_PARAM_LAST_CLEAR 4 -/* Added with DRM version 1.6. */ -#define RADEON_PARAM_IRQ_NR 5 -#define RADEON_PARAM_GART_BASE 6 /* card offset of GART base */ -/* Added with DRM version 1.8. */ -#define RADEON_PARAM_REGISTER_HANDLE 7 /* for drmMap() */ -#define RADEON_PARAM_STATUS_HANDLE 8 -#define RADEON_PARAM_SAREA_HANDLE 9 -#define RADEON_PARAM_GART_TEX_HANDLE 10 -#define RADEON_PARAM_SCRATCH_OFFSET 11 - -typedef struct drm_radeon_getparam { - int param; - void __user *value; -} drm_radeon_getparam_t; - -/* 1.6: Set up a memory manager for regions of shared memory: - */ -#define RADEON_MEM_REGION_GART 1 -#define RADEON_MEM_REGION_FB 2 - -typedef struct drm_radeon_mem_alloc { - int region; - int alignment; - int size; - int __user *region_offset; /* offset from start of fb or GART */ -} drm_radeon_mem_alloc_t; - -typedef struct drm_radeon_mem_free { - int region; - int region_offset; -} drm_radeon_mem_free_t; - -typedef struct drm_radeon_mem_init_heap { - int region; - int size; - int start; -} drm_radeon_mem_init_heap_t; - - -/* 1.6: Userspace can request & wait on irq's: - */ -typedef struct drm_radeon_irq_emit { - int __user *irq_seq; -} drm_radeon_irq_emit_t; - -typedef struct drm_radeon_irq_wait { - int irq_seq; -} drm_radeon_irq_wait_t; - - -/* 1.10: Clients tell the DRM where they think the framebuffer is located in - * the card's address space, via a new generic ioctl to set parameters - */ - -typedef struct drm_radeon_setparam { - unsigned int param; - int64_t value; -} drm_radeon_setparam_t; - -#define RADEON_SETPARAM_FB_LOCATION 1 /* determined framebuffer location */ -#define RADEON_SETPARAM_SWITCH_TILING 2 /* enable/disable color tiling */ - -/* 1.14: Clients can allocate/free a surface - */ -typedef struct drm_radeon_surface_alloc { - unsigned int address; - unsigned int size; - unsigned int flags; -} drm_radeon_surface_alloc_t; - -typedef struct drm_radeon_surface_free { - unsigned int address; -} drm_radeon_surface_free_t; - - -#endif diff --git a/shared/radeon_drv.h b/shared/radeon_drv.h deleted file mode 100644 index 609be6595..000000000 --- a/shared/radeon_drv.h +++ /dev/null @@ -1,1011 +0,0 @@ -/* radeon_drv.h -- Private header for radeon driver -*- linux-c -*- - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Fremont, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Kevin E. Martin <martin@valinux.com> - * Gareth Hughes <gareth@valinux.com> - */ - -#ifndef __RADEON_DRV_H__ -#define __RADEON_DRV_H__ - -enum radeon_family { - CHIP_R100, - CHIP_RS100, - CHIP_RV100, - CHIP_R200, - CHIP_RV200, - CHIP_RS200, - CHIP_R250, - CHIP_RS250, - CHIP_RV250, - CHIP_RV280, - CHIP_R300, - CHIP_RS300, - CHIP_RV350, - CHIP_LAST, -}; - -enum radeon_cp_microcode_version { - UCODE_R100, - UCODE_R200, - UCODE_R300, -}; - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) -#include "radeon_i2c.h" -#endif - -/* - * Chip flags - */ -enum radeon_chip_flags { - CHIP_FAMILY_MASK = 0x0000ffffUL, - CHIP_FLAGS_MASK = 0xffff0000UL, - CHIP_IS_MOBILITY = 0x00010000UL, - CHIP_IS_IGP = 0x00020000UL, - CHIP_SINGLE_CRTC = 0x00040000UL, - CHIP_IS_AGP = 0x00080000UL, - CHIP_HAS_HIERZ = 0x00100000UL, -}; - -#define GET_RING_HEAD(dev_priv) DRM_READ32( (dev_priv)->ring_rptr, 0 ) -#define SET_RING_HEAD(dev_priv,val) DRM_WRITE32( (dev_priv)->ring_rptr, 0, (val) ) - -typedef struct drm_radeon_freelist { - unsigned int age; - drm_buf_t *buf; - struct drm_radeon_freelist *next; - struct drm_radeon_freelist *prev; -} drm_radeon_freelist_t; - -typedef struct drm_radeon_ring_buffer { - u32 *start; - u32 *end; - int size; - int size_l2qw; - - u32 tail; - u32 tail_mask; - int space; - - int high_mark; -} drm_radeon_ring_buffer_t; - -typedef struct drm_radeon_depth_clear_t { - u32 rb3d_cntl; - u32 rb3d_zstencilcntl; - u32 se_cntl; -} drm_radeon_depth_clear_t; - -struct drm_radeon_driver_file_fields { - int64_t radeon_fb_delta; -}; - -struct mem_block { - struct mem_block *next; - struct mem_block *prev; - int start; - int size; - DRMFILE filp; /* 0: free, -1: heap, other: real files */ -}; - -struct radeon_surface { - int refcount; - u32 lower; - u32 upper; - u32 flags; -}; - -struct radeon_virt_surface { - int surface_index; - u32 lower; - u32 upper; - u32 flags; - DRMFILE filp; -}; - -typedef struct drm_radeon_private { - - drm_radeon_ring_buffer_t ring; - drm_radeon_sarea_t *sarea_priv; - - u32 fb_location; - - int gart_size; - u32 gart_vm_start; - unsigned long gart_buffers_offset; - - int cp_mode; - int cp_running; - - drm_radeon_freelist_t *head; - drm_radeon_freelist_t *tail; - int last_buf; - volatile u32 *scratch; - int writeback_works; - - int usec_timeout; - - int microcode_version; - - unsigned long phys_pci_gart; - dma_addr_t bus_pci_gart; - - struct { - u32 boxes; - int freelist_timeouts; - int freelist_loops; - int requested_bufs; - int last_frame_reads; - int last_clear_reads; - int clears; - int texture_uploads; - } stats; - - int do_boxes; - int page_flipping; - int current_page; - - u32 color_fmt; - unsigned int front_offset; - unsigned int front_pitch; - unsigned int back_offset; - unsigned int back_pitch; - - u32 depth_fmt; - unsigned int depth_offset; - unsigned int depth_pitch; - - u32 front_pitch_offset; - u32 back_pitch_offset; - u32 depth_pitch_offset; - - drm_radeon_depth_clear_t depth_clear; - - unsigned long fb_offset; - unsigned long mmio_offset; - unsigned long ring_offset; - unsigned long ring_rptr_offset; - unsigned long buffers_offset; - unsigned long gart_textures_offset; - - drm_local_map_t *sarea; - drm_local_map_t *mmio; - drm_local_map_t *cp_ring; - drm_local_map_t *ring_rptr; - drm_local_map_t *gart_textures; - - struct mem_block *gart_heap; - struct mem_block *fb_heap; - - /* SW interrupt */ - wait_queue_head_t swi_queue; - atomic_t swi_emitted; - - struct radeon_surface surfaces[RADEON_MAX_SURFACES]; - struct radeon_virt_surface virt_surfaces[2*RADEON_MAX_SURFACES]; - - /* starting from here on, data is preserved accross an open */ - uint32_t flags; /* see radeon_chip_flags */ - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) - struct radeon_i2c_chan i2c[4]; -#endif -} drm_radeon_private_t; - -typedef struct drm_radeon_buf_priv { - u32 age; -} drm_radeon_buf_priv_t; - - /* radeon_cp.c */ -extern int radeon_cp_init( DRM_IOCTL_ARGS ); -extern int radeon_cp_start( DRM_IOCTL_ARGS ); -extern int radeon_cp_stop( DRM_IOCTL_ARGS ); -extern int radeon_cp_reset( DRM_IOCTL_ARGS ); -extern int radeon_cp_idle( DRM_IOCTL_ARGS ); -extern int radeon_cp_resume( DRM_IOCTL_ARGS ); -extern int radeon_engine_reset( DRM_IOCTL_ARGS ); -extern int radeon_fullscreen( DRM_IOCTL_ARGS ); -extern int radeon_cp_buffers( DRM_IOCTL_ARGS ); - -extern void radeon_freelist_reset( drm_device_t *dev ); -extern drm_buf_t *radeon_freelist_get( drm_device_t *dev ); - -extern int radeon_wait_ring( drm_radeon_private_t *dev_priv, int n ); - -extern int radeon_do_cp_idle( drm_radeon_private_t *dev_priv ); -extern int radeon_do_cleanup_cp( drm_device_t *dev ); -extern int radeon_do_cleanup_pageflip( drm_device_t *dev ); - - /* radeon_state.c */ -extern int radeon_cp_clear( DRM_IOCTL_ARGS ); -extern int radeon_cp_swap( DRM_IOCTL_ARGS ); -extern int radeon_cp_vertex( DRM_IOCTL_ARGS ); -extern int radeon_cp_indices( DRM_IOCTL_ARGS ); -extern int radeon_cp_texture( DRM_IOCTL_ARGS ); -extern int radeon_cp_stipple( DRM_IOCTL_ARGS ); -extern int radeon_cp_indirect( DRM_IOCTL_ARGS ); -extern int radeon_cp_vertex2( DRM_IOCTL_ARGS ); -extern int radeon_cp_cmdbuf( DRM_IOCTL_ARGS ); -extern int radeon_cp_getparam( DRM_IOCTL_ARGS ); -extern int radeon_cp_setparam( DRM_IOCTL_ARGS ); -extern int radeon_cp_flip( DRM_IOCTL_ARGS ); - -extern int radeon_mem_alloc( DRM_IOCTL_ARGS ); -extern int radeon_mem_free( DRM_IOCTL_ARGS ); -extern int radeon_mem_init_heap( DRM_IOCTL_ARGS ); -extern void radeon_mem_takedown( struct mem_block **heap ); -extern void radeon_mem_release( DRMFILE filp, struct mem_block *heap ); -extern int radeon_surface_alloc( DRM_IOCTL_ARGS ); -extern int radeon_surface_free( DRM_IOCTL_ARGS ); - - /* radeon_irq.c */ -extern int radeon_irq_emit( DRM_IOCTL_ARGS ); -extern int radeon_irq_wait( DRM_IOCTL_ARGS ); - -extern int radeon_emit_and_wait_irq(drm_device_t *dev); -extern int radeon_wait_irq(drm_device_t *dev, int swi_nr); -extern int radeon_emit_irq(drm_device_t *dev); - -extern void radeon_do_release(drm_device_t *dev); -extern int radeon_driver_vblank_wait(drm_device_t *dev, unsigned int *sequence); -extern irqreturn_t radeon_driver_irq_handler( DRM_IRQ_ARGS ); -extern void radeon_driver_irq_preinstall( drm_device_t *dev ); -extern void radeon_driver_irq_postinstall( drm_device_t *dev ); -extern void radeon_driver_irq_uninstall( drm_device_t *dev ); - -/* Flags for stats.boxes - */ -#define RADEON_BOX_DMA_IDLE 0x1 -#define RADEON_BOX_RING_FULL 0x2 -#define RADEON_BOX_FLIP 0x4 -#define RADEON_BOX_WAIT_IDLE 0x8 -#define RADEON_BOX_TEXTURE_LOAD 0x10 - -/* Register definitions, register access macros and drmAddMap constants - * for Radeon kernel driver. - */ -#define RADEON_AGP_COMMAND 0x0f60 -#define RADEON_AGP_COMMAND_PCI_CONFIG 0x0060 /* offset in PCI config*/ -# define RADEON_AGP_ENABLE (1<<8) - -#define RADEON_AUX_SCISSOR_CNTL 0x26f0 -# define RADEON_EXCLUSIVE_SCISSOR_0 (1 << 24) -# define RADEON_EXCLUSIVE_SCISSOR_1 (1 << 25) -# define RADEON_EXCLUSIVE_SCISSOR_2 (1 << 26) -# define RADEON_SCISSOR_0_ENABLE (1 << 28) -# define RADEON_SCISSOR_1_ENABLE (1 << 29) -# define RADEON_SCISSOR_2_ENABLE (1 << 30) - -#define RADEON_BUS_CNTL 0x0030 -# define RADEON_BUS_MASTER_DIS (1 << 6) - -#define RADEON_CLOCK_CNTL_DATA 0x000c -# define RADEON_PLL_WR_EN (1 << 7) -#define RADEON_CLOCK_CNTL_INDEX 0x0008 -#define RADEON_CONFIG_APER_SIZE 0x0108 -#define RADEON_CRTC_OFFSET 0x0224 -#define RADEON_CRTC_OFFSET_CNTL 0x0228 -# define RADEON_CRTC_TILE_EN (1 << 15) -# define RADEON_CRTC_OFFSET_FLIP_CNTL (1 << 16) -#define RADEON_CRTC2_OFFSET 0x0324 -#define RADEON_CRTC2_OFFSET_CNTL 0x0328 - -#define RADEON_MPP_TB_CONFIG 0x01c0 -#define RADEON_MEM_CNTL 0x0140 -#define RADEON_MEM_SDRAM_MODE_REG 0x0158 -#define RADEON_AGP_BASE 0x0170 - -#define RADEON_RB3D_COLOROFFSET 0x1c40 -#define RADEON_RB3D_COLORPITCH 0x1c48 - -#define RADEON_DP_GUI_MASTER_CNTL 0x146c -# define RADEON_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0) -# define RADEON_GMC_DST_PITCH_OFFSET_CNTL (1 << 1) -# define RADEON_GMC_BRUSH_SOLID_COLOR (13 << 4) -# define RADEON_GMC_BRUSH_NONE (15 << 4) -# define RADEON_GMC_DST_16BPP (4 << 8) -# define RADEON_GMC_DST_24BPP (5 << 8) -# define RADEON_GMC_DST_32BPP (6 << 8) -# define RADEON_GMC_DST_DATATYPE_SHIFT 8 -# define RADEON_GMC_SRC_DATATYPE_COLOR (3 << 12) -# define RADEON_DP_SRC_SOURCE_MEMORY (2 << 24) -# define RADEON_DP_SRC_SOURCE_HOST_DATA (3 << 24) -# define RADEON_GMC_CLR_CMP_CNTL_DIS (1 << 28) -# define RADEON_GMC_WR_MSK_DIS (1 << 30) -# define RADEON_ROP3_S 0x00cc0000 -# define RADEON_ROP3_P 0x00f00000 -#define RADEON_DP_WRITE_MASK 0x16cc -#define RADEON_DST_PITCH_OFFSET 0x142c -#define RADEON_DST_PITCH_OFFSET_C 0x1c80 -# define RADEON_DST_TILE_LINEAR (0 << 30) -# define RADEON_DST_TILE_MACRO (1 << 30) -# define RADEON_DST_TILE_MICRO (2 << 30) -# define RADEON_DST_TILE_BOTH (3 << 30) - -#define RADEON_SCRATCH_REG0 0x15e0 -#define RADEON_SCRATCH_REG1 0x15e4 -#define RADEON_SCRATCH_REG2 0x15e8 -#define RADEON_SCRATCH_REG3 0x15ec -#define RADEON_SCRATCH_REG4 0x15f0 -#define RADEON_SCRATCH_REG5 0x15f4 -#define RADEON_SCRATCH_UMSK 0x0770 -#define RADEON_SCRATCH_ADDR 0x0774 - -#define RADEON_SCRATCHOFF( x ) (RADEON_SCRATCH_REG_OFFSET + 4*(x)) - -#define GET_SCRATCH( x ) (dev_priv->writeback_works \ - ? DRM_READ32( dev_priv->ring_rptr, RADEON_SCRATCHOFF(x) ) \ - : RADEON_READ( RADEON_SCRATCH_REG0 + 4*(x) ) ) - - -#define RADEON_GEN_INT_CNTL 0x0040 -# define RADEON_CRTC_VBLANK_MASK (1 << 0) -# define RADEON_GUI_IDLE_INT_ENABLE (1 << 19) -# define RADEON_SW_INT_ENABLE (1 << 25) - -#define RADEON_GEN_INT_STATUS 0x0044 -# define RADEON_CRTC_VBLANK_STAT (1 << 0) -# define RADEON_CRTC_VBLANK_STAT_ACK (1 << 0) -# define RADEON_GUI_IDLE_INT_TEST_ACK (1 << 19) -# define RADEON_SW_INT_TEST (1 << 25) -# define RADEON_SW_INT_TEST_ACK (1 << 25) -# define RADEON_SW_INT_FIRE (1 << 26) - -#define RADEON_HOST_PATH_CNTL 0x0130 -# define RADEON_HDP_SOFT_RESET (1 << 26) -# define RADEON_HDP_WC_TIMEOUT_MASK (7 << 28) -# define RADEON_HDP_WC_TIMEOUT_28BCLK (7 << 28) - -#define RADEON_ISYNC_CNTL 0x1724 -# define RADEON_ISYNC_ANY2D_IDLE3D (1 << 0) -# define RADEON_ISYNC_ANY3D_IDLE2D (1 << 1) -# define RADEON_ISYNC_TRIG2D_IDLE3D (1 << 2) -# define RADEON_ISYNC_TRIG3D_IDLE2D (1 << 3) -# define RADEON_ISYNC_WAIT_IDLEGUI (1 << 4) -# define RADEON_ISYNC_CPSCRATCH_IDLEGUI (1 << 5) - -#define RADEON_RBBM_GUICNTL 0x172c -# define RADEON_HOST_DATA_SWAP_NONE (0 << 0) -# define RADEON_HOST_DATA_SWAP_16BIT (1 << 0) -# define RADEON_HOST_DATA_SWAP_32BIT (2 << 0) -# define RADEON_HOST_DATA_SWAP_HDW (3 << 0) - -#define RADEON_MC_AGP_LOCATION 0x014c -#define RADEON_MC_FB_LOCATION 0x0148 -#define RADEON_MCLK_CNTL 0x0012 -# define RADEON_FORCEON_MCLKA (1 << 16) -# define RADEON_FORCEON_MCLKB (1 << 17) -# define RADEON_FORCEON_YCLKA (1 << 18) -# define RADEON_FORCEON_YCLKB (1 << 19) -# define RADEON_FORCEON_MC (1 << 20) -# define RADEON_FORCEON_AIC (1 << 21) - -#define RADEON_PP_BORDER_COLOR_0 0x1d40 -#define RADEON_PP_BORDER_COLOR_1 0x1d44 -#define RADEON_PP_BORDER_COLOR_2 0x1d48 -#define RADEON_PP_CNTL 0x1c38 -# define RADEON_SCISSOR_ENABLE (1 << 1) -#define RADEON_PP_LUM_MATRIX 0x1d00 -#define RADEON_PP_MISC 0x1c14 -#define RADEON_PP_ROT_MATRIX_0 0x1d58 -#define RADEON_PP_TXFILTER_0 0x1c54 -#define RADEON_PP_TXOFFSET_0 0x1c5c -#define RADEON_PP_TXFILTER_1 0x1c6c -#define RADEON_PP_TXFILTER_2 0x1c84 - -#define RADEON_RB2D_DSTCACHE_CTLSTAT 0x342c -# define RADEON_RB2D_DC_FLUSH (3 << 0) -# define RADEON_RB2D_DC_FREE (3 << 2) -# define RADEON_RB2D_DC_FLUSH_ALL 0xf -# define RADEON_RB2D_DC_BUSY (1 << 31) -#define RADEON_RB3D_CNTL 0x1c3c -# define RADEON_ALPHA_BLEND_ENABLE (1 << 0) -# define RADEON_PLANE_MASK_ENABLE (1 << 1) -# define RADEON_DITHER_ENABLE (1 << 2) -# define RADEON_ROUND_ENABLE (1 << 3) -# define RADEON_SCALE_DITHER_ENABLE (1 << 4) -# define RADEON_DITHER_INIT (1 << 5) -# define RADEON_ROP_ENABLE (1 << 6) -# define RADEON_STENCIL_ENABLE (1 << 7) -# define RADEON_Z_ENABLE (1 << 8) -# define RADEON_ZBLOCK16 (1 << 15) -#define RADEON_RB3D_DEPTHOFFSET 0x1c24 -#define RADEON_RB3D_DEPTHCLEARVALUE 0x3230 -#define RADEON_RB3D_DEPTHPITCH 0x1c28 -#define RADEON_RB3D_PLANEMASK 0x1d84 -#define RADEON_RB3D_STENCILREFMASK 0x1d7c -#define RADEON_RB3D_ZCACHE_MODE 0x3250 -#define RADEON_RB3D_ZCACHE_CTLSTAT 0x3254 -# define RADEON_RB3D_ZC_FLUSH (1 << 0) -# define RADEON_RB3D_ZC_FREE (1 << 2) -# define RADEON_RB3D_ZC_FLUSH_ALL 0x5 -# define RADEON_RB3D_ZC_BUSY (1 << 31) -#define RADEON_RB3D_ZSTENCILCNTL 0x1c2c -# define RADEON_Z_TEST_MASK (7 << 4) -# define RADEON_Z_TEST_ALWAYS (7 << 4) -# define RADEON_Z_HIERARCHY_ENABLE (1 << 8) -# define RADEON_STENCIL_TEST_ALWAYS (7 << 12) -# define RADEON_STENCIL_S_FAIL_REPLACE (2 << 16) -# define RADEON_STENCIL_ZPASS_REPLACE (2 << 20) -# define RADEON_STENCIL_ZFAIL_REPLACE (2 << 24) -# define RADEON_Z_COMPRESSION_ENABLE (1 << 28) -# define RADEON_FORCE_Z_DIRTY (1 << 29) -# define RADEON_Z_WRITE_ENABLE (1 << 30) -# define RADEON_Z_DECOMPRESSION_ENABLE (1 << 31) -#define RADEON_RBBM_SOFT_RESET 0x00f0 -# define RADEON_SOFT_RESET_CP (1 << 0) -# define RADEON_SOFT_RESET_HI (1 << 1) -# define RADEON_SOFT_RESET_SE (1 << 2) -# define RADEON_SOFT_RESET_RE (1 << 3) -# define RADEON_SOFT_RESET_PP (1 << 4) -# define RADEON_SOFT_RESET_E2 (1 << 5) -# define RADEON_SOFT_RESET_RB (1 << 6) -# define RADEON_SOFT_RESET_HDP (1 << 7) -#define RADEON_RBBM_STATUS 0x0e40 -# define RADEON_RBBM_FIFOCNT_MASK 0x007f -# define RADEON_RBBM_ACTIVE (1 << 31) -#define RADEON_RE_LINE_PATTERN 0x1cd0 -#define RADEON_RE_MISC 0x26c4 -#define RADEON_RE_TOP_LEFT 0x26c0 -#define RADEON_RE_WIDTH_HEIGHT 0x1c44 -#define RADEON_RE_STIPPLE_ADDR 0x1cc8 -#define RADEON_RE_STIPPLE_DATA 0x1ccc - -#define RADEON_SCISSOR_TL_0 0x1cd8 -#define RADEON_SCISSOR_BR_0 0x1cdc -#define RADEON_SCISSOR_TL_1 0x1ce0 -#define RADEON_SCISSOR_BR_1 0x1ce4 -#define RADEON_SCISSOR_TL_2 0x1ce8 -#define RADEON_SCISSOR_BR_2 0x1cec -#define RADEON_SE_COORD_FMT 0x1c50 -#define RADEON_SE_CNTL 0x1c4c -# define RADEON_FFACE_CULL_CW (0 << 0) -# define RADEON_BFACE_SOLID (3 << 1) -# define RADEON_FFACE_SOLID (3 << 3) -# define RADEON_FLAT_SHADE_VTX_LAST (3 << 6) -# define RADEON_DIFFUSE_SHADE_FLAT (1 << 8) -# define RADEON_DIFFUSE_SHADE_GOURAUD (2 << 8) -# define RADEON_ALPHA_SHADE_FLAT (1 << 10) -# define RADEON_ALPHA_SHADE_GOURAUD (2 << 10) -# define RADEON_SPECULAR_SHADE_FLAT (1 << 12) -# define RADEON_SPECULAR_SHADE_GOURAUD (2 << 12) -# define RADEON_FOG_SHADE_FLAT (1 << 14) -# define RADEON_FOG_SHADE_GOURAUD (2 << 14) -# define RADEON_VPORT_XY_XFORM_ENABLE (1 << 24) -# define RADEON_VPORT_Z_XFORM_ENABLE (1 << 25) -# define RADEON_VTX_PIX_CENTER_OGL (1 << 27) -# define RADEON_ROUND_MODE_TRUNC (0 << 28) -# define RADEON_ROUND_PREC_8TH_PIX (1 << 30) -#define RADEON_SE_CNTL_STATUS 0x2140 -#define RADEON_SE_LINE_WIDTH 0x1db8 -#define RADEON_SE_VPORT_XSCALE 0x1d98 -#define RADEON_SE_ZBIAS_FACTOR 0x1db0 -#define RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED 0x2210 -#define RADEON_SE_TCL_OUTPUT_VTX_FMT 0x2254 -#define RADEON_SE_TCL_VECTOR_INDX_REG 0x2200 -# define RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT 16 -# define RADEON_VEC_INDX_DWORD_COUNT_SHIFT 28 -#define RADEON_SE_TCL_VECTOR_DATA_REG 0x2204 -#define RADEON_SE_TCL_SCALAR_INDX_REG 0x2208 -# define RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT 16 -#define RADEON_SE_TCL_SCALAR_DATA_REG 0x220C -#define RADEON_SURFACE_ACCESS_FLAGS 0x0bf8 -#define RADEON_SURFACE_ACCESS_CLR 0x0bfc -#define RADEON_SURFACE_CNTL 0x0b00 -# define RADEON_SURF_TRANSLATION_DIS (1 << 8) -# define RADEON_NONSURF_AP0_SWP_MASK (3 << 20) -# define RADEON_NONSURF_AP0_SWP_LITTLE (0 << 20) -# define RADEON_NONSURF_AP0_SWP_BIG16 (1 << 20) -# define RADEON_NONSURF_AP0_SWP_BIG32 (2 << 20) -# define RADEON_NONSURF_AP1_SWP_MASK (3 << 22) -# define RADEON_NONSURF_AP1_SWP_LITTLE (0 << 22) -# define RADEON_NONSURF_AP1_SWP_BIG16 (1 << 22) -# define RADEON_NONSURF_AP1_SWP_BIG32 (2 << 22) -#define RADEON_SURFACE0_INFO 0x0b0c -# define RADEON_SURF_PITCHSEL_MASK (0x1ff << 0) -# define RADEON_SURF_TILE_MODE_MASK (3 << 16) -# define RADEON_SURF_TILE_MODE_MACRO (0 << 16) -# define RADEON_SURF_TILE_MODE_MICRO (1 << 16) -# define RADEON_SURF_TILE_MODE_32BIT_Z (2 << 16) -# define RADEON_SURF_TILE_MODE_16BIT_Z (3 << 16) -#define RADEON_SURFACE0_LOWER_BOUND 0x0b04 -#define RADEON_SURFACE0_UPPER_BOUND 0x0b08 -# define RADEON_SURF_ADDRESS_FIXED_MASK (0x3ff << 0) -#define RADEON_SURFACE1_INFO 0x0b1c -#define RADEON_SURFACE1_LOWER_BOUND 0x0b14 -#define RADEON_SURFACE1_UPPER_BOUND 0x0b18 -#define RADEON_SURFACE2_INFO 0x0b2c -#define RADEON_SURFACE2_LOWER_BOUND 0x0b24 -#define RADEON_SURFACE2_UPPER_BOUND 0x0b28 -#define RADEON_SURFACE3_INFO 0x0b3c -#define RADEON_SURFACE3_LOWER_BOUND 0x0b34 -#define RADEON_SURFACE3_UPPER_BOUND 0x0b38 -#define RADEON_SURFACE4_INFO 0x0b4c -#define RADEON_SURFACE4_LOWER_BOUND 0x0b44 -#define RADEON_SURFACE4_UPPER_BOUND 0x0b48 -#define RADEON_SURFACE5_INFO 0x0b5c -#define RADEON_SURFACE5_LOWER_BOUND 0x0b54 -#define RADEON_SURFACE5_UPPER_BOUND 0x0b58 -#define RADEON_SURFACE6_INFO 0x0b6c -#define RADEON_SURFACE6_LOWER_BOUND 0x0b64 -#define RADEON_SURFACE6_UPPER_BOUND 0x0b68 -#define RADEON_SURFACE7_INFO 0x0b7c -#define RADEON_SURFACE7_LOWER_BOUND 0x0b74 -#define RADEON_SURFACE7_UPPER_BOUND 0x0b78 -#define RADEON_SW_SEMAPHORE 0x013c - -#define RADEON_WAIT_UNTIL 0x1720 -# define RADEON_WAIT_CRTC_PFLIP (1 << 0) -# define RADEON_WAIT_2D_IDLECLEAN (1 << 16) -# define RADEON_WAIT_3D_IDLECLEAN (1 << 17) -# define RADEON_WAIT_HOST_IDLECLEAN (1 << 18) - -#define RADEON_RB3D_ZMASKOFFSET 0x3234 -#define RADEON_RB3D_ZSTENCILCNTL 0x1c2c -# define RADEON_DEPTH_FORMAT_16BIT_INT_Z (0 << 0) -# define RADEON_DEPTH_FORMAT_24BIT_INT_Z (2 << 0) - - -/* CP registers */ -#define RADEON_CP_ME_RAM_ADDR 0x07d4 -#define RADEON_CP_ME_RAM_RADDR 0x07d8 -#define RADEON_CP_ME_RAM_DATAH 0x07dc -#define RADEON_CP_ME_RAM_DATAL 0x07e0 - -#define RADEON_CP_RB_BASE 0x0700 -#define RADEON_CP_RB_CNTL 0x0704 -# define RADEON_BUF_SWAP_32BIT (2 << 16) -#define RADEON_CP_RB_RPTR_ADDR 0x070c -#define RADEON_CP_RB_RPTR 0x0710 -#define RADEON_CP_RB_WPTR 0x0714 - -#define RADEON_CP_RB_WPTR_DELAY 0x0718 -# define RADEON_PRE_WRITE_TIMER_SHIFT 0 -# define RADEON_PRE_WRITE_LIMIT_SHIFT 23 - -#define RADEON_CP_IB_BASE 0x0738 - -#define RADEON_CP_CSQ_CNTL 0x0740 -# define RADEON_CSQ_CNT_PRIMARY_MASK (0xff << 0) -# define RADEON_CSQ_PRIDIS_INDDIS (0 << 28) -# define RADEON_CSQ_PRIPIO_INDDIS (1 << 28) -# define RADEON_CSQ_PRIBM_INDDIS (2 << 28) -# define RADEON_CSQ_PRIPIO_INDBM (3 << 28) -# define RADEON_CSQ_PRIBM_INDBM (4 << 28) -# define RADEON_CSQ_PRIPIO_INDPIO (15 << 28) - -#define RADEON_AIC_CNTL 0x01d0 -# define RADEON_PCIGART_TRANSLATE_EN (1 << 0) -#define RADEON_AIC_STAT 0x01d4 -#define RADEON_AIC_PT_BASE 0x01d8 -#define RADEON_AIC_LO_ADDR 0x01dc -#define RADEON_AIC_HI_ADDR 0x01e0 -#define RADEON_AIC_TLB_ADDR 0x01e4 -#define RADEON_AIC_TLB_DATA 0x01e8 - -/* CP command packets */ -#define RADEON_CP_PACKET0 0x00000000 -# define RADEON_ONE_REG_WR (1 << 15) -#define RADEON_CP_PACKET1 0x40000000 -#define RADEON_CP_PACKET2 0x80000000 -#define RADEON_CP_PACKET3 0xC0000000 -# define RADEON_3D_RNDR_GEN_INDX_PRIM 0x00002300 -# define RADEON_WAIT_FOR_IDLE 0x00002600 -# define RADEON_3D_DRAW_VBUF 0x00002800 -# define RADEON_3D_DRAW_IMMD 0x00002900 -# define RADEON_3D_DRAW_INDX 0x00002A00 -# define RADEON_3D_LOAD_VBPNTR 0x00002F00 -# define RADEON_3D_CLEAR_ZMASK 0x00003200 -# define RADEON_3D_CLEAR_HIZ 0x00003700 -# define RADEON_CNTL_HOSTDATA_BLT 0x00009400 -# define RADEON_CNTL_PAINT_MULTI 0x00009A00 -# define RADEON_CNTL_BITBLT_MULTI 0x00009B00 -# define RADEON_CNTL_SET_SCISSORS 0xC0001E00 - -#define RADEON_CP_PACKET_MASK 0xC0000000 -#define RADEON_CP_PACKET_COUNT_MASK 0x3fff0000 -#define RADEON_CP_PACKET0_REG_MASK 0x000007ff -#define RADEON_CP_PACKET1_REG0_MASK 0x000007ff -#define RADEON_CP_PACKET1_REG1_MASK 0x003ff800 - -#define RADEON_VTX_Z_PRESENT (1 << 31) -#define RADEON_VTX_PKCOLOR_PRESENT (1 << 3) - -#define RADEON_PRIM_TYPE_NONE (0 << 0) -#define RADEON_PRIM_TYPE_POINT (1 << 0) -#define RADEON_PRIM_TYPE_LINE (2 << 0) -#define RADEON_PRIM_TYPE_LINE_STRIP (3 << 0) -#define RADEON_PRIM_TYPE_TRI_LIST (4 << 0) -#define RADEON_PRIM_TYPE_TRI_FAN (5 << 0) -#define RADEON_PRIM_TYPE_TRI_STRIP (6 << 0) -#define RADEON_PRIM_TYPE_TRI_TYPE2 (7 << 0) -#define RADEON_PRIM_TYPE_RECT_LIST (8 << 0) -#define RADEON_PRIM_TYPE_3VRT_POINT_LIST (9 << 0) -#define RADEON_PRIM_TYPE_3VRT_LINE_LIST (10 << 0) -#define RADEON_PRIM_TYPE_MASK 0xf -#define RADEON_PRIM_WALK_IND (1 << 4) -#define RADEON_PRIM_WALK_LIST (2 << 4) -#define RADEON_PRIM_WALK_RING (3 << 4) -#define RADEON_COLOR_ORDER_BGRA (0 << 6) -#define RADEON_COLOR_ORDER_RGBA (1 << 6) -#define RADEON_MAOS_ENABLE (1 << 7) -#define RADEON_VTX_FMT_R128_MODE (0 << 8) -#define RADEON_VTX_FMT_RADEON_MODE (1 << 8) -#define RADEON_NUM_VERTICES_SHIFT 16 - -#define RADEON_COLOR_FORMAT_CI8 2 -#define RADEON_COLOR_FORMAT_ARGB1555 3 -#define RADEON_COLOR_FORMAT_RGB565 4 -#define RADEON_COLOR_FORMAT_ARGB8888 6 -#define RADEON_COLOR_FORMAT_RGB332 7 -#define RADEON_COLOR_FORMAT_RGB8 9 -#define RADEON_COLOR_FORMAT_ARGB4444 15 - -#define RADEON_TXFORMAT_I8 0 -#define RADEON_TXFORMAT_AI88 1 -#define RADEON_TXFORMAT_RGB332 2 -#define RADEON_TXFORMAT_ARGB1555 3 -#define RADEON_TXFORMAT_RGB565 4 -#define RADEON_TXFORMAT_ARGB4444 5 -#define RADEON_TXFORMAT_ARGB8888 6 -#define RADEON_TXFORMAT_RGBA8888 7 -#define RADEON_TXFORMAT_Y8 8 -#define RADEON_TXFORMAT_VYUY422 10 -#define RADEON_TXFORMAT_YVYU422 11 -#define RADEON_TXFORMAT_DXT1 12 -#define RADEON_TXFORMAT_DXT23 14 -#define RADEON_TXFORMAT_DXT45 15 - -#define R200_PP_TXCBLEND_0 0x2f00 -#define R200_PP_TXCBLEND_1 0x2f10 -#define R200_PP_TXCBLEND_2 0x2f20 -#define R200_PP_TXCBLEND_3 0x2f30 -#define R200_PP_TXCBLEND_4 0x2f40 -#define R200_PP_TXCBLEND_5 0x2f50 -#define R200_PP_TXCBLEND_6 0x2f60 -#define R200_PP_TXCBLEND_7 0x2f70 -#define R200_SE_TCL_LIGHT_MODEL_CTL_0 0x2268 -#define R200_PP_TFACTOR_0 0x2ee0 -#define R200_SE_VTX_FMT_0 0x2088 -#define R200_SE_VAP_CNTL 0x2080 -#define R200_SE_TCL_MATRIX_SEL_0 0x2230 -#define R200_SE_TCL_TEX_PROC_CTL_2 0x22a8 -#define R200_SE_TCL_UCP_VERT_BLEND_CTL 0x22c0 -#define R200_PP_TXFILTER_5 0x2ca0 -#define R200_PP_TXFILTER_4 0x2c80 -#define R200_PP_TXFILTER_3 0x2c60 -#define R200_PP_TXFILTER_2 0x2c40 -#define R200_PP_TXFILTER_1 0x2c20 -#define R200_PP_TXFILTER_0 0x2c00 -#define R200_PP_TXOFFSET_5 0x2d78 -#define R200_PP_TXOFFSET_4 0x2d60 -#define R200_PP_TXOFFSET_3 0x2d48 -#define R200_PP_TXOFFSET_2 0x2d30 -#define R200_PP_TXOFFSET_1 0x2d18 -#define R200_PP_TXOFFSET_0 0x2d00 - -#define R200_PP_CUBIC_FACES_0 0x2c18 -#define R200_PP_CUBIC_FACES_1 0x2c38 -#define R200_PP_CUBIC_FACES_2 0x2c58 -#define R200_PP_CUBIC_FACES_3 0x2c78 -#define R200_PP_CUBIC_FACES_4 0x2c98 -#define R200_PP_CUBIC_FACES_5 0x2cb8 -#define R200_PP_CUBIC_OFFSET_F1_0 0x2d04 -#define R200_PP_CUBIC_OFFSET_F2_0 0x2d08 -#define R200_PP_CUBIC_OFFSET_F3_0 0x2d0c -#define R200_PP_CUBIC_OFFSET_F4_0 0x2d10 -#define R200_PP_CUBIC_OFFSET_F5_0 0x2d14 -#define R200_PP_CUBIC_OFFSET_F1_1 0x2d1c -#define R200_PP_CUBIC_OFFSET_F2_1 0x2d20 -#define R200_PP_CUBIC_OFFSET_F3_1 0x2d24 -#define R200_PP_CUBIC_OFFSET_F4_1 0x2d28 -#define R200_PP_CUBIC_OFFSET_F5_1 0x2d2c -#define R200_PP_CUBIC_OFFSET_F1_2 0x2d34 -#define R200_PP_CUBIC_OFFSET_F2_2 0x2d38 -#define R200_PP_CUBIC_OFFSET_F3_2 0x2d3c -#define R200_PP_CUBIC_OFFSET_F4_2 0x2d40 -#define R200_PP_CUBIC_OFFSET_F5_2 0x2d44 -#define R200_PP_CUBIC_OFFSET_F1_3 0x2d4c -#define R200_PP_CUBIC_OFFSET_F2_3 0x2d50 -#define R200_PP_CUBIC_OFFSET_F3_3 0x2d54 -#define R200_PP_CUBIC_OFFSET_F4_3 0x2d58 -#define R200_PP_CUBIC_OFFSET_F5_3 0x2d5c -#define R200_PP_CUBIC_OFFSET_F1_4 0x2d64 -#define R200_PP_CUBIC_OFFSET_F2_4 0x2d68 -#define R200_PP_CUBIC_OFFSET_F3_4 0x2d6c -#define R200_PP_CUBIC_OFFSET_F4_4 0x2d70 -#define R200_PP_CUBIC_OFFSET_F5_4 0x2d74 -#define R200_PP_CUBIC_OFFSET_F1_5 0x2d7c -#define R200_PP_CUBIC_OFFSET_F2_5 0x2d80 -#define R200_PP_CUBIC_OFFSET_F3_5 0x2d84 -#define R200_PP_CUBIC_OFFSET_F4_5 0x2d88 -#define R200_PP_CUBIC_OFFSET_F5_5 0x2d8c - -#define R200_RE_AUX_SCISSOR_CNTL 0x26f0 -#define R200_SE_VTE_CNTL 0x20b0 -#define R200_SE_TCL_OUTPUT_VTX_COMP_SEL 0x2250 -#define R200_PP_TAM_DEBUG3 0x2d9c -#define R200_PP_CNTL_X 0x2cc4 -#define R200_SE_VAP_CNTL_STATUS 0x2140 -#define R200_RE_SCISSOR_TL_0 0x1cd8 -#define R200_RE_SCISSOR_TL_1 0x1ce0 -#define R200_RE_SCISSOR_TL_2 0x1ce8 -#define R200_RB3D_DEPTHXY_OFFSET 0x1d60 -#define R200_RE_AUX_SCISSOR_CNTL 0x26f0 -#define R200_SE_VTX_STATE_CNTL 0x2180 -#define R200_RE_POINTSIZE 0x2648 -#define R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0 0x2254 - -#define RADEON_PP_TEX_SIZE_0 0x1d04 /* NPOT */ -#define RADEON_PP_TEX_SIZE_1 0x1d0c -#define RADEON_PP_TEX_SIZE_2 0x1d14 - -#define RADEON_PP_CUBIC_FACES_0 0x1d24 -#define RADEON_PP_CUBIC_FACES_1 0x1d28 -#define RADEON_PP_CUBIC_FACES_2 0x1d2c -#define RADEON_PP_CUBIC_OFFSET_T0_0 0x1dd0 /* bits [31:5] */ -#define RADEON_PP_CUBIC_OFFSET_T1_0 0x1e00 -#define RADEON_PP_CUBIC_OFFSET_T2_0 0x1e14 - -#define SE_VAP_CNTL__TCL_ENA_MASK 0x00000001 -#define SE_VAP_CNTL__FORCE_W_TO_ONE_MASK 0x00010000 -#define SE_VAP_CNTL__VF_MAX_VTX_NUM__SHIFT 0x00000012 -#define SE_VTE_CNTL__VTX_XY_FMT_MASK 0x00000100 -#define SE_VTE_CNTL__VTX_Z_FMT_MASK 0x00000200 -#define SE_VTX_FMT_0__VTX_Z0_PRESENT_MASK 0x00000001 -#define SE_VTX_FMT_0__VTX_W0_PRESENT_MASK 0x00000002 -#define SE_VTX_FMT_0__VTX_COLOR_0_FMT__SHIFT 0x0000000b -#define R200_3D_DRAW_IMMD_2 0xC0003500 -#define R200_SE_VTX_FMT_1 0x208c -#define R200_RE_CNTL 0x1c50 - -#define R200_RB3D_BLENDCOLOR 0x3218 - -#define R200_SE_TCL_POINT_SPRITE_CNTL 0x22c4 - -#define R200_PP_TRI_PERF 0x2cf8 - -/* Constants */ -#define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */ - -#define RADEON_LAST_FRAME_REG RADEON_SCRATCH_REG0 -#define RADEON_LAST_DISPATCH_REG RADEON_SCRATCH_REG1 -#define RADEON_LAST_CLEAR_REG RADEON_SCRATCH_REG2 -#define RADEON_LAST_SWI_REG RADEON_SCRATCH_REG3 -#define RADEON_LAST_DISPATCH 1 - -#define RADEON_MAX_VB_AGE 0x7fffffff -#define RADEON_MAX_VB_VERTS (0xffff) - -#define RADEON_RING_HIGH_MARK 128 - -#define RADEON_READ(reg) DRM_READ32( dev_priv->mmio, (reg) ) -#define RADEON_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) ) -#define RADEON_READ8(reg) DRM_READ8( dev_priv->mmio, (reg) ) -#define RADEON_WRITE8(reg,val) DRM_WRITE8( dev_priv->mmio, (reg), (val) ) - -#define RADEON_WRITE_PLL( addr, val ) \ -do { \ - RADEON_WRITE8( RADEON_CLOCK_CNTL_INDEX, \ - ((addr) & 0x1f) | RADEON_PLL_WR_EN ); \ - RADEON_WRITE( RADEON_CLOCK_CNTL_DATA, (val) ); \ -} while (0) - -extern int RADEON_READ_PLL( drm_device_t *dev, int addr ); -extern int radeon_preinit( struct drm_device *dev, unsigned long flags ); -extern int radeon_postinit( struct drm_device *dev, unsigned long flags ); -extern int radeon_postcleanup( struct drm_device *dev ); - -#define CP_PACKET0( reg, n ) \ - (RADEON_CP_PACKET0 | ((n) << 16) | ((reg) >> 2)) -#define CP_PACKET0_TABLE( reg, n ) \ - (RADEON_CP_PACKET0 | RADEON_ONE_REG_WR | ((n) << 16) | ((reg) >> 2)) -#define CP_PACKET1( reg0, reg1 ) \ - (RADEON_CP_PACKET1 | (((reg1) >> 2) << 15) | ((reg0) >> 2)) -#define CP_PACKET2() \ - (RADEON_CP_PACKET2) -#define CP_PACKET3( pkt, n ) \ - (RADEON_CP_PACKET3 | (pkt) | ((n) << 16)) - - -/* ================================================================ - * Engine control helper macros - */ - -#define RADEON_WAIT_UNTIL_2D_IDLE() do { \ - OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \ - OUT_RING( (RADEON_WAIT_2D_IDLECLEAN | \ - RADEON_WAIT_HOST_IDLECLEAN) ); \ -} while (0) - -#define RADEON_WAIT_UNTIL_3D_IDLE() do { \ - OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \ - OUT_RING( (RADEON_WAIT_3D_IDLECLEAN | \ - RADEON_WAIT_HOST_IDLECLEAN) ); \ -} while (0) - -#define RADEON_WAIT_UNTIL_IDLE() do { \ - OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \ - OUT_RING( (RADEON_WAIT_2D_IDLECLEAN | \ - RADEON_WAIT_3D_IDLECLEAN | \ - RADEON_WAIT_HOST_IDLECLEAN) ); \ -} while (0) - -#define RADEON_WAIT_UNTIL_PAGE_FLIPPED() do { \ - OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \ - OUT_RING( RADEON_WAIT_CRTC_PFLIP ); \ -} while (0) - -#define RADEON_FLUSH_CACHE() do { \ - OUT_RING( CP_PACKET0( RADEON_RB2D_DSTCACHE_CTLSTAT, 0 ) ); \ - OUT_RING( RADEON_RB2D_DC_FLUSH ); \ -} while (0) - -#define RADEON_PURGE_CACHE() do { \ - OUT_RING( CP_PACKET0( RADEON_RB2D_DSTCACHE_CTLSTAT, 0 ) ); \ - OUT_RING( RADEON_RB2D_DC_FLUSH_ALL ); \ -} while (0) - -#define RADEON_FLUSH_ZCACHE() do { \ - OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) ); \ - OUT_RING( RADEON_RB3D_ZC_FLUSH ); \ -} while (0) - -#define RADEON_PURGE_ZCACHE() do { \ - OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) ); \ - OUT_RING( RADEON_RB3D_ZC_FLUSH_ALL ); \ -} while (0) - - -/* ================================================================ - * Misc helper macros - */ - -/* Perfbox functionality only. - */ -#define RING_SPACE_TEST_WITH_RETURN( dev_priv ) \ -do { \ - if (!(dev_priv->stats.boxes & RADEON_BOX_DMA_IDLE)) { \ - u32 head = GET_RING_HEAD( dev_priv ); \ - if (head == dev_priv->ring.tail) \ - dev_priv->stats.boxes |= RADEON_BOX_DMA_IDLE; \ - } \ -} while (0) - -#define VB_AGE_TEST_WITH_RETURN( dev_priv ) \ -do { \ - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; \ - if ( sarea_priv->last_dispatch >= RADEON_MAX_VB_AGE ) { \ - int __ret = radeon_do_cp_idle( dev_priv ); \ - if ( __ret ) return __ret; \ - sarea_priv->last_dispatch = 0; \ - radeon_freelist_reset( dev ); \ - } \ -} while (0) - -#define RADEON_DISPATCH_AGE( age ) do { \ - OUT_RING( CP_PACKET0( RADEON_LAST_DISPATCH_REG, 0 ) ); \ - OUT_RING( age ); \ -} while (0) - -#define RADEON_FRAME_AGE( age ) do { \ - OUT_RING( CP_PACKET0( RADEON_LAST_FRAME_REG, 0 ) ); \ - OUT_RING( age ); \ -} while (0) - -#define RADEON_CLEAR_AGE( age ) do { \ - OUT_RING( CP_PACKET0( RADEON_LAST_CLEAR_REG, 0 ) ); \ - OUT_RING( age ); \ -} while (0) - - -/* ================================================================ - * Ring control - */ - -#define RADEON_VERBOSE 0 - -#define RING_LOCALS int write, _nr; unsigned int mask; u32 *ring; - -#define BEGIN_RING( n ) do { \ - if ( RADEON_VERBOSE ) { \ - DRM_INFO( "BEGIN_RING( %d ) in %s\n", \ - n, __FUNCTION__ ); \ - } \ - if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \ - COMMIT_RING(); \ - radeon_wait_ring( dev_priv, (n) * sizeof(u32) ); \ - } \ - _nr = n; dev_priv->ring.space -= (n) * sizeof(u32); \ - ring = dev_priv->ring.start; \ - write = dev_priv->ring.tail; \ - mask = dev_priv->ring.tail_mask; \ -} while (0) - -#define ADVANCE_RING() do { \ - if ( RADEON_VERBOSE ) { \ - DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \ - write, dev_priv->ring.tail ); \ - } \ - if (((dev_priv->ring.tail + _nr) & mask) != write) { \ - DRM_ERROR( \ - "ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n", \ - ((dev_priv->ring.tail + _nr) & mask), \ - write, __LINE__); \ - } else \ - dev_priv->ring.tail = write; \ -} while (0) - -#define COMMIT_RING() do { \ - /* Flush writes to ring */ \ - DRM_MEMORYBARRIER(); \ - GET_RING_HEAD( dev_priv ); \ - RADEON_WRITE( RADEON_CP_RB_WPTR, dev_priv->ring.tail ); \ - /* read from PCI bus to ensure correct posting */ \ - RADEON_READ( RADEON_CP_RB_RPTR ); \ -} while (0) - -#define OUT_RING( x ) do { \ - if ( RADEON_VERBOSE ) { \ - DRM_INFO( " OUT_RING( 0x%08x ) at 0x%x\n", \ - (unsigned int)(x), write ); \ - } \ - ring[write++] = (x); \ - write &= mask; \ -} while (0) - -#define OUT_RING_REG( reg, val ) do { \ - OUT_RING( CP_PACKET0( reg, 0 ) ); \ - OUT_RING( val ); \ -} while (0) - - -#define OUT_RING_TABLE( tab, sz ) do { \ - int _size = (sz); \ - int *_tab = (int *)(tab); \ - \ - if (write + _size > mask) { \ - int _i = (mask+1) - write; \ - _size -= _i; \ - while (_i > 0) { \ - *(int *)(ring + write) = *_tab++; \ - write++; \ - _i--; \ - } \ - write = 0; \ - _tab += _i; \ - } \ - while (_size > 0) { \ - *(ring + write) = *_tab++; \ - write++; \ - _size--; \ - } \ - write &= mask; \ -} while (0) - - -#endif /* __RADEON_DRV_H__ */ diff --git a/shared/radeon_irq.c b/shared/radeon_irq.c deleted file mode 100644 index bdb3cc168..000000000 --- a/shared/radeon_irq.c +++ /dev/null @@ -1,258 +0,0 @@ -/* radeon_irq.c -- IRQ handling for radeon -*- linux-c -*- - * - * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. - * - * The Weather Channel (TM) funded Tungsten Graphics to develop the - * initial release of the Radeon 8500 driver under the XFree86 license. - * This notice must be preserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - * Michel Dänzer <michel@daenzer.net> - */ - -#include "radeon.h" -#include "drmP.h" -#include "drm.h" -#include "radeon_drm.h" -#include "radeon_drv.h" - -/* Interrupts - Used for device synchronization and flushing in the - * following circumstances: - * - * - Exclusive FB access with hw idle: - * - Wait for GUI Idle (?) interrupt, then do normal flush. - * - * - Frame throttling, NV_fence: - * - Drop marker irq's into command stream ahead of time. - * - Wait on irq's with lock *not held* - * - Check each for termination condition - * - * - Internally in cp_getbuffer, etc: - * - as above, but wait with lock held??? - * - * NOTE: These functions are misleadingly named -- the irq's aren't - * tied to dma at all, this is just a hangover from dri prehistory. - */ - -irqreturn_t radeon_driver_irq_handler( DRM_IRQ_ARGS ) -{ - drm_device_t *dev = (drm_device_t *) arg; - drm_radeon_private_t *dev_priv = - (drm_radeon_private_t *)dev->dev_private; - u32 stat; - - /* Only consider the bits we're interested in - others could be used - * outside the DRM - */ - stat = RADEON_READ(RADEON_GEN_INT_STATUS) - & (RADEON_SW_INT_TEST | RADEON_CRTC_VBLANK_STAT); - if (!stat) - return IRQ_NONE; - - /* SW interrupt */ - if (stat & RADEON_SW_INT_TEST) { - DRM_WAKEUP( &dev_priv->swi_queue ); - } - - /* VBLANK interrupt */ - if (stat & RADEON_CRTC_VBLANK_STAT) { - atomic_inc(&dev->vbl_received); - DRM_WAKEUP(&dev->vbl_queue); - DRM(vbl_send_signals)( dev ); - } - - /* Acknowledge interrupts we handle */ - RADEON_WRITE(RADEON_GEN_INT_STATUS, stat); - return IRQ_HANDLED; -} - -static __inline__ void radeon_acknowledge_irqs(drm_radeon_private_t *dev_priv) -{ - u32 tmp = RADEON_READ( RADEON_GEN_INT_STATUS ) - & (RADEON_SW_INT_TEST_ACK | RADEON_CRTC_VBLANK_STAT); - if (tmp) - RADEON_WRITE( RADEON_GEN_INT_STATUS, tmp ); -} - -int radeon_emit_irq(drm_device_t *dev) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - unsigned int ret; - RING_LOCALS; - - atomic_inc(&dev_priv->swi_emitted); - ret = atomic_read(&dev_priv->swi_emitted); - - BEGIN_RING( 4 ); - OUT_RING_REG( RADEON_LAST_SWI_REG, ret ); - OUT_RING_REG( RADEON_GEN_INT_STATUS, RADEON_SW_INT_FIRE ); - ADVANCE_RING(); - COMMIT_RING(); - - return ret; -} - - -int radeon_wait_irq(drm_device_t *dev, int swi_nr) -{ - drm_radeon_private_t *dev_priv = - (drm_radeon_private_t *)dev->dev_private; - int ret = 0; - - if (RADEON_READ( RADEON_LAST_SWI_REG ) >= swi_nr) - return 0; - - dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; - - /* This is a hack to work around mysterious freezes on certain - * systems: - */ - radeon_acknowledge_irqs( dev_priv ); - - DRM_WAIT_ON( ret, dev_priv->swi_queue, 3 * DRM_HZ, - RADEON_READ( RADEON_LAST_SWI_REG ) >= swi_nr ); - - return ret; -} - -int radeon_emit_and_wait_irq(drm_device_t *dev) -{ - return radeon_wait_irq( dev, radeon_emit_irq(dev) ); -} - - -int radeon_driver_vblank_wait(drm_device_t *dev, unsigned int *sequence) -{ - drm_radeon_private_t *dev_priv = - (drm_radeon_private_t *)dev->dev_private; - unsigned int cur_vblank; - int ret = 0; - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - radeon_acknowledge_irqs( dev_priv ); - - dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; - - /* Assume that the user has missed the current sequence number - * by about a day rather than she wants to wait for years - * using vertical blanks... - */ - DRM_WAIT_ON( ret, dev->vbl_queue, 3*DRM_HZ, - ( ( ( cur_vblank = atomic_read(&dev->vbl_received ) ) - - *sequence ) <= (1<<23) ) ); - - *sequence = cur_vblank; - - return ret; -} - - -/* Needs the lock as it touches the ring. - */ -int radeon_irq_emit( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_irq_emit_t emit; - int result; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL( emit, (drm_radeon_irq_emit_t __user *)data, - sizeof(emit) ); - - result = radeon_emit_irq( dev ); - - if ( DRM_COPY_TO_USER( emit.irq_seq, &result, sizeof(int) ) ) { - DRM_ERROR( "copy_to_user\n" ); - return DRM_ERR(EFAULT); - } - - return 0; -} - - -/* Doesn't need the hardware lock. - */ -int radeon_irq_wait( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_irq_wait_t irqwait; - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL( irqwait, (drm_radeon_irq_wait_t __user*)data, - sizeof(irqwait) ); - - return radeon_wait_irq( dev, irqwait.irq_seq ); -} - - -/* drm_dma.h hooks -*/ -void DRM(driver_irq_preinstall)( drm_device_t *dev ) { - drm_radeon_private_t *dev_priv = - (drm_radeon_private_t *)dev->dev_private; - - /* Disable *all* interrupts */ - RADEON_WRITE( RADEON_GEN_INT_CNTL, 0 ); - - /* Clear bits if they're already high */ - radeon_acknowledge_irqs( dev_priv ); -} - -void DRM(driver_irq_postinstall)( drm_device_t *dev ) { - drm_radeon_private_t *dev_priv = - (drm_radeon_private_t *)dev->dev_private; - - atomic_set(&dev_priv->swi_emitted, 0); - DRM_INIT_WAITQUEUE( &dev_priv->swi_queue ); - - /* Turn on SW and VBL ints */ - RADEON_WRITE( RADEON_GEN_INT_CNTL, - RADEON_CRTC_VBLANK_MASK | - RADEON_SW_INT_ENABLE ); -} - -void DRM(driver_irq_uninstall)( drm_device_t *dev ) { - drm_radeon_private_t *dev_priv = - (drm_radeon_private_t *)dev->dev_private; - if (!dev_priv) - return; - - /* Disable *all* interrupts */ - RADEON_WRITE( RADEON_GEN_INT_CNTL, 0 ); -} diff --git a/shared/radeon_mem.c b/shared/radeon_mem.c deleted file mode 100644 index 9d7fded70..000000000 --- a/shared/radeon_mem.c +++ /dev/null @@ -1,323 +0,0 @@ -/* radeon_mem.c -- Simple GART/fb memory manager for radeon -*- linux-c -*- - * - * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. - * - * The Weather Channel (TM) funded Tungsten Graphics to develop the - * initial release of the Radeon 8500 driver under the XFree86 license. - * This notice must be preserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - */ - -#include "radeon.h" -#include "drmP.h" -#include "drm.h" -#include "radeon_drm.h" -#include "radeon_drv.h" - -/* Very simple allocator for GART memory, working on a static range - * already mapped into each client's address space. - */ - -static struct mem_block *split_block(struct mem_block *p, int start, int size, - DRMFILE filp ) -{ - /* Maybe cut off the start of an existing block */ - if (start > p->start) { - struct mem_block *newblock = DRM(alloc)(sizeof(*newblock), DRM_MEM_BUFS ); - if (!newblock) - goto out; - newblock->start = start; - newblock->size = p->size - (start - p->start); - newblock->filp = NULL; - newblock->next = p->next; - newblock->prev = p; - p->next->prev = newblock; - p->next = newblock; - p->size -= newblock->size; - p = newblock; - } - - /* Maybe cut off the end of an existing block */ - if (size < p->size) { - struct mem_block *newblock = DRM(alloc)(sizeof(*newblock), DRM_MEM_BUFS ); - if (!newblock) - goto out; - newblock->start = start + size; - newblock->size = p->size - size; - newblock->filp = NULL; - newblock->next = p->next; - newblock->prev = p; - p->next->prev = newblock; - p->next = newblock; - p->size = size; - } - - out: - /* Our block is in the middle */ - p->filp = filp; - return p; -} - -static struct mem_block *alloc_block( struct mem_block *heap, int size, - int align2, DRMFILE filp ) -{ - struct mem_block *p; - int mask = (1 << align2)-1; - - for (p = heap->next ; p != heap ; p = p->next) { - int start = (p->start + mask) & ~mask; - if (p->filp == 0 && start + size <= p->start + p->size) - return split_block( p, start, size, filp ); - } - - return NULL; -} - -static struct mem_block *find_block( struct mem_block *heap, int start ) -{ - struct mem_block *p; - - for (p = heap->next ; p != heap ; p = p->next) - if (p->start == start) - return p; - - return NULL; -} - - -static void free_block( struct mem_block *p ) -{ - p->filp = NULL; - - /* Assumes a single contiguous range. Needs a special filp in - * 'heap' to stop it being subsumed. - */ - if (p->next->filp == 0) { - struct mem_block *q = p->next; - p->size += q->size; - p->next = q->next; - p->next->prev = p; - DRM(free)(q, sizeof(*q), DRM_MEM_BUFS ); - } - - if (p->prev->filp == 0) { - struct mem_block *q = p->prev; - q->size += p->size; - q->next = p->next; - q->next->prev = q; - DRM(free)(p, sizeof(*q), DRM_MEM_BUFS ); - } -} - -/* Initialize. How to check for an uninitialized heap? - */ -static int init_heap(struct mem_block **heap, int start, int size) -{ - struct mem_block *blocks = DRM(alloc)(sizeof(*blocks), DRM_MEM_BUFS ); - - if (!blocks) - return DRM_ERR(ENOMEM); - - *heap = DRM(alloc)(sizeof(**heap), DRM_MEM_BUFS ); - if (!*heap) { - DRM(free)( blocks, sizeof(*blocks), DRM_MEM_BUFS ); - return DRM_ERR(ENOMEM); - } - - blocks->start = start; - blocks->size = size; - blocks->filp = NULL; - blocks->next = blocks->prev = *heap; - - memset( *heap, 0, sizeof(**heap) ); - (*heap)->filp = (DRMFILE) -1; - (*heap)->next = (*heap)->prev = blocks; - return 0; -} - - -/* Free all blocks associated with the releasing file. - */ -void radeon_mem_release( DRMFILE filp, struct mem_block *heap ) -{ - struct mem_block *p; - - if (!heap || !heap->next) - return; - - for (p = heap->next ; p != heap ; p = p->next) { - if (p->filp == filp) - p->filp = NULL; - } - - /* Assumes a single contiguous range. Needs a special filp in - * 'heap' to stop it being subsumed. - */ - for (p = heap->next ; p != heap ; p = p->next) { - while (p->filp == 0 && p->next->filp == 0) { - struct mem_block *q = p->next; - p->size += q->size; - p->next = q->next; - p->next->prev = p; - DRM(free)(q, sizeof(*q),DRM_MEM_DRIVER); - } - } -} - -/* Shutdown. - */ -void radeon_mem_takedown( struct mem_block **heap ) -{ - struct mem_block *p; - - if (!*heap) - return; - - for (p = (*heap)->next ; p != *heap ; ) { - struct mem_block *q = p; - p = p->next; - DRM(free)(q, sizeof(*q),DRM_MEM_DRIVER); - } - - DRM(free)( *heap, sizeof(**heap),DRM_MEM_DRIVER ); - *heap = NULL; -} - - - -/* IOCTL HANDLERS */ - -static struct mem_block **get_heap( drm_radeon_private_t *dev_priv, - int region ) -{ - switch( region ) { - case RADEON_MEM_REGION_GART: - return &dev_priv->gart_heap; - case RADEON_MEM_REGION_FB: - return &dev_priv->fb_heap; - default: - return NULL; - } -} - -int radeon_mem_alloc( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_mem_alloc_t alloc; - struct mem_block *block, **heap; - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL( alloc, (drm_radeon_mem_alloc_t __user *)data, - sizeof(alloc) ); - - heap = get_heap( dev_priv, alloc.region ); - if (!heap || !*heap) - return DRM_ERR(EFAULT); - - /* Make things easier on ourselves: all allocations at least - * 4k aligned. - */ - if (alloc.alignment < 12) - alloc.alignment = 12; - - block = alloc_block( *heap, alloc.size, alloc.alignment, - filp ); - - if (!block) - return DRM_ERR(ENOMEM); - - if ( DRM_COPY_TO_USER( alloc.region_offset, &block->start, - sizeof(int) ) ) { - DRM_ERROR( "copy_to_user\n" ); - return DRM_ERR(EFAULT); - } - - return 0; -} - - - -int radeon_mem_free( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_mem_free_t memfree; - struct mem_block *block, **heap; - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL( memfree, (drm_radeon_mem_free_t __user *)data, - sizeof(memfree) ); - - heap = get_heap( dev_priv, memfree.region ); - if (!heap || !*heap) - return DRM_ERR(EFAULT); - - block = find_block( *heap, memfree.region_offset ); - if (!block) - return DRM_ERR(EFAULT); - - if (block->filp != filp) - return DRM_ERR(EPERM); - - free_block( block ); - return 0; -} - -int radeon_mem_init_heap( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_mem_init_heap_t initheap; - struct mem_block **heap; - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL( initheap, (drm_radeon_mem_init_heap_t __user *)data, - sizeof(initheap) ); - - heap = get_heap( dev_priv, initheap.region ); - if (!heap) - return DRM_ERR(EFAULT); - - if (*heap) { - DRM_ERROR("heap already initialized?"); - return DRM_ERR(EFAULT); - } - - return init_heap( heap, initheap.start, initheap.size ); -} - - diff --git a/shared/radeon_state.c b/shared/radeon_state.c deleted file mode 100644 index 0f7550bdf..000000000 --- a/shared/radeon_state.c +++ /dev/null @@ -1,3093 +0,0 @@ -/* radeon_state.c -- State support for Radeon -*- linux-c -*- - * - * Copyright 2000 VA Linux Systems, Inc., Fremont, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - * Kevin E. Martin <martin@valinux.com> - */ - -#include "radeon.h" -#include "drmP.h" -#include "drm.h" -#include "drm_sarea.h" -#include "radeon_drm.h" -#include "radeon_drv.h" - - -/* ================================================================ - * Helper functions for client state checking and fixup - */ - -static __inline__ int radeon_check_and_fixup_offset( drm_radeon_private_t *dev_priv, - drm_file_t *filp_priv, - u32 *offset ) { - u32 off = *offset; - struct drm_radeon_driver_file_fields *radeon_priv; - - if ( off >= dev_priv->fb_location && - off < ( dev_priv->gart_vm_start + dev_priv->gart_size ) ) - return 0; - - radeon_priv = filp_priv->driver_priv; - - off += radeon_priv->radeon_fb_delta; - - DRM_DEBUG( "offset fixed up to 0x%x\n", off ); - - if ( off < dev_priv->fb_location || - off >= ( dev_priv->gart_vm_start + dev_priv->gart_size ) ) - return DRM_ERR( EINVAL ); - - *offset = off; - - return 0; -} - -static __inline__ int radeon_check_and_fixup_packets( drm_radeon_private_t *dev_priv, - drm_file_t *filp_priv, - int id, - u32 __user *data ) { - switch ( id ) { - - case RADEON_EMIT_PP_MISC: - if (radeon_check_and_fixup_offset(dev_priv, filp_priv, - &data[(RADEON_RB3D_DEPTHOFFSET - RADEON_PP_MISC) / 4])) { - DRM_ERROR( "Invalid depth buffer offset\n" ); - return DRM_ERR( EINVAL ); - } - break; - - case RADEON_EMIT_PP_CNTL: - if (radeon_check_and_fixup_offset(dev_priv, filp_priv, - &data[(RADEON_RB3D_COLOROFFSET - RADEON_PP_CNTL) / 4])) { - DRM_ERROR( "Invalid colour buffer offset\n" ); - return DRM_ERR( EINVAL ); - } - break; - - case R200_EMIT_PP_TXOFFSET_0: - case R200_EMIT_PP_TXOFFSET_1: - case R200_EMIT_PP_TXOFFSET_2: - case R200_EMIT_PP_TXOFFSET_3: - case R200_EMIT_PP_TXOFFSET_4: - case R200_EMIT_PP_TXOFFSET_5: - if (radeon_check_and_fixup_offset(dev_priv, filp_priv, - &data[0])) { - DRM_ERROR( "Invalid R200 texture offset\n" ); - return DRM_ERR( EINVAL ); - } - break; - - case RADEON_EMIT_PP_TXFILTER_0: - case RADEON_EMIT_PP_TXFILTER_1: - case RADEON_EMIT_PP_TXFILTER_2: - if (radeon_check_and_fixup_offset(dev_priv, filp_priv, - &data[(RADEON_PP_TXOFFSET_0 - RADEON_PP_TXFILTER_0) / 4])) { - DRM_ERROR( "Invalid R100 texture offset\n" ); - return DRM_ERR( EINVAL ); - } - break; - - case R200_EMIT_PP_CUBIC_OFFSETS_0: - case R200_EMIT_PP_CUBIC_OFFSETS_1: - case R200_EMIT_PP_CUBIC_OFFSETS_2: - case R200_EMIT_PP_CUBIC_OFFSETS_3: - case R200_EMIT_PP_CUBIC_OFFSETS_4: - case R200_EMIT_PP_CUBIC_OFFSETS_5: { - int i; - for ( i = 0; i < 5; i++ ) { - if (radeon_check_and_fixup_offset(dev_priv, - filp_priv, - &data[i])) { - DRM_ERROR( "Invalid R200 cubic texture offset\n" ); - return DRM_ERR( EINVAL ); - } - } - break; - } - - case RADEON_EMIT_PP_CUBIC_OFFSETS_T0: - case RADEON_EMIT_PP_CUBIC_OFFSETS_T1: - case RADEON_EMIT_PP_CUBIC_OFFSETS_T2:{ - int i; - for (i = 0; i < 5; i++) { - if (radeon_check_and_fixup_offset(dev_priv, - filp_priv, - &data[i])) { - DRM_ERROR - ("Invalid R100 cubic texture offset\n"); - return DRM_ERR(EINVAL); - } - } - } - break; - - case RADEON_EMIT_RB3D_COLORPITCH: - case RADEON_EMIT_RE_LINE_PATTERN: - case RADEON_EMIT_SE_LINE_WIDTH: - case RADEON_EMIT_PP_LUM_MATRIX: - case RADEON_EMIT_PP_ROT_MATRIX_0: - case RADEON_EMIT_RB3D_STENCILREFMASK: - case RADEON_EMIT_SE_VPORT_XSCALE: - case RADEON_EMIT_SE_CNTL: - case RADEON_EMIT_SE_CNTL_STATUS: - case RADEON_EMIT_RE_MISC: - case RADEON_EMIT_PP_BORDER_COLOR_0: - case RADEON_EMIT_PP_BORDER_COLOR_1: - case RADEON_EMIT_PP_BORDER_COLOR_2: - case RADEON_EMIT_SE_ZBIAS_FACTOR: - case RADEON_EMIT_SE_TCL_OUTPUT_VTX_FMT: - case RADEON_EMIT_SE_TCL_MATERIAL_EMMISSIVE_RED: - case R200_EMIT_PP_TXCBLEND_0: - case R200_EMIT_PP_TXCBLEND_1: - case R200_EMIT_PP_TXCBLEND_2: - case R200_EMIT_PP_TXCBLEND_3: - case R200_EMIT_PP_TXCBLEND_4: - case R200_EMIT_PP_TXCBLEND_5: - case R200_EMIT_PP_TXCBLEND_6: - case R200_EMIT_PP_TXCBLEND_7: - case R200_EMIT_TCL_LIGHT_MODEL_CTL_0: - case R200_EMIT_TFACTOR_0: - case R200_EMIT_VTX_FMT_0: - case R200_EMIT_VAP_CTL: - case R200_EMIT_MATRIX_SELECT_0: - case R200_EMIT_TEX_PROC_CTL_2: - case R200_EMIT_TCL_UCP_VERT_BLEND_CTL: - case R200_EMIT_PP_TXFILTER_0: - case R200_EMIT_PP_TXFILTER_1: - case R200_EMIT_PP_TXFILTER_2: - case R200_EMIT_PP_TXFILTER_3: - case R200_EMIT_PP_TXFILTER_4: - case R200_EMIT_PP_TXFILTER_5: - case R200_EMIT_VTE_CNTL: - case R200_EMIT_OUTPUT_VTX_COMP_SEL: - case R200_EMIT_PP_TAM_DEBUG3: - case R200_EMIT_PP_CNTL_X: - case R200_EMIT_RB3D_DEPTHXY_OFFSET: - case R200_EMIT_RE_AUX_SCISSOR_CNTL: - case R200_EMIT_RE_SCISSOR_TL_0: - case R200_EMIT_RE_SCISSOR_TL_1: - case R200_EMIT_RE_SCISSOR_TL_2: - case R200_EMIT_SE_VAP_CNTL_STATUS: - case R200_EMIT_SE_VTX_STATE_CNTL: - case R200_EMIT_RE_POINTSIZE: - case R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0: - case R200_EMIT_PP_CUBIC_FACES_0: - case R200_EMIT_PP_CUBIC_FACES_1: - case R200_EMIT_PP_CUBIC_FACES_2: - case R200_EMIT_PP_CUBIC_FACES_3: - case R200_EMIT_PP_CUBIC_FACES_4: - case R200_EMIT_PP_CUBIC_FACES_5: - case RADEON_EMIT_PP_TEX_SIZE_0: - case RADEON_EMIT_PP_TEX_SIZE_1: - case RADEON_EMIT_PP_TEX_SIZE_2: - case R200_EMIT_RB3D_BLENDCOLOR: - case R200_EMIT_TCL_POINT_SPRITE_CNTL: - case RADEON_EMIT_PP_CUBIC_FACES_0: - case RADEON_EMIT_PP_CUBIC_FACES_1: - case RADEON_EMIT_PP_CUBIC_FACES_2: - case R200_EMIT_PP_TRI_PERF_CNTL: - /* These packets don't contain memory offsets */ - break; - - default: - DRM_ERROR( "Unknown state packet ID %d\n", id ); - return DRM_ERR( EINVAL ); - } - - return 0; -} - -static __inline__ int radeon_check_and_fixup_packet3( drm_radeon_private_t *dev_priv, - drm_file_t *filp_priv, - drm_radeon_cmd_buffer_t *cmdbuf, - unsigned int *cmdsz ) { - u32 *cmd = (u32 *) cmdbuf->buf; - - *cmdsz = 2 + ((cmd[0] & RADEON_CP_PACKET_COUNT_MASK) >> 16); - - if ((cmd[0] & 0xc0000000) != RADEON_CP_PACKET3) { - DRM_ERROR( "Not a type 3 packet\n" ); - return DRM_ERR( EINVAL ); - } - - if ( 4 * *cmdsz > cmdbuf->bufsz ) { - DRM_ERROR( "Packet size larger than size of data provided\n" ); - return DRM_ERR( EINVAL ); - } - - /* Check client state and fix it up if necessary */ - if (cmd[0] & 0x8000) { /* MSB of opcode: next DWORD GUI_CNTL */ - u32 offset; - - if (cmd[1] & (RADEON_GMC_SRC_PITCH_OFFSET_CNTL - | RADEON_GMC_DST_PITCH_OFFSET_CNTL ) ) { - offset = cmd[2] << 10; - if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, &offset ) ) { - DRM_ERROR( "Invalid first packet offset\n" ); - return DRM_ERR( EINVAL ); - } - cmd[2] = (cmd[2] & 0xffc00000) | offset >> 10; - } - - if ((cmd[1] & RADEON_GMC_SRC_PITCH_OFFSET_CNTL) && - (cmd[1] & RADEON_GMC_DST_PITCH_OFFSET_CNTL)) { - offset = cmd[3] << 10; - if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, &offset ) ) { - DRM_ERROR( "Invalid second packet offset\n" ); - return DRM_ERR( EINVAL ); - } - cmd[3] = (cmd[3] & 0xffc00000) | offset >> 10; - } - } - - return 0; -} - - -/* ================================================================ - * CP hardware state programming functions - */ - -static __inline__ void radeon_emit_clip_rect( drm_radeon_private_t *dev_priv, - drm_clip_rect_t *box ) -{ - RING_LOCALS; - - DRM_DEBUG( " box: x1=%d y1=%d x2=%d y2=%d\n", - box->x1, box->y1, box->x2, box->y2 ); - - BEGIN_RING( 4 ); - OUT_RING( CP_PACKET0( RADEON_RE_TOP_LEFT, 0 ) ); - OUT_RING( (box->y1 << 16) | box->x1 ); - OUT_RING( CP_PACKET0( RADEON_RE_WIDTH_HEIGHT, 0 ) ); - OUT_RING( ((box->y2 - 1) << 16) | (box->x2 - 1) ); - ADVANCE_RING(); -} - -/* Emit 1.1 state - */ -static int radeon_emit_state( drm_radeon_private_t *dev_priv, - drm_file_t *filp_priv, - drm_radeon_context_regs_t *ctx, - drm_radeon_texture_regs_t *tex, - unsigned int dirty ) -{ - RING_LOCALS; - DRM_DEBUG( "dirty=0x%08x\n", dirty ); - - if ( dirty & RADEON_UPLOAD_CONTEXT ) { - if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, - &ctx->rb3d_depthoffset ) ) { - DRM_ERROR( "Invalid depth buffer offset\n" ); - return DRM_ERR( EINVAL ); - } - - if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, - &ctx->rb3d_coloroffset ) ) { - DRM_ERROR( "Invalid depth buffer offset\n" ); - return DRM_ERR( EINVAL ); - } - - BEGIN_RING( 14 ); - OUT_RING( CP_PACKET0( RADEON_PP_MISC, 6 ) ); - OUT_RING( ctx->pp_misc ); - OUT_RING( ctx->pp_fog_color ); - OUT_RING( ctx->re_solid_color ); - OUT_RING( ctx->rb3d_blendcntl ); - OUT_RING( ctx->rb3d_depthoffset ); - OUT_RING( ctx->rb3d_depthpitch ); - OUT_RING( ctx->rb3d_zstencilcntl ); - OUT_RING( CP_PACKET0( RADEON_PP_CNTL, 2 ) ); - OUT_RING( ctx->pp_cntl ); - OUT_RING( ctx->rb3d_cntl ); - OUT_RING( ctx->rb3d_coloroffset ); - OUT_RING( CP_PACKET0( RADEON_RB3D_COLORPITCH, 0 ) ); - OUT_RING( ctx->rb3d_colorpitch ); - ADVANCE_RING(); - } - - if ( dirty & RADEON_UPLOAD_VERTFMT ) { - BEGIN_RING( 2 ); - OUT_RING( CP_PACKET0( RADEON_SE_COORD_FMT, 0 ) ); - OUT_RING( ctx->se_coord_fmt ); - ADVANCE_RING(); - } - - if ( dirty & RADEON_UPLOAD_LINE ) { - BEGIN_RING( 5 ); - OUT_RING( CP_PACKET0( RADEON_RE_LINE_PATTERN, 1 ) ); - OUT_RING( ctx->re_line_pattern ); - OUT_RING( ctx->re_line_state ); - OUT_RING( CP_PACKET0( RADEON_SE_LINE_WIDTH, 0 ) ); - OUT_RING( ctx->se_line_width ); - ADVANCE_RING(); - } - - if ( dirty & RADEON_UPLOAD_BUMPMAP ) { - BEGIN_RING( 5 ); - OUT_RING( CP_PACKET0( RADEON_PP_LUM_MATRIX, 0 ) ); - OUT_RING( ctx->pp_lum_matrix ); - OUT_RING( CP_PACKET0( RADEON_PP_ROT_MATRIX_0, 1 ) ); - OUT_RING( ctx->pp_rot_matrix_0 ); - OUT_RING( ctx->pp_rot_matrix_1 ); - ADVANCE_RING(); - } - - if ( dirty & RADEON_UPLOAD_MASKS ) { - BEGIN_RING( 4 ); - OUT_RING( CP_PACKET0( RADEON_RB3D_STENCILREFMASK, 2 ) ); - OUT_RING( ctx->rb3d_stencilrefmask ); - OUT_RING( ctx->rb3d_ropcntl ); - OUT_RING( ctx->rb3d_planemask ); - ADVANCE_RING(); - } - - if ( dirty & RADEON_UPLOAD_VIEWPORT ) { - BEGIN_RING( 7 ); - OUT_RING( CP_PACKET0( RADEON_SE_VPORT_XSCALE, 5 ) ); - OUT_RING( ctx->se_vport_xscale ); - OUT_RING( ctx->se_vport_xoffset ); - OUT_RING( ctx->se_vport_yscale ); - OUT_RING( ctx->se_vport_yoffset ); - OUT_RING( ctx->se_vport_zscale ); - OUT_RING( ctx->se_vport_zoffset ); - ADVANCE_RING(); - } - - if ( dirty & RADEON_UPLOAD_SETUP ) { - BEGIN_RING( 4 ); - OUT_RING( CP_PACKET0( RADEON_SE_CNTL, 0 ) ); - OUT_RING( ctx->se_cntl ); - OUT_RING( CP_PACKET0( RADEON_SE_CNTL_STATUS, 0 ) ); - OUT_RING( ctx->se_cntl_status ); - ADVANCE_RING(); - } - - if ( dirty & RADEON_UPLOAD_MISC ) { - BEGIN_RING( 2 ); - OUT_RING( CP_PACKET0( RADEON_RE_MISC, 0 ) ); - OUT_RING( ctx->re_misc ); - ADVANCE_RING(); - } - - if ( dirty & RADEON_UPLOAD_TEX0 ) { - if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, - &tex[0].pp_txoffset ) ) { - DRM_ERROR( "Invalid texture offset for unit 0\n" ); - return DRM_ERR( EINVAL ); - } - - BEGIN_RING( 9 ); - OUT_RING( CP_PACKET0( RADEON_PP_TXFILTER_0, 5 ) ); - OUT_RING( tex[0].pp_txfilter ); - OUT_RING( tex[0].pp_txformat ); - OUT_RING( tex[0].pp_txoffset ); - OUT_RING( tex[0].pp_txcblend ); - OUT_RING( tex[0].pp_txablend ); - OUT_RING( tex[0].pp_tfactor ); - OUT_RING( CP_PACKET0( RADEON_PP_BORDER_COLOR_0, 0 ) ); - OUT_RING( tex[0].pp_border_color ); - ADVANCE_RING(); - } - - if ( dirty & RADEON_UPLOAD_TEX1 ) { - if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, - &tex[1].pp_txoffset ) ) { - DRM_ERROR( "Invalid texture offset for unit 1\n" ); - return DRM_ERR( EINVAL ); - } - - BEGIN_RING( 9 ); - OUT_RING( CP_PACKET0( RADEON_PP_TXFILTER_1, 5 ) ); - OUT_RING( tex[1].pp_txfilter ); - OUT_RING( tex[1].pp_txformat ); - OUT_RING( tex[1].pp_txoffset ); - OUT_RING( tex[1].pp_txcblend ); - OUT_RING( tex[1].pp_txablend ); - OUT_RING( tex[1].pp_tfactor ); - OUT_RING( CP_PACKET0( RADEON_PP_BORDER_COLOR_1, 0 ) ); - OUT_RING( tex[1].pp_border_color ); - ADVANCE_RING(); - } - - if ( dirty & RADEON_UPLOAD_TEX2 ) { - if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, - &tex[2].pp_txoffset ) ) { - DRM_ERROR( "Invalid texture offset for unit 2\n" ); - return DRM_ERR( EINVAL ); - } - - BEGIN_RING( 9 ); - OUT_RING( CP_PACKET0( RADEON_PP_TXFILTER_2, 5 ) ); - OUT_RING( tex[2].pp_txfilter ); - OUT_RING( tex[2].pp_txformat ); - OUT_RING( tex[2].pp_txoffset ); - OUT_RING( tex[2].pp_txcblend ); - OUT_RING( tex[2].pp_txablend ); - OUT_RING( tex[2].pp_tfactor ); - OUT_RING( CP_PACKET0( RADEON_PP_BORDER_COLOR_2, 0 ) ); - OUT_RING( tex[2].pp_border_color ); - ADVANCE_RING(); - } - - return 0; -} - -/* Emit 1.2 state - */ -static int radeon_emit_state2( drm_radeon_private_t *dev_priv, - drm_file_t *filp_priv, - drm_radeon_state_t *state ) -{ - RING_LOCALS; - - if (state->dirty & RADEON_UPLOAD_ZBIAS) { - BEGIN_RING( 3 ); - OUT_RING( CP_PACKET0( RADEON_SE_ZBIAS_FACTOR, 1 ) ); - OUT_RING( state->context2.se_zbias_factor ); - OUT_RING( state->context2.se_zbias_constant ); - ADVANCE_RING(); - } - - return radeon_emit_state( dev_priv, filp_priv, &state->context, - state->tex, state->dirty ); -} - -/* New (1.3) state mechanism. 3 commands (packet, scalar, vector) in - * 1.3 cmdbuffers allow all previous state to be updated as well as - * the tcl scalar and vector areas. - */ -static struct { - int start; - int len; - const char *name; -} packet[RADEON_MAX_STATE_PACKETS] = { - { RADEON_PP_MISC,7,"RADEON_PP_MISC" }, - { RADEON_PP_CNTL,3,"RADEON_PP_CNTL" }, - { RADEON_RB3D_COLORPITCH,1,"RADEON_RB3D_COLORPITCH" }, - { RADEON_RE_LINE_PATTERN,2,"RADEON_RE_LINE_PATTERN" }, - { RADEON_SE_LINE_WIDTH,1,"RADEON_SE_LINE_WIDTH" }, - { RADEON_PP_LUM_MATRIX,1,"RADEON_PP_LUM_MATRIX" }, - { RADEON_PP_ROT_MATRIX_0,2,"RADEON_PP_ROT_MATRIX_0" }, - { RADEON_RB3D_STENCILREFMASK,3,"RADEON_RB3D_STENCILREFMASK" }, - { RADEON_SE_VPORT_XSCALE,6,"RADEON_SE_VPORT_XSCALE" }, - { RADEON_SE_CNTL,2,"RADEON_SE_CNTL" }, - { RADEON_SE_CNTL_STATUS,1,"RADEON_SE_CNTL_STATUS" }, - { RADEON_RE_MISC,1,"RADEON_RE_MISC" }, - { RADEON_PP_TXFILTER_0,6,"RADEON_PP_TXFILTER_0" }, - { RADEON_PP_BORDER_COLOR_0,1,"RADEON_PP_BORDER_COLOR_0" }, - { RADEON_PP_TXFILTER_1,6,"RADEON_PP_TXFILTER_1" }, - { RADEON_PP_BORDER_COLOR_1,1,"RADEON_PP_BORDER_COLOR_1" }, - { RADEON_PP_TXFILTER_2,6,"RADEON_PP_TXFILTER_2" }, - { RADEON_PP_BORDER_COLOR_2,1,"RADEON_PP_BORDER_COLOR_2" }, - { RADEON_SE_ZBIAS_FACTOR,2,"RADEON_SE_ZBIAS_FACTOR" }, - { RADEON_SE_TCL_OUTPUT_VTX_FMT,11,"RADEON_SE_TCL_OUTPUT_VTX_FMT" }, - { RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED,17,"RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED" }, - { R200_PP_TXCBLEND_0, 4, "R200_PP_TXCBLEND_0" }, - { R200_PP_TXCBLEND_1, 4, "R200_PP_TXCBLEND_1" }, - { R200_PP_TXCBLEND_2, 4, "R200_PP_TXCBLEND_2" }, - { R200_PP_TXCBLEND_3, 4, "R200_PP_TXCBLEND_3" }, - { R200_PP_TXCBLEND_4, 4, "R200_PP_TXCBLEND_4" }, - { R200_PP_TXCBLEND_5, 4, "R200_PP_TXCBLEND_5" }, - { R200_PP_TXCBLEND_6, 4, "R200_PP_TXCBLEND_6" }, - { R200_PP_TXCBLEND_7, 4, "R200_PP_TXCBLEND_7" }, - { R200_SE_TCL_LIGHT_MODEL_CTL_0, 6, "R200_SE_TCL_LIGHT_MODEL_CTL_0" }, - { R200_PP_TFACTOR_0, 6, "R200_PP_TFACTOR_0" }, - { R200_SE_VTX_FMT_0, 4, "R200_SE_VTX_FMT_0" }, - { R200_SE_VAP_CNTL, 1, "R200_SE_VAP_CNTL" }, - { R200_SE_TCL_MATRIX_SEL_0, 5, "R200_SE_TCL_MATRIX_SEL_0" }, - { R200_SE_TCL_TEX_PROC_CTL_2, 5, "R200_SE_TCL_TEX_PROC_CTL_2" }, - { R200_SE_TCL_UCP_VERT_BLEND_CTL, 1, "R200_SE_TCL_UCP_VERT_BLEND_CTL" }, - { R200_PP_TXFILTER_0, 6, "R200_PP_TXFILTER_0" }, - { R200_PP_TXFILTER_1, 6, "R200_PP_TXFILTER_1" }, - { R200_PP_TXFILTER_2, 6, "R200_PP_TXFILTER_2" }, - { R200_PP_TXFILTER_3, 6, "R200_PP_TXFILTER_3" }, - { R200_PP_TXFILTER_4, 6, "R200_PP_TXFILTER_4" }, - { R200_PP_TXFILTER_5, 6, "R200_PP_TXFILTER_5" }, - { R200_PP_TXOFFSET_0, 1, "R200_PP_TXOFFSET_0" }, - { R200_PP_TXOFFSET_1, 1, "R200_PP_TXOFFSET_1" }, - { R200_PP_TXOFFSET_2, 1, "R200_PP_TXOFFSET_2" }, - { R200_PP_TXOFFSET_3, 1, "R200_PP_TXOFFSET_3" }, - { R200_PP_TXOFFSET_4, 1, "R200_PP_TXOFFSET_4" }, - { R200_PP_TXOFFSET_5, 1, "R200_PP_TXOFFSET_5" }, - { R200_SE_VTE_CNTL, 1, "R200_SE_VTE_CNTL" }, - { R200_SE_TCL_OUTPUT_VTX_COMP_SEL, 1, "R200_SE_TCL_OUTPUT_VTX_COMP_SEL" }, - { R200_PP_TAM_DEBUG3, 1, "R200_PP_TAM_DEBUG3" }, - { R200_PP_CNTL_X, 1, "R200_PP_CNTL_X" }, - { R200_RB3D_DEPTHXY_OFFSET, 1, "R200_RB3D_DEPTHXY_OFFSET" }, - { R200_RE_AUX_SCISSOR_CNTL, 1, "R200_RE_AUX_SCISSOR_CNTL" }, - { R200_RE_SCISSOR_TL_0, 2, "R200_RE_SCISSOR_TL_0" }, - { R200_RE_SCISSOR_TL_1, 2, "R200_RE_SCISSOR_TL_1" }, - { R200_RE_SCISSOR_TL_2, 2, "R200_RE_SCISSOR_TL_2" }, - { R200_SE_VAP_CNTL_STATUS, 1, "R200_SE_VAP_CNTL_STATUS" }, - { R200_SE_VTX_STATE_CNTL, 1, "R200_SE_VTX_STATE_CNTL" }, - { R200_RE_POINTSIZE, 1, "R200_RE_POINTSIZE" }, - { R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0, 4, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0" }, - { R200_PP_CUBIC_FACES_0, 1, "R200_PP_CUBIC_FACES_0" }, /* 61 */ - { R200_PP_CUBIC_OFFSET_F1_0, 5, "R200_PP_CUBIC_OFFSET_F1_0" }, /* 62 */ - { R200_PP_CUBIC_FACES_1, 1, "R200_PP_CUBIC_FACES_1" }, - { R200_PP_CUBIC_OFFSET_F1_1, 5, "R200_PP_CUBIC_OFFSET_F1_1" }, - { R200_PP_CUBIC_FACES_2, 1, "R200_PP_CUBIC_FACES_2" }, - { R200_PP_CUBIC_OFFSET_F1_2, 5, "R200_PP_CUBIC_OFFSET_F1_2" }, - { R200_PP_CUBIC_FACES_3, 1, "R200_PP_CUBIC_FACES_3" }, - { R200_PP_CUBIC_OFFSET_F1_3, 5, "R200_PP_CUBIC_OFFSET_F1_3" }, - { R200_PP_CUBIC_FACES_4, 1, "R200_PP_CUBIC_FACES_4" }, - { R200_PP_CUBIC_OFFSET_F1_4, 5, "R200_PP_CUBIC_OFFSET_F1_4" }, - { R200_PP_CUBIC_FACES_5, 1, "R200_PP_CUBIC_FACES_5" }, - { R200_PP_CUBIC_OFFSET_F1_5, 5, "R200_PP_CUBIC_OFFSET_F1_5" }, - { RADEON_PP_TEX_SIZE_0, 2, "RADEON_PP_TEX_SIZE_0" }, - { RADEON_PP_TEX_SIZE_1, 2, "RADEON_PP_TEX_SIZE_1" }, - { RADEON_PP_TEX_SIZE_2, 2, "RADEON_PP_TEX_SIZE_2" }, - { R200_RB3D_BLENDCOLOR, 3, "R200_RB3D_BLENDCOLOR" }, - { R200_SE_TCL_POINT_SPRITE_CNTL, 1, "R200_SE_TCL_POINT_SPRITE_CNTL"}, - { RADEON_PP_CUBIC_FACES_0, 1, "RADEON_PP_CUBIC_FACES_0"}, - { RADEON_PP_CUBIC_OFFSET_T0_0, 5, "RADEON_PP_CUBIC_OFFSET_T0_0"}, - { RADEON_PP_CUBIC_FACES_1, 1, "RADEON_PP_CUBIC_FACES_1"}, - { RADEON_PP_CUBIC_OFFSET_T1_0, 5, "RADEON_PP_CUBIC_OFFSET_T1_0"}, - { RADEON_PP_CUBIC_FACES_2, 1, "RADEON_PP_CUBIC_FACES_2"}, - { RADEON_PP_CUBIC_OFFSET_T2_0, 5, "RADEON_PP_CUBIC_OFFSET_T2_0"}, - { R200_PP_TRI_PERF, 2, "R200_PP_TRI_PERF"}, -}; - - - -/* ================================================================ - * Performance monitoring functions - */ - -static void radeon_clear_box( drm_radeon_private_t *dev_priv, - int x, int y, int w, int h, - int r, int g, int b ) -{ - u32 color; - RING_LOCALS; - - x += dev_priv->sarea_priv->boxes[0].x1; - y += dev_priv->sarea_priv->boxes[0].y1; - - switch ( dev_priv->color_fmt ) { - case RADEON_COLOR_FORMAT_RGB565: - color = (((r & 0xf8) << 8) | - ((g & 0xfc) << 3) | - ((b & 0xf8) >> 3)); - break; - case RADEON_COLOR_FORMAT_ARGB8888: - default: - color = (((0xff) << 24) | (r << 16) | (g << 8) | b); - break; - } - - BEGIN_RING( 4 ); - RADEON_WAIT_UNTIL_3D_IDLE(); - OUT_RING( CP_PACKET0( RADEON_DP_WRITE_MASK, 0 ) ); - OUT_RING( 0xffffffff ); - ADVANCE_RING(); - - BEGIN_RING( 6 ); - - OUT_RING( CP_PACKET3( RADEON_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( RADEON_GMC_DST_PITCH_OFFSET_CNTL | - RADEON_GMC_BRUSH_SOLID_COLOR | - (dev_priv->color_fmt << 8) | - RADEON_GMC_SRC_DATATYPE_COLOR | - RADEON_ROP3_P | - RADEON_GMC_CLR_CMP_CNTL_DIS ); - - if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) { - OUT_RING( dev_priv->front_pitch_offset ); - } else { - OUT_RING( dev_priv->back_pitch_offset ); - } - - OUT_RING( color ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); - - ADVANCE_RING(); -} - -static void radeon_cp_performance_boxes( drm_radeon_private_t *dev_priv ) -{ - /* Collapse various things into a wait flag -- trying to - * guess if userspase slept -- better just to have them tell us. - */ - if (dev_priv->stats.last_frame_reads > 1 || - dev_priv->stats.last_clear_reads > dev_priv->stats.clears) { - dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; - } - - if (dev_priv->stats.freelist_loops) { - dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; - } - - /* Purple box for page flipping - */ - if ( dev_priv->stats.boxes & RADEON_BOX_FLIP ) - radeon_clear_box( dev_priv, 4, 4, 8, 8, 255, 0, 255 ); - - /* Red box if we have to wait for idle at any point - */ - if ( dev_priv->stats.boxes & RADEON_BOX_WAIT_IDLE ) - radeon_clear_box( dev_priv, 16, 4, 8, 8, 255, 0, 0 ); - - /* Blue box: lost context? - */ - - /* Yellow box for texture swaps - */ - if ( dev_priv->stats.boxes & RADEON_BOX_TEXTURE_LOAD ) - radeon_clear_box( dev_priv, 40, 4, 8, 8, 255, 255, 0 ); - - /* Green box if hardware never idles (as far as we can tell) - */ - if ( !(dev_priv->stats.boxes & RADEON_BOX_DMA_IDLE) ) - radeon_clear_box( dev_priv, 64, 4, 8, 8, 0, 255, 0 ); - - - /* Draw bars indicating number of buffers allocated - * (not a great measure, easily confused) - */ - if (dev_priv->stats.requested_bufs) { - if (dev_priv->stats.requested_bufs > 100) - dev_priv->stats.requested_bufs = 100; - - radeon_clear_box( dev_priv, 4, 16, - dev_priv->stats.requested_bufs, 4, - 196, 128, 128 ); - } - - memset( &dev_priv->stats, 0, sizeof(dev_priv->stats) ); - -} -/* ================================================================ - * CP command dispatch functions - */ - -static void radeon_cp_dispatch_clear( drm_device_t *dev, - drm_radeon_clear_t *clear, - drm_radeon_clear_rect_t *depth_boxes ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_depth_clear_t *depth_clear = &dev_priv->depth_clear; - int nbox = sarea_priv->nbox; - drm_clip_rect_t *pbox = sarea_priv->boxes; - unsigned int flags = clear->flags; - u32 rb3d_cntl = 0, rb3d_stencilrefmask= 0; - int i; - RING_LOCALS; - DRM_DEBUG( "flags = 0x%x\n", flags ); - - dev_priv->stats.clears++; - - if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) { - unsigned int tmp = flags; - - flags &= ~(RADEON_FRONT | RADEON_BACK); - if ( tmp & RADEON_FRONT ) flags |= RADEON_BACK; - if ( tmp & RADEON_BACK ) flags |= RADEON_FRONT; - } - - if ( flags & (RADEON_FRONT | RADEON_BACK) ) { - - BEGIN_RING( 4 ); - - /* Ensure the 3D stream is idle before doing a - * 2D fill to clear the front or back buffer. - */ - RADEON_WAIT_UNTIL_3D_IDLE(); - - OUT_RING( CP_PACKET0( RADEON_DP_WRITE_MASK, 0 ) ); - OUT_RING( clear->color_mask ); - - ADVANCE_RING(); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->ctx_owner = 0; - - for ( i = 0 ; i < nbox ; i++ ) { - int x = pbox[i].x1; - int y = pbox[i].y1; - int w = pbox[i].x2 - x; - int h = pbox[i].y2 - y; - - DRM_DEBUG( "dispatch clear %d,%d-%d,%d flags 0x%x\n", - x, y, w, h, flags ); - - if ( flags & RADEON_FRONT ) { - BEGIN_RING( 6 ); - - OUT_RING( CP_PACKET3( RADEON_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( RADEON_GMC_DST_PITCH_OFFSET_CNTL | - RADEON_GMC_BRUSH_SOLID_COLOR | - (dev_priv->color_fmt << 8) | - RADEON_GMC_SRC_DATATYPE_COLOR | - RADEON_ROP3_P | - RADEON_GMC_CLR_CMP_CNTL_DIS ); - - OUT_RING( dev_priv->front_pitch_offset ); - OUT_RING( clear->clear_color ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); - - ADVANCE_RING(); - } - - if ( flags & RADEON_BACK ) { - BEGIN_RING( 6 ); - - OUT_RING( CP_PACKET3( RADEON_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( RADEON_GMC_DST_PITCH_OFFSET_CNTL | - RADEON_GMC_BRUSH_SOLID_COLOR | - (dev_priv->color_fmt << 8) | - RADEON_GMC_SRC_DATATYPE_COLOR | - RADEON_ROP3_P | - RADEON_GMC_CLR_CMP_CNTL_DIS ); - - OUT_RING( dev_priv->back_pitch_offset ); - OUT_RING( clear->clear_color ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); - - ADVANCE_RING(); - } - } - } - - /* hyper z clear */ - /* no docs available, based on reverse engeneering by Stephane Marchesin */ - if ((flags & (RADEON_DEPTH | RADEON_STENCIL)) && (flags & RADEON_CLEAR_FASTZ)) { - - int i; - int depthpixperline = dev_priv->depth_fmt==RADEON_DEPTH_FORMAT_16BIT_INT_Z? - (dev_priv->depth_pitch / 2): (dev_priv->depth_pitch / 4); - - u32 clearmask; - - u32 tempRB3D_DEPTHCLEARVALUE = clear->clear_depth | - ((clear->depth_mask & 0xff) << 24); - - - /* Make sure we restore the 3D state next time. - * we haven't touched any "normal" state - still need this? - */ - dev_priv->sarea_priv->ctx_owner = 0; - - if ((dev_priv->flags & CHIP_HAS_HIERZ) && (flags & RADEON_USE_HIERZ)) { - /* FIXME : reverse engineer that for Rx00 cards */ - /* FIXME : the mask supposedly contains low-res z values. So can't set - just to the max (0xff? or actually 0x3fff?), need to take z clear - value into account? */ - /* pattern seems to work for r100, though get slight - rendering errors with glxgears. If hierz is not enabled for r100, - only 4 bits which indicate clear (15,16,31,32, all zero) matter, the - other ones are ignored, and the same clear mask can be used. That's - very different behaviour than R200 which needs different clear mask - and different number of tiles to clear if hierz is enabled or not !?! - */ - clearmask = (0xff<<22)|(0xff<<6)| 0x003f003f; - } - else { - /* clear mask : chooses the clearing pattern. - rv250: could be used to clear only parts of macrotiles - (but that would get really complicated...)? - bit 0 and 1 (either or both of them ?!?!) are used to - not clear tile (or maybe one of the bits indicates if the tile is - compressed or not), bit 2 and 3 to not clear tile 1,...,. - Pattern is as follows: - | 0,1 | 4,5 | 8,9 |12,13|16,17|20,21|24,25|28,29| - bits ------------------------------------------------- - | 2,3 | 6,7 |10,11|14,15|18,19|22,23|26,27|30,31| - rv100: clearmask covers 2x8 4x1 tiles, but one clear still - covers 256 pixels ?!? - */ - clearmask = 0x0; - } - - BEGIN_RING( 8 ); - RADEON_WAIT_UNTIL_2D_IDLE(); - OUT_RING_REG( RADEON_RB3D_DEPTHCLEARVALUE, - tempRB3D_DEPTHCLEARVALUE); - /* what offset is this exactly ? */ - OUT_RING_REG( RADEON_RB3D_ZMASKOFFSET, 0 ); - /* need ctlstat, otherwise get some strange black flickering */ - OUT_RING_REG( RADEON_RB3D_ZCACHE_CTLSTAT, RADEON_RB3D_ZC_FLUSH_ALL ); - ADVANCE_RING(); - - for (i = 0; i < nbox; i++) { - int tileoffset, nrtilesx, nrtilesy, j; - /* it looks like r200 needs rv-style clears, at least if hierz is not enabled? */ - if ((dev_priv->flags&CHIP_HAS_HIERZ) && !(dev_priv->microcode_version==UCODE_R200)) { - /* FIXME : figure this out for r200 (when hierz is enabled). Or - maybe r200 actually doesn't need to put the low-res z value into - the tile cache like r100, but just needs to clear the hi-level z-buffer? - Works for R100, both with hierz and without. - R100 seems to operate on 2x1 8x8 tiles, but... - odd: offset/nrtiles need to be 64 pix (4 block) aligned? Potentially - problematic with resolutions which are not 64 pix aligned? */ - tileoffset = ((pbox[i].y1 >> 3) * depthpixperline + pbox[i].x1) >> 6; - nrtilesx = ((pbox[i].x2 & ~63) - (pbox[i].x1 & ~63)) >> 4; - nrtilesy = (pbox[i].y2 >> 3) - (pbox[i].y1 >> 3); - for (j = 0; j <= nrtilesy; j++) { - BEGIN_RING( 4 ); - OUT_RING( CP_PACKET3( RADEON_3D_CLEAR_ZMASK, 2 ) ); - /* first tile */ - OUT_RING( tileoffset * 8 ); - /* the number of tiles to clear */ - OUT_RING( nrtilesx + 4 ); - /* clear mask : chooses the clearing pattern. */ - OUT_RING( clearmask ); - ADVANCE_RING(); - tileoffset += depthpixperline >> 6; - } - } - else if (dev_priv->microcode_version==UCODE_R200) { - /* works for rv250. */ - /* find first macro tile (8x2 4x4 z-pixels on rv250) */ - tileoffset = ((pbox[i].y1 >> 3) * depthpixperline + pbox[i].x1) >> 5; - nrtilesx = (pbox[i].x2 >> 5) - (pbox[i].x1 >> 5); - nrtilesy = (pbox[i].y2 >> 3) - (pbox[i].y1 >> 3); - for (j = 0; j <= nrtilesy; j++) { - BEGIN_RING( 4 ); - OUT_RING( CP_PACKET3( RADEON_3D_CLEAR_ZMASK, 2 ) ); - /* first tile */ - /* judging by the first tile offset needed, could possibly - directly address/clear 4x4 tiles instead of 8x2 * 4x4 - macro tiles, though would still need clear mask for - right/bottom if truely 4x4 granularity is desired ? */ - OUT_RING( tileoffset * 16 ); - /* the number of tiles to clear */ - OUT_RING( nrtilesx + 1 ); - /* clear mask : chooses the clearing pattern. */ - OUT_RING( clearmask ); - ADVANCE_RING(); - tileoffset += depthpixperline >> 5; - } - } - else { /* rv 100 */ - /* rv100 might not need 64 pix alignment, who knows */ - /* offsets are, hmm, weird */ - tileoffset = ((pbox[i].y1 >> 4) * depthpixperline + pbox[i].x1) >> 6; - nrtilesx = ((pbox[i].x2 & ~63) - (pbox[i].x1 & ~63)) >> 4; - nrtilesy = (pbox[i].y2 >> 4) - (pbox[i].y1 >> 4); - for (j = 0; j <= nrtilesy; j++) { - BEGIN_RING( 4 ); - OUT_RING( CP_PACKET3( RADEON_3D_CLEAR_ZMASK, 2 ) ); - OUT_RING( tileoffset * 128 ); - /* the number of tiles to clear */ - OUT_RING( nrtilesx + 4 ); - /* clear mask : chooses the clearing pattern. */ - OUT_RING( clearmask ); - ADVANCE_RING(); - tileoffset += depthpixperline >> 6; - } - } - } - - /* TODO don't always clear all hi-level z tiles */ - if ((dev_priv->flags & CHIP_HAS_HIERZ) && (dev_priv->microcode_version==UCODE_R200) - && (flags & RADEON_USE_HIERZ)) - /* r100 and cards without hierarchical z-buffer have no high-level z-buffer */ - /* FIXME : the mask supposedly contains low-res z values. So can't set - just to the max (0xff? or actually 0x3fff?), need to take z clear - value into account? */ - { - BEGIN_RING( 4 ); - OUT_RING( CP_PACKET3( RADEON_3D_CLEAR_HIZ, 2 ) ); - OUT_RING( 0x0 ); /* First tile */ - OUT_RING( 0x3cc0 ); - OUT_RING( (0xff<<22)|(0xff<<6)| 0x003f003f); - ADVANCE_RING(); - } - } - - /* We have to clear the depth and/or stencil buffers by - * rendering a quad into just those buffers. Thus, we have to - * make sure the 3D engine is configured correctly. - */ - else if ((dev_priv->microcode_version == UCODE_R200) && - (flags & (RADEON_DEPTH | RADEON_STENCIL))) { - - int tempPP_CNTL; - int tempRE_CNTL; - int tempRB3D_CNTL; - int tempRB3D_ZSTENCILCNTL; - int tempRB3D_STENCILREFMASK; - int tempRB3D_PLANEMASK; - int tempSE_CNTL; - int tempSE_VTE_CNTL; - int tempSE_VTX_FMT_0; - int tempSE_VTX_FMT_1; - int tempSE_VAP_CNTL; - int tempRE_AUX_SCISSOR_CNTL; - - tempPP_CNTL = 0; - tempRE_CNTL = 0; - - tempRB3D_CNTL = depth_clear->rb3d_cntl; - - tempRB3D_ZSTENCILCNTL = depth_clear->rb3d_zstencilcntl; - tempRB3D_STENCILREFMASK = 0x0; - - tempSE_CNTL = depth_clear->se_cntl; - - - - /* Disable TCL */ - - tempSE_VAP_CNTL = (/* SE_VAP_CNTL__FORCE_W_TO_ONE_MASK | */ - (0x9 << SE_VAP_CNTL__VF_MAX_VTX_NUM__SHIFT)); - - tempRB3D_PLANEMASK = 0x0; - - tempRE_AUX_SCISSOR_CNTL = 0x0; - - tempSE_VTE_CNTL = - SE_VTE_CNTL__VTX_XY_FMT_MASK | - SE_VTE_CNTL__VTX_Z_FMT_MASK; - - /* Vertex format (X, Y, Z, W)*/ - tempSE_VTX_FMT_0 = - SE_VTX_FMT_0__VTX_Z0_PRESENT_MASK | - SE_VTX_FMT_0__VTX_W0_PRESENT_MASK; - tempSE_VTX_FMT_1 = 0x0; - - - /* - * Depth buffer specific enables - */ - if (flags & RADEON_DEPTH) { - /* Enable depth buffer */ - tempRB3D_CNTL |= RADEON_Z_ENABLE; - } else { - /* Disable depth buffer */ - tempRB3D_CNTL &= ~RADEON_Z_ENABLE; - } - - /* - * Stencil buffer specific enables - */ - if ( flags & RADEON_STENCIL ) { - tempRB3D_CNTL |= RADEON_STENCIL_ENABLE; - tempRB3D_STENCILREFMASK = clear->depth_mask; - } else { - tempRB3D_CNTL &= ~RADEON_STENCIL_ENABLE; - tempRB3D_STENCILREFMASK = 0x00000000; - } - - if (flags & RADEON_USE_COMP_ZBUF) { - tempRB3D_ZSTENCILCNTL |= RADEON_Z_COMPRESSION_ENABLE | - RADEON_Z_DECOMPRESSION_ENABLE; - } - if (flags & RADEON_USE_HIERZ) { - tempRB3D_ZSTENCILCNTL |= RADEON_Z_HIERARCHY_ENABLE; - } - - BEGIN_RING( 26 ); - RADEON_WAIT_UNTIL_2D_IDLE(); - - OUT_RING_REG( RADEON_PP_CNTL, tempPP_CNTL ); - OUT_RING_REG( R200_RE_CNTL, tempRE_CNTL ); - OUT_RING_REG( RADEON_RB3D_CNTL, tempRB3D_CNTL ); - OUT_RING_REG( RADEON_RB3D_ZSTENCILCNTL, - tempRB3D_ZSTENCILCNTL ); - OUT_RING_REG( RADEON_RB3D_STENCILREFMASK, - tempRB3D_STENCILREFMASK ); - OUT_RING_REG( RADEON_RB3D_PLANEMASK, tempRB3D_PLANEMASK ); - OUT_RING_REG( RADEON_SE_CNTL, tempSE_CNTL ); - OUT_RING_REG( R200_SE_VTE_CNTL, tempSE_VTE_CNTL ); - OUT_RING_REG( R200_SE_VTX_FMT_0, tempSE_VTX_FMT_0 ); - OUT_RING_REG( R200_SE_VTX_FMT_1, tempSE_VTX_FMT_1 ); - OUT_RING_REG( R200_SE_VAP_CNTL, tempSE_VAP_CNTL ); - OUT_RING_REG( R200_RE_AUX_SCISSOR_CNTL, - tempRE_AUX_SCISSOR_CNTL ); - ADVANCE_RING(); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->ctx_owner = 0; - - for ( i = 0 ; i < nbox ; i++ ) { - - /* Funny that this should be required -- - * sets top-left? - */ - radeon_emit_clip_rect( dev_priv, - &sarea_priv->boxes[i] ); - - BEGIN_RING( 14 ); - OUT_RING( CP_PACKET3( R200_3D_DRAW_IMMD_2, 12 ) ); - OUT_RING( (RADEON_PRIM_TYPE_RECT_LIST | - RADEON_PRIM_WALK_RING | - (3 << RADEON_NUM_VERTICES_SHIFT)) ); - OUT_RING( depth_boxes[i].ui[CLEAR_X1] ); - OUT_RING( depth_boxes[i].ui[CLEAR_Y1] ); - OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] ); - OUT_RING( 0x3f800000 ); - OUT_RING( depth_boxes[i].ui[CLEAR_X1] ); - OUT_RING( depth_boxes[i].ui[CLEAR_Y2] ); - OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] ); - OUT_RING( 0x3f800000 ); - OUT_RING( depth_boxes[i].ui[CLEAR_X2] ); - OUT_RING( depth_boxes[i].ui[CLEAR_Y2] ); - OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] ); - OUT_RING( 0x3f800000 ); - ADVANCE_RING(); - } - } - else if ( (flags & (RADEON_DEPTH | RADEON_STENCIL)) ) { - - int tempRB3D_ZSTENCILCNTL = depth_clear->rb3d_zstencilcntl; - - rb3d_cntl = depth_clear->rb3d_cntl; - - if ( flags & RADEON_DEPTH ) { - rb3d_cntl |= RADEON_Z_ENABLE; - } else { - rb3d_cntl &= ~RADEON_Z_ENABLE; - } - - if ( flags & RADEON_STENCIL ) { - rb3d_cntl |= RADEON_STENCIL_ENABLE; - rb3d_stencilrefmask = clear->depth_mask; /* misnamed field */ - } else { - rb3d_cntl &= ~RADEON_STENCIL_ENABLE; - rb3d_stencilrefmask = 0x00000000; - } - - if (flags & RADEON_USE_COMP_ZBUF) { - tempRB3D_ZSTENCILCNTL |= RADEON_Z_COMPRESSION_ENABLE | - RADEON_Z_DECOMPRESSION_ENABLE; - } - if (flags & RADEON_USE_HIERZ) { - tempRB3D_ZSTENCILCNTL |= RADEON_Z_HIERARCHY_ENABLE; - } - - BEGIN_RING( 13 ); - RADEON_WAIT_UNTIL_2D_IDLE(); - - OUT_RING( CP_PACKET0( RADEON_PP_CNTL, 1 ) ); - OUT_RING( 0x00000000 ); - OUT_RING( rb3d_cntl ); - - OUT_RING_REG( RADEON_RB3D_ZSTENCILCNTL, - tempRB3D_ZSTENCILCNTL ); - OUT_RING_REG( RADEON_RB3D_STENCILREFMASK, - rb3d_stencilrefmask ); - OUT_RING_REG( RADEON_RB3D_PLANEMASK, - 0x00000000 ); - OUT_RING_REG( RADEON_SE_CNTL, - depth_clear->se_cntl ); - ADVANCE_RING(); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->ctx_owner = 0; - - for ( i = 0 ; i < nbox ; i++ ) { - - /* Funny that this should be required -- - * sets top-left? - */ - radeon_emit_clip_rect( dev_priv, - &sarea_priv->boxes[i] ); - - BEGIN_RING( 15 ); - - OUT_RING( CP_PACKET3( RADEON_3D_DRAW_IMMD, 13 ) ); - OUT_RING( RADEON_VTX_Z_PRESENT | - RADEON_VTX_PKCOLOR_PRESENT); - OUT_RING( (RADEON_PRIM_TYPE_RECT_LIST | - RADEON_PRIM_WALK_RING | - RADEON_MAOS_ENABLE | - RADEON_VTX_FMT_RADEON_MODE | - (3 << RADEON_NUM_VERTICES_SHIFT)) ); - - - OUT_RING( depth_boxes[i].ui[CLEAR_X1] ); - OUT_RING( depth_boxes[i].ui[CLEAR_Y1] ); - OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] ); - OUT_RING( 0x0 ); - - OUT_RING( depth_boxes[i].ui[CLEAR_X1] ); - OUT_RING( depth_boxes[i].ui[CLEAR_Y2] ); - OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] ); - OUT_RING( 0x0 ); - - OUT_RING( depth_boxes[i].ui[CLEAR_X2] ); - OUT_RING( depth_boxes[i].ui[CLEAR_Y2] ); - OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] ); - OUT_RING( 0x0 ); - - ADVANCE_RING(); - } - } - - /* Increment the clear counter. The client-side 3D driver must - * wait on this value before performing the clear ioctl. We - * need this because the card's so damned fast... - */ - dev_priv->sarea_priv->last_clear++; - - BEGIN_RING( 4 ); - - RADEON_CLEAR_AGE( dev_priv->sarea_priv->last_clear ); - RADEON_WAIT_UNTIL_IDLE(); - - ADVANCE_RING(); -} - -static void radeon_cp_dispatch_swap( drm_device_t *dev ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - int nbox = sarea_priv->nbox; - drm_clip_rect_t *pbox = sarea_priv->boxes; - int i; - RING_LOCALS; - DRM_DEBUG( "\n" ); - - /* Do some trivial performance monitoring... - */ - if (dev_priv->do_boxes) - radeon_cp_performance_boxes( dev_priv ); - - - /* Wait for the 3D stream to idle before dispatching the bitblt. - * This will prevent data corruption between the two streams. - */ - BEGIN_RING( 2 ); - - RADEON_WAIT_UNTIL_3D_IDLE(); - - ADVANCE_RING(); - - for ( i = 0 ; i < nbox ; i++ ) { - int x = pbox[i].x1; - int y = pbox[i].y1; - int w = pbox[i].x2 - x; - int h = pbox[i].y2 - y; - - DRM_DEBUG( "dispatch swap %d,%d-%d,%d\n", - x, y, w, h ); - - BEGIN_RING( 7 ); - - OUT_RING( CP_PACKET3( RADEON_CNTL_BITBLT_MULTI, 5 ) ); - OUT_RING( RADEON_GMC_SRC_PITCH_OFFSET_CNTL | - RADEON_GMC_DST_PITCH_OFFSET_CNTL | - RADEON_GMC_BRUSH_NONE | - (dev_priv->color_fmt << 8) | - RADEON_GMC_SRC_DATATYPE_COLOR | - RADEON_ROP3_S | - RADEON_DP_SRC_SOURCE_MEMORY | - RADEON_GMC_CLR_CMP_CNTL_DIS | - RADEON_GMC_WR_MSK_DIS ); - - /* Make this work even if front & back are flipped: - */ - if (dev_priv->current_page == 0) { - OUT_RING( dev_priv->back_pitch_offset ); - OUT_RING( dev_priv->front_pitch_offset ); - } - else { - OUT_RING( dev_priv->front_pitch_offset ); - OUT_RING( dev_priv->back_pitch_offset ); - } - - OUT_RING( (x << 16) | y ); - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); - - ADVANCE_RING(); - } - - /* Increment the frame counter. The client-side 3D driver must - * throttle the framerate by waiting for this value before - * performing the swapbuffer ioctl. - */ - dev_priv->sarea_priv->last_frame++; - - BEGIN_RING( 4 ); - - RADEON_FRAME_AGE( dev_priv->sarea_priv->last_frame ); - RADEON_WAIT_UNTIL_2D_IDLE(); - - ADVANCE_RING(); -} - -static void radeon_cp_dispatch_flip( drm_device_t *dev ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_sarea_t *sarea = (drm_sarea_t *)dev_priv->sarea->handle; - int offset = (dev_priv->current_page == 1) - ? dev_priv->front_offset : dev_priv->back_offset; - RING_LOCALS; - DRM_DEBUG( "%s: page=%d pfCurrentPage=%d\n", - __FUNCTION__, - dev_priv->current_page, - dev_priv->sarea_priv->pfCurrentPage); - - /* Do some trivial performance monitoring... - */ - if (dev_priv->do_boxes) { - dev_priv->stats.boxes |= RADEON_BOX_FLIP; - radeon_cp_performance_boxes( dev_priv ); - } - - /* Update the frame offsets for both CRTCs - */ - BEGIN_RING( 6 ); - - RADEON_WAIT_UNTIL_3D_IDLE(); - OUT_RING_REG( RADEON_CRTC_OFFSET, ( ( sarea->frame.y * dev_priv->front_pitch - + sarea->frame.x - * ( dev_priv->color_fmt - 2 ) ) & ~7 ) - + offset ); - OUT_RING_REG( RADEON_CRTC2_OFFSET, dev_priv->sarea_priv->crtc2_base - + offset ); - - ADVANCE_RING(); - - /* Increment the frame counter. The client-side 3D driver must - * throttle the framerate by waiting for this value before - * performing the swapbuffer ioctl. - */ - dev_priv->sarea_priv->last_frame++; - dev_priv->sarea_priv->pfCurrentPage = dev_priv->current_page = - 1 - dev_priv->current_page; - - BEGIN_RING( 2 ); - - RADEON_FRAME_AGE( dev_priv->sarea_priv->last_frame ); - - ADVANCE_RING(); -} - -static int bad_prim_vertex_nr( int primitive, int nr ) -{ - switch (primitive & RADEON_PRIM_TYPE_MASK) { - case RADEON_PRIM_TYPE_NONE: - case RADEON_PRIM_TYPE_POINT: - return nr < 1; - case RADEON_PRIM_TYPE_LINE: - return (nr & 1) || nr == 0; - case RADEON_PRIM_TYPE_LINE_STRIP: - return nr < 2; - case RADEON_PRIM_TYPE_TRI_LIST: - case RADEON_PRIM_TYPE_3VRT_POINT_LIST: - case RADEON_PRIM_TYPE_3VRT_LINE_LIST: - case RADEON_PRIM_TYPE_RECT_LIST: - return nr % 3 || nr == 0; - case RADEON_PRIM_TYPE_TRI_FAN: - case RADEON_PRIM_TYPE_TRI_STRIP: - return nr < 3; - default: - return 1; - } -} - - - -typedef struct { - unsigned int start; - unsigned int finish; - unsigned int prim; - unsigned int numverts; - unsigned int offset; - unsigned int vc_format; -} drm_radeon_tcl_prim_t; - -static void radeon_cp_dispatch_vertex( drm_device_t *dev, - drm_buf_t *buf, - drm_radeon_tcl_prim_t *prim ) - -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - int offset = dev_priv->gart_buffers_offset + buf->offset + prim->start; - int numverts = (int)prim->numverts; - int nbox = sarea_priv->nbox; - int i = 0; - RING_LOCALS; - - DRM_DEBUG("hwprim 0x%x vfmt 0x%x %d..%d %d verts\n", - prim->prim, - prim->vc_format, - prim->start, - prim->finish, - prim->numverts); - - if (bad_prim_vertex_nr( prim->prim, prim->numverts )) { - DRM_ERROR( "bad prim %x numverts %d\n", - prim->prim, prim->numverts ); - return; - } - - do { - /* Emit the next cliprect */ - if ( i < nbox ) { - radeon_emit_clip_rect( dev_priv, - &sarea_priv->boxes[i] ); - } - - /* Emit the vertex buffer rendering commands */ - BEGIN_RING( 5 ); - - OUT_RING( CP_PACKET3( RADEON_3D_RNDR_GEN_INDX_PRIM, 3 ) ); - OUT_RING( offset ); - OUT_RING( numverts ); - OUT_RING( prim->vc_format ); - OUT_RING( prim->prim | RADEON_PRIM_WALK_LIST | - RADEON_COLOR_ORDER_RGBA | - RADEON_VTX_FMT_RADEON_MODE | - (numverts << RADEON_NUM_VERTICES_SHIFT) ); - - ADVANCE_RING(); - - i++; - } while ( i < nbox ); -} - - - -static void radeon_cp_discard_buffer( drm_device_t *dev, drm_buf_t *buf ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_buf_priv_t *buf_priv = buf->dev_private; - RING_LOCALS; - - buf_priv->age = ++dev_priv->sarea_priv->last_dispatch; - - /* Emit the vertex buffer age */ - BEGIN_RING( 2 ); - RADEON_DISPATCH_AGE( buf_priv->age ); - ADVANCE_RING(); - - buf->pending = 1; - buf->used = 0; -} - -static void radeon_cp_dispatch_indirect( drm_device_t *dev, - drm_buf_t *buf, - int start, int end ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - DRM_DEBUG( "indirect: buf=%d s=0x%x e=0x%x\n", - buf->idx, start, end ); - - if ( start != end ) { - int offset = (dev_priv->gart_buffers_offset - + buf->offset + start); - int dwords = (end - start + 3) / sizeof(u32); - - /* Indirect buffer data must be an even number of - * dwords, so if we've been given an odd number we must - * pad the data with a Type-2 CP packet. - */ - if ( dwords & 1 ) { - u32 *data = (u32 *) - ((char *)dev->agp_buffer_map->handle - + buf->offset + start); - data[dwords++] = RADEON_CP_PACKET2; - } - - /* Fire off the indirect buffer */ - BEGIN_RING( 3 ); - - OUT_RING( CP_PACKET0( RADEON_CP_IB_BASE, 1 ) ); - OUT_RING( offset ); - OUT_RING( dwords ); - - ADVANCE_RING(); - } -} - - -static void radeon_cp_dispatch_indices( drm_device_t *dev, - drm_buf_t *elt_buf, - drm_radeon_tcl_prim_t *prim ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - int offset = dev_priv->gart_buffers_offset + prim->offset; - u32 *data; - int dwords; - int i = 0; - int start = prim->start + RADEON_INDEX_PRIM_OFFSET; - int count = (prim->finish - start) / sizeof(u16); - int nbox = sarea_priv->nbox; - - DRM_DEBUG("hwprim 0x%x vfmt 0x%x %d..%d offset: %x nr %d\n", - prim->prim, - prim->vc_format, - prim->start, - prim->finish, - prim->offset, - prim->numverts); - - if (bad_prim_vertex_nr( prim->prim, count )) { - DRM_ERROR( "bad prim %x count %d\n", - prim->prim, count ); - return; - } - - - if ( start >= prim->finish || - (prim->start & 0x7) ) { - DRM_ERROR( "buffer prim %d\n", prim->prim ); - return; - } - - dwords = (prim->finish - prim->start + 3) / sizeof(u32); - - data = (u32 *)((char *)dev->agp_buffer_map->handle + - elt_buf->offset + prim->start); - - data[0] = CP_PACKET3( RADEON_3D_RNDR_GEN_INDX_PRIM, dwords-2 ); - data[1] = offset; - data[2] = prim->numverts; - data[3] = prim->vc_format; - data[4] = (prim->prim | - RADEON_PRIM_WALK_IND | - RADEON_COLOR_ORDER_RGBA | - RADEON_VTX_FMT_RADEON_MODE | - (count << RADEON_NUM_VERTICES_SHIFT) ); - - do { - if ( i < nbox ) - radeon_emit_clip_rect( dev_priv, - &sarea_priv->boxes[i] ); - - radeon_cp_dispatch_indirect( dev, elt_buf, - prim->start, - prim->finish ); - - i++; - } while ( i < nbox ); - -} - -#define RADEON_MAX_TEXTURE_SIZE (RADEON_BUFFER_SIZE - 8 * sizeof(u32)) - -static int radeon_cp_dispatch_texture( DRMFILE filp, - drm_device_t *dev, - drm_radeon_texture_t *tex, - drm_radeon_tex_image_t *image ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_file_t *filp_priv; - drm_buf_t *buf; - u32 format; - u32 *buffer; - const u8 __user *data; - int size, dwords, tex_width, blit_width; - u32 height; - int i; - u32 texpitch, microtile; - RING_LOCALS; - - DRM_GET_PRIV_WITH_RETURN( filp_priv, filp ); - - if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, &tex->offset ) ) { - DRM_ERROR( "Invalid destination offset\n" ); - return DRM_ERR( EINVAL ); - } - - dev_priv->stats.boxes |= RADEON_BOX_TEXTURE_LOAD; - - /* Flush the pixel cache. This ensures no pixel data gets mixed - * up with the texture data from the host data blit, otherwise - * part of the texture image may be corrupted. - */ - BEGIN_RING( 4 ); - RADEON_FLUSH_CACHE(); - RADEON_WAIT_UNTIL_IDLE(); - ADVANCE_RING(); - -#ifdef __BIG_ENDIAN - /* The Mesa texture functions provide the data in little endian as the - * chip wants it, but we need to compensate for the fact that the CP - * ring gets byte-swapped - */ - BEGIN_RING( 2 ); - OUT_RING_REG( RADEON_RBBM_GUICNTL, RADEON_HOST_DATA_SWAP_32BIT ); - ADVANCE_RING(); -#endif - - - /* The compiler won't optimize away a division by a variable, - * even if the only legal values are powers of two. Thus, we'll - * use a shift instead. - */ - switch ( tex->format ) { - case RADEON_TXFORMAT_ARGB8888: - case RADEON_TXFORMAT_RGBA8888: - format = RADEON_COLOR_FORMAT_ARGB8888; - tex_width = tex->width * 4; - blit_width = image->width * 4; - break; - case RADEON_TXFORMAT_AI88: - case RADEON_TXFORMAT_ARGB1555: - case RADEON_TXFORMAT_RGB565: - case RADEON_TXFORMAT_ARGB4444: - case RADEON_TXFORMAT_VYUY422: - case RADEON_TXFORMAT_YVYU422: - format = RADEON_COLOR_FORMAT_RGB565; - tex_width = tex->width * 2; - blit_width = image->width * 2; - break; - case RADEON_TXFORMAT_I8: - case RADEON_TXFORMAT_RGB332: - format = RADEON_COLOR_FORMAT_CI8; - tex_width = tex->width * 1; - blit_width = image->width * 1; - break; - default: - DRM_ERROR( "invalid texture format %d\n", tex->format ); - return DRM_ERR(EINVAL); - } - texpitch = tex->pitch; - if ((texpitch << 22) & RADEON_DST_TILE_MICRO) { - microtile = 1; - if (tex_width < 64) { - texpitch &= ~(RADEON_DST_TILE_MICRO >> 22); - /* we got tiled coordinates, untile them */ - image->x *= 2; - } - } - else microtile = 0; - - DRM_DEBUG("tex=%dx%d blit=%d\n", tex_width, tex->height, blit_width ); - - do { - DRM_DEBUG( "tex: ofs=0x%x p=%d f=%d x=%hd y=%hd w=%hd h=%hd\n", - tex->offset >> 10, tex->pitch, tex->format, - image->x, image->y, image->width, image->height ); - - /* Make a copy of some parameters in case we have to - * update them for a multi-pass texture blit. - */ - height = image->height; - data = (const u8 __user *)image->data; - - size = height * blit_width; - - if ( size > RADEON_MAX_TEXTURE_SIZE ) { - height = RADEON_MAX_TEXTURE_SIZE / blit_width; - size = height * blit_width; - } else if ( size < 4 && size > 0 ) { - size = 4; - } else if ( size == 0 ) { - return 0; - } - - buf = radeon_freelist_get( dev ); - if ( 0 && !buf ) { - radeon_do_cp_idle( dev_priv ); - buf = radeon_freelist_get( dev ); - } - if ( !buf ) { - DRM_DEBUG("radeon_cp_dispatch_texture: EAGAIN\n"); - if (DRM_COPY_TO_USER( tex->image, image, sizeof(*image) )) - return DRM_ERR(EFAULT); - return DRM_ERR(EAGAIN); - } - - - /* Dispatch the indirect buffer. - */ - buffer = (u32*)((char*)dev->agp_buffer_map->handle + buf->offset); - dwords = size / 4; - buffer[0] = CP_PACKET3( RADEON_CNTL_HOSTDATA_BLT, dwords + 6 ); - buffer[1] = (RADEON_GMC_DST_PITCH_OFFSET_CNTL | - RADEON_GMC_BRUSH_NONE | - (format << 8) | - RADEON_GMC_SRC_DATATYPE_COLOR | - RADEON_ROP3_S | - RADEON_DP_SRC_SOURCE_HOST_DATA | - RADEON_GMC_CLR_CMP_CNTL_DIS | - RADEON_GMC_WR_MSK_DIS); - - buffer[2] = (texpitch << 22) | (tex->offset >> 10); - buffer[3] = 0xffffffff; - buffer[4] = 0xffffffff; - buffer[5] = (image->y << 16) | image->x; - buffer[6] = (height << 16) | image->width; - buffer[7] = dwords; - buffer += 8; - - if (microtile) { - /* texture micro tiling in use, minimum texture width is thus 16 bytes. - however, we cannot use blitter directly for texture width < 64 bytes, - since minimum tex pitch is 64 bytes and we need this to match - the texture width, otherwise the blitter will tile it wrong. - Thus, tiling manually in this case. Additionally, need to special - case tex height = 1, since our actual image will have height 2 - and we need to ensure we don't read beyond the texture size - from user space. */ - if (tex->height == 1) { - if (tex_width >= 64 || tex_width <= 16) { - if (DRM_COPY_FROM_USER(buffer, data, - tex_width * sizeof(u32))) { - DRM_ERROR("EFAULT on pad, %d bytes\n", - tex_width); - return DRM_ERR(EFAULT); - } - } else if (tex_width == 32) { - if (DRM_COPY_FROM_USER(buffer, data, 16)) { - DRM_ERROR("EFAULT on pad, %d bytes\n", - tex_width); - return DRM_ERR(EFAULT); - } - if (DRM_COPY_FROM_USER(buffer + 8, data + 16, 16)) { - DRM_ERROR("EFAULT on pad, %d bytes\n", - tex_width); - return DRM_ERR(EFAULT); - } - } - } else if (tex_width >= 64 || tex_width == 16) { - if (DRM_COPY_FROM_USER(buffer, data, - dwords * sizeof(u32))) { - DRM_ERROR("EFAULT on data, %d dwords\n", - dwords); - return DRM_ERR(EFAULT); - } - } else if (tex_width < 16) { - for (i = 0; i < tex->height; i++) { - if (DRM_COPY_FROM_USER(buffer, data, tex_width)) { - DRM_ERROR("EFAULT on pad, %d bytes\n", - tex_width); - return DRM_ERR(EFAULT); - } - buffer += 4; - data += tex_width; - } - } else if (tex_width == 32) { - /* TODO: make sure this works when not fitting in one buffer - (i.e. 32bytes x 2048...) */ - for (i = 0; i < tex->height; i += 2) { - if (DRM_COPY_FROM_USER(buffer, data, 16)) { - DRM_ERROR("EFAULT on pad, %d bytes\n", - tex_width); - return DRM_ERR(EFAULT); - } - data += 16; - if (DRM_COPY_FROM_USER(buffer + 8, data, 16)) { - DRM_ERROR("EFAULT on pad, %d bytes\n", - tex_width); - return DRM_ERR(EFAULT); - } - data += 16; - if (DRM_COPY_FROM_USER(buffer + 4, data, 16)) { - DRM_ERROR("EFAULT on pad, %d bytes\n", - tex_width); - return DRM_ERR(EFAULT); - } - data += 16; - if (DRM_COPY_FROM_USER(buffer + 12, data, 16)) { - DRM_ERROR("EFAULT on pad, %d bytes\n", - tex_width); - return DRM_ERR(EFAULT); - } - data += 16; - buffer += 16; - } - } - } - else { - if (tex_width >= 32) { - /* Texture image width is larger than the minimum, so we - * can upload it directly. - */ - if (DRM_COPY_FROM_USER(buffer, data, - dwords * sizeof(u32))) { - DRM_ERROR("EFAULT on data, %d dwords\n", - dwords); - return DRM_ERR(EFAULT); - } - } else { - /* Texture image width is less than the minimum, so we - * need to pad out each image scanline to the minimum - * width. - */ - for (i = 0; i < tex->height; i++) { - if (DRM_COPY_FROM_USER(buffer, data, tex_width)) { - DRM_ERROR("EFAULT on pad, %d bytes\n", - tex_width); - return DRM_ERR(EFAULT); - } - buffer += 8; - data += tex_width; - } - } - } - - buf->filp = filp; - buf->used = (dwords + 8) * sizeof(u32); - radeon_cp_dispatch_indirect( dev, buf, 0, buf->used ); - radeon_cp_discard_buffer( dev, buf ); - - /* Update the input parameters for next time */ - image->y += height; - image->height -= height; - image->data = (const u8 __user *)image->data + size; - } while (image->height > 0); - - /* Flush the pixel cache after the blit completes. This ensures - * the texture data is written out to memory before rendering - * continues. - */ - BEGIN_RING( 4 ); - RADEON_FLUSH_CACHE(); - RADEON_WAIT_UNTIL_2D_IDLE(); - ADVANCE_RING(); - return 0; -} - - -static void radeon_cp_dispatch_stipple( drm_device_t *dev, u32 *stipple ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - int i; - RING_LOCALS; - DRM_DEBUG( "\n" ); - - BEGIN_RING( 35 ); - - OUT_RING( CP_PACKET0( RADEON_RE_STIPPLE_ADDR, 0 ) ); - OUT_RING( 0x00000000 ); - - OUT_RING( CP_PACKET0_TABLE( RADEON_RE_STIPPLE_DATA, 31 ) ); - for ( i = 0 ; i < 32 ; i++ ) { - OUT_RING( stipple[i] ); - } - - ADVANCE_RING(); -} - -static void radeon_apply_surface_regs( int surf_index, drm_radeon_private_t *dev_priv ) -{ - if (!dev_priv->mmio) - return; - - radeon_do_cp_idle(dev_priv); - - RADEON_WRITE( RADEON_SURFACE0_INFO + 16*surf_index, - dev_priv->surfaces[surf_index].flags ); - RADEON_WRITE( RADEON_SURFACE0_LOWER_BOUND + 16*surf_index, - dev_priv->surfaces[surf_index].lower ); - RADEON_WRITE( RADEON_SURFACE0_UPPER_BOUND + 16*surf_index, - dev_priv->surfaces[surf_index].upper ); -} - -/* Allocates a virtual surface - * doesn't always allocate a real surface, will stretch an existing - * surface when possible. - * - * Note that refcount can be at most 2, since during a free refcount=3 - * might mean we have to allocate a new surface which might not always - * be available. - * For example : we allocate three contigous surfaces ABC. If B is - * freed, we suddenly need two surfaces to store A and C, which might - * not always be available. - */ -static int alloc_surface( drm_radeon_surface_alloc_t* new, - drm_radeon_private_t *dev_priv, DRMFILE filp ) -{ - struct radeon_virt_surface *s; - int i; - int virt_surface_index; - uint32_t new_upper, new_lower; - - new_lower = new->address; - new_upper = new_lower + new->size - 1; - - /* sanity check */ - if ((new_lower >= new_upper) || (new->flags == 0) || (new->size == 0) || - ((new_upper & RADEON_SURF_ADDRESS_FIXED_MASK) != RADEON_SURF_ADDRESS_FIXED_MASK) || - ((new_lower & RADEON_SURF_ADDRESS_FIXED_MASK) != 0)) - return -1; - - /* make sure there is no overlap with existing surfaces */ - for (i = 0; i < RADEON_MAX_SURFACES; i++) { - if ((dev_priv->surfaces[i].refcount != 0) && - (( (new_lower >= dev_priv->surfaces[i].lower) && - (new_lower < dev_priv->surfaces[i].upper) ) || - ( (new_lower < dev_priv->surfaces[i].lower) && - (new_upper > dev_priv->surfaces[i].lower) )) ) - return -1; - } - - /* find a virtual surface */ - for (i = 0; i < 2*RADEON_MAX_SURFACES; i++) - if (dev_priv->virt_surfaces[i].filp == 0) - break; - if (i == 2*RADEON_MAX_SURFACES) - return -1; - virt_surface_index = i; - - /* try to reuse an existing surface */ - for (i = 0; i < RADEON_MAX_SURFACES; i++) { - /* extend before */ - if ((dev_priv->surfaces[i].refcount == 1) && - (new->flags == dev_priv->surfaces[i].flags) && - (new_upper + 1 == dev_priv->surfaces[i].lower)) { - s = &(dev_priv->virt_surfaces[virt_surface_index]); - s->surface_index = i; - s->lower = new_lower; - s->upper = new_upper; - s->flags = new->flags; - s->filp = filp; - dev_priv->surfaces[i].refcount++; - dev_priv->surfaces[i].lower = s->lower; - radeon_apply_surface_regs(s->surface_index, dev_priv); - return virt_surface_index; - } - - /* extend after */ - if ((dev_priv->surfaces[i].refcount == 1) && - (new->flags == dev_priv->surfaces[i].flags) && - (new_lower == dev_priv->surfaces[i].upper + 1)) { - s = &(dev_priv->virt_surfaces[virt_surface_index]); - s->surface_index = i; - s->lower = new_lower; - s->upper = new_upper; - s->flags = new->flags; - s->filp = filp; - dev_priv->surfaces[i].refcount++; - dev_priv->surfaces[i].upper = s->upper; - radeon_apply_surface_regs(s->surface_index, dev_priv); - return virt_surface_index; - } - } - - /* okay, we need a new one */ - for (i = 0; i < RADEON_MAX_SURFACES; i++) { - if (dev_priv->surfaces[i].refcount == 0) { - s = &(dev_priv->virt_surfaces[virt_surface_index]); - s->surface_index = i; - s->lower = new_lower; - s->upper = new_upper; - s->flags = new->flags; - s->filp = filp; - dev_priv->surfaces[i].refcount = 1; - dev_priv->surfaces[i].lower = s->lower; - dev_priv->surfaces[i].upper = s->upper; - dev_priv->surfaces[i].flags = s->flags; - radeon_apply_surface_regs(s->surface_index, dev_priv); - return virt_surface_index; - } - } - - /* we didn't find anything */ - return -1; -} - -static int free_surface( DRMFILE filp, drm_radeon_private_t *dev_priv, int lower ) -{ - struct radeon_virt_surface *s; - int i; - /* find the virtual surface */ - for(i = 0; i < 2*RADEON_MAX_SURFACES; i++) { - s = &(dev_priv->virt_surfaces[i]); - if (s->filp) { - if ((lower == s->lower) && (filp == s->filp)) { - if (dev_priv->surfaces[s->surface_index].lower == s->lower) - dev_priv->surfaces[s->surface_index].lower = s->upper; - - if (dev_priv->surfaces[s->surface_index].upper == s->upper) - dev_priv->surfaces[s->surface_index].upper = s->lower; - - dev_priv->surfaces[s->surface_index].refcount--; - if (dev_priv->surfaces[s->surface_index].refcount == 0) - dev_priv->surfaces[s->surface_index].flags = 0; - s->filp = 0; - radeon_apply_surface_regs(s->surface_index, dev_priv); - return 0; - } - } - } - return 1; -} - -static void radeon_surfaces_release( DRMFILE filp, drm_radeon_private_t *dev_priv ) -{ - int i; - for( i = 0; i < 2*RADEON_MAX_SURFACES; i++) - { - if (dev_priv->virt_surfaces[i].filp == filp) - free_surface(filp, dev_priv, dev_priv->virt_surfaces[i].lower); - } -} - -/* ================================================================ - * IOCTL functions - */ - -int radeon_surface_alloc( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_surface_alloc_t alloc; - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); -} - - DRM_COPY_FROM_USER_IOCTL( alloc, (drm_radeon_surface_alloc_t __user *)data, - sizeof(alloc) ); - - if ( alloc_surface( &alloc, dev_priv, filp) == -1 ) - return DRM_ERR(EINVAL); - else - return 0; -} - -int radeon_surface_free( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_surface_free_t memfree; - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL( memfree, (drm_radeon_surface_free_t __user *)data, - sizeof(memfree) ); - - if ( free_surface( filp, dev_priv, memfree.address ) ) - return DRM_ERR(EINVAL); - else - return 0; -} - -int radeon_cp_clear( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_clear_t clear; - drm_radeon_clear_rect_t depth_boxes[RADEON_NR_SAREA_CLIPRECTS]; - DRM_DEBUG( "\n" ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( clear, (drm_radeon_clear_t __user *)data, - sizeof(clear) ); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - - if ( sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS; - - if ( DRM_COPY_FROM_USER( &depth_boxes, clear.depth_boxes, - sarea_priv->nbox * sizeof(depth_boxes[0]) ) ) - return DRM_ERR(EFAULT); - - radeon_cp_dispatch_clear( dev, &clear, depth_boxes ); - - COMMIT_RING(); - return 0; -} - - -/* Not sure why this isn't set all the time: - */ -static int radeon_do_init_pageflip( drm_device_t *dev ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - - DRM_DEBUG( "\n" ); - - BEGIN_RING( 6 ); - RADEON_WAIT_UNTIL_3D_IDLE(); - OUT_RING( CP_PACKET0( RADEON_CRTC_OFFSET_CNTL, 0 ) ); - OUT_RING( RADEON_READ( RADEON_CRTC_OFFSET_CNTL ) | RADEON_CRTC_OFFSET_FLIP_CNTL ); - OUT_RING( CP_PACKET0( RADEON_CRTC2_OFFSET_CNTL, 0 ) ); - OUT_RING( RADEON_READ( RADEON_CRTC2_OFFSET_CNTL ) | RADEON_CRTC_OFFSET_FLIP_CNTL ); - ADVANCE_RING(); - - dev_priv->page_flipping = 1; - dev_priv->current_page = 0; - dev_priv->sarea_priv->pfCurrentPage = dev_priv->current_page; - - return 0; -} - -/* Called whenever a client dies, from DRM(release). - * NOTE: Lock isn't necessarily held when this is called! - */ -int radeon_do_cleanup_pageflip( drm_device_t *dev ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "\n" ); - - if (dev_priv->current_page != 0) - radeon_cp_dispatch_flip( dev ); - - dev_priv->page_flipping = 0; - return 0; -} - -/* Swapping and flipping are different operations, need different ioctls. - * They can & should be intermixed to support multiple 3d windows. - */ -int radeon_cp_flip( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "\n" ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - - if (!dev_priv->page_flipping) - radeon_do_init_pageflip( dev ); - - radeon_cp_dispatch_flip( dev ); - - COMMIT_RING(); - return 0; -} - -int radeon_cp_swap( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - DRM_DEBUG( "\n" ); - - LOCK_TEST_WITH_RETURN( dev, filp ); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - - if ( sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS; - - radeon_cp_dispatch_swap( dev ); - dev_priv->sarea_priv->ctx_owner = 0; - - COMMIT_RING(); - return 0; -} - -int radeon_cp_vertex( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_file_t *filp_priv; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_radeon_vertex_t vertex; - drm_radeon_tcl_prim_t prim; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_GET_PRIV_WITH_RETURN( filp_priv, filp ); - - DRM_COPY_FROM_USER_IOCTL( vertex, (drm_radeon_vertex_t __user *)data, - sizeof(vertex) ); - - DRM_DEBUG( "pid=%d index=%d count=%d discard=%d\n", - DRM_CURRENTPID, - vertex.idx, vertex.count, vertex.discard ); - - if ( vertex.idx < 0 || vertex.idx >= dma->buf_count ) { - DRM_ERROR( "buffer index %d (of %d max)\n", - vertex.idx, dma->buf_count - 1 ); - return DRM_ERR(EINVAL); - } - if ( vertex.prim < 0 || - vertex.prim > RADEON_PRIM_TYPE_3VRT_LINE_LIST ) { - DRM_ERROR( "buffer prim %d\n", vertex.prim ); - return DRM_ERR(EINVAL); - } - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - buf = dma->buflist[vertex.idx]; - - if ( buf->filp != filp ) { - DRM_ERROR( "process %d using buffer owned by %p\n", - DRM_CURRENTPID, buf->filp ); - return DRM_ERR(EINVAL); - } - if ( buf->pending ) { - DRM_ERROR( "sending pending buffer %d\n", vertex.idx ); - return DRM_ERR(EINVAL); - } - - /* Build up a prim_t record: - */ - if (vertex.count) { - buf->used = vertex.count; /* not used? */ - - if ( sarea_priv->dirty & ~RADEON_UPLOAD_CLIPRECTS ) { - if ( radeon_emit_state( dev_priv, filp_priv, - &sarea_priv->context_state, - sarea_priv->tex_state, - sarea_priv->dirty ) ) { - DRM_ERROR( "radeon_emit_state failed\n" ); - return DRM_ERR( EINVAL ); - } - - sarea_priv->dirty &= ~(RADEON_UPLOAD_TEX0IMAGES | - RADEON_UPLOAD_TEX1IMAGES | - RADEON_UPLOAD_TEX2IMAGES | - RADEON_REQUIRE_QUIESCENCE); - } - - prim.start = 0; - prim.finish = vertex.count; /* unused */ - prim.prim = vertex.prim; - prim.numverts = vertex.count; - prim.vc_format = dev_priv->sarea_priv->vc_format; - - radeon_cp_dispatch_vertex( dev, buf, &prim ); - } - - if (vertex.discard) { - radeon_cp_discard_buffer( dev, buf ); - } - - COMMIT_RING(); - return 0; -} - -int radeon_cp_indices( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_file_t *filp_priv; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_radeon_indices_t elts; - drm_radeon_tcl_prim_t prim; - int count; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_GET_PRIV_WITH_RETURN( filp_priv, filp ); - - DRM_COPY_FROM_USER_IOCTL( elts, (drm_radeon_indices_t __user *)data, - sizeof(elts) ); - - DRM_DEBUG( "pid=%d index=%d start=%d end=%d discard=%d\n", - DRM_CURRENTPID, - elts.idx, elts.start, elts.end, elts.discard ); - - if ( elts.idx < 0 || elts.idx >= dma->buf_count ) { - DRM_ERROR( "buffer index %d (of %d max)\n", - elts.idx, dma->buf_count - 1 ); - return DRM_ERR(EINVAL); - } - if ( elts.prim < 0 || - elts.prim > RADEON_PRIM_TYPE_3VRT_LINE_LIST ) { - DRM_ERROR( "buffer prim %d\n", elts.prim ); - return DRM_ERR(EINVAL); - } - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - buf = dma->buflist[elts.idx]; - - if ( buf->filp != filp ) { - DRM_ERROR( "process %d using buffer owned by %p\n", - DRM_CURRENTPID, buf->filp ); - return DRM_ERR(EINVAL); - } - if ( buf->pending ) { - DRM_ERROR( "sending pending buffer %d\n", elts.idx ); - return DRM_ERR(EINVAL); - } - - count = (elts.end - elts.start) / sizeof(u16); - elts.start -= RADEON_INDEX_PRIM_OFFSET; - - if ( elts.start & 0x7 ) { - DRM_ERROR( "misaligned buffer 0x%x\n", elts.start ); - return DRM_ERR(EINVAL); - } - if ( elts.start < buf->used ) { - DRM_ERROR( "no header 0x%x - 0x%x\n", elts.start, buf->used ); - return DRM_ERR(EINVAL); - } - - buf->used = elts.end; - - if ( sarea_priv->dirty & ~RADEON_UPLOAD_CLIPRECTS ) { - if ( radeon_emit_state( dev_priv, filp_priv, - &sarea_priv->context_state, - sarea_priv->tex_state, - sarea_priv->dirty ) ) { - DRM_ERROR( "radeon_emit_state failed\n" ); - return DRM_ERR( EINVAL ); - } - - sarea_priv->dirty &= ~(RADEON_UPLOAD_TEX0IMAGES | - RADEON_UPLOAD_TEX1IMAGES | - RADEON_UPLOAD_TEX2IMAGES | - RADEON_REQUIRE_QUIESCENCE); - } - - - /* Build up a prim_t record: - */ - prim.start = elts.start; - prim.finish = elts.end; - prim.prim = elts.prim; - prim.offset = 0; /* offset from start of dma buffers */ - prim.numverts = RADEON_MAX_VB_VERTS; /* duh */ - prim.vc_format = dev_priv->sarea_priv->vc_format; - - radeon_cp_dispatch_indices( dev, buf, &prim ); - if (elts.discard) { - radeon_cp_discard_buffer( dev, buf ); - } - - COMMIT_RING(); - return 0; -} - -int radeon_cp_texture( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_texture_t tex; - drm_radeon_tex_image_t image; - int ret; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( tex, (drm_radeon_texture_t __user *)data, sizeof(tex) ); - - if ( tex.image == NULL ) { - DRM_ERROR( "null texture image!\n" ); - return DRM_ERR(EINVAL); - } - - if ( DRM_COPY_FROM_USER( &image, - (drm_radeon_tex_image_t __user *)tex.image, - sizeof(image) ) ) - return DRM_ERR(EFAULT); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - ret = radeon_cp_dispatch_texture( filp, dev, &tex, &image ); - - COMMIT_RING(); - return ret; -} - -int radeon_cp_stipple( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_stipple_t stipple; - u32 mask[32]; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL( stipple, (drm_radeon_stipple_t __user *)data, - sizeof(stipple) ); - - if ( DRM_COPY_FROM_USER( &mask, stipple.mask, 32 * sizeof(u32) ) ) - return DRM_ERR(EFAULT); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - - radeon_cp_dispatch_stipple( dev, mask ); - - COMMIT_RING(); - return 0; -} - -int radeon_cp_indirect( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_radeon_indirect_t indirect; - RING_LOCALS; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL( indirect, (drm_radeon_indirect_t __user *)data, - sizeof(indirect) ); - - DRM_DEBUG( "indirect: idx=%d s=%d e=%d d=%d\n", - indirect.idx, indirect.start, - indirect.end, indirect.discard ); - - if ( indirect.idx < 0 || indirect.idx >= dma->buf_count ) { - DRM_ERROR( "buffer index %d (of %d max)\n", - indirect.idx, dma->buf_count - 1 ); - return DRM_ERR(EINVAL); - } - - buf = dma->buflist[indirect.idx]; - - if ( buf->filp != filp ) { - DRM_ERROR( "process %d using buffer owned by %p\n", - DRM_CURRENTPID, buf->filp ); - return DRM_ERR(EINVAL); - } - if ( buf->pending ) { - DRM_ERROR( "sending pending buffer %d\n", indirect.idx ); - return DRM_ERR(EINVAL); - } - - if ( indirect.start < buf->used ) { - DRM_ERROR( "reusing indirect: start=0x%x actual=0x%x\n", - indirect.start, buf->used ); - return DRM_ERR(EINVAL); - } - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - buf->used = indirect.end; - - /* Wait for the 3D stream to idle before the indirect buffer - * containing 2D acceleration commands is processed. - */ - BEGIN_RING( 2 ); - - RADEON_WAIT_UNTIL_3D_IDLE(); - - ADVANCE_RING(); - - /* Dispatch the indirect buffer full of commands from the - * X server. This is insecure and is thus only available to - * privileged clients. - */ - radeon_cp_dispatch_indirect( dev, buf, indirect.start, indirect.end ); - if (indirect.discard) { - radeon_cp_discard_buffer( dev, buf ); - } - - - COMMIT_RING(); - return 0; -} - -int radeon_cp_vertex2( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_file_t *filp_priv; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_radeon_vertex2_t vertex; - int i; - unsigned char laststate; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_GET_PRIV_WITH_RETURN( filp_priv, filp ); - - DRM_COPY_FROM_USER_IOCTL( vertex, (drm_radeon_vertex2_t __user *)data, - sizeof(vertex) ); - - DRM_DEBUG( "pid=%d index=%d discard=%d\n", - DRM_CURRENTPID, - vertex.idx, vertex.discard ); - - if ( vertex.idx < 0 || vertex.idx >= dma->buf_count ) { - DRM_ERROR( "buffer index %d (of %d max)\n", - vertex.idx, dma->buf_count - 1 ); - return DRM_ERR(EINVAL); - } - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - buf = dma->buflist[vertex.idx]; - - if ( buf->filp != filp ) { - DRM_ERROR( "process %d using buffer owned by %p\n", - DRM_CURRENTPID, buf->filp ); - return DRM_ERR(EINVAL); - } - - if ( buf->pending ) { - DRM_ERROR( "sending pending buffer %d\n", vertex.idx ); - return DRM_ERR(EINVAL); - } - - if (sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS) - return DRM_ERR(EINVAL); - - for (laststate = 0xff, i = 0 ; i < vertex.nr_prims ; i++) { - drm_radeon_prim_t prim; - drm_radeon_tcl_prim_t tclprim; - - if ( DRM_COPY_FROM_USER( &prim, &vertex.prim[i], sizeof(prim) ) ) - return DRM_ERR(EFAULT); - - if ( prim.stateidx != laststate ) { - drm_radeon_state_t state; - - if ( DRM_COPY_FROM_USER( &state, - &vertex.state[prim.stateidx], - sizeof(state) ) ) - return DRM_ERR(EFAULT); - - if ( radeon_emit_state2( dev_priv, filp_priv, &state ) ) { - DRM_ERROR( "radeon_emit_state2 failed\n" ); - return DRM_ERR( EINVAL ); - } - - laststate = prim.stateidx; - } - - tclprim.start = prim.start; - tclprim.finish = prim.finish; - tclprim.prim = prim.prim; - tclprim.vc_format = prim.vc_format; - - if ( prim.prim & RADEON_PRIM_WALK_IND ) { - tclprim.offset = prim.numverts * 64; - tclprim.numverts = RADEON_MAX_VB_VERTS; /* duh */ - - radeon_cp_dispatch_indices( dev, buf, &tclprim ); - } else { - tclprim.numverts = prim.numverts; - tclprim.offset = 0; /* not used */ - - radeon_cp_dispatch_vertex( dev, buf, &tclprim ); - } - - if (sarea_priv->nbox == 1) - sarea_priv->nbox = 0; - } - - if ( vertex.discard ) { - radeon_cp_discard_buffer( dev, buf ); - } - - COMMIT_RING(); - return 0; -} - - -static int radeon_emit_packets( - drm_radeon_private_t *dev_priv, - drm_file_t *filp_priv, - drm_radeon_cmd_header_t header, - drm_radeon_cmd_buffer_t *cmdbuf ) -{ - int id = (int)header.packet.packet_id; - int sz, reg; - int *data = (int *)cmdbuf->buf; - RING_LOCALS; - - if (id >= RADEON_MAX_STATE_PACKETS) - return DRM_ERR(EINVAL); - - sz = packet[id].len; - reg = packet[id].start; - - if (sz * sizeof(int) > cmdbuf->bufsz) { - DRM_ERROR( "Packet size provided larger than data provided\n" ); - return DRM_ERR(EINVAL); - } - - if ( radeon_check_and_fixup_packets( dev_priv, filp_priv, id, data ) ) { - DRM_ERROR( "Packet verification failed\n" ); - return DRM_ERR( EINVAL ); - } - - BEGIN_RING(sz+1); - OUT_RING( CP_PACKET0( reg, (sz-1) ) ); - OUT_RING_TABLE(data, sz); - ADVANCE_RING(); - - cmdbuf->buf += sz * sizeof(int); - cmdbuf->bufsz -= sz * sizeof(int); - return 0; -} - -static __inline__ int radeon_emit_scalars( - drm_radeon_private_t *dev_priv, - drm_radeon_cmd_header_t header, - drm_radeon_cmd_buffer_t *cmdbuf ) -{ - int sz = header.scalars.count; - int start = header.scalars.offset; - int stride = header.scalars.stride; - RING_LOCALS; - - BEGIN_RING( 3+sz ); - OUT_RING( CP_PACKET0( RADEON_SE_TCL_SCALAR_INDX_REG, 0 ) ); - OUT_RING( start | (stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT)); - OUT_RING( CP_PACKET0_TABLE( RADEON_SE_TCL_SCALAR_DATA_REG, sz-1 ) ); - OUT_RING_TABLE(cmdbuf->buf, sz); - ADVANCE_RING(); - cmdbuf->buf += sz * sizeof(int); - cmdbuf->bufsz -= sz * sizeof(int); - return 0; -} - -/* God this is ugly - */ -static __inline__ int radeon_emit_scalars2( - drm_radeon_private_t *dev_priv, - drm_radeon_cmd_header_t header, - drm_radeon_cmd_buffer_t *cmdbuf ) -{ - int sz = header.scalars.count; - int start = ((unsigned int)header.scalars.offset) + 0x100; - int stride = header.scalars.stride; - RING_LOCALS; - - BEGIN_RING( 3+sz ); - OUT_RING( CP_PACKET0( RADEON_SE_TCL_SCALAR_INDX_REG, 0 ) ); - OUT_RING( start | (stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT)); - OUT_RING( CP_PACKET0_TABLE( RADEON_SE_TCL_SCALAR_DATA_REG, sz-1 ) ); - OUT_RING_TABLE(cmdbuf->buf, sz); - ADVANCE_RING(); - cmdbuf->buf += sz * sizeof(int); - cmdbuf->bufsz -= sz * sizeof(int); - return 0; -} - -static __inline__ int radeon_emit_vectors( - drm_radeon_private_t *dev_priv, - drm_radeon_cmd_header_t header, - drm_radeon_cmd_buffer_t *cmdbuf ) -{ - int sz = header.vectors.count; - int start = header.vectors.offset; - int stride = header.vectors.stride; - RING_LOCALS; - - BEGIN_RING( 3+sz ); - OUT_RING( CP_PACKET0( RADEON_SE_TCL_VECTOR_INDX_REG, 0 ) ); - OUT_RING( start | (stride << RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT)); - OUT_RING( CP_PACKET0_TABLE( RADEON_SE_TCL_VECTOR_DATA_REG, (sz-1) ) ); - OUT_RING_TABLE(cmdbuf->buf, sz); - ADVANCE_RING(); - - cmdbuf->buf += sz * sizeof(int); - cmdbuf->bufsz -= sz * sizeof(int); - return 0; -} - - -static int radeon_emit_packet3( drm_device_t *dev, - drm_file_t *filp_priv, - drm_radeon_cmd_buffer_t *cmdbuf ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - unsigned int cmdsz; - int ret; - RING_LOCALS; - - DRM_DEBUG("\n"); - - if ( ( ret = radeon_check_and_fixup_packet3( dev_priv, filp_priv, - cmdbuf, &cmdsz ) ) ) { - DRM_ERROR( "Packet verification failed\n" ); - return ret; - } - - BEGIN_RING( cmdsz ); - OUT_RING_TABLE(cmdbuf->buf, cmdsz); - ADVANCE_RING(); - - cmdbuf->buf += cmdsz * 4; - cmdbuf->bufsz -= cmdsz * 4; - return 0; -} - - -static int radeon_emit_packet3_cliprect( drm_device_t *dev, - drm_file_t *filp_priv, - drm_radeon_cmd_buffer_t *cmdbuf, - int orig_nbox ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_clip_rect_t box; - unsigned int cmdsz; - int ret; - drm_clip_rect_t __user *boxes = cmdbuf->boxes; - int i = 0; - RING_LOCALS; - - DRM_DEBUG("\n"); - - if ( ( ret = radeon_check_and_fixup_packet3( dev_priv, filp_priv, - cmdbuf, &cmdsz ) ) ) { - DRM_ERROR( "Packet verification failed\n" ); - return ret; - } - - if (!orig_nbox) - goto out; - - do { - if ( i < cmdbuf->nbox ) { - if (DRM_COPY_FROM_USER_UNCHECKED( &box, &boxes[i], sizeof(box) )) - return DRM_ERR(EFAULT); - /* FIXME The second and subsequent times round - * this loop, send a WAIT_UNTIL_3D_IDLE before - * calling emit_clip_rect(). This fixes a - * lockup on fast machines when sending - * several cliprects with a cmdbuf, as when - * waving a 2D window over a 3D - * window. Something in the commands from user - * space seems to hang the card when they're - * sent several times in a row. That would be - * the correct place to fix it but this works - * around it until I can figure that out - Tim - * Smith */ - if ( i ) { - BEGIN_RING( 2 ); - RADEON_WAIT_UNTIL_3D_IDLE(); - ADVANCE_RING(); - } - radeon_emit_clip_rect( dev_priv, &box ); - } - - BEGIN_RING( cmdsz ); - OUT_RING_TABLE(cmdbuf->buf, cmdsz); - ADVANCE_RING(); - - } while ( ++i < cmdbuf->nbox ); - if (cmdbuf->nbox == 1) - cmdbuf->nbox = 0; - - out: - cmdbuf->buf += cmdsz * 4; - cmdbuf->bufsz -= cmdsz * 4; - return 0; -} - - -static int radeon_emit_wait( drm_device_t *dev, int flags ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - - DRM_DEBUG("%s: %x\n", __FUNCTION__, flags); - switch (flags) { - case RADEON_WAIT_2D: - BEGIN_RING( 2 ); - RADEON_WAIT_UNTIL_2D_IDLE(); - ADVANCE_RING(); - break; - case RADEON_WAIT_3D: - BEGIN_RING( 2 ); - RADEON_WAIT_UNTIL_3D_IDLE(); - ADVANCE_RING(); - break; - case RADEON_WAIT_2D|RADEON_WAIT_3D: - BEGIN_RING( 2 ); - RADEON_WAIT_UNTIL_IDLE(); - ADVANCE_RING(); - break; - default: - return DRM_ERR(EINVAL); - } - - return 0; -} - -int radeon_cp_cmdbuf( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_file_t *filp_priv; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf = NULL; - int idx; - drm_radeon_cmd_buffer_t cmdbuf; - drm_radeon_cmd_header_t header; - int orig_nbox, orig_bufsz; - char *kbuf; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_GET_PRIV_WITH_RETURN( filp_priv, filp ); - - DRM_COPY_FROM_USER_IOCTL( cmdbuf, (drm_radeon_cmd_buffer_t __user *)data, - sizeof(cmdbuf) ); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - - if (cmdbuf.bufsz > 64 * 1024 || cmdbuf.bufsz < 0) { - return DRM_ERR(EINVAL); - } - - /* Allocate an in-kernel area and copy in the cmdbuf. Do this to avoid - * races between checking values and using those values in other code, - * and simply to avoid a lot of function calls to copy in data. - */ - orig_bufsz = cmdbuf.bufsz; - if (orig_bufsz != 0) { - kbuf = DRM(alloc)(cmdbuf.bufsz, DRM_MEM_DRIVER); - if (kbuf == NULL) - return DRM_ERR(ENOMEM); - if (DRM_COPY_FROM_USER(kbuf, cmdbuf.buf, cmdbuf.bufsz)) - return DRM_ERR(EFAULT); - cmdbuf.buf = kbuf; - } - - orig_nbox = cmdbuf.nbox; - - while ( cmdbuf.bufsz >= sizeof(header) ) { - header.i = *(int *)cmdbuf.buf; - cmdbuf.buf += sizeof(header); - cmdbuf.bufsz -= sizeof(header); - - switch (header.header.cmd_type) { - case RADEON_CMD_PACKET: - DRM_DEBUG("RADEON_CMD_PACKET\n"); - if (radeon_emit_packets( dev_priv, filp_priv, header, &cmdbuf )) { - DRM_ERROR("radeon_emit_packets failed\n"); - goto err; - } - break; - - case RADEON_CMD_SCALARS: - DRM_DEBUG("RADEON_CMD_SCALARS\n"); - if (radeon_emit_scalars( dev_priv, header, &cmdbuf )) { - DRM_ERROR("radeon_emit_scalars failed\n"); - goto err; - } - break; - - case RADEON_CMD_VECTORS: - DRM_DEBUG("RADEON_CMD_VECTORS\n"); - if (radeon_emit_vectors( dev_priv, header, &cmdbuf )) { - DRM_ERROR("radeon_emit_vectors failed\n"); - goto err; - } - break; - - case RADEON_CMD_DMA_DISCARD: - DRM_DEBUG("RADEON_CMD_DMA_DISCARD\n"); - idx = header.dma.buf_idx; - if ( idx < 0 || idx >= dma->buf_count ) { - DRM_ERROR( "buffer index %d (of %d max)\n", - idx, dma->buf_count - 1 ); - goto err; - } - - buf = dma->buflist[idx]; - if ( buf->filp != filp || buf->pending ) { - DRM_ERROR( "bad buffer %p %p %d\n", - buf->filp, filp, buf->pending); - goto err; - } - - radeon_cp_discard_buffer( dev, buf ); - break; - - case RADEON_CMD_PACKET3: - DRM_DEBUG("RADEON_CMD_PACKET3\n"); - if (radeon_emit_packet3( dev, filp_priv, &cmdbuf )) { - DRM_ERROR("radeon_emit_packet3 failed\n"); - goto err; - } - break; - - case RADEON_CMD_PACKET3_CLIP: - DRM_DEBUG("RADEON_CMD_PACKET3_CLIP\n"); - if (radeon_emit_packet3_cliprect( dev, filp_priv, &cmdbuf, orig_nbox )) { - DRM_ERROR("radeon_emit_packet3_clip failed\n"); - goto err; - } - break; - - case RADEON_CMD_SCALARS2: - DRM_DEBUG("RADEON_CMD_SCALARS2\n"); - if (radeon_emit_scalars2( dev_priv, header, &cmdbuf )) { - DRM_ERROR("radeon_emit_scalars2 failed\n"); - goto err; - } - break; - - case RADEON_CMD_WAIT: - DRM_DEBUG("RADEON_CMD_WAIT\n"); - if (radeon_emit_wait( dev, header.wait.flags )) { - DRM_ERROR("radeon_emit_wait failed\n"); - goto err; - } - break; - default: - DRM_ERROR("bad cmd_type %d at %p\n", - header.header.cmd_type, - cmdbuf.buf - sizeof(header)); - goto err; - } - } - - if (orig_bufsz != 0) - DRM(free)(kbuf, orig_bufsz, DRM_MEM_DRIVER); - DRM_DEBUG("DONE\n"); - COMMIT_RING(); - return 0; - -err: - if (orig_bufsz != 0) - DRM(free)(kbuf, orig_bufsz, DRM_MEM_DRIVER); - return DRM_ERR(EINVAL); -} - - - -int radeon_cp_getparam( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_getparam_t param; - int value; - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR(EINVAL); - } - - DRM_COPY_FROM_USER_IOCTL( param, (drm_radeon_getparam_t __user *)data, - sizeof(param) ); - - DRM_DEBUG( "pid=%d\n", DRM_CURRENTPID ); - - switch( param.param ) { - case RADEON_PARAM_GART_BUFFER_OFFSET: - value = dev_priv->gart_buffers_offset; - break; - case RADEON_PARAM_LAST_FRAME: - dev_priv->stats.last_frame_reads++; - value = GET_SCRATCH( 0 ); - break; - case RADEON_PARAM_LAST_DISPATCH: - value = GET_SCRATCH( 1 ); - break; - case RADEON_PARAM_LAST_CLEAR: - dev_priv->stats.last_clear_reads++; - value = GET_SCRATCH( 2 ); - break; - case RADEON_PARAM_IRQ_NR: - value = dev->irq; - break; - case RADEON_PARAM_GART_BASE: - value = dev_priv->gart_vm_start; - break; - case RADEON_PARAM_REGISTER_HANDLE: - value = dev_priv->mmio_offset; - break; - case RADEON_PARAM_STATUS_HANDLE: - value = dev_priv->ring_rptr_offset; - break; -#if BITS_PER_LONG == 32 - /* - * This ioctl() doesn't work on 64-bit platforms because hw_lock is a - * pointer which can't fit into an int-sized variable. According to - * Michel Dänzer, the ioctl() is only used on embedded platforms, so - * not supporting it shouldn't be a problem. If the same functionality - * is needed on 64-bit platforms, a new ioctl() would have to be added, - * so backwards-compatibility for the embedded platforms can be - * maintained. --davidm 4-Feb-2004. - */ - case RADEON_PARAM_SAREA_HANDLE: - /* The lock is the first dword in the sarea. */ - value = (long)dev->lock.hw_lock; - break; -#endif - case RADEON_PARAM_GART_TEX_HANDLE: - value = dev_priv->gart_textures_offset; - break; - default: - return DRM_ERR(EINVAL); - } - - if ( DRM_COPY_TO_USER( param.value, &value, sizeof(int) ) ) { - DRM_ERROR( "copy_to_user\n" ); - return DRM_ERR(EFAULT); - } - - return 0; -} - -int radeon_cp_setparam( DRM_IOCTL_ARGS ) { - DRM_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_file_t *filp_priv; - drm_radeon_setparam_t sp; - struct drm_radeon_driver_file_fields *radeon_priv; - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - return DRM_ERR( EINVAL ); - } - - DRM_GET_PRIV_WITH_RETURN( filp_priv, filp ); - - DRM_COPY_FROM_USER_IOCTL( sp, ( drm_radeon_setparam_t __user * )data, - sizeof( sp ) ); - - switch( sp.param ) { - case RADEON_SETPARAM_FB_LOCATION: - radeon_priv = filp_priv->driver_priv; - radeon_priv->radeon_fb_delta = dev_priv->fb_location - sp.value; - break; - case RADEON_SETPARAM_SWITCH_TILING: - if (sp.value == 0) { - DRM_DEBUG( "color tiling disabled\n" ); - dev_priv->front_pitch_offset &= ~RADEON_DST_TILE_MACRO; - dev_priv->back_pitch_offset &= ~RADEON_DST_TILE_MACRO; - dev_priv->sarea_priv->tiling_enabled = 0; - } - else if (sp.value == 1) { - DRM_DEBUG( "color tiling enabled\n" ); - dev_priv->front_pitch_offset |= RADEON_DST_TILE_MACRO; - dev_priv->back_pitch_offset |= RADEON_DST_TILE_MACRO; - dev_priv->sarea_priv->tiling_enabled = 1; - } - break; - default: - DRM_DEBUG( "Invalid parameter %d\n", sp.param ); - return DRM_ERR( EINVAL ); - } - - return 0; -} - -/* When a client dies: - * - Check for and clean up flipped page state - * - Free any alloced GART memory. - * - Free any alloced radeon surfaces. - * - * DRM infrastructure takes care of reclaiming dma buffers. - */ -static void radeon_driver_prerelease(drm_device_t *dev, DRMFILE filp) -{ - if ( dev->dev_private ) { - drm_radeon_private_t *dev_priv = dev->dev_private; - if ( dev_priv->page_flipping ) { - radeon_do_cleanup_pageflip( dev ); - } - radeon_mem_release( filp, dev_priv->gart_heap ); - radeon_mem_release( filp, dev_priv->fb_heap ); - radeon_surfaces_release( filp, dev_priv ); - } -} - -static void radeon_driver_pretakedown(drm_device_t *dev) -{ - radeon_do_release(dev); -} - -static int radeon_driver_open_helper(drm_device_t *dev, drm_file_t *filp_priv) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - struct drm_radeon_driver_file_fields *radeon_priv; - - radeon_priv = (struct drm_radeon_driver_file_fields *)DRM(alloc)(sizeof(*radeon_priv), DRM_MEM_FILES); - - if (!radeon_priv) - return -ENOMEM; - - filp_priv->driver_priv = radeon_priv; - - if ( dev_priv ) - radeon_priv->radeon_fb_delta = dev_priv->fb_location; - else - radeon_priv->radeon_fb_delta = 0; - return 0; -} - -static void radeon_driver_free_filp_priv(drm_device_t *dev, drm_file_t *filp_priv) -{ - struct drm_radeon_driver_file_fields *radeon_priv = filp_priv->driver_priv; - - DRM(free)(radeon_priv, sizeof(*radeon_priv), DRM_MEM_FILES); -} - -void radeon_driver_register_fns(struct drm_device *dev) -{ - dev->driver_features = DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG | DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_IRQ_VBL; - dev->dev_priv_size = sizeof(drm_radeon_buf_priv_t); - dev->fn_tbl.preinit = radeon_preinit; - dev->fn_tbl.postinit = radeon_postinit; - dev->fn_tbl.postcleanup = radeon_postcleanup; - dev->fn_tbl.prerelease = radeon_driver_prerelease; - dev->fn_tbl.pretakedown = radeon_driver_pretakedown; - dev->fn_tbl.open_helper = radeon_driver_open_helper; - dev->fn_tbl.vblank_wait = radeon_driver_vblank_wait; - dev->fn_tbl.irq_preinstall = radeon_driver_irq_preinstall; - dev->fn_tbl.irq_postinstall = radeon_driver_irq_postinstall; - dev->fn_tbl.irq_uninstall = radeon_driver_irq_uninstall; - dev->fn_tbl.irq_handler = radeon_driver_irq_handler; - dev->fn_tbl.free_filp_priv = radeon_driver_free_filp_priv; -} diff --git a/shared/sis.h b/shared/sis.h deleted file mode 100644 index 5f7037000..000000000 --- a/shared/sis.h +++ /dev/null @@ -1,57 +0,0 @@ -/* sis_drv.h -- Private header for sis driver -*- linux-c -*- - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis.h,v 1.3 2002/10/30 12:52:38 alanh Exp $ */ - -#ifndef __SIS_H__ -#define __SIS_H__ - -/* This remains constant for all DRM template files. - * Name it sisdrv_##x as there's a conflict with sis_free/malloc in the kernel - * that's used for fb devices - */ -#define DRM(x) sisdrv_##x - -/* General customization: - */ - -#define DRIVER_AUTHOR "SIS" -#define DRIVER_NAME "sis" -#define DRIVER_DESC "SIS 300/630/540" -#define DRIVER_DATE "20030826" -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 1 -#define DRIVER_PATCHLEVEL 0 - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_SIS_FB_ALLOC)] = { sis_fb_alloc, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_SIS_FB_FREE)] = { sis_fb_free, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_SIS_AGP_INIT)] = { sis_ioctl_agp_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_SIS_AGP_ALLOC)] = { sis_ioctl_agp_alloc, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_SIS_AGP_FREE)] = { sis_ioctl_agp_free, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_SIS_FB_INIT)] = { sis_fb_init, 1, 1 } - -#endif diff --git a/shared/sis_drm.h b/shared/sis_drm.h deleted file mode 100644 index 49505719c..000000000 --- a/shared/sis_drm.h +++ /dev/null @@ -1,33 +0,0 @@ - -#ifndef __SIS_DRM_H__ -#define __SIS_DRM_H__ - -/* SiS specific ioctls */ -#define DRM_IOCTL_SIS_FB_ALLOC DRM_IOWR(0x44, drm_sis_mem_t) -#define DRM_IOCTL_SIS_FB_FREE DRM_IOW( 0x45, drm_sis_mem_t) -#define DRM_IOCTL_SIS_AGP_INIT DRM_IOWR(0x53, drm_sis_agp_t) -#define DRM_IOCTL_SIS_AGP_ALLOC DRM_IOWR(0x54, drm_sis_mem_t) -#define DRM_IOCTL_SIS_AGP_FREE DRM_IOW( 0x55, drm_sis_mem_t) -#define DRM_IOCTL_SIS_FB_INIT DRM_IOW( 0x56, drm_sis_fb_t) -/* -#define DRM_IOCTL_SIS_FLIP DRM_IOW( 0x48, drm_sis_flip_t) -#define DRM_IOCTL_SIS_FLIP_INIT DRM_IO( 0x49) -#define DRM_IOCTL_SIS_FLIP_FINAL DRM_IO( 0x50) -*/ - -typedef struct { - int context; - unsigned int offset; - unsigned int size; - unsigned long free; -} drm_sis_mem_t; - -typedef struct { - unsigned int offset, size; -} drm_sis_agp_t; - -typedef struct { - unsigned int offset, size; -} drm_sis_fb_t; - -#endif /* __SIS_DRM_H__ */ diff --git a/shared/sis_drv.h b/shared/sis_drv.h deleted file mode 100644 index 1ca618cf5..000000000 --- a/shared/sis_drv.h +++ /dev/null @@ -1,48 +0,0 @@ -/* sis_drv.h -- Private header for sis driver -*- linux-c -*- - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - */ - -#ifndef _SIS_DRV_H_ -#define _SIS_DRV_H_ - -#include "sis_ds.h" - -typedef struct drm_sis_private { - memHeap_t *AGPHeap; - memHeap_t *FBHeap; -} drm_sis_private_t; - -extern int sis_fb_alloc( DRM_IOCTL_ARGS ); -extern int sis_fb_free( DRM_IOCTL_ARGS ); -extern int sis_ioctl_agp_init( DRM_IOCTL_ARGS ); -extern int sis_ioctl_agp_alloc( DRM_IOCTL_ARGS ); -extern int sis_ioctl_agp_free( DRM_IOCTL_ARGS ); -extern int sis_fb_init( DRM_IOCTL_ARGS ); - -extern int sis_init_context(drm_device_t *dev, int context); -extern int sis_final_context(drm_device_t *dev, int context); - -#endif diff --git a/shared/sis_ds.c b/shared/sis_ds.c deleted file mode 100644 index e3ae4aea4..000000000 --- a/shared/sis_ds.c +++ /dev/null @@ -1,386 +0,0 @@ -/* sis_ds.c -- Private header for Direct Rendering Manager -*- linux-c -*- - * Created: Mon Jan 4 10:05:05 1999 by sclin@sis.com.tw - * - * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Sung-Ching Lin <sclin@sis.com.tw> - * - */ - -#include "sis.h" -#include "drmP.h" -#include "drm.h" -#include "sis_ds.h" - -/* Set Data Structure, not check repeated value - * temporarily used - */ - -set_t *setInit(void) -{ - int i; - set_t *set; - - set = (set_t *)DRM(alloc)(sizeof(set_t), DRM_MEM_DRIVER); - if (set != NULL) { - for (i = 0; i < SET_SIZE; i++) { - set->list[i].free_next = i + 1; - set->list[i].alloc_next = -1; - } - set->list[SET_SIZE-1].free_next = -1; - set->free = 0; - set->alloc = -1; - set->trace = -1; - } - return set; -} - -int setAdd(set_t *set, ITEM_TYPE item) -{ - int free = set->free; - - if (free != -1) { - set->list[free].val = item; - set->free = set->list[free].free_next; - } else { - return 0; - } - - set->list[free].alloc_next = set->alloc; - set->alloc = free; - set->list[free].free_next = -1; - - return 1; -} - -int setDel(set_t *set, ITEM_TYPE item) -{ - int alloc = set->alloc; - int prev = -1; - - while (alloc != -1) { - if (set->list[alloc].val == item) { - if (prev != -1) - set->list[prev].alloc_next = - set->list[alloc].alloc_next; - else - set->alloc = set->list[alloc].alloc_next; - break; - } - prev = alloc; - alloc = set->list[alloc].alloc_next; - } - - if (alloc == -1) - return 0; - - set->list[alloc].free_next = set->free; - set->free = alloc; - set->list[alloc].alloc_next = -1; - - return 1; -} - -/* setFirst -> setAdd -> setNext is wrong */ - -int setFirst(set_t *set, ITEM_TYPE *item) -{ - if (set->alloc == -1) - return 0; - - *item = set->list[set->alloc].val; - set->trace = set->list[set->alloc].alloc_next; - - return 1; -} - -int setNext(set_t *set, ITEM_TYPE *item) -{ - if (set->trace == -1) - return 0; - - *item = set->list[set->trace].val; - set->trace = set->list[set->trace].alloc_next; - - return 1; -} - -int setDestroy(set_t *set) -{ - DRM(free)(set, sizeof(set_t), DRM_MEM_DRIVER); - - return 1; -} - -/* - * GLX Hardware Device Driver common code - * Copyright (C) 1999 Wittawat Yamwong - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included - * in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE - * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - */ - -#define ISFREE(bptr) ((bptr)->free) - -memHeap_t *mmInit(int ofs, - int size) -{ - PMemBlock blocks; - - if (size <= 0) - return NULL; - - blocks = (TMemBlock *)DRM(calloc)(1, sizeof(TMemBlock), DRM_MEM_DRIVER); - if (blocks != NULL) { - blocks->ofs = ofs; - blocks->size = size; - blocks->free = 1; - return (memHeap_t *)blocks; - } else - return NULL; -} - -/* Checks if a pointer 'b' is part of the heap 'heap' */ -int mmBlockInHeap(memHeap_t *heap, PMemBlock b) -{ - TMemBlock *p; - - if (heap == NULL || b == NULL) - return 0; - - p = heap; - while (p != NULL && p != b) { - p = p->next; - } - if (p == b) - return 1; - else - return 0; -} - -/* Kludgey workaround for existing i810 server. Remove soon. - */ -memHeap_t *mmAddRange( memHeap_t *heap, - int ofs, - int size ) -{ - PMemBlock blocks; - blocks = (TMemBlock *)DRM(calloc)(2, sizeof(TMemBlock), DRM_MEM_DRIVER); - if (blocks != NULL) { - blocks[0].size = size; - blocks[0].free = 1; - blocks[0].ofs = ofs; - blocks[0].next = &blocks[1]; - - /* Discontinuity - stops JoinBlock from trying to join - * non-adjacent ranges. - */ - blocks[1].size = 0; - blocks[1].free = 0; - blocks[1].ofs = ofs+size; - blocks[1].next = (PMemBlock)heap; - return (memHeap_t *)blocks; - } else - return heap; -} - -static TMemBlock* SliceBlock(TMemBlock *p, - int startofs, int size, - int reserved, int alignment) -{ - TMemBlock *newblock; - - /* break left */ - if (startofs > p->ofs) { - newblock = (TMemBlock*) DRM(calloc)(1, sizeof(TMemBlock), - DRM_MEM_DRIVER); - newblock->ofs = startofs; - newblock->size = p->size - (startofs - p->ofs); - newblock->free = 1; - newblock->next = p->next; - p->size -= newblock->size; - p->next = newblock; - p = newblock; - } - - /* break right */ - if (size < p->size) { - newblock = (TMemBlock*) DRM(calloc)(1, sizeof(TMemBlock), - DRM_MEM_DRIVER); - newblock->ofs = startofs + size; - newblock->size = p->size - size; - newblock->free = 1; - newblock->next = p->next; - p->size = size; - p->next = newblock; - } - - /* p = middle block */ - p->align = alignment; - p->free = 0; - p->reserved = reserved; - return p; -} - -PMemBlock mmAllocMem( memHeap_t *heap, int size, int align2, int startSearch) -{ - int mask,startofs, endofs; - TMemBlock *p; - - if (heap == NULL || align2 < 0 || size <= 0) - return NULL; - - mask = (1 << align2)-1; - startofs = 0; - p = (TMemBlock *)heap; - while (p != NULL) { - if (ISFREE(p)) { - startofs = (p->ofs + mask) & ~mask; - if ( startofs < startSearch ) { - startofs = startSearch; - } - endofs = startofs+size; - if (endofs <= (p->ofs+p->size)) - break; - } - p = p->next; - } - if (p == NULL) - return NULL; - p = SliceBlock(p,startofs,size,0,mask+1); - p->heap = heap; - return p; -} - -static __inline__ int Join2Blocks(TMemBlock *p) -{ - if (p->free && p->next && p->next->free) { - TMemBlock *q = p->next; - p->size += q->size; - p->next = q->next; - DRM(free)(q, sizeof(TMemBlock), DRM_MEM_DRIVER); - return 1; - } - return 0; -} - -int mmFreeMem(PMemBlock b) -{ - TMemBlock *p, *prev; - - if (b == NULL) - return 0; - if (b->heap == NULL) - return -1; - - p = b->heap; - prev = NULL; - while (p != NULL && p != b) { - prev = p; - p = p->next; - } - if (p == NULL || p->free || p->reserved) - return -1; - - p->free = 1; - Join2Blocks(p); - if (prev) - Join2Blocks(prev); - return 0; -} - -int mmReserveMem(memHeap_t *heap, int offset,int size) -{ - int endofs; - TMemBlock *p; - - if (heap == NULL || size <= 0) - return -1; - - endofs = offset + size; - p = (TMemBlock *)heap; - while (p && p->ofs <= offset) { - if (ISFREE(p) && endofs <= (p->ofs+p->size)) { - SliceBlock(p,offset,size,1,1); - return 0; - } - p = p->next; - } - return -1; -} - -int mmFreeReserved(memHeap_t *heap, int offset) -{ - TMemBlock *p,*prev; - - if (heap == NULL) - return -1; - - p = (TMemBlock *)heap; - prev = NULL; - while (p != NULL && p->ofs != offset) { - prev = p; - p = p->next; - } - if (p == NULL || !p->reserved) - return -1; - - p->free = 1; - p->reserved = 0; - Join2Blocks(p); - if (prev != NULL) - Join2Blocks(prev); - return 0; -} - -void mmDestroy(memHeap_t *heap) -{ - TMemBlock *p,*q; - - if (heap == NULL) - return; - - p = (TMemBlock *)heap; - while (p != NULL) { - q = p->next; - DRM(free)(p, sizeof(TMemBlock), DRM_MEM_DRIVER); - p = q; - } -} diff --git a/shared/sis_ds.h b/shared/sis_ds.h deleted file mode 100644 index 8d33f87ba..000000000 --- a/shared/sis_ds.h +++ /dev/null @@ -1,164 +0,0 @@ -/* sis_ds.h -- Private header for Direct Rendering Manager -*- linux-c -*- - * Created: Mon Jan 4 10:05:05 1999 by sclin@sis.com.tw - * - * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Sung-Ching Lin <sclin@sis.com.tw> - * - */ - -#ifndef __SIS_DS_H__ -#define __SIS_DS_H__ - -/* Set Data Structure */ - -#define SET_SIZE 5000 - -typedef unsigned long ITEM_TYPE; - -typedef struct { - ITEM_TYPE val; - int alloc_next, free_next; -} list_item_t; - -typedef struct { - int alloc; - int free; - int trace; - list_item_t list[SET_SIZE]; -} set_t; - -set_t *setInit(void); -int setAdd(set_t *set, ITEM_TYPE item); -int setDel(set_t *set, ITEM_TYPE item); -int setFirst(set_t *set, ITEM_TYPE *item); -int setNext(set_t *set, ITEM_TYPE *item); -int setDestroy(set_t *set); - -/* - * GLX Hardware Device Driver common code - * Copyright (C) 1999 Wittawat Yamwong - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included - * in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE - * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - */ - -struct mem_block_t { - struct mem_block_t *next; - struct mem_block_t *heap; - int ofs,size; - int align; - unsigned int free:1; - unsigned int reserved:1; -}; -typedef struct mem_block_t TMemBlock; -typedef struct mem_block_t *PMemBlock; - -/* a heap is just the first block in a chain */ -typedef struct mem_block_t memHeap_t; - -static __inline__ int mmBlockSize(PMemBlock b) -{ - return b->size; -} - -static __inline__ int mmOffset(PMemBlock b) -{ - return b->ofs; -} - -static __inline__ void mmMarkReserved(PMemBlock b) -{ - b->reserved = 1; -} - -/* - * input: total size in bytes - * return: a heap pointer if OK, NULL if error - */ -memHeap_t *mmInit( int ofs, int size ); - -memHeap_t *mmAddRange( memHeap_t *heap, - int ofs, - int size ); - -/* - * Allocate 'size' bytes with 2^align2 bytes alignment, - * restrict the search to free memory after 'startSearch' - * depth and back buffers should be in different 4mb banks - * to get better page hits if possible - * input: size = size of block - * align2 = 2^align2 bytes alignment - * startSearch = linear offset from start of heap to begin search - * return: pointer to the allocated block, 0 if error - */ -PMemBlock mmAllocMem( memHeap_t *heap, int size, int align2, int startSearch ); - -/* - * Returns 1 if the block 'b' is part of the heap 'heap' - */ -int mmBlockInHeap( PMemBlock heap, PMemBlock b ); - -/* - * Free block starts at offset - * input: pointer to a block - * return: 0 if OK, -1 if error - */ -int mmFreeMem( PMemBlock b ); - -/* - * Reserve 'size' bytes block start at offset - * This is used to prevent allocation of memory already used - * by the X server for the front buffer, pixmaps, and cursor - * input: size, offset - * output: 0 if OK, -1 if error - */ -int mmReserveMem( memHeap_t *heap, int offset,int size ); -int mmFreeReserved( memHeap_t *heap, int offset ); - -/* - * destroy MM - */ -void mmDestroy( memHeap_t *mmInit ); - -/* For debuging purpose. */ -void mmDumpMemInfo( memHeap_t *mmInit ); - -#endif /* __SIS_DS_H__ */ diff --git a/shared/sis_mm.c b/shared/sis_mm.c deleted file mode 100644 index 27b904fc7..000000000 --- a/shared/sis_mm.c +++ /dev/null @@ -1,417 +0,0 @@ -/* sis_mm.c -- Private header for Direct Rendering Manager -*- linux-c -*- - * Created: Mon Jan 4 10:05:05 1999 by sclin@sis.com.tw - * - * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Sung-Ching Lin <sclin@sis.com.tw> - * - */ - -#include "sis.h" -#include "drmP.h" -#include "sis_drm.h" -#include "sis_drv.h" -#include "sis_ds.h" -#if defined(__linux__) && defined(CONFIG_FB_SIS) -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) -#include <video/sisfb.h> -#else -#include <linux/sisfb.h> -#endif -#endif - -#define MAX_CONTEXT 100 -#define VIDEO_TYPE 0 -#define AGP_TYPE 1 - -typedef struct { - int used; - int context; - set_t *sets[2]; /* 0 for video, 1 for AGP */ -} sis_context_t; - -static sis_context_t global_ppriv[MAX_CONTEXT]; - - -static int add_alloc_set(int context, int type, unsigned int val) -{ - int i, retval = 0; - - for (i = 0; i < MAX_CONTEXT; i++) { - if (global_ppriv[i].used && global_ppriv[i].context == context) - { - retval = setAdd(global_ppriv[i].sets[type], val); - break; - } - } - return retval; -} - -static int del_alloc_set(int context, int type, unsigned int val) -{ - int i, retval = 0; - - for (i = 0; i < MAX_CONTEXT; i++) { - if (global_ppriv[i].used && global_ppriv[i].context == context) - { - retval = setDel(global_ppriv[i].sets[type], val); - break; - } - } - return retval; -} - -/* fb management via fb device */ -#if defined(__linux__) && defined(CONFIG_FB_SIS) - -int sis_fb_init( DRM_IOCTL_ARGS ) -{ - return 0; -} - -int sis_fb_alloc( DRM_IOCTL_ARGS ) -{ - drm_sis_mem_t fb; - struct sis_memreq req; - drm_sis_mem_t __user *argp = (void __user *)data; - int retval = 0; - - DRM_COPY_FROM_USER_IOCTL(fb, argp, sizeof(fb)); - - req.size = fb.size; - sis_malloc(&req); - if (req.offset) { - /* TODO */ - fb.offset = req.offset; - fb.free = req.offset; - if (!add_alloc_set(fb.context, VIDEO_TYPE, fb.free)) { - DRM_DEBUG("adding to allocation set fails\n"); - sis_free(req.offset); - retval = DRM_ERR(EINVAL); - } - } else { - fb.offset = 0; - fb.size = 0; - fb.free = 0; - } - - DRM_COPY_TO_USER_IOCTL(argp, fb, sizeof(fb)); - - DRM_DEBUG("alloc fb, size = %d, offset = %ld\n", fb.size, req.offset); - - return retval; -} - -int sis_fb_free( DRM_IOCTL_ARGS ) -{ - drm_sis_mem_t fb; - int retval = 0; - - DRM_COPY_FROM_USER_IOCTL(fb, (drm_sis_mem_t __user *)data, sizeof(fb)); - - if (!fb.free) - return DRM_ERR(EINVAL); - - if (!del_alloc_set(fb.context, VIDEO_TYPE, fb.free)) - retval = DRM_ERR(EINVAL); - sis_free(fb.free); - - DRM_DEBUG("free fb, offset = 0x%lx\n", fb.free); - - return retval; -} - -#else - -/* Called by the X Server to initialize the FB heap. Allocations will fail - * unless this is called. Offset is the beginning of the heap from the - * framebuffer offset (MaxXFBMem in XFree86). - * - * Memory layout according to Thomas Winischofer: - * |------------------|DDDDDDDDDDDDDDDDDDDDDDDDDDDDD|HHHH|CCCCCCCCCCC| - * - * X driver/sisfb HW- Command- - * framebuffer memory DRI heap Cursor queue - */ -int sis_fb_init( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_sis_private_t *dev_priv = dev->dev_private; - drm_sis_fb_t fb; - - DRM_COPY_FROM_USER_IOCTL(fb, (drm_sis_fb_t __user *)data, sizeof(fb)); - - if (dev_priv == NULL) { - dev->dev_private = DRM(calloc)(1, sizeof(drm_sis_private_t), - DRM_MEM_DRIVER); - dev_priv = dev->dev_private; - if (dev_priv == NULL) - return ENOMEM; - } - - if (dev_priv->FBHeap != NULL) - return DRM_ERR(EINVAL); - - dev_priv->FBHeap = mmInit(fb.offset, fb.size); - - DRM_DEBUG("offset = %u, size = %u", fb.offset, fb.size); - - return 0; -} - -int sis_fb_alloc( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_sis_private_t *dev_priv = dev->dev_private; - drm_sis_mem_t __user *argp = (void __user *)data; - drm_sis_mem_t fb; - PMemBlock block; - int retval = 0; - - if (dev_priv == NULL || dev_priv->FBHeap == NULL) - return DRM_ERR(EINVAL); - - DRM_COPY_FROM_USER_IOCTL(fb, argp, sizeof(fb)); - - block = mmAllocMem(dev_priv->FBHeap, fb.size, 0, 0); - if (block) { - /* TODO */ - fb.offset = block->ofs; - fb.free = (unsigned long)block; - if (!add_alloc_set(fb.context, VIDEO_TYPE, fb.free)) { - DRM_DEBUG("adding to allocation set fails\n"); - mmFreeMem((PMemBlock)fb.free); - retval = DRM_ERR(EINVAL); - } - } else { - fb.offset = 0; - fb.size = 0; - fb.free = 0; - } - - DRM_COPY_TO_USER_IOCTL(argp, fb, sizeof(fb)); - - DRM_DEBUG("alloc fb, size = %d, offset = %d\n", fb.size, fb.offset); - - return retval; -} - -int sis_fb_free( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_sis_private_t *dev_priv = dev->dev_private; - drm_sis_mem_t fb; - - if (dev_priv == NULL || dev_priv->FBHeap == NULL) - return DRM_ERR(EINVAL); - - DRM_COPY_FROM_USER_IOCTL(fb, (drm_sis_mem_t __user *)data, sizeof(fb)); - - if (!mmBlockInHeap(dev_priv->FBHeap, (PMemBlock)fb.free)) - return DRM_ERR(EINVAL); - - if (!del_alloc_set(fb.context, VIDEO_TYPE, fb.free)) - return DRM_ERR(EINVAL); - mmFreeMem((PMemBlock)fb.free); - - DRM_DEBUG("free fb, free = 0x%lx\n", fb.free); - - return 0; -} - -#endif - -/* agp memory management */ - -int sis_ioctl_agp_init( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_sis_private_t *dev_priv = dev->dev_private; - drm_sis_agp_t agp; - - if (dev_priv == NULL) { - dev->dev_private = DRM(calloc)(1, sizeof(drm_sis_private_t), - DRM_MEM_DRIVER); - dev_priv = dev->dev_private; - if (dev_priv == NULL) - return ENOMEM; - } - - if (dev_priv->AGPHeap != NULL) - return DRM_ERR(EINVAL); - - DRM_COPY_FROM_USER_IOCTL(agp, (drm_sis_agp_t __user *)data, sizeof(agp)); - - dev_priv->AGPHeap = mmInit(agp.offset, agp.size); - - DRM_DEBUG("offset = %u, size = %u", agp.offset, agp.size); - - return 0; -} - -int sis_ioctl_agp_alloc( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_sis_private_t *dev_priv = dev->dev_private; - drm_sis_mem_t __user *argp = (void __user *)data; - drm_sis_mem_t agp; - PMemBlock block; - int retval = 0; - - if (dev_priv == NULL || dev_priv->AGPHeap == NULL) - return DRM_ERR(EINVAL); - - DRM_COPY_FROM_USER_IOCTL(agp, argp, sizeof(agp)); - - block = mmAllocMem(dev_priv->AGPHeap, agp.size, 0, 0); - if (block) { - /* TODO */ - agp.offset = block->ofs; - agp.free = (unsigned long)block; - if (!add_alloc_set(agp.context, AGP_TYPE, agp.free)) { - DRM_DEBUG("adding to allocation set fails\n"); - mmFreeMem((PMemBlock)agp.free); - retval = -1; - } - } else { - agp.offset = 0; - agp.size = 0; - agp.free = 0; - } - - DRM_COPY_TO_USER_IOCTL(argp, agp, sizeof(agp)); - - DRM_DEBUG("alloc agp, size = %d, offset = %d\n", agp.size, agp.offset); - - return retval; -} - -int sis_ioctl_agp_free( DRM_IOCTL_ARGS ) -{ - DRM_DEVICE; - drm_sis_private_t *dev_priv = dev->dev_private; - drm_sis_mem_t agp; - - if (dev_priv == NULL || dev_priv->AGPHeap == NULL) - return DRM_ERR(EINVAL); - - DRM_COPY_FROM_USER_IOCTL(agp, (drm_sis_mem_t __user *)data, sizeof(agp)); - - if (!mmBlockInHeap(dev_priv->AGPHeap, (PMemBlock)agp.free)) - return DRM_ERR(EINVAL); - - mmFreeMem((PMemBlock)agp.free); - if (!del_alloc_set(agp.context, AGP_TYPE, agp.free)) - return DRM_ERR(EINVAL); - - DRM_DEBUG("free agp, free = 0x%lx\n", agp.free); - - return 0; -} - -int sis_init_context(struct drm_device *dev, int context) -{ - int i; - - for (i = 0; i < MAX_CONTEXT ; i++) { - if (global_ppriv[i].used && - (global_ppriv[i].context == context)) - break; - } - - if (i >= MAX_CONTEXT) { - for (i = 0; i < MAX_CONTEXT ; i++) { - if (!global_ppriv[i].used) { - global_ppriv[i].context = context; - global_ppriv[i].used = 1; - global_ppriv[i].sets[0] = setInit(); - global_ppriv[i].sets[1] = setInit(); - DRM_DEBUG("init allocation set, socket=%d, " - "context = %d\n", i, context); - break; - } - } - if ((i >= MAX_CONTEXT) || (global_ppriv[i].sets[0] == NULL) || - (global_ppriv[i].sets[1] == NULL)) - { - return 0; - } - } - - return 1; -} - -int sis_final_context(struct drm_device *dev, int context) -{ - int i; - - for (i=0; i<MAX_CONTEXT; i++) { - if (global_ppriv[i].used && - (global_ppriv[i].context == context)) - break; - } - - if (i < MAX_CONTEXT) { - set_t *set; - ITEM_TYPE item; - int retval; - - DRM_DEBUG("find socket %d, context = %d\n", i, context); - - /* Video Memory */ - set = global_ppriv[i].sets[0]; - retval = setFirst(set, &item); - while (retval) { - DRM_DEBUG("free video memory 0x%lx\n", item); -#if defined(__linux__) && defined(CONFIG_FB_SIS) - sis_free(item); -#else - mmFreeMem((PMemBlock)item); -#endif - retval = setNext(set, &item); - } - setDestroy(set); - - /* AGP Memory */ - set = global_ppriv[i].sets[1]; - retval = setFirst(set, &item); - while (retval) { - DRM_DEBUG("free agp memory 0x%lx\n", item); - mmFreeMem((PMemBlock)item); - retval = setNext(set, &item); - } - setDestroy(set); - - global_ppriv[i].used = 0; - } - - return 1; -} - -void DRM(driver_register_fns)(drm_device_t *dev) -{ - dev->driver_features = DRIVER_USE_AGP | DRIVER_USE_MTRR; - dev->fn_tbl.context_ctor = sis_init_context; - dev->fn_tbl.context_dtor = sis_final_context; -} diff --git a/shared/tdfx.h b/shared/tdfx.h deleted file mode 100644 index a582a3db4..000000000 --- a/shared/tdfx.h +++ /dev/null @@ -1,50 +0,0 @@ -/* tdfx.h -- 3dfx DRM template customization -*- linux-c -*- - * Created: Wed Feb 14 12:32:32 2001 by gareth@valinux.com - * - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - -#ifndef __TDFX_H__ -#define __TDFX_H__ - -/* This remains constant for all DRM template files. - */ -#define DRM(x) tdfx_##x - -/* General customization: - */ - -#define DRIVER_AUTHOR "VA Linux Systems Inc." - -#define DRIVER_NAME "tdfx" -#define DRIVER_DESC "3dfx Banshee/Voodoo3+" -#define DRIVER_DATE "20010216" - -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 0 -#define DRIVER_PATCHLEVEL 0 - -#endif diff --git a/shared/via.h b/shared/via.h deleted file mode 100644 index cc63df9f7..000000000 --- a/shared/via.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ -#ifndef __VIA_H__ -#define __VIA_H__ - -#define DRM(x) viadrv_##x - -#define DRIVER_AUTHOR "VIA" - -#define DRIVER_NAME "via" -#define DRIVER_DESC "VIA Unichrome / Pro" -#define DRIVER_DATE "20050814" - -#define DRIVER_MAJOR 2 -#define DRIVER_MINOR 6 -#define DRIVER_PATCHLEVEL 7 - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_VIA_ALLOCMEM)] = { via_mem_alloc, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_VIA_FREEMEM)] = { via_mem_free, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_VIA_AGP_INIT)] = { via_agp_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_VIA_FB_INIT)] = { via_fb_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_VIA_MAP_INIT)] = { via_map_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_VIA_DEC_FUTEX)] = { via_decoder_futex, 1, 0}, \ - [DRM_IOCTL_NR(DRM_IOCTL_VIA_DMA_INIT)] = { via_dma_init, 1, 0}, \ - [DRM_IOCTL_NR(DRM_IOCTL_VIA_CMDBUFFER)] = { via_cmdbuffer, 1, 0}, \ - [DRM_IOCTL_NR(DRM_IOCTL_VIA_FLUSH)] = { via_flush_ioctl, 1, 0}, \ - [DRM_IOCTL_NR(DRM_IOCTL_VIA_PCICMD)] = {via_pci_cmdbuffer, 1, 0}, \ - [DRM_IOCTL_NR(DRM_IOCTL_VIA_CMDBUF_SIZE)] = {via_cmdbuf_size, 1, 0}, \ - [DRM_IOCTL_NR(DRM_IOCTL_VIA_WAIT_IRQ)] = {via_wait_irq, 1, 0} - - -#endif diff --git a/shared/via_3d_reg.h b/shared/via_3d_reg.h deleted file mode 100644 index f78fd2d1d..000000000 --- a/shared/via_3d_reg.h +++ /dev/null @@ -1,1651 +0,0 @@ -/* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#ifndef VIA_3D_REG_H -#define VIA_3D_REG_H -#define HC_REG_BASE 0x0400 - -#define HC_REG_TRANS_SPACE 0x0040 - -#define HC_ParaN_MASK 0xffffffff -#define HC_Para_MASK 0x00ffffff -#define HC_SubA_MASK 0xff000000 -#define HC_SubA_SHIFT 24 -/* Transmission Setting - */ -#define HC_REG_TRANS_SET 0x003c -#define HC_ParaSubType_MASK 0xff000000 -#define HC_ParaType_MASK 0x00ff0000 -#define HC_ParaOS_MASK 0x0000ff00 -#define HC_ParaAdr_MASK 0x000000ff -#define HC_ParaSubType_SHIFT 24 -#define HC_ParaType_SHIFT 16 -#define HC_ParaOS_SHIFT 8 -#define HC_ParaAdr_SHIFT 0 - -#define HC_ParaType_CmdVdata 0x0000 -#define HC_ParaType_NotTex 0x0001 -#define HC_ParaType_Tex 0x0002 -#define HC_ParaType_Palette 0x0003 -#define HC_ParaType_PreCR 0x0010 -#define HC_ParaType_Auto 0x00fe - -/* Transmission Space - */ -#define HC_REG_Hpara0 0x0040 -#define HC_REG_HpataAF 0x02fc - -/* Read - */ -#define HC_REG_HREngSt 0x0000 -#define HC_REG_HRFIFOempty 0x0004 -#define HC_REG_HRFIFOfull 0x0008 -#define HC_REG_HRErr 0x000c -#define HC_REG_FIFOstatus 0x0010 -/* HC_REG_HREngSt 0x0000 - */ -#define HC_HDASZC_MASK 0x00010000 -#define HC_HSGEMI_MASK 0x0000f000 -#define HC_HLGEMISt_MASK 0x00000f00 -#define HC_HCRSt_MASK 0x00000080 -#define HC_HSE0St_MASK 0x00000040 -#define HC_HSE1St_MASK 0x00000020 -#define HC_HPESt_MASK 0x00000010 -#define HC_HXESt_MASK 0x00000008 -#define HC_HBESt_MASK 0x00000004 -#define HC_HE2St_MASK 0x00000002 -#define HC_HE3St_MASK 0x00000001 -/* HC_REG_HRFIFOempty 0x0004 - */ -#define HC_HRZDempty_MASK 0x00000010 -#define HC_HRTXAempty_MASK 0x00000008 -#define HC_HRTXDempty_MASK 0x00000004 -#define HC_HWZDempty_MASK 0x00000002 -#define HC_HWCDempty_MASK 0x00000001 -/* HC_REG_HRFIFOfull 0x0008 - */ -#define HC_HRZDfull_MASK 0x00000010 -#define HC_HRTXAfull_MASK 0x00000008 -#define HC_HRTXDfull_MASK 0x00000004 -#define HC_HWZDfull_MASK 0x00000002 -#define HC_HWCDfull_MASK 0x00000001 -/* HC_REG_HRErr 0x000c - */ -#define HC_HAGPCMErr_MASK 0x80000000 -#define HC_HAGPCMErrC_MASK 0x70000000 -/* HC_REG_FIFOstatus 0x0010 - */ -#define HC_HRFIFOATall_MASK 0x80000000 -#define HC_HRFIFOATbusy_MASK 0x40000000 -#define HC_HRATFGMDo_MASK 0x00000100 -#define HC_HRATFGMDi_MASK 0x00000080 -#define HC_HRATFRZD_MASK 0x00000040 -#define HC_HRATFRTXA_MASK 0x00000020 -#define HC_HRATFRTXD_MASK 0x00000010 -#define HC_HRATFWZD_MASK 0x00000008 -#define HC_HRATFWCD_MASK 0x00000004 -#define HC_HRATTXTAG_MASK 0x00000002 -#define HC_HRATTXCH_MASK 0x00000001 - -/* AGP Command Setting - */ -#define HC_SubA_HAGPBstL 0x0060 -#define HC_SubA_HAGPBendL 0x0061 -#define HC_SubA_HAGPCMNT 0x0062 -#define HC_SubA_HAGPBpL 0x0063 -#define HC_SubA_HAGPBpH 0x0064 -/* HC_SubA_HAGPCMNT 0x0062 - */ -#define HC_HAGPCMNT_MASK 0x00800000 -#define HC_HCmdErrClr_MASK 0x00400000 -#define HC_HAGPBendH_MASK 0x0000ff00 -#define HC_HAGPBstH_MASK 0x000000ff -#define HC_HAGPBendH_SHIFT 8 -#define HC_HAGPBstH_SHIFT 0 -/* HC_SubA_HAGPBpL 0x0063 - */ -#define HC_HAGPBpL_MASK 0x00fffffc -#define HC_HAGPBpID_MASK 0x00000003 -#define HC_HAGPBpID_PAUSE 0x00000000 -#define HC_HAGPBpID_JUMP 0x00000001 -#define HC_HAGPBpID_STOP 0x00000002 -/* HC_SubA_HAGPBpH 0x0064 - */ -#define HC_HAGPBpH_MASK 0x00ffffff - -/* Miscellaneous Settings - */ -#define HC_SubA_HClipTB 0x0070 -#define HC_SubA_HClipLR 0x0071 -#define HC_SubA_HFPClipTL 0x0072 -#define HC_SubA_HFPClipBL 0x0073 -#define HC_SubA_HFPClipLL 0x0074 -#define HC_SubA_HFPClipRL 0x0075 -#define HC_SubA_HFPClipTBH 0x0076 -#define HC_SubA_HFPClipLRH 0x0077 -#define HC_SubA_HLP 0x0078 -#define HC_SubA_HLPRF 0x0079 -#define HC_SubA_HSolidCL 0x007a -#define HC_SubA_HPixGC 0x007b -#define HC_SubA_HSPXYOS 0x007c -#define HC_SubA_HVertexCNT 0x007d - -#define HC_HClipT_MASK 0x00fff000 -#define HC_HClipT_SHIFT 12 -#define HC_HClipB_MASK 0x00000fff -#define HC_HClipB_SHIFT 0 -#define HC_HClipL_MASK 0x00fff000 -#define HC_HClipL_SHIFT 12 -#define HC_HClipR_MASK 0x00000fff -#define HC_HClipR_SHIFT 0 -#define HC_HFPClipBH_MASK 0x0000ff00 -#define HC_HFPClipBH_SHIFT 8 -#define HC_HFPClipTH_MASK 0x000000ff -#define HC_HFPClipTH_SHIFT 0 -#define HC_HFPClipRH_MASK 0x0000ff00 -#define HC_HFPClipRH_SHIFT 8 -#define HC_HFPClipLH_MASK 0x000000ff -#define HC_HFPClipLH_SHIFT 0 -#define HC_HSolidCH_MASK 0x000000ff -#define HC_HPixGC_MASK 0x00800000 -#define HC_HSPXOS_MASK 0x00fff000 -#define HC_HSPXOS_SHIFT 12 -#define HC_HSPYOS_MASK 0x00000fff - -/* Command - * Command A - */ -#define HC_HCmdHeader_MASK 0xfe000000 /*0xffe00000 */ -#define HC_HE3Fire_MASK 0x00100000 -#define HC_HPMType_MASK 0x000f0000 -#define HC_HEFlag_MASK 0x0000e000 -#define HC_HShading_MASK 0x00001c00 -#define HC_HPMValidN_MASK 0x00000200 -#define HC_HPLEND_MASK 0x00000100 -#define HC_HVCycle_MASK 0x000000ff -#define HC_HVCycle_Style_MASK 0x000000c0 -#define HC_HVCycle_ChgA_MASK 0x00000030 -#define HC_HVCycle_ChgB_MASK 0x0000000c -#define HC_HVCycle_ChgC_MASK 0x00000003 -#define HC_HPMType_Point 0x00000000 -#define HC_HPMType_Line 0x00010000 -#define HC_HPMType_Tri 0x00020000 -#define HC_HPMType_TriWF 0x00040000 -#define HC_HEFlag_NoAA 0x00000000 -#define HC_HEFlag_ab 0x00008000 -#define HC_HEFlag_bc 0x00004000 -#define HC_HEFlag_ca 0x00002000 -#define HC_HShading_Solid 0x00000000 -#define HC_HShading_FlatA 0x00000400 -#define HC_HShading_FlatB 0x00000800 -#define HC_HShading_FlatC 0x00000c00 -#define HC_HShading_Gouraud 0x00001000 -#define HC_HVCycle_Full 0x00000000 -#define HC_HVCycle_AFP 0x00000040 -#define HC_HVCycle_One 0x000000c0 -#define HC_HVCycle_NewA 0x00000000 -#define HC_HVCycle_AA 0x00000010 -#define HC_HVCycle_AB 0x00000020 -#define HC_HVCycle_AC 0x00000030 -#define HC_HVCycle_NewB 0x00000000 -#define HC_HVCycle_BA 0x00000004 -#define HC_HVCycle_BB 0x00000008 -#define HC_HVCycle_BC 0x0000000c -#define HC_HVCycle_NewC 0x00000000 -#define HC_HVCycle_CA 0x00000001 -#define HC_HVCycle_CB 0x00000002 -#define HC_HVCycle_CC 0x00000003 - -/* Command B - */ -#define HC_HLPrst_MASK 0x00010000 -#define HC_HLLastP_MASK 0x00008000 -#define HC_HVPMSK_MASK 0x00007f80 -#define HC_HBFace_MASK 0x00000040 -#define HC_H2nd1VT_MASK 0x0000003f -#define HC_HVPMSK_X 0x00004000 -#define HC_HVPMSK_Y 0x00002000 -#define HC_HVPMSK_Z 0x00001000 -#define HC_HVPMSK_W 0x00000800 -#define HC_HVPMSK_Cd 0x00000400 -#define HC_HVPMSK_Cs 0x00000200 -#define HC_HVPMSK_S 0x00000100 -#define HC_HVPMSK_T 0x00000080 - -/* Enable Setting - */ -#define HC_SubA_HEnable 0x0000 -#define HC_HenTXEnvMap_MASK 0x00200000 -#define HC_HenVertexCNT_MASK 0x00100000 -#define HC_HenCPUDAZ_MASK 0x00080000 -#define HC_HenDASZWC_MASK 0x00040000 -#define HC_HenFBCull_MASK 0x00020000 -#define HC_HenCW_MASK 0x00010000 -#define HC_HenAA_MASK 0x00008000 -#define HC_HenST_MASK 0x00004000 -#define HC_HenZT_MASK 0x00002000 -#define HC_HenZW_MASK 0x00001000 -#define HC_HenAT_MASK 0x00000800 -#define HC_HenAW_MASK 0x00000400 -#define HC_HenSP_MASK 0x00000200 -#define HC_HenLP_MASK 0x00000100 -#define HC_HenTXCH_MASK 0x00000080 -#define HC_HenTXMP_MASK 0x00000040 -#define HC_HenTXPP_MASK 0x00000020 -#define HC_HenTXTR_MASK 0x00000010 -#define HC_HenCS_MASK 0x00000008 -#define HC_HenFOG_MASK 0x00000004 -#define HC_HenABL_MASK 0x00000002 -#define HC_HenDT_MASK 0x00000001 - -/* Z Setting - */ -#define HC_SubA_HZWBBasL 0x0010 -#define HC_SubA_HZWBBasH 0x0011 -#define HC_SubA_HZWBType 0x0012 -#define HC_SubA_HZBiasL 0x0013 -#define HC_SubA_HZWBend 0x0014 -#define HC_SubA_HZWTMD 0x0015 -#define HC_SubA_HZWCDL 0x0016 -#define HC_SubA_HZWCTAGnum 0x0017 -#define HC_SubA_HZCYNum 0x0018 -#define HC_SubA_HZWCFire 0x0019 -/* HC_SubA_HZWBType - */ -#define HC_HZWBType_MASK 0x00800000 -#define HC_HZBiasedWB_MASK 0x00400000 -#define HC_HZONEasFF_MASK 0x00200000 -#define HC_HZOONEasFF_MASK 0x00100000 -#define HC_HZWBFM_MASK 0x00030000 -#define HC_HZWBLoc_MASK 0x0000c000 -#define HC_HZWBPit_MASK 0x00003fff -#define HC_HZWBFM_16 0x00000000 -#define HC_HZWBFM_32 0x00020000 -#define HC_HZWBFM_24 0x00030000 -#define HC_HZWBLoc_Local 0x00000000 -#define HC_HZWBLoc_SyS 0x00004000 -/* HC_SubA_HZWBend - */ -#define HC_HZWBend_MASK 0x00ffe000 -#define HC_HZBiasH_MASK 0x000000ff -#define HC_HZWBend_SHIFT 10 -/* HC_SubA_HZWTMD - */ -#define HC_HZWTMD_MASK 0x00070000 -#define HC_HEBEBias_MASK 0x00007f00 -#define HC_HZNF_MASK 0x000000ff -#define HC_HZWTMD_NeverPass 0x00000000 -#define HC_HZWTMD_LT 0x00010000 -#define HC_HZWTMD_EQ 0x00020000 -#define HC_HZWTMD_LE 0x00030000 -#define HC_HZWTMD_GT 0x00040000 -#define HC_HZWTMD_NE 0x00050000 -#define HC_HZWTMD_GE 0x00060000 -#define HC_HZWTMD_AllPass 0x00070000 -#define HC_HEBEBias_SHIFT 8 -/* HC_SubA_HZWCDL 0x0016 - */ -#define HC_HZWCDL_MASK 0x00ffffff -/* HC_SubA_HZWCTAGnum 0x0017 - */ -#define HC_HZWCTAGnum_MASK 0x00ff0000 -#define HC_HZWCTAGnum_SHIFT 16 -#define HC_HZWCDH_MASK 0x000000ff -#define HC_HZWCDH_SHIFT 0 -/* HC_SubA_HZCYNum 0x0018 - */ -#define HC_HZCYNum_MASK 0x00030000 -#define HC_HZCYNum_SHIFT 16 -#define HC_HZWCQWnum_MASK 0x00003fff -#define HC_HZWCQWnum_SHIFT 0 -/* HC_SubA_HZWCFire 0x0019 - */ -#define HC_ZWCFire_MASK 0x00010000 -#define HC_HZWCQWnumLast_MASK 0x00003fff -#define HC_HZWCQWnumLast_SHIFT 0 - -/* Stencil Setting - */ -#define HC_SubA_HSTREF 0x0023 -#define HC_SubA_HSTMD 0x0024 -/* HC_SubA_HSBFM - */ -#define HC_HSBFM_MASK 0x00030000 -#define HC_HSBLoc_MASK 0x0000c000 -#define HC_HSBPit_MASK 0x00003fff -/* HC_SubA_HSTREF - */ -#define HC_HSTREF_MASK 0x00ff0000 -#define HC_HSTOPMSK_MASK 0x0000ff00 -#define HC_HSTBMSK_MASK 0x000000ff -#define HC_HSTREF_SHIFT 16 -#define HC_HSTOPMSK_SHIFT 8 -/* HC_SubA_HSTMD - */ -#define HC_HSTMD_MASK 0x00070000 -#define HC_HSTOPSF_MASK 0x000001c0 -#define HC_HSTOPSPZF_MASK 0x00000038 -#define HC_HSTOPSPZP_MASK 0x00000007 -#define HC_HSTMD_NeverPass 0x00000000 -#define HC_HSTMD_LT 0x00010000 -#define HC_HSTMD_EQ 0x00020000 -#define HC_HSTMD_LE 0x00030000 -#define HC_HSTMD_GT 0x00040000 -#define HC_HSTMD_NE 0x00050000 -#define HC_HSTMD_GE 0x00060000 -#define HC_HSTMD_AllPass 0x00070000 -#define HC_HSTOPSF_KEEP 0x00000000 -#define HC_HSTOPSF_ZERO 0x00000040 -#define HC_HSTOPSF_REPLACE 0x00000080 -#define HC_HSTOPSF_INCRSAT 0x000000c0 -#define HC_HSTOPSF_DECRSAT 0x00000100 -#define HC_HSTOPSF_INVERT 0x00000140 -#define HC_HSTOPSF_INCR 0x00000180 -#define HC_HSTOPSF_DECR 0x000001c0 -#define HC_HSTOPSPZF_KEEP 0x00000000 -#define HC_HSTOPSPZF_ZERO 0x00000008 -#define HC_HSTOPSPZF_REPLACE 0x00000010 -#define HC_HSTOPSPZF_INCRSAT 0x00000018 -#define HC_HSTOPSPZF_DECRSAT 0x00000020 -#define HC_HSTOPSPZF_INVERT 0x00000028 -#define HC_HSTOPSPZF_INCR 0x00000030 -#define HC_HSTOPSPZF_DECR 0x00000038 -#define HC_HSTOPSPZP_KEEP 0x00000000 -#define HC_HSTOPSPZP_ZERO 0x00000001 -#define HC_HSTOPSPZP_REPLACE 0x00000002 -#define HC_HSTOPSPZP_INCRSAT 0x00000003 -#define HC_HSTOPSPZP_DECRSAT 0x00000004 -#define HC_HSTOPSPZP_INVERT 0x00000005 -#define HC_HSTOPSPZP_INCR 0x00000006 -#define HC_HSTOPSPZP_DECR 0x00000007 - -/* Alpha Setting - */ -#define HC_SubA_HABBasL 0x0030 -#define HC_SubA_HABBasH 0x0031 -#define HC_SubA_HABFM 0x0032 -#define HC_SubA_HATMD 0x0033 -#define HC_SubA_HABLCsat 0x0034 -#define HC_SubA_HABLCop 0x0035 -#define HC_SubA_HABLAsat 0x0036 -#define HC_SubA_HABLAop 0x0037 -#define HC_SubA_HABLRCa 0x0038 -#define HC_SubA_HABLRFCa 0x0039 -#define HC_SubA_HABLRCbias 0x003a -#define HC_SubA_HABLRCb 0x003b -#define HC_SubA_HABLRFCb 0x003c -#define HC_SubA_HABLRAa 0x003d -#define HC_SubA_HABLRAb 0x003e -/* HC_SubA_HABFM - */ -#define HC_HABFM_MASK 0x00030000 -#define HC_HABLoc_MASK 0x0000c000 -#define HC_HABPit_MASK 0x000007ff -/* HC_SubA_HATMD - */ -#define HC_HATMD_MASK 0x00000700 -#define HC_HATREF_MASK 0x000000ff -#define HC_HATMD_NeverPass 0x00000000 -#define HC_HATMD_LT 0x00000100 -#define HC_HATMD_EQ 0x00000200 -#define HC_HATMD_LE 0x00000300 -#define HC_HATMD_GT 0x00000400 -#define HC_HATMD_NE 0x00000500 -#define HC_HATMD_GE 0x00000600 -#define HC_HATMD_AllPass 0x00000700 -/* HC_SubA_HABLCsat - */ -#define HC_HABLCsat_MASK 0x00010000 -#define HC_HABLCa_MASK 0x0000fc00 -#define HC_HABLCa_C_MASK 0x0000c000 -#define HC_HABLCa_OPC_MASK 0x00003c00 -#define HC_HABLFCa_MASK 0x000003f0 -#define HC_HABLFCa_C_MASK 0x00000300 -#define HC_HABLFCa_OPC_MASK 0x000000f0 -#define HC_HABLCbias_MASK 0x0000000f -#define HC_HABLCbias_C_MASK 0x00000008 -#define HC_HABLCbias_OPC_MASK 0x00000007 -/*-- Define the input color. - */ -#define HC_XC_Csrc 0x00000000 -#define HC_XC_Cdst 0x00000001 -#define HC_XC_Asrc 0x00000002 -#define HC_XC_Adst 0x00000003 -#define HC_XC_Fog 0x00000004 -#define HC_XC_HABLRC 0x00000005 -#define HC_XC_minSrcDst 0x00000006 -#define HC_XC_maxSrcDst 0x00000007 -#define HC_XC_mimAsrcInvAdst 0x00000008 -#define HC_XC_OPC 0x00000000 -#define HC_XC_InvOPC 0x00000010 -#define HC_XC_OPCp5 0x00000020 -/*-- Define the input Alpha - */ -#define HC_XA_OPA 0x00000000 -#define HC_XA_InvOPA 0x00000010 -#define HC_XA_OPAp5 0x00000020 -#define HC_XA_0 0x00000000 -#define HC_XA_Asrc 0x00000001 -#define HC_XA_Adst 0x00000002 -#define HC_XA_Fog 0x00000003 -#define HC_XA_minAsrcFog 0x00000004 -#define HC_XA_minAsrcAdst 0x00000005 -#define HC_XA_maxAsrcFog 0x00000006 -#define HC_XA_maxAsrcAdst 0x00000007 -#define HC_XA_HABLRA 0x00000008 -#define HC_XA_minAsrcInvAdst 0x00000008 -#define HC_XA_HABLFRA 0x00000009 -/*-- - */ -#define HC_HABLCa_OPC (HC_XC_OPC << 10) -#define HC_HABLCa_InvOPC (HC_XC_InvOPC << 10) -#define HC_HABLCa_OPCp5 (HC_XC_OPCp5 << 10) -#define HC_HABLCa_Csrc (HC_XC_Csrc << 10) -#define HC_HABLCa_Cdst (HC_XC_Cdst << 10) -#define HC_HABLCa_Asrc (HC_XC_Asrc << 10) -#define HC_HABLCa_Adst (HC_XC_Adst << 10) -#define HC_HABLCa_Fog (HC_XC_Fog << 10) -#define HC_HABLCa_HABLRCa (HC_XC_HABLRC << 10) -#define HC_HABLCa_minSrcDst (HC_XC_minSrcDst << 10) -#define HC_HABLCa_maxSrcDst (HC_XC_maxSrcDst << 10) -#define HC_HABLFCa_OPC (HC_XC_OPC << 4) -#define HC_HABLFCa_InvOPC (HC_XC_InvOPC << 4) -#define HC_HABLFCa_OPCp5 (HC_XC_OPCp5 << 4) -#define HC_HABLFCa_Csrc (HC_XC_Csrc << 4) -#define HC_HABLFCa_Cdst (HC_XC_Cdst << 4) -#define HC_HABLFCa_Asrc (HC_XC_Asrc << 4) -#define HC_HABLFCa_Adst (HC_XC_Adst << 4) -#define HC_HABLFCa_Fog (HC_XC_Fog << 4) -#define HC_HABLFCa_HABLRCa (HC_XC_HABLRC << 4) -#define HC_HABLFCa_minSrcDst (HC_XC_minSrcDst << 4) -#define HC_HABLFCa_maxSrcDst (HC_XC_maxSrcDst << 4) -#define HC_HABLFCa_mimAsrcInvAdst (HC_XC_mimAsrcInvAdst << 4) -#define HC_HABLCbias_HABLRCbias 0x00000000 -#define HC_HABLCbias_Asrc 0x00000001 -#define HC_HABLCbias_Adst 0x00000002 -#define HC_HABLCbias_Fog 0x00000003 -#define HC_HABLCbias_Cin 0x00000004 -/* HC_SubA_HABLCop 0x0035 - */ -#define HC_HABLdot_MASK 0x00010000 -#define HC_HABLCop_MASK 0x00004000 -#define HC_HABLCb_MASK 0x00003f00 -#define HC_HABLCb_C_MASK 0x00003000 -#define HC_HABLCb_OPC_MASK 0x00000f00 -#define HC_HABLFCb_MASK 0x000000fc -#define HC_HABLFCb_C_MASK 0x000000c0 -#define HC_HABLFCb_OPC_MASK 0x0000003c -#define HC_HABLCshift_MASK 0x00000003 -#define HC_HABLCb_OPC (HC_XC_OPC << 8) -#define HC_HABLCb_InvOPC (HC_XC_InvOPC << 8) -#define HC_HABLCb_OPCp5 (HC_XC_OPCp5 << 8) -#define HC_HABLCb_Csrc (HC_XC_Csrc << 8) -#define HC_HABLCb_Cdst (HC_XC_Cdst << 8) -#define HC_HABLCb_Asrc (HC_XC_Asrc << 8) -#define HC_HABLCb_Adst (HC_XC_Adst << 8) -#define HC_HABLCb_Fog (HC_XC_Fog << 8) -#define HC_HABLCb_HABLRCa (HC_XC_HABLRC << 8) -#define HC_HABLCb_minSrcDst (HC_XC_minSrcDst << 8) -#define HC_HABLCb_maxSrcDst (HC_XC_maxSrcDst << 8) -#define HC_HABLFCb_OPC (HC_XC_OPC << 2) -#define HC_HABLFCb_InvOPC (HC_XC_InvOPC << 2) -#define HC_HABLFCb_OPCp5 (HC_XC_OPCp5 << 2) -#define HC_HABLFCb_Csrc (HC_XC_Csrc << 2) -#define HC_HABLFCb_Cdst (HC_XC_Cdst << 2) -#define HC_HABLFCb_Asrc (HC_XC_Asrc << 2) -#define HC_HABLFCb_Adst (HC_XC_Adst << 2) -#define HC_HABLFCb_Fog (HC_XC_Fog << 2) -#define HC_HABLFCb_HABLRCb (HC_XC_HABLRC << 2) -#define HC_HABLFCb_minSrcDst (HC_XC_minSrcDst << 2) -#define HC_HABLFCb_maxSrcDst (HC_XC_maxSrcDst << 2) -#define HC_HABLFCb_mimAsrcInvAdst (HC_XC_mimAsrcInvAdst << 2) -/* HC_SubA_HABLAsat 0x0036 - */ -#define HC_HABLAsat_MASK 0x00010000 -#define HC_HABLAa_MASK 0x0000fc00 -#define HC_HABLAa_A_MASK 0x0000c000 -#define HC_HABLAa_OPA_MASK 0x00003c00 -#define HC_HABLFAa_MASK 0x000003f0 -#define HC_HABLFAa_A_MASK 0x00000300 -#define HC_HABLFAa_OPA_MASK 0x000000f0 -#define HC_HABLAbias_MASK 0x0000000f -#define HC_HABLAbias_A_MASK 0x00000008 -#define HC_HABLAbias_OPA_MASK 0x00000007 -#define HC_HABLAa_OPA (HC_XA_OPA << 10) -#define HC_HABLAa_InvOPA (HC_XA_InvOPA << 10) -#define HC_HABLAa_OPAp5 (HC_XA_OPAp5 << 10) -#define HC_HABLAa_0 (HC_XA_0 << 10) -#define HC_HABLAa_Asrc (HC_XA_Asrc << 10) -#define HC_HABLAa_Adst (HC_XA_Adst << 10) -#define HC_HABLAa_Fog (HC_XA_Fog << 10) -#define HC_HABLAa_minAsrcFog (HC_XA_minAsrcFog << 10) -#define HC_HABLAa_minAsrcAdst (HC_XA_minAsrcAdst << 10) -#define HC_HABLAa_maxAsrcFog (HC_XA_maxAsrcFog << 10) -#define HC_HABLAa_maxAsrcAdst (HC_XA_maxAsrcAdst << 10) -#define HC_HABLAa_HABLRA (HC_XA_HABLRA << 10) -#define HC_HABLFAa_OPA (HC_XA_OPA << 4) -#define HC_HABLFAa_InvOPA (HC_XA_InvOPA << 4) -#define HC_HABLFAa_OPAp5 (HC_XA_OPAp5 << 4) -#define HC_HABLFAa_0 (HC_XA_0 << 4) -#define HC_HABLFAa_Asrc (HC_XA_Asrc << 4) -#define HC_HABLFAa_Adst (HC_XA_Adst << 4) -#define HC_HABLFAa_Fog (HC_XA_Fog << 4) -#define HC_HABLFAa_minAsrcFog (HC_XA_minAsrcFog << 4) -#define HC_HABLFAa_minAsrcAdst (HC_XA_minAsrcAdst << 4) -#define HC_HABLFAa_maxAsrcFog (HC_XA_maxAsrcFog << 4) -#define HC_HABLFAa_maxAsrcAdst (HC_XA_maxAsrcAdst << 4) -#define HC_HABLFAa_minAsrcInvAdst (HC_XA_minAsrcInvAdst << 4) -#define HC_HABLFAa_HABLFRA (HC_XA_HABLFRA << 4) -#define HC_HABLAbias_HABLRAbias 0x00000000 -#define HC_HABLAbias_Asrc 0x00000001 -#define HC_HABLAbias_Adst 0x00000002 -#define HC_HABLAbias_Fog 0x00000003 -#define HC_HABLAbias_Aaa 0x00000004 -/* HC_SubA_HABLAop 0x0037 - */ -#define HC_HABLAop_MASK 0x00004000 -#define HC_HABLAb_MASK 0x00003f00 -#define HC_HABLAb_OPA_MASK 0x00000f00 -#define HC_HABLFAb_MASK 0x000000fc -#define HC_HABLFAb_OPA_MASK 0x0000003c -#define HC_HABLAshift_MASK 0x00000003 -#define HC_HABLAb_OPA (HC_XA_OPA << 8) -#define HC_HABLAb_InvOPA (HC_XA_InvOPA << 8) -#define HC_HABLAb_OPAp5 (HC_XA_OPAp5 << 8) -#define HC_HABLAb_0 (HC_XA_0 << 8) -#define HC_HABLAb_Asrc (HC_XA_Asrc << 8) -#define HC_HABLAb_Adst (HC_XA_Adst << 8) -#define HC_HABLAb_Fog (HC_XA_Fog << 8) -#define HC_HABLAb_minAsrcFog (HC_XA_minAsrcFog << 8) -#define HC_HABLAb_minAsrcAdst (HC_XA_minAsrcAdst << 8) -#define HC_HABLAb_maxAsrcFog (HC_XA_maxAsrcFog << 8) -#define HC_HABLAb_maxAsrcAdst (HC_XA_maxAsrcAdst << 8) -#define HC_HABLAb_HABLRA (HC_XA_HABLRA << 8) -#define HC_HABLFAb_OPA (HC_XA_OPA << 2) -#define HC_HABLFAb_InvOPA (HC_XA_InvOPA << 2) -#define HC_HABLFAb_OPAp5 (HC_XA_OPAp5 << 2) -#define HC_HABLFAb_0 (HC_XA_0 << 2) -#define HC_HABLFAb_Asrc (HC_XA_Asrc << 2) -#define HC_HABLFAb_Adst (HC_XA_Adst << 2) -#define HC_HABLFAb_Fog (HC_XA_Fog << 2) -#define HC_HABLFAb_minAsrcFog (HC_XA_minAsrcFog << 2) -#define HC_HABLFAb_minAsrcAdst (HC_XA_minAsrcAdst << 2) -#define HC_HABLFAb_maxAsrcFog (HC_XA_maxAsrcFog << 2) -#define HC_HABLFAb_maxAsrcAdst (HC_XA_maxAsrcAdst << 2) -#define HC_HABLFAb_minAsrcInvAdst (HC_XA_minAsrcInvAdst << 2) -#define HC_HABLFAb_HABLFRA (HC_XA_HABLFRA << 2) -/* HC_SubA_HABLRAa 0x003d - */ -#define HC_HABLRAa_MASK 0x00ff0000 -#define HC_HABLRFAa_MASK 0x0000ff00 -#define HC_HABLRAbias_MASK 0x000000ff -#define HC_HABLRAa_SHIFT 16 -#define HC_HABLRFAa_SHIFT 8 -/* HC_SubA_HABLRAb 0x003e - */ -#define HC_HABLRAb_MASK 0x0000ff00 -#define HC_HABLRFAb_MASK 0x000000ff -#define HC_HABLRAb_SHIFT 8 - -/* Destination Setting - */ -#define HC_SubA_HDBBasL 0x0040 -#define HC_SubA_HDBBasH 0x0041 -#define HC_SubA_HDBFM 0x0042 -#define HC_SubA_HFBBMSKL 0x0043 -#define HC_SubA_HROP 0x0044 -/* HC_SubA_HDBFM 0x0042 - */ -#define HC_HDBFM_MASK 0x001f0000 -#define HC_HDBLoc_MASK 0x0000c000 -#define HC_HDBPit_MASK 0x00003fff -#define HC_HDBFM_RGB555 0x00000000 -#define HC_HDBFM_RGB565 0x00010000 -#define HC_HDBFM_ARGB4444 0x00020000 -#define HC_HDBFM_ARGB1555 0x00030000 -#define HC_HDBFM_BGR555 0x00040000 -#define HC_HDBFM_BGR565 0x00050000 -#define HC_HDBFM_ABGR4444 0x00060000 -#define HC_HDBFM_ABGR1555 0x00070000 -#define HC_HDBFM_ARGB0888 0x00080000 -#define HC_HDBFM_ARGB8888 0x00090000 -#define HC_HDBFM_ABGR0888 0x000a0000 -#define HC_HDBFM_ABGR8888 0x000b0000 -#define HC_HDBLoc_Local 0x00000000 -#define HC_HDBLoc_Sys 0x00004000 -/* HC_SubA_HROP 0x0044 - */ -#define HC_HROP_MASK 0x00000f00 -#define HC_HFBBMSKH_MASK 0x000000ff -#define HC_HROP_BLACK 0x00000000 -#define HC_HROP_DPon 0x00000100 -#define HC_HROP_DPna 0x00000200 -#define HC_HROP_Pn 0x00000300 -#define HC_HROP_PDna 0x00000400 -#define HC_HROP_Dn 0x00000500 -#define HC_HROP_DPx 0x00000600 -#define HC_HROP_DPan 0x00000700 -#define HC_HROP_DPa 0x00000800 -#define HC_HROP_DPxn 0x00000900 -#define HC_HROP_D 0x00000a00 -#define HC_HROP_DPno 0x00000b00 -#define HC_HROP_P 0x00000c00 -#define HC_HROP_PDno 0x00000d00 -#define HC_HROP_DPo 0x00000e00 -#define HC_HROP_WHITE 0x00000f00 - -/* Fog Setting - */ -#define HC_SubA_HFogLF 0x0050 -#define HC_SubA_HFogCL 0x0051 -#define HC_SubA_HFogCH 0x0052 -#define HC_SubA_HFogStL 0x0053 -#define HC_SubA_HFogStH 0x0054 -#define HC_SubA_HFogOOdMF 0x0055 -#define HC_SubA_HFogOOdEF 0x0056 -#define HC_SubA_HFogEndL 0x0057 -#define HC_SubA_HFogDenst 0x0058 -/* HC_SubA_FogLF 0x0050 - */ -#define HC_FogLF_MASK 0x00000010 -#define HC_FogEq_MASK 0x00000008 -#define HC_FogMD_MASK 0x00000007 -#define HC_FogMD_LocalFog 0x00000000 -#define HC_FogMD_LinearFog 0x00000002 -#define HC_FogMD_ExponentialFog 0x00000004 -#define HC_FogMD_Exponential2Fog 0x00000005 -/* #define HC_FogMD_FogTable 0x00000003 */ - -/* HC_SubA_HFogDenst 0x0058 - */ -#define HC_FogDenst_MASK 0x001fff00 -#define HC_FogEndL_MASK 0x000000ff - -/* Texture subtype definitions - */ -#define HC_SubType_Tex0 0x00000000 -#define HC_SubType_Tex1 0x00000001 -#define HC_SubType_TexGeneral 0x000000fe - -/* Attribute of texture n - */ -#define HC_SubA_HTXnL0BasL 0x0000 -#define HC_SubA_HTXnL1BasL 0x0001 -#define HC_SubA_HTXnL2BasL 0x0002 -#define HC_SubA_HTXnL3BasL 0x0003 -#define HC_SubA_HTXnL4BasL 0x0004 -#define HC_SubA_HTXnL5BasL 0x0005 -#define HC_SubA_HTXnL6BasL 0x0006 -#define HC_SubA_HTXnL7BasL 0x0007 -#define HC_SubA_HTXnL8BasL 0x0008 -#define HC_SubA_HTXnL9BasL 0x0009 -#define HC_SubA_HTXnLaBasL 0x000a -#define HC_SubA_HTXnLbBasL 0x000b -#define HC_SubA_HTXnLcBasL 0x000c -#define HC_SubA_HTXnLdBasL 0x000d -#define HC_SubA_HTXnLeBasL 0x000e -#define HC_SubA_HTXnLfBasL 0x000f -#define HC_SubA_HTXnL10BasL 0x0010 -#define HC_SubA_HTXnL11BasL 0x0011 -#define HC_SubA_HTXnL012BasH 0x0020 -#define HC_SubA_HTXnL345BasH 0x0021 -#define HC_SubA_HTXnL678BasH 0x0022 -#define HC_SubA_HTXnL9abBasH 0x0023 -#define HC_SubA_HTXnLcdeBasH 0x0024 -#define HC_SubA_HTXnLf1011BasH 0x0025 -#define HC_SubA_HTXnL0Pit 0x002b -#define HC_SubA_HTXnL1Pit 0x002c -#define HC_SubA_HTXnL2Pit 0x002d -#define HC_SubA_HTXnL3Pit 0x002e -#define HC_SubA_HTXnL4Pit 0x002f -#define HC_SubA_HTXnL5Pit 0x0030 -#define HC_SubA_HTXnL6Pit 0x0031 -#define HC_SubA_HTXnL7Pit 0x0032 -#define HC_SubA_HTXnL8Pit 0x0033 -#define HC_SubA_HTXnL9Pit 0x0034 -#define HC_SubA_HTXnLaPit 0x0035 -#define HC_SubA_HTXnLbPit 0x0036 -#define HC_SubA_HTXnLcPit 0x0037 -#define HC_SubA_HTXnLdPit 0x0038 -#define HC_SubA_HTXnLePit 0x0039 -#define HC_SubA_HTXnLfPit 0x003a -#define HC_SubA_HTXnL10Pit 0x003b -#define HC_SubA_HTXnL11Pit 0x003c -#define HC_SubA_HTXnL0_5WE 0x004b -#define HC_SubA_HTXnL6_bWE 0x004c -#define HC_SubA_HTXnLc_11WE 0x004d -#define HC_SubA_HTXnL0_5HE 0x0051 -#define HC_SubA_HTXnL6_bHE 0x0052 -#define HC_SubA_HTXnLc_11HE 0x0053 -#define HC_SubA_HTXnL0OS 0x0077 -#define HC_SubA_HTXnTB 0x0078 -#define HC_SubA_HTXnMPMD 0x0079 -#define HC_SubA_HTXnCLODu 0x007a -#define HC_SubA_HTXnFM 0x007b -#define HC_SubA_HTXnTRCH 0x007c -#define HC_SubA_HTXnTRCL 0x007d -#define HC_SubA_HTXnTBC 0x007e -#define HC_SubA_HTXnTRAH 0x007f -#define HC_SubA_HTXnTBLCsat 0x0080 -#define HC_SubA_HTXnTBLCop 0x0081 -#define HC_SubA_HTXnTBLMPfog 0x0082 -#define HC_SubA_HTXnTBLAsat 0x0083 -#define HC_SubA_HTXnTBLRCa 0x0085 -#define HC_SubA_HTXnTBLRCb 0x0086 -#define HC_SubA_HTXnTBLRCc 0x0087 -#define HC_SubA_HTXnTBLRCbias 0x0088 -#define HC_SubA_HTXnTBLRAa 0x0089 -#define HC_SubA_HTXnTBLRFog 0x008a -#define HC_SubA_HTXnBumpM00 0x0090 -#define HC_SubA_HTXnBumpM01 0x0091 -#define HC_SubA_HTXnBumpM10 0x0092 -#define HC_SubA_HTXnBumpM11 0x0093 -#define HC_SubA_HTXnLScale 0x0094 -#define HC_SubA_HTXSMD 0x0000 -/* HC_SubA_HTXnL012BasH 0x0020 - */ -#define HC_HTXnL0BasH_MASK 0x000000ff -#define HC_HTXnL1BasH_MASK 0x0000ff00 -#define HC_HTXnL2BasH_MASK 0x00ff0000 -#define HC_HTXnL1BasH_SHIFT 8 -#define HC_HTXnL2BasH_SHIFT 16 -/* HC_SubA_HTXnL345BasH 0x0021 - */ -#define HC_HTXnL3BasH_MASK 0x000000ff -#define HC_HTXnL4BasH_MASK 0x0000ff00 -#define HC_HTXnL5BasH_MASK 0x00ff0000 -#define HC_HTXnL4BasH_SHIFT 8 -#define HC_HTXnL5BasH_SHIFT 16 -/* HC_SubA_HTXnL678BasH 0x0022 - */ -#define HC_HTXnL6BasH_MASK 0x000000ff -#define HC_HTXnL7BasH_MASK 0x0000ff00 -#define HC_HTXnL8BasH_MASK 0x00ff0000 -#define HC_HTXnL7BasH_SHIFT 8 -#define HC_HTXnL8BasH_SHIFT 16 -/* HC_SubA_HTXnL9abBasH 0x0023 - */ -#define HC_HTXnL9BasH_MASK 0x000000ff -#define HC_HTXnLaBasH_MASK 0x0000ff00 -#define HC_HTXnLbBasH_MASK 0x00ff0000 -#define HC_HTXnLaBasH_SHIFT 8 -#define HC_HTXnLbBasH_SHIFT 16 -/* HC_SubA_HTXnLcdeBasH 0x0024 - */ -#define HC_HTXnLcBasH_MASK 0x000000ff -#define HC_HTXnLdBasH_MASK 0x0000ff00 -#define HC_HTXnLeBasH_MASK 0x00ff0000 -#define HC_HTXnLdBasH_SHIFT 8 -#define HC_HTXnLeBasH_SHIFT 16 -/* HC_SubA_HTXnLcdeBasH 0x0025 - */ -#define HC_HTXnLfBasH_MASK 0x000000ff -#define HC_HTXnL10BasH_MASK 0x0000ff00 -#define HC_HTXnL11BasH_MASK 0x00ff0000 -#define HC_HTXnL10BasH_SHIFT 8 -#define HC_HTXnL11BasH_SHIFT 16 -/* HC_SubA_HTXnL0Pit 0x002b - */ -#define HC_HTXnLnPit_MASK 0x00003fff -#define HC_HTXnEnPit_MASK 0x00080000 -#define HC_HTXnLnPitE_MASK 0x00f00000 -#define HC_HTXnLnPitE_SHIFT 20 -/* HC_SubA_HTXnL0_5WE 0x004b - */ -#define HC_HTXnL0WE_MASK 0x0000000f -#define HC_HTXnL1WE_MASK 0x000000f0 -#define HC_HTXnL2WE_MASK 0x00000f00 -#define HC_HTXnL3WE_MASK 0x0000f000 -#define HC_HTXnL4WE_MASK 0x000f0000 -#define HC_HTXnL5WE_MASK 0x00f00000 -#define HC_HTXnL1WE_SHIFT 4 -#define HC_HTXnL2WE_SHIFT 8 -#define HC_HTXnL3WE_SHIFT 12 -#define HC_HTXnL4WE_SHIFT 16 -#define HC_HTXnL5WE_SHIFT 20 -/* HC_SubA_HTXnL6_bWE 0x004c - */ -#define HC_HTXnL6WE_MASK 0x0000000f -#define HC_HTXnL7WE_MASK 0x000000f0 -#define HC_HTXnL8WE_MASK 0x00000f00 -#define HC_HTXnL9WE_MASK 0x0000f000 -#define HC_HTXnLaWE_MASK 0x000f0000 -#define HC_HTXnLbWE_MASK 0x00f00000 -#define HC_HTXnL7WE_SHIFT 4 -#define HC_HTXnL8WE_SHIFT 8 -#define HC_HTXnL9WE_SHIFT 12 -#define HC_HTXnLaWE_SHIFT 16 -#define HC_HTXnLbWE_SHIFT 20 -/* HC_SubA_HTXnLc_11WE 0x004d - */ -#define HC_HTXnLcWE_MASK 0x0000000f -#define HC_HTXnLdWE_MASK 0x000000f0 -#define HC_HTXnLeWE_MASK 0x00000f00 -#define HC_HTXnLfWE_MASK 0x0000f000 -#define HC_HTXnL10WE_MASK 0x000f0000 -#define HC_HTXnL11WE_MASK 0x00f00000 -#define HC_HTXnLdWE_SHIFT 4 -#define HC_HTXnLeWE_SHIFT 8 -#define HC_HTXnLfWE_SHIFT 12 -#define HC_HTXnL10WE_SHIFT 16 -#define HC_HTXnL11WE_SHIFT 20 -/* HC_SubA_HTXnL0_5HE 0x0051 - */ -#define HC_HTXnL0HE_MASK 0x0000000f -#define HC_HTXnL1HE_MASK 0x000000f0 -#define HC_HTXnL2HE_MASK 0x00000f00 -#define HC_HTXnL3HE_MASK 0x0000f000 -#define HC_HTXnL4HE_MASK 0x000f0000 -#define HC_HTXnL5HE_MASK 0x00f00000 -#define HC_HTXnL1HE_SHIFT 4 -#define HC_HTXnL2HE_SHIFT 8 -#define HC_HTXnL3HE_SHIFT 12 -#define HC_HTXnL4HE_SHIFT 16 -#define HC_HTXnL5HE_SHIFT 20 -/* HC_SubA_HTXnL6_bHE 0x0052 - */ -#define HC_HTXnL6HE_MASK 0x0000000f -#define HC_HTXnL7HE_MASK 0x000000f0 -#define HC_HTXnL8HE_MASK 0x00000f00 -#define HC_HTXnL9HE_MASK 0x0000f000 -#define HC_HTXnLaHE_MASK 0x000f0000 -#define HC_HTXnLbHE_MASK 0x00f00000 -#define HC_HTXnL7HE_SHIFT 4 -#define HC_HTXnL8HE_SHIFT 8 -#define HC_HTXnL9HE_SHIFT 12 -#define HC_HTXnLaHE_SHIFT 16 -#define HC_HTXnLbHE_SHIFT 20 -/* HC_SubA_HTXnLc_11HE 0x0053 - */ -#define HC_HTXnLcHE_MASK 0x0000000f -#define HC_HTXnLdHE_MASK 0x000000f0 -#define HC_HTXnLeHE_MASK 0x00000f00 -#define HC_HTXnLfHE_MASK 0x0000f000 -#define HC_HTXnL10HE_MASK 0x000f0000 -#define HC_HTXnL11HE_MASK 0x00f00000 -#define HC_HTXnLdHE_SHIFT 4 -#define HC_HTXnLeHE_SHIFT 8 -#define HC_HTXnLfHE_SHIFT 12 -#define HC_HTXnL10HE_SHIFT 16 -#define HC_HTXnL11HE_SHIFT 20 -/* HC_SubA_HTXnL0OS 0x0077 - */ -#define HC_HTXnL0OS_MASK 0x003ff000 -#define HC_HTXnLVmax_MASK 0x00000fc0 -#define HC_HTXnLVmin_MASK 0x0000003f -#define HC_HTXnL0OS_SHIFT 12 -#define HC_HTXnLVmax_SHIFT 6 -/* HC_SubA_HTXnTB 0x0078 - */ -#define HC_HTXnTB_MASK 0x00f00000 -#define HC_HTXnFLSe_MASK 0x0000e000 -#define HC_HTXnFLSs_MASK 0x00001c00 -#define HC_HTXnFLTe_MASK 0x00000380 -#define HC_HTXnFLTs_MASK 0x00000070 -#define HC_HTXnFLDs_MASK 0x0000000f -#define HC_HTXnTB_NoTB 0x00000000 -#define HC_HTXnTB_TBC_S 0x00100000 -#define HC_HTXnTB_TBC_T 0x00200000 -#define HC_HTXnTB_TB_S 0x00400000 -#define HC_HTXnTB_TB_T 0x00800000 -#define HC_HTXnFLSe_Nearest 0x00000000 -#define HC_HTXnFLSe_Linear 0x00002000 -#define HC_HTXnFLSe_NonLinear 0x00004000 -#define HC_HTXnFLSe_Sharp 0x00008000 -#define HC_HTXnFLSe_Flat_Gaussian_Cubic 0x0000c000 -#define HC_HTXnFLSs_Nearest 0x00000000 -#define HC_HTXnFLSs_Linear 0x00000400 -#define HC_HTXnFLSs_NonLinear 0x00000800 -#define HC_HTXnFLSs_Flat_Gaussian_Cubic 0x00001800 -#define HC_HTXnFLTe_Nearest 0x00000000 -#define HC_HTXnFLTe_Linear 0x00000080 -#define HC_HTXnFLTe_NonLinear 0x00000100 -#define HC_HTXnFLTe_Sharp 0x00000180 -#define HC_HTXnFLTe_Flat_Gaussian_Cubic 0x00000300 -#define HC_HTXnFLTs_Nearest 0x00000000 -#define HC_HTXnFLTs_Linear 0x00000010 -#define HC_HTXnFLTs_NonLinear 0x00000020 -#define HC_HTXnFLTs_Flat_Gaussian_Cubic 0x00000060 -#define HC_HTXnFLDs_Tex0 0x00000000 -#define HC_HTXnFLDs_Nearest 0x00000001 -#define HC_HTXnFLDs_Linear 0x00000002 -#define HC_HTXnFLDs_NonLinear 0x00000003 -#define HC_HTXnFLDs_Dither 0x00000004 -#define HC_HTXnFLDs_ConstLOD 0x00000005 -#define HC_HTXnFLDs_Ani 0x00000006 -#define HC_HTXnFLDs_AniDither 0x00000007 -/* HC_SubA_HTXnMPMD 0x0079 - */ -#define HC_HTXnMPMD_SMASK 0x00070000 -#define HC_HTXnMPMD_TMASK 0x00380000 -#define HC_HTXnLODDTf_MASK 0x00000007 -#define HC_HTXnXY2ST_MASK 0x00000008 -#define HC_HTXnMPMD_Tsingle 0x00000000 -#define HC_HTXnMPMD_Tclamp 0x00080000 -#define HC_HTXnMPMD_Trepeat 0x00100000 -#define HC_HTXnMPMD_Tmirror 0x00180000 -#define HC_HTXnMPMD_Twrap 0x00200000 -#define HC_HTXnMPMD_Ssingle 0x00000000 -#define HC_HTXnMPMD_Sclamp 0x00010000 -#define HC_HTXnMPMD_Srepeat 0x00020000 -#define HC_HTXnMPMD_Smirror 0x00030000 -#define HC_HTXnMPMD_Swrap 0x00040000 -/* HC_SubA_HTXnCLODu 0x007a - */ -#define HC_HTXnCLODu_MASK 0x000ffc00 -#define HC_HTXnCLODd_MASK 0x000003ff -#define HC_HTXnCLODu_SHIFT 10 -/* HC_SubA_HTXnFM 0x007b - */ -#define HC_HTXnFM_MASK 0x00ff0000 -#define HC_HTXnLoc_MASK 0x00000003 -#define HC_HTXnFM_INDEX 0x00000000 -#define HC_HTXnFM_Intensity 0x00080000 -#define HC_HTXnFM_Lum 0x00100000 -#define HC_HTXnFM_Alpha 0x00180000 -#define HC_HTXnFM_DX 0x00280000 -#define HC_HTXnFM_ARGB16 0x00880000 -#define HC_HTXnFM_ARGB32 0x00980000 -#define HC_HTXnFM_ABGR16 0x00a80000 -#define HC_HTXnFM_ABGR32 0x00b80000 -#define HC_HTXnFM_RGBA16 0x00c80000 -#define HC_HTXnFM_RGBA32 0x00d80000 -#define HC_HTXnFM_BGRA16 0x00e80000 -#define HC_HTXnFM_BGRA32 0x00f80000 -#define HC_HTXnFM_BUMPMAP 0x00380000 -#define HC_HTXnFM_Index1 (HC_HTXnFM_INDEX | 0x00000000) -#define HC_HTXnFM_Index2 (HC_HTXnFM_INDEX | 0x00010000) -#define HC_HTXnFM_Index4 (HC_HTXnFM_INDEX | 0x00020000) -#define HC_HTXnFM_Index8 (HC_HTXnFM_INDEX | 0x00030000) -#define HC_HTXnFM_T1 (HC_HTXnFM_Intensity | 0x00000000) -#define HC_HTXnFM_T2 (HC_HTXnFM_Intensity | 0x00010000) -#define HC_HTXnFM_T4 (HC_HTXnFM_Intensity | 0x00020000) -#define HC_HTXnFM_T8 (HC_HTXnFM_Intensity | 0x00030000) -#define HC_HTXnFM_L1 (HC_HTXnFM_Lum | 0x00000000) -#define HC_HTXnFM_L2 (HC_HTXnFM_Lum | 0x00010000) -#define HC_HTXnFM_L4 (HC_HTXnFM_Lum | 0x00020000) -#define HC_HTXnFM_L8 (HC_HTXnFM_Lum | 0x00030000) -#define HC_HTXnFM_AL44 (HC_HTXnFM_Lum | 0x00040000) -#define HC_HTXnFM_AL88 (HC_HTXnFM_Lum | 0x00050000) -#define HC_HTXnFM_A1 (HC_HTXnFM_Alpha | 0x00000000) -#define HC_HTXnFM_A2 (HC_HTXnFM_Alpha | 0x00010000) -#define HC_HTXnFM_A4 (HC_HTXnFM_Alpha | 0x00020000) -#define HC_HTXnFM_A8 (HC_HTXnFM_Alpha | 0x00030000) -#define HC_HTXnFM_DX1 (HC_HTXnFM_DX | 0x00010000) -#define HC_HTXnFM_DX23 (HC_HTXnFM_DX | 0x00020000) -#define HC_HTXnFM_DX45 (HC_HTXnFM_DX | 0x00030000) -#define HC_HTXnFM_RGB555 (HC_HTXnFM_ARGB16 | 0x00000000) -#define HC_HTXnFM_RGB565 (HC_HTXnFM_ARGB16 | 0x00010000) -#define HC_HTXnFM_ARGB1555 (HC_HTXnFM_ARGB16 | 0x00020000) -#define HC_HTXnFM_ARGB4444 (HC_HTXnFM_ARGB16 | 0x00030000) -#define HC_HTXnFM_ARGB0888 (HC_HTXnFM_ARGB32 | 0x00000000) -#define HC_HTXnFM_ARGB8888 (HC_HTXnFM_ARGB32 | 0x00010000) -#define HC_HTXnFM_BGR555 (HC_HTXnFM_ABGR16 | 0x00000000) -#define HC_HTXnFM_BGR565 (HC_HTXnFM_ABGR16 | 0x00010000) -#define HC_HTXnFM_ABGR1555 (HC_HTXnFM_ABGR16 | 0x00020000) -#define HC_HTXnFM_ABGR4444 (HC_HTXnFM_ABGR16 | 0x00030000) -#define HC_HTXnFM_ABGR0888 (HC_HTXnFM_ABGR32 | 0x00000000) -#define HC_HTXnFM_ABGR8888 (HC_HTXnFM_ABGR32 | 0x00010000) -#define HC_HTXnFM_RGBA5550 (HC_HTXnFM_RGBA16 | 0x00000000) -#define HC_HTXnFM_RGBA5551 (HC_HTXnFM_RGBA16 | 0x00020000) -#define HC_HTXnFM_RGBA4444 (HC_HTXnFM_RGBA16 | 0x00030000) -#define HC_HTXnFM_RGBA8880 (HC_HTXnFM_RGBA32 | 0x00000000) -#define HC_HTXnFM_RGBA8888 (HC_HTXnFM_RGBA32 | 0x00010000) -#define HC_HTXnFM_BGRA5550 (HC_HTXnFM_BGRA16 | 0x00000000) -#define HC_HTXnFM_BGRA5551 (HC_HTXnFM_BGRA16 | 0x00020000) -#define HC_HTXnFM_BGRA4444 (HC_HTXnFM_BGRA16 | 0x00030000) -#define HC_HTXnFM_BGRA8880 (HC_HTXnFM_BGRA32 | 0x00000000) -#define HC_HTXnFM_BGRA8888 (HC_HTXnFM_BGRA32 | 0x00010000) -#define HC_HTXnFM_VU88 (HC_HTXnFM_BUMPMAP | 0x00000000) -#define HC_HTXnFM_LVU655 (HC_HTXnFM_BUMPMAP | 0x00010000) -#define HC_HTXnFM_LVU888 (HC_HTXnFM_BUMPMAP | 0x00020000) -#define HC_HTXnLoc_Local 0x00000000 -#define HC_HTXnLoc_Sys 0x00000002 -#define HC_HTXnLoc_AGP 0x00000003 -/* HC_SubA_HTXnTRAH 0x007f - */ -#define HC_HTXnTRAH_MASK 0x00ff0000 -#define HC_HTXnTRAL_MASK 0x0000ff00 -#define HC_HTXnTBA_MASK 0x000000ff -#define HC_HTXnTRAH_SHIFT 16 -#define HC_HTXnTRAL_SHIFT 8 -/* HC_SubA_HTXnTBLCsat 0x0080 - *-- Define the input texture. - */ -#define HC_XTC_TOPC 0x00000000 -#define HC_XTC_InvTOPC 0x00000010 -#define HC_XTC_TOPCp5 0x00000020 -#define HC_XTC_Cbias 0x00000000 -#define HC_XTC_InvCbias 0x00000010 -#define HC_XTC_0 0x00000000 -#define HC_XTC_Dif 0x00000001 -#define HC_XTC_Spec 0x00000002 -#define HC_XTC_Tex 0x00000003 -#define HC_XTC_Cur 0x00000004 -#define HC_XTC_Adif 0x00000005 -#define HC_XTC_Fog 0x00000006 -#define HC_XTC_Atex 0x00000007 -#define HC_XTC_Acur 0x00000008 -#define HC_XTC_HTXnTBLRC 0x00000009 -#define HC_XTC_Ctexnext 0x0000000a -/*-- - */ -#define HC_HTXnTBLCsat_MASK 0x00800000 -#define HC_HTXnTBLCa_MASK 0x000fc000 -#define HC_HTXnTBLCb_MASK 0x00001f80 -#define HC_HTXnTBLCc_MASK 0x0000003f -#define HC_HTXnTBLCa_TOPC (HC_XTC_TOPC << 14) -#define HC_HTXnTBLCa_InvTOPC (HC_XTC_InvTOPC << 14) -#define HC_HTXnTBLCa_TOPCp5 (HC_XTC_TOPCp5 << 14) -#define HC_HTXnTBLCa_0 (HC_XTC_0 << 14) -#define HC_HTXnTBLCa_Dif (HC_XTC_Dif << 14) -#define HC_HTXnTBLCa_Spec (HC_XTC_Spec << 14) -#define HC_HTXnTBLCa_Tex (HC_XTC_Tex << 14) -#define HC_HTXnTBLCa_Cur (HC_XTC_Cur << 14) -#define HC_HTXnTBLCa_Adif (HC_XTC_Adif << 14) -#define HC_HTXnTBLCa_Fog (HC_XTC_Fog << 14) -#define HC_HTXnTBLCa_Atex (HC_XTC_Atex << 14) -#define HC_HTXnTBLCa_Acur (HC_XTC_Acur << 14) -#define HC_HTXnTBLCa_HTXnTBLRC (HC_XTC_HTXnTBLRC << 14) -#define HC_HTXnTBLCa_Ctexnext (HC_XTC_Ctexnext << 14) -#define HC_HTXnTBLCb_TOPC (HC_XTC_TOPC << 7) -#define HC_HTXnTBLCb_InvTOPC (HC_XTC_InvTOPC << 7) -#define HC_HTXnTBLCb_TOPCp5 (HC_XTC_TOPCp5 << 7) -#define HC_HTXnTBLCb_0 (HC_XTC_0 << 7) -#define HC_HTXnTBLCb_Dif (HC_XTC_Dif << 7) -#define HC_HTXnTBLCb_Spec (HC_XTC_Spec << 7) -#define HC_HTXnTBLCb_Tex (HC_XTC_Tex << 7) -#define HC_HTXnTBLCb_Cur (HC_XTC_Cur << 7) -#define HC_HTXnTBLCb_Adif (HC_XTC_Adif << 7) -#define HC_HTXnTBLCb_Fog (HC_XTC_Fog << 7) -#define HC_HTXnTBLCb_Atex (HC_XTC_Atex << 7) -#define HC_HTXnTBLCb_Acur (HC_XTC_Acur << 7) -#define HC_HTXnTBLCb_HTXnTBLRC (HC_XTC_HTXnTBLRC << 7) -#define HC_HTXnTBLCb_Ctexnext (HC_XTC_Ctexnext << 7) -#define HC_HTXnTBLCc_TOPC (HC_XTC_TOPC << 0) -#define HC_HTXnTBLCc_InvTOPC (HC_XTC_InvTOPC << 0) -#define HC_HTXnTBLCc_TOPCp5 (HC_XTC_TOPCp5 << 0) -#define HC_HTXnTBLCc_0 (HC_XTC_0 << 0) -#define HC_HTXnTBLCc_Dif (HC_XTC_Dif << 0) -#define HC_HTXnTBLCc_Spec (HC_XTC_Spec << 0) -#define HC_HTXnTBLCc_Tex (HC_XTC_Tex << 0) -#define HC_HTXnTBLCc_Cur (HC_XTC_Cur << 0) -#define HC_HTXnTBLCc_Adif (HC_XTC_Adif << 0) -#define HC_HTXnTBLCc_Fog (HC_XTC_Fog << 0) -#define HC_HTXnTBLCc_Atex (HC_XTC_Atex << 0) -#define HC_HTXnTBLCc_Acur (HC_XTC_Acur << 0) -#define HC_HTXnTBLCc_HTXnTBLRC (HC_XTC_HTXnTBLRC << 0) -#define HC_HTXnTBLCc_Ctexnext (HC_XTC_Ctexnext << 0) -/* HC_SubA_HTXnTBLCop 0x0081 - */ -#define HC_HTXnTBLdot_MASK 0x00c00000 -#define HC_HTXnTBLCop_MASK 0x00380000 -#define HC_HTXnTBLCbias_MASK 0x0007c000 -#define HC_HTXnTBLCshift_MASK 0x00001800 -#define HC_HTXnTBLAop_MASK 0x00000380 -#define HC_HTXnTBLAbias_MASK 0x00000078 -#define HC_HTXnTBLAshift_MASK 0x00000003 -#define HC_HTXnTBLCop_Add 0x00000000 -#define HC_HTXnTBLCop_Sub 0x00080000 -#define HC_HTXnTBLCop_Min 0x00100000 -#define HC_HTXnTBLCop_Max 0x00180000 -#define HC_HTXnTBLCop_Mask 0x00200000 -#define HC_HTXnTBLCbias_Cbias (HC_XTC_Cbias << 14) -#define HC_HTXnTBLCbias_InvCbias (HC_XTC_InvCbias << 14) -#define HC_HTXnTBLCbias_0 (HC_XTC_0 << 14) -#define HC_HTXnTBLCbias_Dif (HC_XTC_Dif << 14) -#define HC_HTXnTBLCbias_Spec (HC_XTC_Spec << 14) -#define HC_HTXnTBLCbias_Tex (HC_XTC_Tex << 14) -#define HC_HTXnTBLCbias_Cur (HC_XTC_Cur << 14) -#define HC_HTXnTBLCbias_Adif (HC_XTC_Adif << 14) -#define HC_HTXnTBLCbias_Fog (HC_XTC_Fog << 14) -#define HC_HTXnTBLCbias_Atex (HC_XTC_Atex << 14) -#define HC_HTXnTBLCbias_Acur (HC_XTC_Acur << 14) -#define HC_HTXnTBLCbias_HTXnTBLRC (HC_XTC_HTXnTBLRC << 14) -#define HC_HTXnTBLCshift_1 0x00000000 -#define HC_HTXnTBLCshift_2 0x00000800 -#define HC_HTXnTBLCshift_No 0x00001000 -#define HC_HTXnTBLCshift_DotP 0x00001800 -/*=* John Sheng [2003.7.18] texture combine *=*/ -#define HC_HTXnTBLDOT3 0x00080000 -#define HC_HTXnTBLDOT4 0x000C0000 - -#define HC_HTXnTBLAop_Add 0x00000000 -#define HC_HTXnTBLAop_Sub 0x00000080 -#define HC_HTXnTBLAop_Min 0x00000100 -#define HC_HTXnTBLAop_Max 0x00000180 -#define HC_HTXnTBLAop_Mask 0x00000200 -#define HC_HTXnTBLAbias_Inv 0x00000040 -#define HC_HTXnTBLAbias_Adif 0x00000000 -#define HC_HTXnTBLAbias_Fog 0x00000008 -#define HC_HTXnTBLAbias_Acur 0x00000010 -#define HC_HTXnTBLAbias_HTXnTBLRAbias 0x00000018 -#define HC_HTXnTBLAbias_Atex 0x00000020 -#define HC_HTXnTBLAshift_1 0x00000000 -#define HC_HTXnTBLAshift_2 0x00000001 -#define HC_HTXnTBLAshift_No 0x00000002 -/* #define HC_HTXnTBLAshift_DotP 0x00000003 */ -/* HC_SubA_HTXnTBLMPFog 0x0082 - */ -#define HC_HTXnTBLMPfog_MASK 0x00e00000 -#define HC_HTXnTBLMPfog_0 0x00000000 -#define HC_HTXnTBLMPfog_Adif 0x00200000 -#define HC_HTXnTBLMPfog_Fog 0x00400000 -#define HC_HTXnTBLMPfog_Atex 0x00600000 -#define HC_HTXnTBLMPfog_Acur 0x00800000 -#define HC_HTXnTBLMPfog_GHTXnTBLRFog 0x00a00000 -/* HC_SubA_HTXnTBLAsat 0x0083 - *-- Define the texture alpha input. - */ -#define HC_XTA_TOPA 0x00000000 -#define HC_XTA_InvTOPA 0x00000008 -#define HC_XTA_TOPAp5 0x00000010 -#define HC_XTA_Adif 0x00000000 -#define HC_XTA_Fog 0x00000001 -#define HC_XTA_Acur 0x00000002 -#define HC_XTA_HTXnTBLRA 0x00000003 -#define HC_XTA_Atex 0x00000004 -#define HC_XTA_Atexnext 0x00000005 -/*-- - */ -#define HC_HTXnTBLAsat_MASK 0x00800000 -#define HC_HTXnTBLAMB_MASK 0x00700000 -#define HC_HTXnTBLAa_MASK 0x0007c000 -#define HC_HTXnTBLAb_MASK 0x00000f80 -#define HC_HTXnTBLAc_MASK 0x0000001f -#define HC_HTXnTBLAMB_SHIFT 20 -#define HC_HTXnTBLAa_TOPA (HC_XTA_TOPA << 14) -#define HC_HTXnTBLAa_InvTOPA (HC_XTA_InvTOPA << 14) -#define HC_HTXnTBLAa_TOPAp5 (HC_XTA_TOPAp5 << 14) -#define HC_HTXnTBLAa_Adif (HC_XTA_Adif << 14) -#define HC_HTXnTBLAa_Fog (HC_XTA_Fog << 14) -#define HC_HTXnTBLAa_Acur (HC_XTA_Acur << 14) -#define HC_HTXnTBLAa_HTXnTBLRA (HC_XTA_HTXnTBLRA << 14) -#define HC_HTXnTBLAa_Atex (HC_XTA_Atex << 14) -#define HC_HTXnTBLAa_Atexnext (HC_XTA_Atexnext << 14) -#define HC_HTXnTBLAb_TOPA (HC_XTA_TOPA << 7) -#define HC_HTXnTBLAb_InvTOPA (HC_XTA_InvTOPA << 7) -#define HC_HTXnTBLAb_TOPAp5 (HC_XTA_TOPAp5 << 7) -#define HC_HTXnTBLAb_Adif (HC_XTA_Adif << 7) -#define HC_HTXnTBLAb_Fog (HC_XTA_Fog << 7) -#define HC_HTXnTBLAb_Acur (HC_XTA_Acur << 7) -#define HC_HTXnTBLAb_HTXnTBLRA (HC_XTA_HTXnTBLRA << 7) -#define HC_HTXnTBLAb_Atex (HC_XTA_Atex << 7) -#define HC_HTXnTBLAb_Atexnext (HC_XTA_Atexnext << 7) -#define HC_HTXnTBLAc_TOPA (HC_XTA_TOPA << 0) -#define HC_HTXnTBLAc_InvTOPA (HC_XTA_InvTOPA << 0) -#define HC_HTXnTBLAc_TOPAp5 (HC_XTA_TOPAp5 << 0) -#define HC_HTXnTBLAc_Adif (HC_XTA_Adif << 0) -#define HC_HTXnTBLAc_Fog (HC_XTA_Fog << 0) -#define HC_HTXnTBLAc_Acur (HC_XTA_Acur << 0) -#define HC_HTXnTBLAc_HTXnTBLRA (HC_XTA_HTXnTBLRA << 0) -#define HC_HTXnTBLAc_Atex (HC_XTA_Atex << 0) -#define HC_HTXnTBLAc_Atexnext (HC_XTA_Atexnext << 0) -/* HC_SubA_HTXnTBLRAa 0x0089 - */ -#define HC_HTXnTBLRAa_MASK 0x00ff0000 -#define HC_HTXnTBLRAb_MASK 0x0000ff00 -#define HC_HTXnTBLRAc_MASK 0x000000ff -#define HC_HTXnTBLRAa_SHIFT 16 -#define HC_HTXnTBLRAb_SHIFT 8 -#define HC_HTXnTBLRAc_SHIFT 0 -/* HC_SubA_HTXnTBLRFog 0x008a - */ -#define HC_HTXnTBLRFog_MASK 0x0000ff00 -#define HC_HTXnTBLRAbias_MASK 0x000000ff -#define HC_HTXnTBLRFog_SHIFT 8 -#define HC_HTXnTBLRAbias_SHIFT 0 -/* HC_SubA_HTXnLScale 0x0094 - */ -#define HC_HTXnLScale_MASK 0x0007fc00 -#define HC_HTXnLOff_MASK 0x000001ff -#define HC_HTXnLScale_SHIFT 10 -/* HC_SubA_HTXSMD 0x0000 - */ -#define HC_HTXSMD_MASK 0x00000080 -#define HC_HTXTMD_MASK 0x00000040 -#define HC_HTXNum_MASK 0x00000038 -#define HC_HTXTRMD_MASK 0x00000006 -#define HC_HTXCHCLR_MASK 0x00000001 -#define HC_HTXNum_SHIFT 3 - -/* Texture Palette n - */ -#define HC_SubType_TexPalette0 0x00000000 -#define HC_SubType_TexPalette1 0x00000001 -#define HC_SubType_FogTable 0x00000010 -#define HC_SubType_Stipple 0x00000014 -/* HC_SubA_TexPalette0 0x0000 - */ -#define HC_HTPnA_MASK 0xff000000 -#define HC_HTPnR_MASK 0x00ff0000 -#define HC_HTPnG_MASK 0x0000ff00 -#define HC_HTPnB_MASK 0x000000ff -/* HC_SubA_FogTable 0x0010 - */ -#define HC_HFPn3_MASK 0xff000000 -#define HC_HFPn2_MASK 0x00ff0000 -#define HC_HFPn1_MASK 0x0000ff00 -#define HC_HFPn_MASK 0x000000ff -#define HC_HFPn3_SHIFT 24 -#define HC_HFPn2_SHIFT 16 -#define HC_HFPn1_SHIFT 8 - -/* Auto Testing & Security - */ -#define HC_SubA_HenFIFOAT 0x0000 -#define HC_SubA_HFBDrawFirst 0x0004 -#define HC_SubA_HFBBasL 0x0005 -#define HC_SubA_HFBDst 0x0006 -/* HC_SubA_HenFIFOAT 0x0000 - */ -#define HC_HenFIFOAT_MASK 0x00000020 -#define HC_HenGEMILock_MASK 0x00000010 -#define HC_HenFBASwap_MASK 0x00000008 -#define HC_HenOT_MASK 0x00000004 -#define HC_HenCMDQ_MASK 0x00000002 -#define HC_HenTXCTSU_MASK 0x00000001 -/* HC_SubA_HFBDrawFirst 0x0004 - */ -#define HC_HFBDrawFirst_MASK 0x00000800 -#define HC_HFBQueue_MASK 0x00000400 -#define HC_HFBLock_MASK 0x00000200 -#define HC_HEOF_MASK 0x00000100 -#define HC_HFBBasH_MASK 0x000000ff - -/* GEMI Setting - */ -#define HC_SubA_HTArbRCM 0x0008 -#define HC_SubA_HTArbRZ 0x000a -#define HC_SubA_HTArbWZ 0x000b -#define HC_SubA_HTArbRTX 0x000c -#define HC_SubA_HTArbRCW 0x000d -#define HC_SubA_HTArbE2 0x000e -#define HC_SubA_HArbRQCM 0x0010 -#define HC_SubA_HArbWQCM 0x0011 -#define HC_SubA_HGEMITout 0x0020 -#define HC_SubA_HFthRTXD 0x0040 -#define HC_SubA_HFthRTXA 0x0044 -#define HC_SubA_HCMDQstL 0x0050 -#define HC_SubA_HCMDQendL 0x0051 -#define HC_SubA_HCMDQLen 0x0052 -/* HC_SubA_HTArbRCM 0x0008 - */ -#define HC_HTArbRCM_MASK 0x0000ffff -/* HC_SubA_HTArbRZ 0x000a - */ -#define HC_HTArbRZ_MASK 0x0000ffff -/* HC_SubA_HTArbWZ 0x000b - */ -#define HC_HTArbWZ_MASK 0x0000ffff -/* HC_SubA_HTArbRTX 0x000c - */ -#define HC_HTArbRTX_MASK 0x0000ffff -/* HC_SubA_HTArbRCW 0x000d - */ -#define HC_HTArbRCW_MASK 0x0000ffff -/* HC_SubA_HTArbE2 0x000e - */ -#define HC_HTArbE2_MASK 0x0000ffff -/* HC_SubA_HArbRQCM 0x0010 - */ -#define HC_HTArbRQCM_MASK 0x0000ffff -/* HC_SubA_HArbWQCM 0x0011 - */ -#define HC_HArbWQCM_MASK 0x0000ffff -/* HC_SubA_HGEMITout 0x0020 - */ -#define HC_HGEMITout_MASK 0x000f0000 -#define HC_HNPArbZC_MASK 0x0000ffff -#define HC_HGEMITout_SHIFT 16 -/* HC_SubA_HFthRTXD 0x0040 - */ -#define HC_HFthRTXD_MASK 0x00ff0000 -#define HC_HFthRZD_MASK 0x0000ff00 -#define HC_HFthWZD_MASK 0x000000ff -#define HC_HFthRTXD_SHIFT 16 -#define HC_HFthRZD_SHIFT 8 -/* HC_SubA_HFthRTXA 0x0044 - */ -#define HC_HFthRTXA_MASK 0x000000ff - -/****************************************************************************** -** Define the Halcyon Internal register access constants. For simulator only. -******************************************************************************/ -#define HC_SIMA_HAGPBstL 0x0000 -#define HC_SIMA_HAGPBendL 0x0001 -#define HC_SIMA_HAGPCMNT 0x0002 -#define HC_SIMA_HAGPBpL 0x0003 -#define HC_SIMA_HAGPBpH 0x0004 -#define HC_SIMA_HClipTB 0x0005 -#define HC_SIMA_HClipLR 0x0006 -#define HC_SIMA_HFPClipTL 0x0007 -#define HC_SIMA_HFPClipBL 0x0008 -#define HC_SIMA_HFPClipLL 0x0009 -#define HC_SIMA_HFPClipRL 0x000a -#define HC_SIMA_HFPClipTBH 0x000b -#define HC_SIMA_HFPClipLRH 0x000c -#define HC_SIMA_HLP 0x000d -#define HC_SIMA_HLPRF 0x000e -#define HC_SIMA_HSolidCL 0x000f -#define HC_SIMA_HPixGC 0x0010 -#define HC_SIMA_HSPXYOS 0x0011 -#define HC_SIMA_HCmdA 0x0012 -#define HC_SIMA_HCmdB 0x0013 -#define HC_SIMA_HEnable 0x0014 -#define HC_SIMA_HZWBBasL 0x0015 -#define HC_SIMA_HZWBBasH 0x0016 -#define HC_SIMA_HZWBType 0x0017 -#define HC_SIMA_HZBiasL 0x0018 -#define HC_SIMA_HZWBend 0x0019 -#define HC_SIMA_HZWTMD 0x001a -#define HC_SIMA_HZWCDL 0x001b -#define HC_SIMA_HZWCTAGnum 0x001c -#define HC_SIMA_HZCYNum 0x001d -#define HC_SIMA_HZWCFire 0x001e -/* #define HC_SIMA_HSBBasL 0x001d */ -/* #define HC_SIMA_HSBBasH 0x001e */ -/* #define HC_SIMA_HSBFM 0x001f */ -#define HC_SIMA_HSTREF 0x0020 -#define HC_SIMA_HSTMD 0x0021 -#define HC_SIMA_HABBasL 0x0022 -#define HC_SIMA_HABBasH 0x0023 -#define HC_SIMA_HABFM 0x0024 -#define HC_SIMA_HATMD 0x0025 -#define HC_SIMA_HABLCsat 0x0026 -#define HC_SIMA_HABLCop 0x0027 -#define HC_SIMA_HABLAsat 0x0028 -#define HC_SIMA_HABLAop 0x0029 -#define HC_SIMA_HABLRCa 0x002a -#define HC_SIMA_HABLRFCa 0x002b -#define HC_SIMA_HABLRCbias 0x002c -#define HC_SIMA_HABLRCb 0x002d -#define HC_SIMA_HABLRFCb 0x002e -#define HC_SIMA_HABLRAa 0x002f -#define HC_SIMA_HABLRAb 0x0030 -#define HC_SIMA_HDBBasL 0x0031 -#define HC_SIMA_HDBBasH 0x0032 -#define HC_SIMA_HDBFM 0x0033 -#define HC_SIMA_HFBBMSKL 0x0034 -#define HC_SIMA_HROP 0x0035 -#define HC_SIMA_HFogLF 0x0036 -#define HC_SIMA_HFogCL 0x0037 -#define HC_SIMA_HFogCH 0x0038 -#define HC_SIMA_HFogStL 0x0039 -#define HC_SIMA_HFogStH 0x003a -#define HC_SIMA_HFogOOdMF 0x003b -#define HC_SIMA_HFogOOdEF 0x003c -#define HC_SIMA_HFogEndL 0x003d -#define HC_SIMA_HFogDenst 0x003e -/*---- start of texture 0 setting ---- - */ -#define HC_SIMA_HTX0L0BasL 0x0040 -#define HC_SIMA_HTX0L1BasL 0x0041 -#define HC_SIMA_HTX0L2BasL 0x0042 -#define HC_SIMA_HTX0L3BasL 0x0043 -#define HC_SIMA_HTX0L4BasL 0x0044 -#define HC_SIMA_HTX0L5BasL 0x0045 -#define HC_SIMA_HTX0L6BasL 0x0046 -#define HC_SIMA_HTX0L7BasL 0x0047 -#define HC_SIMA_HTX0L8BasL 0x0048 -#define HC_SIMA_HTX0L9BasL 0x0049 -#define HC_SIMA_HTX0LaBasL 0x004a -#define HC_SIMA_HTX0LbBasL 0x004b -#define HC_SIMA_HTX0LcBasL 0x004c -#define HC_SIMA_HTX0LdBasL 0x004d -#define HC_SIMA_HTX0LeBasL 0x004e -#define HC_SIMA_HTX0LfBasL 0x004f -#define HC_SIMA_HTX0L10BasL 0x0050 -#define HC_SIMA_HTX0L11BasL 0x0051 -#define HC_SIMA_HTX0L012BasH 0x0052 -#define HC_SIMA_HTX0L345BasH 0x0053 -#define HC_SIMA_HTX0L678BasH 0x0054 -#define HC_SIMA_HTX0L9abBasH 0x0055 -#define HC_SIMA_HTX0LcdeBasH 0x0056 -#define HC_SIMA_HTX0Lf1011BasH 0x0057 -#define HC_SIMA_HTX0L0Pit 0x0058 -#define HC_SIMA_HTX0L1Pit 0x0059 -#define HC_SIMA_HTX0L2Pit 0x005a -#define HC_SIMA_HTX0L3Pit 0x005b -#define HC_SIMA_HTX0L4Pit 0x005c -#define HC_SIMA_HTX0L5Pit 0x005d -#define HC_SIMA_HTX0L6Pit 0x005e -#define HC_SIMA_HTX0L7Pit 0x005f -#define HC_SIMA_HTX0L8Pit 0x0060 -#define HC_SIMA_HTX0L9Pit 0x0061 -#define HC_SIMA_HTX0LaPit 0x0062 -#define HC_SIMA_HTX0LbPit 0x0063 -#define HC_SIMA_HTX0LcPit 0x0064 -#define HC_SIMA_HTX0LdPit 0x0065 -#define HC_SIMA_HTX0LePit 0x0066 -#define HC_SIMA_HTX0LfPit 0x0067 -#define HC_SIMA_HTX0L10Pit 0x0068 -#define HC_SIMA_HTX0L11Pit 0x0069 -#define HC_SIMA_HTX0L0_5WE 0x006a -#define HC_SIMA_HTX0L6_bWE 0x006b -#define HC_SIMA_HTX0Lc_11WE 0x006c -#define HC_SIMA_HTX0L0_5HE 0x006d -#define HC_SIMA_HTX0L6_bHE 0x006e -#define HC_SIMA_HTX0Lc_11HE 0x006f -#define HC_SIMA_HTX0L0OS 0x0070 -#define HC_SIMA_HTX0TB 0x0071 -#define HC_SIMA_HTX0MPMD 0x0072 -#define HC_SIMA_HTX0CLODu 0x0073 -#define HC_SIMA_HTX0FM 0x0074 -#define HC_SIMA_HTX0TRCH 0x0075 -#define HC_SIMA_HTX0TRCL 0x0076 -#define HC_SIMA_HTX0TBC 0x0077 -#define HC_SIMA_HTX0TRAH 0x0078 -#define HC_SIMA_HTX0TBLCsat 0x0079 -#define HC_SIMA_HTX0TBLCop 0x007a -#define HC_SIMA_HTX0TBLMPfog 0x007b -#define HC_SIMA_HTX0TBLAsat 0x007c -#define HC_SIMA_HTX0TBLRCa 0x007d -#define HC_SIMA_HTX0TBLRCb 0x007e -#define HC_SIMA_HTX0TBLRCc 0x007f -#define HC_SIMA_HTX0TBLRCbias 0x0080 -#define HC_SIMA_HTX0TBLRAa 0x0081 -#define HC_SIMA_HTX0TBLRFog 0x0082 -#define HC_SIMA_HTX0BumpM00 0x0083 -#define HC_SIMA_HTX0BumpM01 0x0084 -#define HC_SIMA_HTX0BumpM10 0x0085 -#define HC_SIMA_HTX0BumpM11 0x0086 -#define HC_SIMA_HTX0LScale 0x0087 -/*---- end of texture 0 setting ---- 0x008f - */ -#define HC_SIMA_TX0TX1_OFF 0x0050 -/*---- start of texture 1 setting ---- - */ -#define HC_SIMA_HTX1L0BasL (HC_SIMA_HTX0L0BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L1BasL (HC_SIMA_HTX0L1BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L2BasL (HC_SIMA_HTX0L2BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L3BasL (HC_SIMA_HTX0L3BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L4BasL (HC_SIMA_HTX0L4BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L5BasL (HC_SIMA_HTX0L5BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L6BasL (HC_SIMA_HTX0L6BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L7BasL (HC_SIMA_HTX0L7BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L8BasL (HC_SIMA_HTX0L8BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L9BasL (HC_SIMA_HTX0L9BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LaBasL (HC_SIMA_HTX0LaBasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LbBasL (HC_SIMA_HTX0LbBasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LcBasL (HC_SIMA_HTX0LcBasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LdBasL (HC_SIMA_HTX0LdBasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LeBasL (HC_SIMA_HTX0LeBasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LfBasL (HC_SIMA_HTX0LfBasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L10BasL (HC_SIMA_HTX0L10BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L11BasL (HC_SIMA_HTX0L11BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L012BasH (HC_SIMA_HTX0L012BasH + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L345BasH (HC_SIMA_HTX0L345BasH + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L678BasH (HC_SIMA_HTX0L678BasH + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L9abBasH (HC_SIMA_HTX0L9abBasH + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LcdeBasH (HC_SIMA_HTX0LcdeBasH + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1Lf1011BasH (HC_SIMA_HTX0Lf1011BasH + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L0Pit (HC_SIMA_HTX0L0Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L1Pit (HC_SIMA_HTX0L1Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L2Pit (HC_SIMA_HTX0L2Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L3Pit (HC_SIMA_HTX0L3Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L4Pit (HC_SIMA_HTX0L4Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L5Pit (HC_SIMA_HTX0L5Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L6Pit (HC_SIMA_HTX0L6Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L7Pit (HC_SIMA_HTX0L7Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L8Pit (HC_SIMA_HTX0L8Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L9Pit (HC_SIMA_HTX0L9Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LaPit (HC_SIMA_HTX0LaPit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LbPit (HC_SIMA_HTX0LbPit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LcPit (HC_SIMA_HTX0LcPit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LdPit (HC_SIMA_HTX0LdPit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LePit (HC_SIMA_HTX0LePit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LfPit (HC_SIMA_HTX0LfPit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L10Pit (HC_SIMA_HTX0L10Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L11Pit (HC_SIMA_HTX0L11Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L0_5WE (HC_SIMA_HTX0L0_5WE + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L6_bWE (HC_SIMA_HTX0L6_bWE + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1Lc_11WE (HC_SIMA_HTX0Lc_11WE + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L0_5HE (HC_SIMA_HTX0L0_5HE + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L6_bHE (HC_SIMA_HTX0L6_bHE + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1Lc_11HE (HC_SIMA_HTX0Lc_11HE + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L0OS (HC_SIMA_HTX0L0OS + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TB (HC_SIMA_HTX0TB + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1MPMD (HC_SIMA_HTX0MPMD + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1CLODu (HC_SIMA_HTX0CLODu + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1FM (HC_SIMA_HTX0FM + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TRCH (HC_SIMA_HTX0TRCH + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TRCL (HC_SIMA_HTX0TRCL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBC (HC_SIMA_HTX0TBC + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TRAH (HC_SIMA_HTX0TRAH + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LTC (HC_SIMA_HTX0LTC + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LTA (HC_SIMA_HTX0LTA + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLCsat (HC_SIMA_HTX0TBLCsat + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLCop (HC_SIMA_HTX0TBLCop + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLMPfog (HC_SIMA_HTX0TBLMPfog + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLAsat (HC_SIMA_HTX0TBLAsat + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLRCa (HC_SIMA_HTX0TBLRCa + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLRCb (HC_SIMA_HTX0TBLRCb + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLRCc (HC_SIMA_HTX0TBLRCc + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLRCbias (HC_SIMA_HTX0TBLRCbias + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLRAa (HC_SIMA_HTX0TBLRAa + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLRFog (HC_SIMA_HTX0TBLRFog + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1BumpM00 (HC_SIMA_HTX0BumpM00 + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1BumpM01 (HC_SIMA_HTX0BumpM01 + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1BumpM10 (HC_SIMA_HTX0BumpM10 + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1BumpM11 (HC_SIMA_HTX0BumpM11 + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LScale (HC_SIMA_HTX0LScale + HC_SIMA_TX0TX1_OFF) -/*---- end of texture 1 setting ---- 0xaf - */ -#define HC_SIMA_HTXSMD 0x00b0 -#define HC_SIMA_HenFIFOAT 0x00b1 -#define HC_SIMA_HFBDrawFirst 0x00b2 -#define HC_SIMA_HFBBasL 0x00b3 -#define HC_SIMA_HTArbRCM 0x00b4 -#define HC_SIMA_HTArbRZ 0x00b5 -#define HC_SIMA_HTArbWZ 0x00b6 -#define HC_SIMA_HTArbRTX 0x00b7 -#define HC_SIMA_HTArbRCW 0x00b8 -#define HC_SIMA_HTArbE2 0x00b9 -#define HC_SIMA_HGEMITout 0x00ba -#define HC_SIMA_HFthRTXD 0x00bb -#define HC_SIMA_HFthRTXA 0x00bc -/* Define the texture palette 0 - */ -#define HC_SIMA_HTP0 0x0100 -#define HC_SIMA_HTP1 0x0200 -#define HC_SIMA_FOGTABLE 0x0300 -#define HC_SIMA_STIPPLE 0x0400 -#define HC_SIMA_HE3Fire 0x0440 -#define HC_SIMA_TRANS_SET 0x0441 -#define HC_SIMA_HREngSt 0x0442 -#define HC_SIMA_HRFIFOempty 0x0443 -#define HC_SIMA_HRFIFOfull 0x0444 -#define HC_SIMA_HRErr 0x0445 -#define HC_SIMA_FIFOstatus 0x0446 - -/****************************************************************************** -** Define the AGP command header. -******************************************************************************/ -#define HC_ACMD_MASK 0xfe000000 -#define HC_ACMD_SUB_MASK 0x0c000000 -#define HC_ACMD_HCmdA 0xee000000 -#define HC_ACMD_HCmdB 0xec000000 -#define HC_ACMD_HCmdC 0xea000000 -#define HC_ACMD_H1 0xf0000000 -#define HC_ACMD_H2 0xf2000000 -#define HC_ACMD_H3 0xf4000000 -#define HC_ACMD_H4 0xf6000000 - -#define HC_ACMD_H1IO_MASK 0x000001ff -#define HC_ACMD_H2IO1_MASK 0x001ff000 -#define HC_ACMD_H2IO2_MASK 0x000001ff -#define HC_ACMD_H2IO1_SHIFT 12 -#define HC_ACMD_H2IO2_SHIFT 0 -#define HC_ACMD_H3IO_MASK 0x000001ff -#define HC_ACMD_H3COUNT_MASK 0x01fff000 -#define HC_ACMD_H3COUNT_SHIFT 12 -#define HC_ACMD_H4ID_MASK 0x000001ff -#define HC_ACMD_H4COUNT_MASK 0x01fffe00 -#define HC_ACMD_H4COUNT_SHIFT 9 - -/******************************************************************************** -** Define Header -********************************************************************************/ -#define HC_HEADER2 0xF210F110 - -/******************************************************************************** -** Define Dummy Value -********************************************************************************/ -#define HC_DUMMY 0xCCCCCCCC -/******************************************************************************** -** Define for DMA use -********************************************************************************/ -#define HALCYON_HEADER2 0XF210F110 -#define HALCYON_FIRECMD 0XEE100000 -#define HALCYON_FIREMASK 0XFFF00000 -#define HALCYON_CMDB 0XEC000000 -#define HALCYON_CMDBMASK 0XFFFE0000 -#define HALCYON_SUB_ADDR0 0X00000000 -#define HALCYON_HEADER1MASK 0XFFFFFC00 -#define HALCYON_HEADER1 0XF0000000 -#define HC_SubA_HAGPBstL 0x0060 -#define HC_SubA_HAGPBendL 0x0061 -#define HC_SubA_HAGPCMNT 0x0062 -#define HC_SubA_HAGPBpL 0x0063 -#define HC_SubA_HAGPBpH 0x0064 -#define HC_HAGPCMNT_MASK 0x00800000 -#define HC_HCmdErrClr_MASK 0x00400000 -#define HC_HAGPBendH_MASK 0x0000ff00 -#define HC_HAGPBstH_MASK 0x000000ff -#define HC_HAGPBendH_SHIFT 8 -#define HC_HAGPBstH_SHIFT 0 -#define HC_HAGPBpL_MASK 0x00fffffc -#define HC_HAGPBpID_MASK 0x00000003 -#define HC_HAGPBpID_PAUSE 0x00000000 -#define HC_HAGPBpID_JUMP 0x00000001 -#define HC_HAGPBpID_STOP 0x00000002 -#define HC_HAGPBpH_MASK 0x00ffffff - - -#define VIA_VIDEO_HEADER5 0xFE040000 -#define VIA_VIDEO_HEADER6 0xFE050000 -#define VIA_VIDEO_HEADER7 0xFE060000 -#define VIA_VIDEOMASK 0xFFFF0000 -#endif diff --git a/shared/via_dma.c b/shared/via_dma.c deleted file mode 100644 index 672552e41..000000000 --- a/shared/via_dma.c +++ /dev/null @@ -1,742 +0,0 @@ -/* via_dma.c -- DMA support for the VIA Unichrome/Pro - * - * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - * Copyright 2004 Digeo, Inc., Palo Alto, CA, U.S.A. - * All Rights Reserved. - * - * Copyright 2004 The Unichrome project. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Tungsten Graphics, - * Erdi Chen, - * Thomas Hellstrom. - */ - -#include "via.h" -#include "drmP.h" -#include "drm.h" -#include "via_drm.h" -#include "via_drv.h" -#include "via_3d_reg.h" - -#define CMDBUF_ALIGNMENT_SIZE (0x100) -#define CMDBUF_ALIGNMENT_MASK (0x0ff) - -/* defines for VIA 3D registers */ -#define VIA_REG_STATUS 0x400 -#define VIA_REG_TRANSET 0x43C -#define VIA_REG_TRANSPACE 0x440 - -/* VIA_REG_STATUS(0x400): Engine Status */ -#define VIA_CMD_RGTR_BUSY 0x00000080 /* Command Regulator is busy */ -#define VIA_2D_ENG_BUSY 0x00000001 /* 2D Engine is busy */ -#define VIA_3D_ENG_BUSY 0x00000002 /* 3D Engine is busy */ -#define VIA_VR_QUEUE_BUSY 0x00020000 /* Virtual Queue is busy */ - -#define SetReg2DAGP(nReg, nData) { \ - *((uint32_t *)(vb)) = ((nReg) >> 2) | HALCYON_HEADER1; \ - *((uint32_t *)(vb) + 1) = (nData); \ - vb = ((uint32_t *)vb) + 2; \ - dev_priv->dma_low +=8; \ -} - -#define via_flush_write_combine() DRM_MEMORYBARRIER() - -#define VIA_OUT_RING_QW(w1,w2) \ - *vb++ = (w1); \ - *vb++ = (w2); \ - dev_priv->dma_low += 8; - -static void via_cmdbuf_start(drm_via_private_t * dev_priv); -static void via_cmdbuf_pause(drm_via_private_t * dev_priv); -static void via_cmdbuf_reset(drm_via_private_t * dev_priv); -static void via_cmdbuf_rewind(drm_via_private_t * dev_priv); -static int via_wait_idle(drm_via_private_t * dev_priv); -static void via_pad_cache(drm_via_private_t *dev_priv, int qwords); - - -/* - * Free space in command buffer. - */ - -static uint32_t -via_cmdbuf_space(drm_via_private_t *dev_priv) -{ - uint32_t agp_base = dev_priv->dma_offset + - (uint32_t) dev_priv->agpAddr; - uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; - - return ((hw_addr <= dev_priv->dma_low) ? - (dev_priv->dma_high + hw_addr - dev_priv->dma_low) : - (hw_addr - dev_priv->dma_low)); -} - -/* - * How much does the command regulator lag behind? - */ - -static uint32_t -via_cmdbuf_lag(drm_via_private_t *dev_priv) -{ - uint32_t agp_base = dev_priv->dma_offset + - (uint32_t) dev_priv->agpAddr; - uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; - - return ((hw_addr <= dev_priv->dma_low) ? - (dev_priv->dma_low - hw_addr) : - (dev_priv->dma_wrap + dev_priv->dma_low - hw_addr)); -} - -/* - * Check that the given size fits in the buffer, otherwise wait. - */ - -static inline int -via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size) -{ - uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; - uint32_t cur_addr, hw_addr, next_addr; - volatile uint32_t *hw_addr_ptr; - uint32_t count; - hw_addr_ptr = dev_priv->hw_addr_ptr; - cur_addr = dev_priv->dma_low; - next_addr = cur_addr + size + 512*1024; - count = 1000000; - do { - hw_addr = *hw_addr_ptr - agp_base; - if (count-- == 0) { - DRM_ERROR("via_cmdbuf_wait timed out hw %x cur_addr %x next_addr %x\n", - hw_addr, cur_addr, next_addr); - return -1; - } - } while ((cur_addr < hw_addr) && (next_addr >= hw_addr)); - return 0; -} - - -/* - * Checks whether buffer head has reach the end. Rewind the ring buffer - * when necessary. - * - * Returns virtual pointer to ring buffer. - */ - -static inline uint32_t *via_check_dma(drm_via_private_t * dev_priv, - unsigned int size) -{ - if ((dev_priv->dma_low + size + 4*CMDBUF_ALIGNMENT_SIZE) > dev_priv->dma_high) { - via_cmdbuf_rewind(dev_priv); - } - if (via_cmdbuf_wait(dev_priv, size) != 0) { - return NULL; - } - - return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low); -} - -int via_dma_cleanup(drm_device_t * dev) -{ - if (dev->dev_private) { - drm_via_private_t *dev_priv = - (drm_via_private_t *) dev->dev_private; - - if (dev_priv->ring.virtual_start) { - via_cmdbuf_reset(dev_priv); - - drm_core_ioremapfree(&dev_priv->ring.map, dev); - dev_priv->ring.virtual_start = NULL; - } - - } - - return 0; -} - -static int via_initialize(drm_device_t * dev, - drm_via_private_t * dev_priv, - drm_via_dma_init_t * init) -{ - if (!dev_priv || !dev_priv->mmio) { - DRM_ERROR("via_dma_init called before via_map_init\n"); - return DRM_ERR(EFAULT); - } - - if (dev_priv->ring.virtual_start != NULL) { - DRM_ERROR("%s called again without calling cleanup\n", - __FUNCTION__); - return DRM_ERR(EFAULT); - } - - if (!dev->agp || !dev->agp->base) { - DRM_ERROR("%s called with no agp memory available\n", - __FUNCTION__); - return DRM_ERR(EFAULT); - } - - dev_priv->ring.map.offset = dev->agp->base + init->offset; - dev_priv->ring.map.size = init->size; - dev_priv->ring.map.type = 0; - dev_priv->ring.map.flags = 0; - dev_priv->ring.map.mtrr = 0; - - drm_core_ioremap(&dev_priv->ring.map, dev); - - if (dev_priv->ring.map.handle == NULL) { - via_dma_cleanup(dev); - DRM_ERROR("can not ioremap virtual address for" - " ring buffer\n"); - return DRM_ERR(ENOMEM); - } - - dev_priv->ring.virtual_start = dev_priv->ring.map.handle; - - dev_priv->dma_ptr = dev_priv->ring.virtual_start; - dev_priv->dma_low = 0; - dev_priv->dma_high = init->size; - dev_priv->dma_wrap = init->size; - dev_priv->dma_offset = init->offset; - dev_priv->last_pause_ptr = NULL; - dev_priv->hw_addr_ptr = dev_priv->mmio->handle + init->reg_pause_addr; - - via_cmdbuf_start(dev_priv); - - return 0; -} - -int via_dma_init(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - drm_via_dma_init_t init; - int retcode = 0; - - DRM_COPY_FROM_USER_IOCTL(init, (drm_via_dma_init_t *) data, - sizeof(init)); - - switch (init.func) { - case VIA_INIT_DMA: - if (!capable(CAP_SYS_ADMIN)) - retcode = DRM_ERR(EPERM); - else - retcode = via_initialize(dev, dev_priv, &init); - break; - case VIA_CLEANUP_DMA: - if (!capable(CAP_SYS_ADMIN)) - retcode = DRM_ERR(EPERM); - else - retcode = via_dma_cleanup(dev); - break; - case VIA_DMA_INITIALIZED: - retcode = (dev_priv->ring.virtual_start != NULL) ? - 0: DRM_ERR( EFAULT ); - break; - default: - retcode = DRM_ERR(EINVAL); - break; - } - - return retcode; -} - - - -static int via_dispatch_cmdbuffer(drm_device_t * dev, drm_via_cmdbuffer_t * cmd) -{ - drm_via_private_t *dev_priv; - uint32_t *vb; - int ret; - - dev_priv = (drm_via_private_t *) dev->dev_private; - - if (dev_priv->ring.virtual_start == NULL) { - DRM_ERROR("%s called without initializing AGP ring buffer.\n", - __FUNCTION__); - return DRM_ERR(EFAULT); - } - - if (cmd->size > VIA_PCI_BUF_SIZE) { - return DRM_ERR(ENOMEM); - } - - - if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size)) - return DRM_ERR(EFAULT); - - /* - * Running this function on AGP memory is dead slow. Therefore - * we run it on a temporary cacheable system memory buffer and - * copy it to AGP memory when ready. - */ - - - if ((ret = via_verify_command_stream((uint32_t *)dev_priv->pci_buf, cmd->size, dev, 1))) { - return ret; - } - - - vb = via_check_dma(dev_priv, (cmd->size < 0x100) ? 0x102 : cmd->size); - if (vb == NULL) { - return DRM_ERR(EAGAIN); - } - - memcpy(vb, dev_priv->pci_buf, cmd->size); - - dev_priv->dma_low += cmd->size; - - /* - * Small submissions somehow stalls the CPU. (AGP cache effects?) - * pad to greater size. - */ - - if (cmd->size < 0x100) - via_pad_cache(dev_priv,(0x100 - cmd->size) >> 3); - via_cmdbuf_pause(dev_priv); - - return 0; -} - -int via_driver_dma_quiescent(drm_device_t * dev) -{ - drm_via_private_t *dev_priv = dev->dev_private; - - if (!via_wait_idle(dev_priv)) { - return DRM_ERR(EBUSY); - } - return 0; -} - -int via_flush_ioctl(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - return via_driver_dma_quiescent(dev); -} - -int via_cmdbuffer(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - drm_via_cmdbuffer_t cmdbuf; - int ret; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_via_cmdbuffer_t *) data, - sizeof(cmdbuf)); - - DRM_DEBUG("via cmdbuffer, buf %p size %lu\n", cmdbuf.buf, cmdbuf.size); - - ret = via_dispatch_cmdbuffer(dev, &cmdbuf); - if (ret) { - return ret; - } - - return 0; -} - -extern int -via_parse_command_stream(drm_device_t *dev, const uint32_t * buf, unsigned int size); -static int via_dispatch_pci_cmdbuffer(drm_device_t * dev, - drm_via_cmdbuffer_t * cmd) -{ - drm_via_private_t *dev_priv = dev->dev_private; - int ret; - - if (cmd->size > VIA_PCI_BUF_SIZE) { - return DRM_ERR(ENOMEM); - } - if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size)) - return DRM_ERR(EFAULT); - - if ((ret = via_verify_command_stream((uint32_t *)dev_priv->pci_buf, cmd->size, dev, 0))) { - return ret; - } - - ret = via_parse_command_stream(dev, (const uint32_t *)dev_priv->pci_buf, cmd->size); - return ret; -} - -int via_pci_cmdbuffer(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - drm_via_cmdbuffer_t cmdbuf; - int ret; - - LOCK_TEST_WITH_RETURN( dev, filp ); - - DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_via_cmdbuffer_t *) data, - sizeof(cmdbuf)); - - DRM_DEBUG("via_pci_cmdbuffer, buf %p size %lu\n", cmdbuf.buf, - cmdbuf.size); - - ret = via_dispatch_pci_cmdbuffer(dev, &cmdbuf); - if (ret) { - return ret; - } - - return 0; -} - - -static inline uint32_t *via_align_buffer(drm_via_private_t * dev_priv, - uint32_t * vb, int qw_count) -{ - for (; qw_count > 0; --qw_count) { - VIA_OUT_RING_QW(HC_DUMMY, HC_DUMMY); - } - return vb; -} - - -/* - * This function is used internally by ring buffer mangement code. - * - * Returns virtual pointer to ring buffer. - */ -static inline uint32_t *via_get_dma(drm_via_private_t * dev_priv) -{ - return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low); -} - -/* - * Hooks a segment of data into the tail of the ring-buffer by - * modifying the pause address stored in the buffer itself. If - * the regulator has already paused, restart it. - */ -static int via_hook_segment(drm_via_private_t *dev_priv, - uint32_t pause_addr_hi, uint32_t pause_addr_lo, - int no_pci_fire) -{ - int paused, count; - volatile uint32_t *paused_at = dev_priv->last_pause_ptr; - - via_flush_write_combine(); - while(! *(via_get_dma(dev_priv)-1)); - *dev_priv->last_pause_ptr = pause_addr_lo; - via_flush_write_combine(); - - /* - * The below statement is inserted to really force the flush. - * Not sure it is needed. - */ - - while(! *dev_priv->last_pause_ptr); - dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1; - while(! *dev_priv->last_pause_ptr); - - - paused = 0; - count = 20; - - while (!(paused = (VIA_READ(0x41c) & 0x80000000)) && count--); - if ((count <= 8) && (count >= 0)) { - uint32_t rgtr, ptr; - rgtr = *(dev_priv->hw_addr_ptr); - ptr = ((char *)dev_priv->last_pause_ptr - dev_priv->dma_ptr) + - dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4 - - CMDBUF_ALIGNMENT_SIZE; - if (rgtr <= ptr) { - DRM_ERROR("Command regulator\npaused at count %d, address %x, " - "while current pause address is %x.\n" - "Please mail this message to " - "<unichrome-devel@lists.sourceforge.net>\n", - count, rgtr, ptr); - } - } - - if (paused && !no_pci_fire) { - uint32_t rgtr,ptr; - uint32_t ptr_low; - - count = 1000000; - while ((VIA_READ(VIA_REG_STATUS) & VIA_CMD_RGTR_BUSY) && count--); - - rgtr = *(dev_priv->hw_addr_ptr); - ptr = ((char *)paused_at - dev_priv->dma_ptr) + - dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4; - - - ptr_low = (ptr > 3*CMDBUF_ALIGNMENT_SIZE) ? - ptr - 3*CMDBUF_ALIGNMENT_SIZE : 0; - if (rgtr <= ptr && rgtr >= ptr_low) { - VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); - VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi); - VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo); - } - } - return paused; -} - - - -static int via_wait_idle(drm_via_private_t * dev_priv) -{ - int count = 10000000; - while (count-- && (VIA_READ(VIA_REG_STATUS) & - (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY | - VIA_3D_ENG_BUSY))) ; - return count; -} - -static uint32_t *via_align_cmd(drm_via_private_t * dev_priv, uint32_t cmd_type, - uint32_t addr, uint32_t *cmd_addr_hi, - uint32_t *cmd_addr_lo, - int skip_wait) -{ - uint32_t agp_base; - uint32_t cmd_addr, addr_lo, addr_hi; - uint32_t *vb; - uint32_t qw_pad_count; - - if (!skip_wait) - via_cmdbuf_wait(dev_priv, 2*CMDBUF_ALIGNMENT_SIZE); - - vb = via_get_dma(dev_priv); - VIA_OUT_RING_QW( HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) | - (VIA_REG_TRANSPACE >> 2), HC_ParaType_PreCR << 16); - agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; - qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) - - ((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3); - - - cmd_addr = (addr) ? addr : - agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3); - addr_lo = ((HC_SubA_HAGPBpL << 24) | (cmd_type & HC_HAGPBpID_MASK) | - (cmd_addr & HC_HAGPBpL_MASK)); - addr_hi = ((HC_SubA_HAGPBpH << 24) | (cmd_addr >> 24)); - - vb = via_align_buffer(dev_priv, vb, qw_pad_count - 1); - VIA_OUT_RING_QW(*cmd_addr_hi = addr_hi, - *cmd_addr_lo = addr_lo); - return vb; -} - - - - -static void via_cmdbuf_start(drm_via_private_t * dev_priv) -{ - uint32_t pause_addr_lo, pause_addr_hi; - uint32_t start_addr, start_addr_lo; - uint32_t end_addr, end_addr_lo; - uint32_t command; - uint32_t agp_base; - - - dev_priv->dma_low = 0; - - agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; - start_addr = agp_base; - end_addr = agp_base + dev_priv->dma_high; - - start_addr_lo = ((HC_SubA_HAGPBstL << 24) | (start_addr & 0xFFFFFF)); - end_addr_lo = ((HC_SubA_HAGPBendL << 24) | (end_addr & 0xFFFFFF)); - command = ((HC_SubA_HAGPCMNT << 24) | (start_addr >> 24) | - ((end_addr & 0xff000000) >> 16)); - - dev_priv->last_pause_ptr = - via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, - &pause_addr_hi, & pause_addr_lo, 1) - 1; - - via_flush_write_combine(); - while(! *dev_priv->last_pause_ptr); - - VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); - VIA_WRITE(VIA_REG_TRANSPACE, command); - VIA_WRITE(VIA_REG_TRANSPACE, start_addr_lo); - VIA_WRITE(VIA_REG_TRANSPACE, end_addr_lo); - - VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi); - VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo); - - VIA_WRITE(VIA_REG_TRANSPACE, command | HC_HAGPCMNT_MASK); -} - -static void via_pad_cache(drm_via_private_t *dev_priv, int qwords) -{ - uint32_t *vb; - - via_cmdbuf_wait(dev_priv, qwords + 2); - vb = via_get_dma(dev_priv); - VIA_OUT_RING_QW( HC_HEADER2, HC_ParaType_NotTex << 16); - via_align_buffer(dev_priv,vb,qwords); -} - -static inline void via_dummy_bitblt(drm_via_private_t * dev_priv) -{ - uint32_t *vb = via_get_dma(dev_priv); - SetReg2DAGP(0x0C, (0 | (0 << 16))); - SetReg2DAGP(0x10, 0 | (0 << 16)); - SetReg2DAGP(0x0, 0x1 | 0x2000 | 0xAA000000); -} - - -static void via_cmdbuf_jump(drm_via_private_t * dev_priv) -{ - uint32_t agp_base; - uint32_t pause_addr_lo, pause_addr_hi; - uint32_t jump_addr_lo, jump_addr_hi; - volatile uint32_t *last_pause_ptr; - uint32_t dma_low_save1, dma_low_save2; - - agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; - via_align_cmd(dev_priv, HC_HAGPBpID_JUMP, 0, &jump_addr_hi, - &jump_addr_lo, 0); - - dev_priv->dma_wrap = dev_priv->dma_low; - - - /* - * Wrap command buffer to the beginning. - */ - - dev_priv->dma_low = 0; - if (via_cmdbuf_wait(dev_priv, CMDBUF_ALIGNMENT_SIZE) != 0) { - DRM_ERROR("via_cmdbuf_jump failed\n"); - } - - via_dummy_bitblt(dev_priv); - via_dummy_bitblt(dev_priv); - - last_pause_ptr = via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, - &pause_addr_lo, 0) -1; - via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, - &pause_addr_lo, 0); - - *last_pause_ptr = pause_addr_lo; - dma_low_save1 = dev_priv->dma_low; - - /* - * Now, set a trap that will pause the regulator if it tries to rerun the old - * command buffer. (Which may happen if via_hook_segment detecs a command regulator pause - * and reissues the jump command over PCI, while the regulator has already taken the jump - * and actually paused at the current buffer end). - * There appears to be no other way to detect this condition, since the hw_addr_pointer - * does not seem to get updated immediately when a jump occurs. - */ - - last_pause_ptr = via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, - &pause_addr_lo, 0) -1; - via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, - &pause_addr_lo, 0); - *last_pause_ptr = pause_addr_lo; - - dma_low_save2 = dev_priv->dma_low; - dev_priv->dma_low = dma_low_save1; - via_hook_segment( dev_priv, jump_addr_hi, jump_addr_lo, 0); - dev_priv->dma_low = dma_low_save2; - via_hook_segment( dev_priv, pause_addr_hi, pause_addr_lo, 0); -} - - -static void via_cmdbuf_rewind(drm_via_private_t * dev_priv) -{ - via_cmdbuf_jump(dev_priv); -} - -static void via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type) -{ - uint32_t pause_addr_lo, pause_addr_hi; - - via_align_cmd(dev_priv, cmd_type, 0, &pause_addr_hi, &pause_addr_lo, 0); - via_hook_segment( dev_priv, pause_addr_hi, pause_addr_lo, 0); -} - - -static void via_cmdbuf_pause(drm_via_private_t * dev_priv) -{ - via_cmdbuf_flush(dev_priv, HC_HAGPBpID_PAUSE); -} - -static void via_cmdbuf_reset(drm_via_private_t * dev_priv) -{ - via_cmdbuf_flush(dev_priv, HC_HAGPBpID_STOP); - via_wait_idle(dev_priv); -} - -/* - * User interface to the space and lag functions. - */ - -int -via_cmdbuf_size(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - drm_via_cmdbuf_size_t d_siz; - int ret = 0; - uint32_t tmp_size, count; - drm_via_private_t *dev_priv; - - DRM_DEBUG("via cmdbuf_size\n"); - LOCK_TEST_WITH_RETURN( dev, filp ); - - dev_priv = (drm_via_private_t *) dev->dev_private; - - if (dev_priv->ring.virtual_start == NULL) { - DRM_ERROR("%s called without initializing AGP ring buffer.\n", - __FUNCTION__); - return DRM_ERR(EFAULT); - } - - DRM_COPY_FROM_USER_IOCTL(d_siz, (drm_via_cmdbuf_size_t *) data, - sizeof(d_siz)); - - - count = 1000000; - tmp_size = d_siz.size; - switch(d_siz.func) { - case VIA_CMDBUF_SPACE: - while (((tmp_size = via_cmdbuf_space(dev_priv)) < d_siz.size) && count--) { - if (!d_siz.wait) { - break; - } - } - if (!count) { - DRM_ERROR("VIA_CMDBUF_SPACE timed out.\n"); - ret = DRM_ERR(EAGAIN); - } - break; - case VIA_CMDBUF_LAG: - while (((tmp_size = via_cmdbuf_lag(dev_priv)) > d_siz.size) && count--) { - if (!d_siz.wait) { - break; - } - } - if (!count) { - DRM_ERROR("VIA_CMDBUF_LAG timed out.\n"); - ret = DRM_ERR(EAGAIN); - } - break; - default: - ret = DRM_ERR(EFAULT); - } - d_siz.size = tmp_size; - - DRM_COPY_TO_USER_IOCTL((drm_via_cmdbuf_size_t *) data, d_siz, - sizeof(d_siz)); - return ret; -} diff --git a/shared/via_drm.h b/shared/via_drm.h deleted file mode 100644 index 4588c9bd1..000000000 --- a/shared/via_drm.h +++ /dev/null @@ -1,243 +0,0 @@ -/* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ -#ifndef _VIA_DRM_H_ -#define _VIA_DRM_H_ - -/* WARNING: These defines must be the same as what the Xserver uses. - * if you change them, you must change the defines in the Xserver. - */ - -#ifndef _VIA_DEFINES_ -#define _VIA_DEFINES_ - -#ifndef __KERNEL__ -#include "via_drmclient.h" -#endif - -#define VIA_NR_SAREA_CLIPRECTS 8 -#define VIA_NR_XVMC_PORTS 10 -#define VIA_NR_XVMC_LOCKS 5 -#define VIA_MAX_CACHELINE_SIZE 64 -#define XVMCLOCKPTR(saPriv,lockNo) \ - ((volatile drm_hw_lock_t *)(((((unsigned long) (saPriv)->XvMCLockArea) + \ - (VIA_MAX_CACHELINE_SIZE - 1)) & \ - ~(VIA_MAX_CACHELINE_SIZE - 1)) + \ - VIA_MAX_CACHELINE_SIZE*(lockNo))) - -/* Each region is a minimum of 64k, and there are at most 64 of them. - */ -#define VIA_NR_TEX_REGIONS 64 -#define VIA_LOG_MIN_TEX_REGION_SIZE 16 -#endif - -#define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */ -#define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */ -#define VIA_UPLOAD_CTX 0x4 -#define VIA_UPLOAD_BUFFERS 0x8 -#define VIA_UPLOAD_TEX0 0x10 -#define VIA_UPLOAD_TEX1 0x20 -#define VIA_UPLOAD_CLIPRECTS 0x40 -#define VIA_UPLOAD_ALL 0xff - -/* VIA specific ioctls */ -#define DRM_VIA_ALLOCMEM 0x00 -#define DRM_VIA_FREEMEM 0x01 -#define DRM_VIA_AGP_INIT 0x02 -#define DRM_VIA_FB_INIT 0x03 -#define DRM_VIA_MAP_INIT 0x04 -#define DRM_VIA_DEC_FUTEX 0x05 -#define NOT_USED -#define DRM_VIA_DMA_INIT 0x07 -#define DRM_VIA_CMDBUFFER 0x08 -#define DRM_VIA_FLUSH 0x09 -#define DRM_VIA_PCICMD 0x0a -#define DRM_VIA_CMDBUF_SIZE 0x0b -#define NOT_USED -#define DRM_VIA_WAIT_IRQ 0x0d - -#define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t) -#define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t) -#define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t) -#define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t) -#define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t) -#define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t) -#define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t) -#define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t) -#define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH) -#define DRM_IOCTL_VIA_PCICMD DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t) -#define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, \ - drm_via_cmdbuf_size_t) -#define DRM_IOCTL_VIA_WAIT_IRQ DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t) - -/* Indices into buf.Setup where various bits of state are mirrored per - * context and per buffer. These can be fired at the card as a unit, - * or in a piecewise fashion as required. - */ - -#define VIA_TEX_SETUP_SIZE 8 - -/* Flags for clear ioctl - */ -#define VIA_FRONT 0x1 -#define VIA_BACK 0x2 -#define VIA_DEPTH 0x4 -#define VIA_STENCIL 0x8 -#define VIDEO 0 -#define AGP 1 -typedef struct { - uint32_t offset; - uint32_t size; -} drm_via_agp_t; - -typedef struct { - uint32_t offset; - uint32_t size; -} drm_via_fb_t; - -typedef struct { - uint32_t context; - uint32_t type; - uint32_t size; - unsigned long index; - unsigned long offset; -} drm_via_mem_t; - -typedef struct _drm_via_init { - enum { - VIA_INIT_MAP = 0x01, - VIA_CLEANUP_MAP = 0x02 - } func; - - unsigned long sarea_priv_offset; - unsigned long fb_offset; - unsigned long mmio_offset; - unsigned long agpAddr; -} drm_via_init_t; - -typedef struct _drm_via_futex { - enum { - VIA_FUTEX_WAIT = 0x00, - VIA_FUTEX_WAKE = 0X01 - } func; - uint32_t ms; - uint32_t lock; - uint32_t val; -} drm_via_futex_t; - -typedef struct _drm_via_dma_init { - enum { - VIA_INIT_DMA = 0x01, - VIA_CLEANUP_DMA = 0x02, - VIA_DMA_INITIALIZED = 0x03 - } func; - - unsigned long offset; - unsigned long size; - unsigned long reg_pause_addr; -} drm_via_dma_init_t; - -typedef struct _drm_via_cmdbuffer { - char *buf; - unsigned long size; -} drm_via_cmdbuffer_t; - -/* Warning: If you change the SAREA structure you must change the Xserver - * structure as well */ - -typedef struct _drm_via_tex_region { - unsigned char next, prev; /* indices to form a circular LRU */ - unsigned char inUse; /* owned by a client, or free? */ - int age; /* tracked by clients to update local LRU's */ -} drm_via_tex_region_t; - -typedef struct _drm_via_sarea { - unsigned int dirty; - unsigned int nbox; - drm_clip_rect_t boxes[VIA_NR_SAREA_CLIPRECTS]; - drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1]; - int texAge; /* last time texture was uploaded */ - int ctxOwner; /* last context to upload state */ - int vertexPrim; - - /* - * Below is for XvMC. - * We want the lock integers alone on, and aligned to, a cache line. - * Therefore this somewhat strange construct. - */ - - char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)]; - - unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS]; - unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS]; - unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */ - -} drm_via_sarea_t; - -typedef struct _drm_via_cmdbuf_size { - enum { - VIA_CMDBUF_SPACE = 0x01, - VIA_CMDBUF_LAG = 0x02 - } func; - int wait; - uint32_t size; -} drm_via_cmdbuf_size_t; - -typedef enum { - VIA_IRQ_ABSOLUTE = 0x0, - VIA_IRQ_RELATIVE = 0x1, - VIA_IRQ_SIGNAL = 0x10000000, - VIA_IRQ_FORCE_SEQUENCE = 0x20000000 -} via_irq_seq_type_t; - -#define VIA_IRQ_FLAGS_MASK 0xF0000000 - -struct drm_via_wait_irq_request{ - unsigned irq; - via_irq_seq_type_t type; - uint32_t sequence; - uint32_t signal; -}; - -typedef union drm_via_irqwait { - struct drm_via_wait_irq_request request; - struct drm_wait_vblank_reply reply; -} drm_via_irqwait_t; - -#ifdef __KERNEL__ - -int via_fb_init(DRM_IOCTL_ARGS); -int via_mem_alloc(DRM_IOCTL_ARGS); -int via_mem_free(DRM_IOCTL_ARGS); -int via_agp_init(DRM_IOCTL_ARGS); -int via_map_init(DRM_IOCTL_ARGS); -int via_decoder_futex(DRM_IOCTL_ARGS); -int via_dma_init(DRM_IOCTL_ARGS); -int via_cmdbuffer(DRM_IOCTL_ARGS); -int via_flush_ioctl(DRM_IOCTL_ARGS); -int via_pci_cmdbuffer(DRM_IOCTL_ARGS); -int via_cmdbuf_size(DRM_IOCTL_ARGS); -int via_wait_irq(DRM_IOCTL_ARGS); - -#endif -#endif /* _VIA_DRM_H_ */ diff --git a/shared/via_drv.c b/shared/via_drv.c deleted file mode 100644 index 5a385c119..000000000 --- a/shared/via_drv.c +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include <linux/config.h> -#include "via.h" -#include "drmP.h" -#include "via_drm.h" -#include "via_drv.h" - -#include "drm_core.h" diff --git a/shared/via_drv.h b/shared/via_drv.h deleted file mode 100644 index 18c6da78c..000000000 --- a/shared/via_drv.h +++ /dev/null @@ -1,111 +0,0 @@ -/* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ -#ifndef _VIA_DRV_H_ -#define _VIA_DRV_H_ - -#include "via_drm.h" -#include "via_verifier.h" - -#define VIA_PCI_BUF_SIZE 60000 -#define VIA_FIRE_BUF_SIZE 1024 -#define VIA_NUM_IRQS 2 - - -typedef struct drm_via_ring_buffer { - drm_map_t map; - char *virtual_start; -} drm_via_ring_buffer_t; - -typedef uint32_t maskarray_t[5]; - -typedef struct drm_via_irq { - atomic_t irq_received; - uint32_t pending_mask; - uint32_t enable_mask; - wait_queue_head_t irq_queue; -} drm_via_irq_t; - -typedef struct drm_via_private { - drm_via_sarea_t *sarea_priv; - drm_map_t *sarea; - drm_map_t *fb; - drm_map_t *mmio; - unsigned long agpAddr; - wait_queue_head_t decoder_queue[VIA_NR_XVMC_LOCKS]; - char *dma_ptr; - unsigned int dma_low; - unsigned int dma_high; - unsigned int dma_offset; - uint32_t dma_wrap; - volatile uint32_t *last_pause_ptr; - volatile uint32_t *hw_addr_ptr; - drm_via_ring_buffer_t ring, fb_blit; - struct timeval last_vblank; - int last_vblank_valid; - unsigned usec_per_vblank; - drm_via_state_t hc_state; - char pci_buf[VIA_PCI_BUF_SIZE]; - const uint32_t *fire_offsets[VIA_FIRE_BUF_SIZE]; - uint32_t num_fire_offsets; - int pro_group_a; - drm_via_irq_t via_irqs[VIA_NUM_IRQS]; - unsigned num_irqs; - maskarray_t *irq_masks; - uint32_t irq_enable_mask; - uint32_t irq_pending_mask; -} drm_via_private_t; - -/* VIA MMIO register access */ -#define VIA_BASE ((dev_priv->mmio)) - -#define VIA_READ(reg) DRM_READ32(VIA_BASE, reg) -#define VIA_WRITE(reg,val) DRM_WRITE32(VIA_BASE, reg, val) -#define VIA_READ8(reg) DRM_READ8(VIA_BASE, reg) -#define VIA_WRITE8(reg,val) DRM_WRITE8(VIA_BASE, reg, val) - -extern int via_init_context(drm_device_t * dev, int context); -extern int via_final_context(drm_device_t * dev, int context); - -extern int via_do_init_map(drm_device_t * dev, drm_via_init_t * init); -extern int via_do_cleanup_map(drm_device_t * dev); -extern int via_map_init(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); -extern int via_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence); - -extern irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS); -extern void via_driver_irq_preinstall(drm_device_t * dev); -extern void via_driver_irq_postinstall(drm_device_t * dev); -extern void via_driver_irq_uninstall(drm_device_t * dev); - -extern int via_dma_cleanup(drm_device_t * dev); -extern int via_driver_dma_quiescent(drm_device_t * dev); -extern void via_init_command_verifier( void ); -extern int via_fb_free(drm_via_mem_t * mem); -extern int via_fb_alloc(drm_via_mem_t * mem); -extern void via_init_futex(drm_via_private_t *dev_priv); -extern void via_cleanup_futex(drm_via_private_t *dev_priv); -extern void via_release_futex(drm_via_private_t *dev_priv, int context); - - -#endif diff --git a/shared/via_ds.c b/shared/via_ds.c deleted file mode 100644 index 35d1581e1..000000000 --- a/shared/via_ds.c +++ /dev/null @@ -1,390 +0,0 @@ -/* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ -#include <linux/module.h> -#include <linux/delay.h> -#include <linux/errno.h> -#include <linux/kernel.h> -#include <linux/slab.h> -#include <linux/poll.h> -#include <asm/io.h> -#include <linux/pci.h> - -#include "via_ds.h" -extern unsigned int VIA_DEBUG; - -set_t *via_setInit(void) -{ - int i; - set_t *set; - set = (set_t *) DRM(alloc) (sizeof(set_t), DRM_MEM_DRIVER); - for (i = 0; i < SET_SIZE; i++) { - set->list[i].free_next = i + 1; - set->list[i].alloc_next = -1; - } - set->list[SET_SIZE - 1].free_next = -1; - set->free = 0; - set->alloc = -1; - set->trace = -1; - return set; -} - -int via_setAdd(set_t * set, ITEM_TYPE item) -{ - int free = set->free; - if (free != -1) { - set->list[free].val = item; - set->free = set->list[free].free_next; - } else { - return 0; - } - set->list[free].alloc_next = set->alloc; - set->alloc = free; - set->list[free].free_next = -1; - return 1; -} - -int via_setDel(set_t * set, ITEM_TYPE item) -{ - int alloc = set->alloc; - int prev = -1; - - while (alloc != -1) { - if (set->list[alloc].val == item) { - if (prev != -1) - set->list[prev].alloc_next = - set->list[alloc].alloc_next; - else - set->alloc = set->list[alloc].alloc_next; - break; - } - prev = alloc; - alloc = set->list[alloc].alloc_next; - } - - if (alloc == -1) - return 0; - - set->list[alloc].free_next = set->free; - set->free = alloc; - set->list[alloc].alloc_next = -1; - - return 1; -} - -/* setFirst -> setAdd -> setNext is wrong */ - -int via_setFirst(set_t * set, ITEM_TYPE * item) -{ - if (set->alloc == -1) - return 0; - - *item = set->list[set->alloc].val; - set->trace = set->list[set->alloc].alloc_next; - - return 1; -} - -int via_setNext(set_t * set, ITEM_TYPE * item) -{ - if (set->trace == -1) - return 0; - - *item = set->list[set->trace].val; - set->trace = set->list[set->trace].alloc_next; - - return 1; -} - -int via_setDestroy(set_t * set) -{ - DRM(free) (set, sizeof(set_t), DRM_MEM_DRIVER); - - return 1; -} - -#define ISFREE(bptr) ((bptr)->free) - -#define PRINTF(fmt, arg...) do{}while(0) -#define fprintf(fmt, arg...) do{}while(0) - -void via_mmDumpMemInfo(memHeap_t * heap) -{ - TMemBlock *p; - - PRINTF("Memory heap %p:\n", heap); - - if (heap == 0) - PRINTF(" heap == 0\n"); - else { - p = (TMemBlock *) heap; - - while (p) { - PRINTF(" Offset:%08x, Size:%08x, %c%c\n", p->ofs, - p->size, p->free ? '.' : 'U', - p->reserved ? 'R' : '.'); - p = p->next; - } - } - - PRINTF("End of memory blocks\n"); -} - -memHeap_t *via_mmInit(int ofs, int size) -{ - PMemBlock blocks; - - if (size <= 0) - return 0; - - blocks = - (TMemBlock *) DRM(calloc) (1, sizeof(TMemBlock), DRM_MEM_DRIVER); - - if (blocks) { - blocks->ofs = ofs; - blocks->size = size; - blocks->free = 1; - return (memHeap_t *) blocks; - } else - return 0; -} - -memHeap_t *via_mmAddRange(memHeap_t * heap, int ofs, int size) -{ - PMemBlock blocks; - blocks = - (TMemBlock *) DRM(calloc) (2, sizeof(TMemBlock), DRM_MEM_DRIVER); - - if (blocks) { - blocks[0].size = size; - blocks[0].free = 1; - blocks[0].ofs = ofs; - blocks[0].next = &blocks[1]; - - /* Discontinuity - stops JoinBlock from trying to join non-adjacent - * ranges. - */ - blocks[1].size = 0; - blocks[1].free = 0; - blocks[1].ofs = ofs + size; - blocks[1].next = (PMemBlock) heap; - return (memHeap_t *) blocks; - } else - return heap; -} - -static TMemBlock *SliceBlock(TMemBlock * p, - int startofs, int size, - int reserved, int alignment) -{ - TMemBlock *newblock; - - /* break left */ - if (startofs > p->ofs) { - newblock = - (TMemBlock *) DRM(calloc) (1, sizeof(TMemBlock), - DRM_MEM_DRIVER); - newblock->ofs = startofs; - newblock->size = p->size - (startofs - p->ofs); - newblock->free = 1; - newblock->next = p->next; - p->size -= newblock->size; - p->next = newblock; - p = newblock; - } - - /* break right */ - if (size < p->size) { - newblock = - (TMemBlock *) DRM(calloc) (1, sizeof(TMemBlock), - DRM_MEM_DRIVER); - newblock->ofs = startofs + size; - newblock->size = p->size - size; - newblock->free = 1; - newblock->next = p->next; - p->size = size; - p->next = newblock; - } - - /* p = middle block */ - p->align = alignment; - p->free = 0; - p->reserved = reserved; - return p; -} - -PMemBlock via_mmAllocMem(memHeap_t * heap, int size, int align2, - int startSearch) -{ - int mask, startofs, endofs; - TMemBlock *p; - - if (!heap || align2 < 0 || size <= 0) - return NULL; - - mask = (1 << align2) - 1; - startofs = 0; - p = (TMemBlock *) heap; - - while (p) { - if (ISFREE(p)) { - startofs = (p->ofs + mask) & ~mask; - - if (startofs < startSearch) - startofs = startSearch; - - endofs = startofs + size; - - if (endofs <= (p->ofs + p->size)) - break; - } - - p = p->next; - } - - if (!p) - return NULL; - - p = SliceBlock(p, startofs, size, 0, mask + 1); - p->heap = heap; - - return p; -} - -static __inline__ int Join2Blocks(TMemBlock * p) -{ - if (p->free && p->next && p->next->free) { - TMemBlock *q = p->next; - p->size += q->size; - p->next = q->next; - DRM(free) (q, sizeof(TMemBlock), DRM_MEM_DRIVER); - - return 1; - } - - return 0; -} - -int via_mmFreeMem(PMemBlock b) -{ - TMemBlock *p, *prev; - - if (!b) - return 0; - - if (!b->heap) { - fprintf(stderr, "no heap\n"); - - return -1; - } - - p = b->heap; - prev = NULL; - - while (p && p != b) { - prev = p; - p = p->next; - } - - if (!p || p->free || p->reserved) { - if (!p) - fprintf(stderr, "block not found in heap\n"); - else if (p->free) - fprintf(stderr, "block already free\n"); - else - fprintf(stderr, "block is reserved\n"); - - return -1; - } - - p->free = 1; - Join2Blocks(p); - - if (prev) - Join2Blocks(prev); - - return 0; -} - -int via_mmReserveMem(memHeap_t * heap, int offset, int size) -{ - int endofs; - TMemBlock *p; - - if (!heap || size <= 0) - return -1; - endofs = offset + size; - p = (TMemBlock *) heap; - - while (p && p->ofs <= offset) { - if (ISFREE(p) && endofs <= (p->ofs + p->size)) { - SliceBlock(p, offset, size, 1, 1); - return 0; - } - p = p->next; - } - return -1; -} - -int via_mmFreeReserved(memHeap_t * heap, int offset) -{ - TMemBlock *p, *prev; - - if (!heap) - return -1; - - p = (TMemBlock *) heap; - prev = NULL; - - while (p && p->ofs != offset) { - prev = p; - p = p->next; - } - - if (!p || !p->reserved) - return -1; - p->free = 1; - p->reserved = 0; - Join2Blocks(p); - - if (prev) - Join2Blocks(prev); - - return 0; -} - -void via_mmDestroy(memHeap_t * heap) -{ - TMemBlock *p, *q; - - if (!heap) - return; - p = (TMemBlock *) heap; - - while (p) { - q = p->next; - DRM(free) (p, sizeof(TMemBlock), DRM_MEM_DRIVER); - p = q; - } -} diff --git a/shared/via_ds.h b/shared/via_ds.h deleted file mode 100644 index 23960d59c..000000000 --- a/shared/via_ds.h +++ /dev/null @@ -1,113 +0,0 @@ -/* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ -#ifndef _via_ds_h_ -#define _via_ds_h_ - -#include "via.h" -#include "drmP.h" - -/* Set Data Structure */ -#define SET_SIZE 5000 -typedef unsigned long ITEM_TYPE; - -typedef struct { - ITEM_TYPE val; - int alloc_next, free_next; -} list_item_t; - -typedef struct { - int alloc; - int free; - int trace; - list_item_t list[SET_SIZE]; -} set_t; - -set_t *via_setInit(void); -int via_setAdd(set_t * set, ITEM_TYPE item); -int via_setDel(set_t * set, ITEM_TYPE item); -int via_setFirst(set_t * set, ITEM_TYPE * item); -int via_setNext(set_t * set, ITEM_TYPE * item); -int via_setDestroy(set_t * set); - -#endif - -#ifndef MM_INC -#define MM_INC - -struct mem_block_t { - struct mem_block_t *next; - struct mem_block_t *heap; - int ofs, size; - int align; - unsigned int free:1; - unsigned int reserved:1; -}; -typedef struct mem_block_t TMemBlock; -typedef struct mem_block_t *PMemBlock; - -/* a heap is just the first block in a chain */ -typedef struct mem_block_t memHeap_t; - -static __inline__ int mmBlockSize(PMemBlock b) -{ - return b->size; -} - -static __inline__ int mmOffset(PMemBlock b) -{ - return b->ofs; -} - -static __inline__ void mmMarkReserved(PMemBlock b) -{ - b->reserved = 1; -} - -/* - * input: total size in bytes - * return: a heap pointer if OK, NULL if error - */ -memHeap_t *via_mmInit(int ofs, int size); - -PMemBlock via_mmAllocMem(memHeap_t * heap, int size, int align2, - int startSearch); - -/* - * Free block starts at offset - * input: pointer to a block - * return: 0 if OK, -1 if error - */ -int via_mmFreeMem(PMemBlock b); - -/* - * destroy MM - */ -void via_mmDestroy(memHeap_t * mmInit); - -/* For debugging purpose. */ -void via_mmDumpMemInfo(memHeap_t * mmInit); - -#endif diff --git a/shared/via_irq.c b/shared/via_irq.c deleted file mode 100644 index 0812e926b..000000000 --- a/shared/via_irq.c +++ /dev/null @@ -1,340 +0,0 @@ -/* via_irq.c - * - * Copyright 2004 BEAM Ltd. - * Copyright 2002 Tungsten Graphics, Inc. - * Copyright 2005 Thomas Hellstrom. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * BEAM LTD, TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Terry Barnaby <terry1@beam.ltd.uk> - * Keith Whitwell <keith@tungstengraphics.com> - * Thomas Hellstrom <unichrome@shipmail.org> - * - * This code provides standard DRM access to the Via Unichrome / Pro Vertical blank - * interrupt, as well as an infrastructure to handle other interrupts of the chip. - * The refresh rate is also calculated for video playback sync purposes. - */ - -#include "via.h" -#include "drmP.h" -#include "drm.h" -#include "via_drm.h" -#include "via_drv.h" - -#define VIA_REG_INTERRUPT 0x200 - -/* VIA_REG_INTERRUPT */ -#define VIA_IRQ_GLOBAL (1 << 31) -#define VIA_IRQ_VBLANK_ENABLE (1 << 19) -#define VIA_IRQ_VBLANK_PENDING (1 << 3) -#define VIA_IRQ_HQV0_ENABLE (1 << 11) -#define VIA_IRQ_HQV1_ENABLE (1 << 25) -#define VIA_IRQ_HQV0_PENDING (1 << 9) -#define VIA_IRQ_HQV1_PENDING (1 << 10) - -/* - * Device-specific IRQs go here. This type might need to be extended with - * the register if there are multiple IRQ control registers. - * Currently we activate the HQV interrupts of Unichrome Pro group A. - */ - -static maskarray_t via_pro_group_a_irqs[] = { - {VIA_IRQ_HQV0_ENABLE, VIA_IRQ_HQV0_PENDING, 0x000003D0, 0x00008010, 0x00000000 }, - {VIA_IRQ_HQV1_ENABLE, VIA_IRQ_HQV1_PENDING, 0x000013D0, 0x00008010, 0x00000000 }}; -static int via_num_pro_group_a = sizeof(via_pro_group_a_irqs)/sizeof(maskarray_t); - -static maskarray_t via_unichrome_irqs[] = {}; -static int via_num_unichrome = sizeof(via_unichrome_irqs)/sizeof(maskarray_t); - - -static unsigned time_diff(struct timeval *now,struct timeval *then) -{ - return (now->tv_usec >= then->tv_usec) ? - now->tv_usec - then->tv_usec : - 1000000 - (then->tv_usec - now->tv_usec); -} - -irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS) -{ - drm_device_t *dev = (drm_device_t *) arg; - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - u32 status; - int handled = 0; - struct timeval cur_vblank; - drm_via_irq_t *cur_irq = dev_priv->via_irqs; - int i; - - status = VIA_READ(VIA_REG_INTERRUPT); - if (status & VIA_IRQ_VBLANK_PENDING) { - atomic_inc(&dev->vbl_received); - if (!(atomic_read(&dev->vbl_received) & 0x0F)) { - do_gettimeofday(&cur_vblank); - if (dev_priv->last_vblank_valid) { - dev_priv->usec_per_vblank = - time_diff( &cur_vblank,&dev_priv->last_vblank) >> 4; - } - dev_priv->last_vblank = cur_vblank; - dev_priv->last_vblank_valid = 1; - } - if (!(atomic_read(&dev->vbl_received) & 0xFF)) { - DRM_DEBUG("US per vblank is: %u\n", - dev_priv->usec_per_vblank); - } - DRM_WAKEUP(&dev->vbl_queue); - DRM(vbl_send_signals)( dev ); - handled = 1; - } - - - for (i=0; i<dev_priv->num_irqs; ++i) { - if (status & cur_irq->pending_mask) { - atomic_inc( &cur_irq->irq_received ); - DRM_WAKEUP( &cur_irq->irq_queue ); - handled = 1; - } - cur_irq++; - } - - /* Acknowlege interrupts */ - VIA_WRITE(VIA_REG_INTERRUPT, status); - - - if (handled) - return IRQ_HANDLED; - else - return IRQ_NONE; -} - -static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv) -{ - u32 status; - - if (dev_priv) { - /* Acknowlege interrupts */ - status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status | - dev_priv->irq_pending_mask); - } -} - -int via_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence) -{ - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - unsigned int cur_vblank; - int ret = 0; - - DRM_DEBUG("viadrv_vblank_wait\n"); - if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); - return -EINVAL; - } - - viadrv_acknowledge_irqs(dev_priv); - - /* Assume that the user has missed the current sequence number - * by about a day rather than she wants to wait for years - * using vertical blanks... - */ - - DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ, - (((cur_vblank = atomic_read(&dev->vbl_received)) - - *sequence) <= (1 << 23))); - - *sequence = cur_vblank; - return ret; -} - -static int -via_driver_irq_wait(drm_device_t * dev, unsigned int irq, int force_sequence, - unsigned int *sequence) -{ - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - unsigned int cur_irq_sequence; - drm_via_irq_t *cur_irq = dev_priv->via_irqs; - int ret = 0; - maskarray_t *masks = dev_priv->irq_masks; - - DRM_DEBUG("%s\n", __FUNCTION__); - - if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); - return DRM_ERR(EINVAL); - } - - if (irq >= dev_priv->num_irqs ) { - DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__, irq); - return DRM_ERR(EINVAL); - } - - cur_irq += irq; - - if (masks[irq][2] && !force_sequence) { - DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ, - ((VIA_READ(masks[irq][2]) & masks[irq][3]) == masks[irq][4])); - cur_irq_sequence = atomic_read(&cur_irq->irq_received); - } else { - DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ, - (((cur_irq_sequence = atomic_read(&cur_irq->irq_received)) - - *sequence) <= (1 << 23))); - } - *sequence = cur_irq_sequence; - return ret; -} - - -/* - * drm_dma.h hooks - */ - -void via_driver_irq_preinstall(drm_device_t * dev) -{ - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - u32 status; - drm_via_irq_t *cur_irq = dev_priv->via_irqs; - int i; - - DRM_DEBUG("driver_irq_preinstall: dev_priv: %p\n", dev_priv); - if (dev_priv) { - - dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE; - dev_priv->irq_pending_mask = VIA_IRQ_VBLANK_PENDING; - - dev_priv->irq_masks = (dev_priv->pro_group_a) ? - via_pro_group_a_irqs : via_unichrome_irqs; - dev_priv->num_irqs = (dev_priv->pro_group_a) ? - via_num_pro_group_a : via_num_unichrome; - - for(i=0; i < dev_priv->num_irqs; ++i) { - atomic_set(&cur_irq->irq_received, 0); - cur_irq->enable_mask = dev_priv->irq_masks[i][0]; - cur_irq->pending_mask = dev_priv->irq_masks[i][1]; - DRM_INIT_WAITQUEUE( &cur_irq->irq_queue ); - dev_priv->irq_enable_mask |= cur_irq->enable_mask; - dev_priv->irq_pending_mask |= cur_irq->pending_mask; - cur_irq++; - - DRM_DEBUG("Initializing IRQ %d\n", i); - } - - dev_priv->last_vblank_valid = 0; - - // Clear VSync interrupt regs - status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status & - ~(dev_priv->irq_enable_mask)); - - /* Clear bits if they're already high */ - viadrv_acknowledge_irqs(dev_priv); - } -} - -void via_driver_irq_postinstall(drm_device_t * dev) -{ - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - u32 status; - - DRM_DEBUG("via_driver_irq_postinstall\n"); - if (dev_priv) { - status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL - | dev_priv->irq_enable_mask); - - /* Some magic, oh for some data sheets ! */ - - VIA_WRITE8(0x83d4, 0x11); - VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30); - - } -} - -void via_driver_irq_uninstall(drm_device_t * dev) -{ - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - u32 status; - - DRM_DEBUG("driver_irq_uninstall)\n"); - if (dev_priv) { - - /* Some more magic, oh for some data sheets ! */ - - VIA_WRITE8(0x83d4, 0x11); - VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30); - - status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status & - ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask)); - } -} - -int via_wait_irq(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - - drm_via_irqwait_t __user *argp = (void __user *)data; - drm_via_irqwait_t irqwait; - struct timeval now; - int ret = 0; - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - drm_via_irq_t *cur_irq = dev_priv->via_irqs; - int force_sequence; - - if (!dev->irq) - return DRM_ERR(EINVAL); - - DRM_COPY_FROM_USER_IOCTL(irqwait, argp, sizeof(irqwait)); - if (irqwait.request.irq >= dev_priv->num_irqs) { - DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__, - irqwait.request.irq); - return DRM_ERR(EINVAL); - } - - cur_irq += irqwait.request.irq; - - switch (irqwait.request.type & ~VIA_IRQ_FLAGS_MASK) { - case VIA_IRQ_RELATIVE: - irqwait.request.sequence += atomic_read(&cur_irq->irq_received); - irqwait.request.type &= ~_DRM_VBLANK_RELATIVE; - case VIA_IRQ_ABSOLUTE: - break; - default: - return DRM_ERR(EINVAL); - } - - if (irqwait.request.type & VIA_IRQ_SIGNAL) { - DRM_ERROR("%s Signals on Via IRQs not implemented yet.\n", - __FUNCTION__); - return DRM_ERR(EINVAL); - } - - force_sequence = (irqwait.request.type & VIA_IRQ_FORCE_SEQUENCE); - - ret = via_driver_irq_wait(dev, irqwait.request.irq, force_sequence, - &irqwait.request.sequence); - do_gettimeofday(&now); - irqwait.reply.tval_sec = now.tv_sec; - irqwait.reply.tval_usec = now.tv_usec; - - DRM_COPY_TO_USER_IOCTL(argp, irqwait, sizeof(irqwait)); - - return ret; -} diff --git a/shared/via_map.c b/shared/via_map.c deleted file mode 100644 index af850d730..000000000 --- a/shared/via_map.c +++ /dev/null @@ -1,112 +0,0 @@ -/* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ -#include "via.h" -#include "drmP.h" -#include "via_drm.h" -#include "via_drv.h" - -int via_do_init_map(drm_device_t * dev, drm_via_init_t * init) -{ - drm_via_private_t *dev_priv; - - DRM_DEBUG("%s\n", __FUNCTION__); - - via_init_command_verifier(); - dev_priv = DRM(alloc) (sizeof(drm_via_private_t), DRM_MEM_DRIVER); - if (dev_priv == NULL) - return -ENOMEM; - - memset(dev_priv, 0, sizeof(drm_via_private_t)); - - DRM_GETSAREA(); - if (!dev_priv->sarea) { - DRM_ERROR("could not find sarea!\n"); - dev->dev_private = (void *)dev_priv; - via_do_cleanup_map(dev); - return -EINVAL; - } - - dev_priv->fb = drm_core_findmap(dev, init->fb_offset); - if (!dev_priv->fb) { - DRM_ERROR("could not find framebuffer!\n"); - dev->dev_private = (void *)dev_priv; - via_do_cleanup_map(dev); - return -EINVAL; - } - dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset); - if (!dev_priv->mmio) { - DRM_ERROR("could not find mmio region!\n"); - dev->dev_private = (void *)dev_priv; - via_do_cleanup_map(dev); - return -EINVAL; - } - - dev_priv->sarea_priv = - (drm_via_sarea_t *) ((u8 *) dev_priv->sarea->handle + - init->sarea_priv_offset); - - dev_priv->agpAddr = init->agpAddr; - - via_init_futex( dev_priv ); - dev_priv->pro_group_a = (dev->pdev->device == 0x3118); - - dev->dev_private = (void *)dev_priv; - - return 0; -} - -int via_do_cleanup_map(drm_device_t * dev) -{ - if (dev->dev_private) { - - drm_via_private_t *dev_priv = dev->dev_private; - - via_dma_cleanup(dev); - - DRM(free) (dev_priv, sizeof(drm_via_private_t), DRM_MEM_DRIVER); - dev->dev_private = NULL; - } - - return 0; -} - -int via_map_init(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - drm_via_init_t init; - - DRM_DEBUG("%s\n", __FUNCTION__); - - DRM_COPY_FROM_USER_IOCTL(init, (drm_via_init_t *) data, sizeof(init)); - - switch (init.func) { - case VIA_INIT_MAP: - return via_do_init_map(dev, &init); - case VIA_CLEANUP_MAP: - return via_do_cleanup_map(dev); - } - - return -EINVAL; -} - diff --git a/shared/via_mm.c b/shared/via_mm.c deleted file mode 100644 index aca9d7dde..000000000 --- a/shared/via_mm.c +++ /dev/null @@ -1,372 +0,0 @@ -/* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ -#include "via.h" -#include "drmP.h" -#include "via_drm.h" -#include "via_drv.h" -#include "via_ds.h" -#include "via_mm.h" - -#define MAX_CONTEXT 100 - -unsigned int VIA_DEBUG = 1; - -typedef struct { - int used; - int context; - set_t *sets[2]; /* 0 for frame buffer, 1 for AGP , 2 for System */ -} via_context_t; - -static via_context_t global_ppriv[MAX_CONTEXT]; - -static int add_alloc_set(int context, int type, unsigned int val) -{ - int i, retval = 0; - - for (i = 0; i < MAX_CONTEXT; i++) { - if (global_ppriv[i].used && global_ppriv[i].context == context) { - retval = via_setAdd(global_ppriv[i].sets[type], val); - break; - } - } - - return retval; -} - -static int del_alloc_set(int context, int type, unsigned int val) -{ - int i, retval = 0; - - for (i = 0; i < MAX_CONTEXT; i++) - if (global_ppriv[i].used && global_ppriv[i].context == context) { - retval = via_setDel(global_ppriv[i].sets[type], val); - break; - } - - return retval; -} - -/* agp memory management */ -static memHeap_t *AgpHeap = NULL; - -int via_agp_init(DRM_IOCTL_ARGS) -{ - drm_via_agp_t agp; - - DRM_COPY_FROM_USER_IOCTL(agp, (drm_via_agp_t *) data, sizeof(agp)); - - AgpHeap = via_mmInit(agp.offset, agp.size); - - DRM_DEBUG("offset = %lu, size = %lu", (unsigned long)agp.offset, (unsigned long)agp.size); - - return 0; -} - -/* fb memory management */ -static memHeap_t *FBHeap = NULL; - -int via_fb_init(DRM_IOCTL_ARGS) -{ - drm_via_fb_t fb; - - DRM_COPY_FROM_USER_IOCTL(fb, (drm_via_fb_t *) data, sizeof(fb)); - - FBHeap = via_mmInit(fb.offset, fb.size); - - DRM_DEBUG("offset = %lu, size = %lu", (unsigned long)fb.offset, (unsigned long)fb.size); - - return 0; -} - -int via_init_context(struct drm_device *dev, int context) -{ - int i; - - for (i = 0; i < MAX_CONTEXT; i++) - if (global_ppriv[i].used && - (global_ppriv[i].context == context)) - break; - - if (i >= MAX_CONTEXT) { - for (i = 0; i < MAX_CONTEXT; i++) { - if (!global_ppriv[i].used) { - global_ppriv[i].context = context; - global_ppriv[i].used = 1; - global_ppriv[i].sets[0] = via_setInit(); - global_ppriv[i].sets[1] = via_setInit(); - DRM_DEBUG("init allocation set, socket=%d," - " context = %d\n", i, context); - break; - } - } - - if ((i >= MAX_CONTEXT) || (global_ppriv[i].sets[0] == NULL) || - (global_ppriv[i].sets[1] == NULL)) { - return 0; - } - } - - return 1; -} - -int via_final_context(struct drm_device *dev, int context) -{ - int i; - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - - for (i = 0; i < MAX_CONTEXT; i++) - if (global_ppriv[i].used && - (global_ppriv[i].context == context)) - break; - - if (i < MAX_CONTEXT) { - set_t *set; - ITEM_TYPE item; - int retval; - - DRM_DEBUG("find socket %d, context = %d\n", i, context); - - /* Video Memory */ - set = global_ppriv[i].sets[0]; - retval = via_setFirst(set, &item); - while (retval) { - DRM_DEBUG("free video memory 0x%lx\n", item); - via_mmFreeMem((PMemBlock) item); - retval = via_setNext(set, &item); - } - via_setDestroy(set); - - /* AGP Memory */ - set = global_ppriv[i].sets[1]; - retval = via_setFirst(set, &item); - while (retval) { - DRM_DEBUG("free agp memory 0x%lx\n", item); - via_mmFreeMem((PMemBlock) item); - retval = via_setNext(set, &item); - } - via_setDestroy(set); - - global_ppriv[i].used = 0; - } - via_release_futex(dev_priv, context); - - -#if defined(__linux__) - /* Linux specific until context tracking code gets ported to BSD */ - /* Last context, perform cleanup */ - if (dev->ctx_count == 1 && dev->dev_private) { - if (dev->irq) - DRM(irq_uninstall) (dev); - - via_cleanup_futex(dev_priv); - via_do_cleanup_map(dev); - } -#endif - - return 1; -} - -int via_mem_alloc(DRM_IOCTL_ARGS) -{ - drm_via_mem_t mem; - - DRM_COPY_FROM_USER_IOCTL(mem, (drm_via_mem_t *) data, sizeof(mem)); - switch (mem.type) { - case VIDEO: - if (via_fb_alloc(&mem) < 0) - return -EFAULT; - DRM_COPY_TO_USER_IOCTL((drm_via_mem_t *) data, mem, - sizeof(mem)); - return 0; - case AGP: - if (via_agp_alloc(&mem) < 0) - return -EFAULT; - DRM_COPY_TO_USER_IOCTL((drm_via_mem_t *) data, mem, - sizeof(mem)); - return 0; - } - - return -EFAULT; -} - -int via_fb_alloc(drm_via_mem_t * mem) -{ - drm_via_mm_t fb; - PMemBlock block; - int retval = 0; - - if (!FBHeap) - return -1; - - fb.size = mem->size; - fb.context = mem->context; - - block = via_mmAllocMem(FBHeap, fb.size, 5, 0); - if (block) { - fb.offset = block->ofs; - fb.free = (unsigned long)block; - if (!add_alloc_set(fb.context, VIDEO, fb.free)) { - DRM_DEBUG("adding to allocation set fails\n"); - via_mmFreeMem((PMemBlock) fb.free); - retval = -1; - } - } else { - fb.offset = 0; - fb.size = 0; - fb.free = 0; - retval = -1; - } - - mem->offset = fb.offset; - mem->index = fb.free; - - DRM_DEBUG("alloc fb, size = %d, offset = %d\n", fb.size, - (int)fb.offset); - - return retval; -} - -int via_agp_alloc(drm_via_mem_t * mem) -{ - drm_via_mm_t agp; - PMemBlock block; - int retval = 0; - - if (!AgpHeap) - return -1; - - agp.size = mem->size; - agp.context = mem->context; - - block = via_mmAllocMem(AgpHeap, agp.size, 5, 0); - if (block) { - agp.offset = block->ofs; - agp.free = (unsigned long)block; - if (!add_alloc_set(agp.context, AGP, agp.free)) { - DRM_DEBUG("adding to allocation set fails\n"); - via_mmFreeMem((PMemBlock) agp.free); - retval = -1; - } - } else { - agp.offset = 0; - agp.size = 0; - agp.free = 0; - } - - mem->offset = agp.offset; - mem->index = agp.free; - - DRM_DEBUG("alloc agp, size = %d, offset = %d\n", agp.size, - (unsigned int)agp.offset); - return retval; -} - -int via_mem_free(DRM_IOCTL_ARGS) -{ - drm_via_mem_t mem; - - DRM_COPY_FROM_USER_IOCTL(mem, (drm_via_mem_t *) data, sizeof(mem)); - - switch (mem.type) { - - case VIDEO: - if (via_fb_free(&mem) == 0) - return 0; - break; - case AGP: - if (via_agp_free(&mem) == 0) - return 0; - break; - } - - return -EFAULT; -} - -int via_fb_free(drm_via_mem_t * mem) -{ - drm_via_mm_t fb; - int retval = 0; - - if (!FBHeap) { - return -1; - } - - fb.free = mem->index; - fb.context = mem->context; - - if (!fb.free) { - return -1; - - } - - via_mmFreeMem((PMemBlock) fb.free); - - if (!del_alloc_set(fb.context, VIDEO, fb.free)) { - retval = -1; - } - - DRM_DEBUG("free fb, free = %ld\n", fb.free); - - return retval; -} - -int via_agp_free(drm_via_mem_t * mem) -{ - drm_via_mm_t agp; - - int retval = 0; - - agp.free = mem->index; - agp.context = mem->context; - - if (!agp.free) - return -1; - - via_mmFreeMem((PMemBlock) agp.free); - - if (!del_alloc_set(agp.context, AGP, agp.free)) { - retval = -1; - } - - DRM_DEBUG("free agp, free = %ld\n", agp.free); - - return retval; -} - -EXPORT_SYMBOL(via_fb_alloc); -EXPORT_SYMBOL(via_fb_free); - -void DRM(driver_register_fns) (drm_device_t * dev) { - dev->driver_features = - DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_IRQ | - DRIVER_IRQ_SHARED | DRIVER_IRQ_VBL; - dev->fn_tbl.context_ctor = via_init_context; - dev->fn_tbl.context_dtor = via_final_context; - dev->fn_tbl.vblank_wait = via_driver_vblank_wait; - dev->fn_tbl.irq_preinstall = via_driver_irq_preinstall; - dev->fn_tbl.irq_postinstall = via_driver_irq_postinstall; - dev->fn_tbl.irq_uninstall = via_driver_irq_uninstall; - dev->fn_tbl.irq_handler = via_driver_irq_handler; - dev->fn_tbl.dma_quiescent = via_driver_dma_quiescent; -} diff --git a/shared/via_mm.h b/shared/via_mm.h deleted file mode 100644 index 02a7251e7..000000000 --- a/shared/via_mm.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ -#ifndef _via_drm_mm_h_ -#define _via_drm_mm_h_ - -typedef struct { - unsigned int context; - unsigned int size; - unsigned long offset; - unsigned long free; -} drm_via_mm_t; - -typedef struct { - unsigned int size; - unsigned long handle; - void *virtual; -} drm_via_dma_t; - -int via_fb_alloc(drm_via_mem_t * mem); -int via_fb_free(drm_via_mem_t * mem); -int via_agp_alloc(drm_via_mem_t * mem); -int via_agp_free(drm_via_mem_t * mem); - -#endif diff --git a/shared/via_verifier.c b/shared/via_verifier.c deleted file mode 100644 index 13b5ccf0e..000000000 --- a/shared/via_verifier.c +++ /dev/null @@ -1,1063 +0,0 @@ -/* - * Copyright 2004 The Unichrome Project. All Rights Reserved. - * Copyright 2005 Thomas Hellstrom. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S), AND/OR THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Author: Thomas Hellstrom 2004, 2005. - * This code was written using docs obtained under NDA from VIA Inc. - * - * Don't run this code directly on an AGP buffer. Due to cache problems it will - * be very slow. - */ - - - -#include "via_3d_reg.h" -#include "via.h" -#include "drmP.h" -#include "drm.h" -#include "via_drm.h" -#include "via_verifier.h" -#include "via_drv.h" - -typedef enum{ - state_command, - state_header2, - state_header1, - state_vheader5, - state_vheader6, - state_error -} verifier_state_t; - - -typedef enum{ - no_check = 0, - check_for_header2, - check_for_header1, - check_for_header2_err, - check_for_header1_err, - check_for_fire, - check_z_buffer_addr0, - check_z_buffer_addr1, - check_z_buffer_addr_mode, - check_destination_addr0, - check_destination_addr1, - check_destination_addr_mode, - check_for_dummy, - check_for_dd, - check_texture_addr0, - check_texture_addr1, - check_texture_addr2, - check_texture_addr3, - check_texture_addr4, - check_texture_addr5, - check_texture_addr6, - check_texture_addr7, - check_texture_addr8, - check_texture_addr_mode, - check_for_vertex_count, - check_number_texunits, - forbidden_command -}hazard_t; - -/* - * Associates each hazard above with a possible multi-command - * sequence. For example an address that is split over multiple - * commands and that needs to be checked at the first command - * that does not include any part of the address. - */ - -static drm_via_sequence_t seqs[] = { - no_sequence, - no_sequence, - no_sequence, - no_sequence, - no_sequence, - no_sequence, - z_address, - z_address, - z_address, - dest_address, - dest_address, - dest_address, - no_sequence, - no_sequence, - tex_address, - tex_address, - tex_address, - tex_address, - tex_address, - tex_address, - tex_address, - tex_address, - tex_address, - tex_address, - no_sequence -}; - -typedef struct{ - unsigned int code; - hazard_t hz; -} hz_init_t; - - - -static hz_init_t init_table1[] = { - {0xf2, check_for_header2_err}, - {0xf0, check_for_header1_err}, - {0xee, check_for_fire}, - {0xcc, check_for_dummy}, - {0xdd, check_for_dd}, - {0x00, no_check}, - {0x10, check_z_buffer_addr0}, - {0x11, check_z_buffer_addr1}, - {0x12, check_z_buffer_addr_mode}, - {0x13, no_check}, - {0x14, no_check}, - {0x15, no_check}, - {0x23, no_check}, - {0x24, no_check}, - {0x33, no_check}, - {0x34, no_check}, - {0x35, no_check}, - {0x36, no_check}, - {0x37, no_check}, - {0x38, no_check}, - {0x39, no_check}, - {0x3A, no_check}, - {0x3B, no_check}, - {0x3C, no_check}, - {0x3D, no_check}, - {0x3E, no_check}, - {0x40, check_destination_addr0}, - {0x41, check_destination_addr1}, - {0x42, check_destination_addr_mode}, - {0x43, no_check}, - {0x44, no_check}, - {0x50, no_check}, - {0x51, no_check}, - {0x52, no_check}, - {0x53, no_check}, - {0x54, no_check}, - {0x55, no_check}, - {0x56, no_check}, - {0x57, no_check}, - {0x58, no_check}, - {0x70, no_check}, - {0x71, no_check}, - {0x78, no_check}, - {0x79, no_check}, - {0x7A, no_check}, - {0x7B, no_check}, - {0x7C, no_check}, - {0x7D, check_for_vertex_count} -}; - - - -static hz_init_t init_table2[] = { - {0xf2, check_for_header2_err}, - {0xf0, check_for_header1_err}, - {0xee, check_for_fire}, - {0xcc, check_for_dummy}, - {0x00, check_texture_addr0}, - {0x01, check_texture_addr0}, - {0x02, check_texture_addr0}, - {0x03, check_texture_addr0}, - {0x04, check_texture_addr0}, - {0x05, check_texture_addr0}, - {0x06, check_texture_addr0}, - {0x07, check_texture_addr0}, - {0x08, check_texture_addr0}, - {0x09, check_texture_addr0}, - {0x20, check_texture_addr1}, - {0x21, check_texture_addr1}, - {0x22, check_texture_addr1}, - {0x23, check_texture_addr4}, - {0x2B, check_texture_addr3}, - {0x2C, check_texture_addr3}, - {0x2D, check_texture_addr3}, - {0x2E, check_texture_addr3}, - {0x2F, check_texture_addr3}, - {0x30, check_texture_addr3}, - {0x31, check_texture_addr3}, - {0x32, check_texture_addr3}, - {0x33, check_texture_addr3}, - {0x34, check_texture_addr3}, - {0x4B, check_texture_addr5}, - {0x4C, check_texture_addr6}, - {0x51, check_texture_addr7}, - {0x52, check_texture_addr8}, - {0x77, check_texture_addr2}, - {0x78, no_check}, - {0x79, no_check}, - {0x7A, no_check}, - {0x7B, check_texture_addr_mode}, - {0x7C, no_check}, - {0x7D, no_check}, - {0x7E, no_check}, - {0x7F, no_check}, - {0x80, no_check}, - {0x81, no_check}, - {0x82, no_check}, - {0x83, no_check}, - {0x85, no_check}, - {0x86, no_check}, - {0x87, no_check}, - {0x88, no_check}, - {0x89, no_check}, - {0x8A, no_check}, - {0x90, no_check}, - {0x91, no_check}, - {0x92, no_check}, - {0x93, no_check} -}; - -static hz_init_t init_table3[] = { - {0xf2, check_for_header2_err}, - {0xf0, check_for_header1_err}, - {0xcc, check_for_dummy}, - {0x00, check_number_texunits} -}; - - -static hazard_t table1[256]; -static hazard_t table2[256]; -static hazard_t table3[256]; - - - -static __inline__ int -eat_words(const uint32_t **buf, const uint32_t *buf_end, unsigned num_words) -{ - if ((buf_end - *buf) >= num_words) { - *buf += num_words; - return 0; - } - DRM_ERROR("Illegal termination of DMA command buffer\n"); - return 1; -} - - -/* - * Partially stolen from drm_memory.h - */ - -static __inline__ drm_map_t * -via_drm_lookup_agp_map (drm_via_state_t *seq, unsigned long offset, unsigned long size, - drm_device_t *dev) -{ - struct list_head *list; - drm_map_list_t *r_list; - drm_map_t *map = seq->map_cache; - - if (map && map->offset <= offset && (offset + size) <= (map->offset + map->size)) { - return map; - } - - list_for_each(list, &dev->maplist->head) { - r_list = (drm_map_list_t *) list; - map = r_list->map; - if (!map) - continue; - if (map->offset <= offset && (offset + size) <= (map->offset + map->size) && - !(map->flags & _DRM_RESTRICTED) && (map->type == _DRM_AGP)) { - seq->map_cache = map; - return map; - } - } - return NULL; -} - - -/* - * Require that all AGP texture levels reside in the same AGP map which should - * be mappable by the client. This is not a big restriction. - * FIXME: To actually enforce this security policy strictly, drm_rmmap - * would have to wait for dma quiescent before removing an AGP map. - * The via_drm_lookup_agp_map call in reality seems to take - * very little CPU time. - */ - - -static __inline__ int -finish_current_sequence(drm_via_state_t *cur_seq) -{ - switch(cur_seq->unfinished) { - case z_address: - DRM_DEBUG("Z Buffer start address is 0x%x\n", cur_seq->z_addr); - break; - case dest_address: - DRM_DEBUG("Destination start address is 0x%x\n", cur_seq->d_addr); - break; - case tex_address: - if (cur_seq->agp_texture) { - unsigned start = cur_seq->tex_level_lo[cur_seq->texture]; - unsigned end = cur_seq->tex_level_hi[cur_seq->texture]; - unsigned long lo=~0, hi=0, tmp; - uint32_t *addr, *pitch, *height, tex; - unsigned i; - - if (end > 9) end = 9; - if (start > 9) start = 9; - - addr =&(cur_seq->t_addr[tex = cur_seq->texture][start]); - pitch = &(cur_seq->pitch[tex][start]); - height = &(cur_seq->height[tex][start]); - - for (i=start; i<= end; ++i) { - tmp = *addr++; - if (tmp < lo) lo = tmp; - tmp += (*height++ << *pitch++); - if (tmp > hi) hi = tmp; - } - - if (! via_drm_lookup_agp_map (cur_seq, lo, hi - lo, cur_seq->dev)) { - DRM_ERROR("AGP texture is not in allowed map\n"); - return 2; - } - } - break; - default: - break; - } - cur_seq->unfinished = no_sequence; - return 0; -} - -static __inline__ int -investigate_hazard( uint32_t cmd, hazard_t hz, drm_via_state_t *cur_seq) -{ - register uint32_t tmp, *tmp_addr; - - if (cur_seq->unfinished && (cur_seq->unfinished != seqs[hz])) { - int ret; - if ((ret = finish_current_sequence(cur_seq))) return ret; - } - - switch(hz) { - case check_for_header2: - if (cmd == HALCYON_HEADER2) return 1; - return 0; - case check_for_header1: - if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1) return 1; - return 0; - case check_for_header2_err: - if (cmd == HALCYON_HEADER2) return 1; - DRM_ERROR("Illegal DMA HALCYON_HEADER2 command\n"); - break; - case check_for_header1_err: - if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1) return 1; - DRM_ERROR("Illegal DMA HALCYON_HEADER1 command\n"); - break; - case check_for_fire: - if ((cmd & HALCYON_FIREMASK) == HALCYON_FIRECMD) return 1; - DRM_ERROR("Illegal DMA HALCYON_FIRECMD command\n"); - break; - case check_for_dummy: - if (HC_DUMMY == cmd) return 0; - DRM_ERROR("Illegal DMA HC_DUMMY command\n"); - break; - case check_for_dd: - if (0xdddddddd == cmd) return 0; - DRM_ERROR("Illegal DMA 0xdddddddd command\n"); - break; - case check_z_buffer_addr0: - cur_seq->unfinished = z_address; - cur_seq->z_addr = (cur_seq->z_addr & 0xFF000000) | - (cmd & 0x00FFFFFF); - return 0; - case check_z_buffer_addr1: - cur_seq->unfinished = z_address; - cur_seq->z_addr = (cur_seq->z_addr & 0x00FFFFFF) | - ((cmd & 0xFF) << 24); - return 0; - case check_z_buffer_addr_mode: - cur_seq->unfinished = z_address; - if ((cmd & 0x0000C000) == 0) return 0; - DRM_ERROR("Attempt to place Z buffer in system memory\n"); - return 2; - case check_destination_addr0: - cur_seq->unfinished = dest_address; - cur_seq->d_addr = (cur_seq->d_addr & 0xFF000000) | - (cmd & 0x00FFFFFF); - return 0; - case check_destination_addr1: - cur_seq->unfinished = dest_address; - cur_seq->d_addr = (cur_seq->d_addr & 0x00FFFFFF) | - ((cmd & 0xFF) << 24); - return 0; - case check_destination_addr_mode: - cur_seq->unfinished = dest_address; - if ((cmd & 0x0000C000) == 0) return 0; - DRM_ERROR("Attempt to place 3D drawing buffer in system memory\n"); - return 2; - case check_texture_addr0: - cur_seq->unfinished = tex_address; - tmp = (cmd >> 24); - tmp_addr = &cur_seq->t_addr[cur_seq->texture][tmp]; - *tmp_addr = (*tmp_addr & 0xFF000000) | (cmd & 0x00FFFFFF); - return 0; - case check_texture_addr1: - cur_seq->unfinished = tex_address; - tmp = ((cmd >> 24) - 0x20); - tmp += tmp << 1; - tmp_addr = &cur_seq->t_addr[cur_seq->texture][tmp]; - *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF) << 24); - tmp_addr++; - *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF00) << 16); - tmp_addr++; - *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF0000) << 8); - return 0; - case check_texture_addr2: - cur_seq->unfinished = tex_address; - cur_seq->tex_level_lo[tmp = cur_seq->texture] = cmd & 0x3F; - cur_seq->tex_level_hi[tmp] = (cmd & 0xFC0) >> 6; - return 0; - case check_texture_addr3: - cur_seq->unfinished = tex_address; - tmp = ((cmd >> 24) - 0x2B); - cur_seq->pitch[cur_seq->texture][tmp] = (cmd & 0x00F00000) >> 20; - if (!tmp && (cmd & 0x000FFFFF)) { - DRM_ERROR("Unimplemented texture level 0 pitch mode.\n"); - return 2; - } - return 0; - case check_texture_addr4: - cur_seq->unfinished = tex_address; - tmp_addr = &cur_seq->t_addr[cur_seq->texture][9]; - *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF) << 24); - return 0; - case check_texture_addr5: - case check_texture_addr6: - cur_seq->unfinished = tex_address; - /* - * Texture width. We don't care since we have the pitch. - */ - return 0; - case check_texture_addr7: - cur_seq->unfinished = tex_address; - tmp_addr = &(cur_seq->height[cur_seq->texture][0]); - tmp_addr[5] = 1 << ((cmd & 0x00F00000) >> 20); - tmp_addr[4] = 1 << ((cmd & 0x000F0000) >> 16); - tmp_addr[3] = 1 << ((cmd & 0x0000F000) >> 12); - tmp_addr[2] = 1 << ((cmd & 0x00000F00) >> 8); - tmp_addr[1] = 1 << ((cmd & 0x000000F0) >> 4); - tmp_addr[0] = 1 << (cmd & 0x0000000F); - return 0; - case check_texture_addr8: - cur_seq->unfinished = tex_address; - tmp_addr = &(cur_seq->height[cur_seq->texture][0]); - tmp_addr[9] = 1 << ((cmd & 0x0000F000) >> 12); - tmp_addr[8] = 1 << ((cmd & 0x00000F00) >> 8); - tmp_addr[7] = 1 << ((cmd & 0x000000F0) >> 4); - tmp_addr[6] = 1 << (cmd & 0x0000000F); - return 0; - case check_texture_addr_mode: - cur_seq->unfinished = tex_address; - if ( 2 == (tmp = cmd & 0x00000003)) { - DRM_ERROR("Attempt to fetch texture from system memory.\n"); - return 2; - } - cur_seq->agp_texture = (tmp == 3); - cur_seq->tex_palette_size[cur_seq->texture] = - (cmd >> 16) & 0x000000007; - return 0; - case check_for_vertex_count: - cur_seq->vertex_count = cmd & 0x0000FFFF; - return 0; - case check_number_texunits: - cur_seq->multitex = (cmd >> 3) & 1; - return 0; - default: - DRM_ERROR("Illegal DMA data: 0x%x\n", cmd); - return 2; - } - return 2; -} - - -static __inline__ int -via_check_prim_list(uint32_t const **buffer, const uint32_t *buf_end, - drm_via_state_t *cur_seq) -{ - drm_via_private_t *dev_priv = (drm_via_private_t *) cur_seq->dev->dev_private; - uint32_t a_fire, bcmd , dw_count; - int ret = 0; - int have_fire; - const uint32_t *buf = *buffer; - - while(buf < buf_end) { - have_fire = 0; - if ((buf_end - buf) < 2) { - DRM_ERROR("Unexpected termination of primitive list.\n"); - ret = 1; - break; - } - if ((*buf & HC_ACMD_MASK) != HC_ACMD_HCmdB) break; - bcmd = *buf++; - if ((*buf & HC_ACMD_MASK) != HC_ACMD_HCmdA) { - DRM_ERROR("Expected Vertex List A command, got 0x%x\n", - *buf); - ret = 1; - break; - } - a_fire = *buf++ | HC_HPLEND_MASK | HC_HPMValidN_MASK | HC_HE3Fire_MASK; - - /* - * How many dwords per vertex ? - */ - - if (cur_seq->agp && ((bcmd & (0xF << 11)) == 0)) { - DRM_ERROR("Illegal B command vertex data for AGP.\n"); - ret = 1; - break; - } - - dw_count = 0; - if (bcmd & (1 << 7)) dw_count += (cur_seq->multitex) ? 2:1; - if (bcmd & (1 << 8)) dw_count += (cur_seq->multitex) ? 2:1; - if (bcmd & (1 << 9)) dw_count++; - if (bcmd & (1 << 10)) dw_count++; - if (bcmd & (1 << 11)) dw_count++; - if (bcmd & (1 << 12)) dw_count++; - if (bcmd & (1 << 13)) dw_count++; - if (bcmd & (1 << 14)) dw_count++; - - while(buf < buf_end) { - if (*buf == a_fire) { - if (dev_priv->num_fire_offsets >= VIA_FIRE_BUF_SIZE) { - DRM_ERROR("Fire offset buffer full.\n"); - ret = 1; - break; - } - dev_priv->fire_offsets[dev_priv->num_fire_offsets++] = buf; - have_fire = 1; - buf++; - if (buf < buf_end && *buf == a_fire) - buf++; - break; - } - if ((*buf == HALCYON_HEADER2) || - ((*buf & HALCYON_FIREMASK) == HALCYON_FIRECMD)) { - DRM_ERROR("Missing Vertex Fire command, " - "Stray Vertex Fire command or verifier " - "lost sync.\n"); - ret = 1; - break; - } - if ((ret = eat_words(&buf, buf_end, dw_count))) - break; - } - if (buf >= buf_end && !have_fire) { - DRM_ERROR("Missing Vertex Fire command or verifier " - "lost sync.\n"); - ret = 1; - break; - } - if (cur_seq->agp && ((buf - cur_seq->buf_start) & 0x01)) { - DRM_ERROR("AGP Primitive list end misaligned.\n"); - ret = 1; - break; - } - } - *buffer = buf; - return ret; -} - - - - - -static __inline__ verifier_state_t -via_check_header2( uint32_t const **buffer, const uint32_t *buf_end, - drm_via_state_t *hc_state) -{ - uint32_t cmd; - int hz_mode; - hazard_t hz; - const uint32_t *buf = *buffer; - const hazard_t *hz_table; - - - if ((buf_end - buf) < 2) { - DRM_ERROR("Illegal termination of DMA HALCYON_HEADER2 sequence.\n"); - return state_error; - } - buf++; - cmd = (*buf++ & 0xFFFF0000) >> 16; - - switch(cmd) { - case HC_ParaType_CmdVdata: - if (via_check_prim_list(&buf, buf_end, hc_state )) - return state_error; - *buffer = buf; - return state_command; - case HC_ParaType_NotTex: - hz_table = table1; - break; - case HC_ParaType_Tex: - hc_state->texture = 0; - hz_table = table2; - break; - case (HC_ParaType_Tex | (HC_SubType_Tex1 << 8)): - hc_state->texture = 1; - hz_table = table2; - break; - case (HC_ParaType_Tex | (HC_SubType_TexGeneral << 8)): - hz_table = table3; - break; - case HC_ParaType_Auto: - if (eat_words(&buf, buf_end, 2)) - return state_error; - *buffer = buf; - return state_command; - case (HC_ParaType_Palette | (HC_SubType_Stipple << 8)): - if (eat_words(&buf, buf_end, 32)) - return state_error; - *buffer = buf; - return state_command; - case (HC_ParaType_Palette | (HC_SubType_TexPalette0 << 8)): - case (HC_ParaType_Palette | (HC_SubType_TexPalette1 << 8)): - DRM_ERROR("Texture palettes are rejected because of " - "lack of info how to determine their size.\n"); - return state_error; - case (HC_ParaType_Palette | (HC_SubType_FogTable << 8)): - DRM_ERROR("Fog factor palettes are rejected because of " - "lack of info how to determine their size.\n"); - return state_error; - default: - - /* - * There are some unimplemented HC_ParaTypes here, that - * need to be implemented if the Mesa driver is extended. - */ - - DRM_ERROR("Invalid or unimplemented HALCYON_HEADER2 " - "DMA subcommand: 0x%x. Previous dword: 0x%x\n", - cmd, *(buf -2)); - *buffer = buf; - return state_error; - } - - while(buf < buf_end) { - cmd = *buf++; - if ((hz = hz_table[cmd >> 24])) { - if ((hz_mode = investigate_hazard(cmd, hz, hc_state))) { - if (hz_mode == 1) { - buf--; - break; - } - return state_error; - } - } else if (hc_state->unfinished && - finish_current_sequence(hc_state)) { - return state_error; - } - } - if (hc_state->unfinished && finish_current_sequence(hc_state)) { - return state_error; - } - *buffer = buf; - return state_command; -} - -static __inline__ verifier_state_t -via_parse_header2( drm_via_private_t *dev_priv, uint32_t const **buffer, const uint32_t *buf_end, - int *fire_count) -{ - uint32_t cmd; - const uint32_t *buf = *buffer; - const uint32_t *next_fire; - int burst = 0; - - next_fire = dev_priv->fire_offsets[*fire_count]; - buf++; - cmd = (*buf & 0xFFFF0000) >> 16; - VIA_WRITE(HC_REG_TRANS_SET + HC_REG_BASE, *buf++); - switch(cmd) { - case HC_ParaType_CmdVdata: - while ((buf < buf_end) && - (*fire_count < dev_priv->num_fire_offsets) && - (*buf & HC_ACMD_MASK) == HC_ACMD_HCmdB ) { - while(buf <= next_fire) { - VIA_WRITE(HC_REG_TRANS_SPACE + HC_REG_BASE + (burst & 63), *buf++); - burst += 4; - } - if ( ( buf < buf_end ) && ((*buf & HALCYON_FIREMASK) == HALCYON_FIRECMD)) - buf++; - - if (++(*fire_count) < dev_priv->num_fire_offsets) - next_fire = dev_priv->fire_offsets[*fire_count]; - } - break; - default: - while(buf < buf_end) { - - if ( *buf == HC_HEADER2 || - (*buf & HALCYON_HEADER1MASK) == HALCYON_HEADER1 || - (*buf & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5 || - (*buf & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6 ) break; - - VIA_WRITE(HC_REG_TRANS_SPACE + HC_REG_BASE + (burst & 63), *buf++); - burst +=4; - } - } - *buffer = buf; - return state_command; -} - - - -static __inline__ int -verify_mmio_address( uint32_t address) -{ - if ((address > 0x3FF) && (address < 0xC00 )) { - DRM_ERROR("Invalid VIDEO DMA command. " - "Attempt to access 3D- or command burst area.\n"); - return 1; - } else if ((address > 0xCFF) && (address < 0x1300)) { - DRM_ERROR("Invalid VIDEO DMA command. " - "Attempt to access PCI DMA area.\n"); - return 1; - } else if (address > 0x13FF ) { - DRM_ERROR("Invalid VIDEO DMA command. " - "Attempt to access VGA registers.\n"); - return 1; - } - return 0; -} - -static __inline__ int -verify_video_tail( uint32_t const **buffer, const uint32_t *buf_end, uint32_t dwords) -{ - const uint32_t *buf = *buffer; - - if (buf_end - buf < dwords) { - DRM_ERROR("Illegal termination of video command.\n"); - return 1; - } - while (dwords--) { - if (*buf++) { - DRM_ERROR("Illegal video command tail.\n"); - return 1; - } - } - *buffer = buf; - return 0; -} - - -static __inline__ verifier_state_t -via_check_header1( uint32_t const **buffer, const uint32_t *buf_end ) -{ - uint32_t cmd; - const uint32_t *buf = *buffer; - verifier_state_t ret = state_command; - - while (buf < buf_end) { - cmd = *buf; - if ((cmd > ((0x3FF >> 2) | HALCYON_HEADER1)) && - (cmd < ((0xC00 >> 2) | HALCYON_HEADER1))) { - if ((cmd & HALCYON_HEADER1MASK) != HALCYON_HEADER1) - break; - DRM_ERROR("Invalid HALCYON_HEADER1 command. " - "Attempt to access 3D- or command burst area.\n"); - ret = state_error; - break; - } else if (cmd > ((0xCFF >> 2) | HALCYON_HEADER1)) { - if ((cmd & HALCYON_HEADER1MASK) != HALCYON_HEADER1) - break; - DRM_ERROR("Invalid HALCYON_HEADER1 command. " - "Attempt to access VGA registers.\n"); - ret = state_error; - break; - } else { - buf += 2; - } - } - *buffer = buf; - return ret; -} - -static __inline__ verifier_state_t -via_parse_header1( drm_via_private_t *dev_priv, uint32_t const **buffer, const uint32_t *buf_end ) -{ - register uint32_t cmd; - const uint32_t *buf = *buffer; - - while (buf < buf_end) { - cmd = *buf; - if ((cmd & HALCYON_HEADER1MASK) != HALCYON_HEADER1) break; - VIA_WRITE( (cmd & ~HALCYON_HEADER1MASK) << 2, *++buf); - buf++; - } - *buffer = buf; - return state_command; -} - -static __inline__ verifier_state_t -via_check_vheader5( uint32_t const **buffer, const uint32_t *buf_end ) -{ - uint32_t data; - const uint32_t *buf = *buffer; - - if (buf_end - buf < 4) { - DRM_ERROR("Illegal termination of video header5 command\n"); - return state_error; - } - - data = *buf++ & ~VIA_VIDEOMASK; - if (verify_mmio_address(data)) - return state_error; - - data = *buf++; - if (*buf++ != 0x00F50000) { - DRM_ERROR("Illegal header5 header data\n"); - return state_error; - } - if (*buf++ != 0x00000000) { - DRM_ERROR("Illegal header5 header data\n"); - return state_error; - } - if (eat_words(&buf, buf_end, data)) - return state_error; - if ((data & 3) && verify_video_tail(&buf, buf_end, 4 - (data & 3))) - return state_error; - *buffer = buf; - return state_command; - -} - -static __inline__ verifier_state_t -via_parse_vheader5( drm_via_private_t *dev_priv, uint32_t const **buffer, const uint32_t *buf_end ) -{ - uint32_t addr, count, i; - const uint32_t *buf = *buffer; - - addr = *buf++ & ~VIA_VIDEOMASK; - i = count = *buf; - buf += 3; - while(i--) { - VIA_WRITE(addr, *buf++); - } - if (count & 3) buf += 4 - (count & 3); - *buffer = buf; - return state_command; -} - - -static __inline__ verifier_state_t -via_check_vheader6( uint32_t const **buffer, const uint32_t *buf_end ) -{ - uint32_t data; - const uint32_t *buf = *buffer; - uint32_t i; - - - if (buf_end - buf < 4) { - DRM_ERROR("Illegal termination of video header6 command\n"); - return state_error; - } - buf++; - data = *buf++; - if (*buf++ != 0x00F60000) { - DRM_ERROR("Illegal header6 header data\n"); - return state_error; - } - if (*buf++ != 0x00000000) { - DRM_ERROR("Illegal header6 header data\n"); - return state_error; - } - if ((buf_end - buf) < (data << 1)) { - DRM_ERROR("Illegal termination of video header6 command\n"); - return state_error; - } - for (i=0; i<data; ++i) { - if (verify_mmio_address(*buf++)) - return state_error; - buf++; - } - data <<= 1; - if ((data & 3) && verify_video_tail(&buf, buf_end, 4 - (data & 3))) - return state_error; - *buffer = buf; - return state_command; -} - -static __inline__ verifier_state_t -via_parse_vheader6( drm_via_private_t *dev_priv, uint32_t const **buffer, const uint32_t *buf_end ) -{ - - uint32_t addr, count, i; - const uint32_t *buf = *buffer; - - i = count = *++buf; - buf += 3; - while(i--) { - addr = *buf++; - VIA_WRITE(addr, *buf++); - } - count <<= 1; - if (count & 3) buf += 4 - (count & 3); - *buffer = buf; - return state_command; -} - - - -int -via_verify_command_stream(const uint32_t * buf, unsigned int size, drm_device_t *dev, - int agp) -{ - - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - drm_via_state_t *hc_state = &dev_priv->hc_state; - drm_via_state_t saved_state = *hc_state; - uint32_t cmd; - const uint32_t *buf_end = buf + ( size >> 2 ); - verifier_state_t state = state_command; - int pro_group_a = dev_priv->pro_group_a; - - hc_state->dev = dev; - hc_state->unfinished = no_sequence; - hc_state->map_cache = NULL; - hc_state->agp = agp; - hc_state->buf_start = buf; - dev_priv->num_fire_offsets = 0; - - while (buf < buf_end) { - - switch (state) { - case state_header2: - state = via_check_header2( &buf, buf_end, hc_state ); - break; - case state_header1: - state = via_check_header1( &buf, buf_end ); - break; - case state_vheader5: - state = via_check_vheader5( &buf, buf_end ); - break; - case state_vheader6: - state = via_check_vheader6( &buf, buf_end ); - break; - case state_command: - if (HALCYON_HEADER2 == (cmd = *buf)) - state = state_header2; - else if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1) - state = state_header1; - else if (pro_group_a && (cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5) - state = state_vheader5; - else if (pro_group_a && (cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6) - state = state_vheader6; - else { - DRM_ERROR("Invalid / Unimplemented DMA HEADER command. 0x%x\n", - cmd); - state = state_error; - } - break; - case state_error: - default: - *hc_state = saved_state; - return DRM_ERR(EINVAL); - } - } - if (state == state_error) { - *hc_state = saved_state; - return DRM_ERR(EINVAL); - } - return 0; -} - -int -via_parse_command_stream(drm_device_t *dev, const uint32_t * buf, unsigned int size) -{ - - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - uint32_t cmd; - const uint32_t *buf_end = buf + ( size >> 2 ); - verifier_state_t state = state_command; - int fire_count = 0; - - while (buf < buf_end) { - - switch (state) { - case state_header2: - state = via_parse_header2( dev_priv, &buf, buf_end, &fire_count ); - break; - case state_header1: - state = via_parse_header1( dev_priv, &buf, buf_end ); - break; - case state_vheader5: - state = via_parse_vheader5( dev_priv, &buf, buf_end ); - break; - case state_vheader6: - state = via_parse_vheader6( dev_priv, &buf, buf_end ); - break; - case state_command: - if (HALCYON_HEADER2 == (cmd = *buf)) - state = state_header2; - else if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1) - state = state_header1; - else if ((cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5) - state = state_vheader5; - else if ((cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6) - state = state_vheader6; - else { - DRM_ERROR("Invalid / Unimplemented DMA HEADER command. 0x%x\n", - cmd); - state = state_error; - } - break; - case state_error: - default: - return DRM_ERR(EINVAL); - } - } - if (state == state_error) { - return DRM_ERR(EINVAL); - } - return 0; -} - - - -static void -setup_hazard_table(hz_init_t init_table[], hazard_t table[], int size) -{ - int i; - - for(i=0; i<256; ++i) { - table[i] = forbidden_command; - } - - for(i=0; i<size; ++i) { - table[init_table[i].code] = init_table[i].hz; - } -} - -void -via_init_command_verifier( void ) -{ - setup_hazard_table(init_table1, table1, sizeof(init_table1) / sizeof(hz_init_t)); - setup_hazard_table(init_table2, table2, sizeof(init_table2) / sizeof(hz_init_t)); - setup_hazard_table(init_table3, table3, sizeof(init_table3) / sizeof(hz_init_t)); -} diff --git a/shared/via_verifier.h b/shared/via_verifier.h deleted file mode 100644 index a8e135926..000000000 --- a/shared/via_verifier.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Copyright 2004 The Unichrome Project. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE UNICHROME PROJECT, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Author: Thomas Hellström 2004. - */ - -#ifndef _VIA_VERIFIER_H_ -#define _VIA_VERIFIER_H_ - -typedef enum{ - no_sequence = 0, - z_address, - dest_address, - tex_address -}drm_via_sequence_t; - - - -typedef struct{ - unsigned texture; - uint32_t z_addr; - uint32_t d_addr; - uint32_t t_addr[2][10]; - uint32_t pitch[2][10]; - uint32_t height[2][10]; - uint32_t tex_level_lo[2]; - uint32_t tex_level_hi[2]; - uint32_t tex_palette_size[2]; - drm_via_sequence_t unfinished; - int agp_texture; - int multitex; - drm_device_t *dev; - drm_map_t *map_cache; - uint32_t vertex_count; - int agp; - const uint32_t *buf_start; -} drm_via_state_t; - -extern int via_verify_command_stream(const uint32_t * buf, unsigned int size, - drm_device_t *dev, int agp); - -#endif diff --git a/shared/via_video.c b/shared/via_video.c deleted file mode 100644 index d79ee028d..000000000 --- a/shared/via_video.c +++ /dev/null @@ -1,102 +0,0 @@ -/* - * Copyright 2005 Thomas Hellstrom. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S), AND/OR THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Author: Thomas Hellstrom 2005. - * - * Video and XvMC related functions. - */ - -#include "via.h" -#include "drmP.h" -#include "via_drm.h" -#include "via_drv.h" - -void -via_init_futex(drm_via_private_t *dev_priv) -{ - unsigned int i; - - DRM_DEBUG("%s\n", __FUNCTION__); - - for (i = 0; i < VIA_NR_XVMC_LOCKS; ++i) { - DRM_INIT_WAITQUEUE(&(dev_priv->decoder_queue[i])); - XVMCLOCKPTR(dev_priv->sarea_priv, i)->lock = 0; - } -} - -void -via_cleanup_futex(drm_via_private_t *dev_priv) -{ -} - -void -via_release_futex(drm_via_private_t *dev_priv, int context) -{ - unsigned int i; - volatile int *lock; - - if (!dev_priv->sarea_priv) - return; - - for (i=0; i < VIA_NR_XVMC_LOCKS; ++i) { - lock = (int *) XVMCLOCKPTR(dev_priv->sarea_priv, i); - if ( (_DRM_LOCKING_CONTEXT( *lock ) == context)) { - if (_DRM_LOCK_IS_HELD( *lock ) && (*lock & _DRM_LOCK_CONT)) { - DRM_WAKEUP( &(dev_priv->decoder_queue[i])); - } - *lock = 0; - } - } -} - -int -via_decoder_futex(DRM_IOCTL_ARGS) -{ - DRM_DEVICE; - drm_via_futex_t fx; - volatile int *lock; - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - drm_via_sarea_t *sAPriv = dev_priv->sarea_priv; - int ret = 0; - - DRM_DEBUG("%s\n", __FUNCTION__); - - DRM_COPY_FROM_USER_IOCTL(fx, (drm_via_futex_t __user *) data, - sizeof(fx)); - - if (fx.lock > VIA_NR_XVMC_LOCKS) - return -EFAULT; - - lock = (int *)XVMCLOCKPTR(sAPriv, fx.lock); - - switch (fx.func) { - case VIA_FUTEX_WAIT: - DRM_WAIT_ON(ret, dev_priv->decoder_queue[fx.lock], - (fx.ms / 10) * (DRM_HZ / 100), *lock != fx.val); - return ret; - case VIA_FUTEX_WAKE: - DRM_WAKEUP(&(dev_priv->decoder_queue[fx.lock])); - return 0; - } - return 0; -} - |