diff options
author | Hong Liu <hong.liu@intel.com> | 2008-01-23 21:04:32 +0800 |
---|---|---|
committer | Zhenyu Wang <zhenyu.z.wang@intel.com> | 2008-01-23 21:24:09 +0800 |
commit | 734e115871ce98badb8800383c423493802ae3d3 (patch) | |
tree | 93f29cb90fa5734e6d1ae4a92eae524cf0e0c57a /hw/xfree86 | |
parent | cc22b05ea06e08568d0f0abdaccf67bd32662e94 (diff) |
Bug #12439: add a quirk to use +hsync +vsync for the probed detailed mode.
Samsung 205BW quirk is somehow reworked.
Diffstat (limited to 'hw/xfree86')
-rw-r--r-- | hw/xfree86/modes/xf86EdidModes.c | 37 |
1 files changed, 28 insertions, 9 deletions
diff --git a/hw/xfree86/modes/xf86EdidModes.c b/hw/xfree86/modes/xf86EdidModes.c index 87a812765..b865727ef 100644 --- a/hw/xfree86/modes/xf86EdidModes.c +++ b/hw/xfree86/modes/xf86EdidModes.c @@ -66,6 +66,8 @@ typedef enum { DDC_QUIRK_DETAILED_USE_MAXIMUM_SIZE = 1 << 5, /* Monitor forgot to set the first detailed is preferred bit. */ DDC_QUIRK_FIRST_DETAILED_PREFERRED = 1 << 6, + /* use +hsync +vsync for detailed mode */ + DDC_QUIRK_DETAILED_SYNC_PP = 1 << 7, } ddc_quirk_t; static Bool quirk_prefer_large_60 (int scrnIndex, xf86MonPtr DDC) @@ -160,6 +162,15 @@ static Bool quirk_first_detailed_preferred (int scrnIndex, xf86MonPtr DDC) return FALSE; } +static Bool quirk_detailed_sync_pp(int scrnIndex, xf86MonPtr DDC) +{ + /* Bug #12439: Samsung SyncMaster 205BW */ + if (memcmp (DDC->vendor.name, "SAM", 4) == 0 && + DDC->vendor.prod_id == 541) + return TRUE; + return FALSE; +} + typedef struct { Bool (*detect) (int scrnIndex, xf86MonPtr DDC); ddc_quirk_t quirk; @@ -195,6 +206,10 @@ static const ddc_quirk_map_t ddc_quirks[] = { quirk_first_detailed_preferred, DDC_QUIRK_FIRST_DETAILED_PREFERRED, "First detailed timing was not marked as preferred." }, + { + quirk_detailed_sync_pp, DDC_QUIRK_DETAILED_SYNC_PP, + "Use +hsync +vsync for detailed timing." + }, { NULL, DDC_QUIRK_NONE, "No known quirks" @@ -341,15 +356,19 @@ DDCModeFromDetailedTiming(int scrnIndex, struct detailed_timings *timing, if (timing->interlaced) Mode->Flags |= V_INTERLACE; - if (timing->misc & 0x02) - Mode->Flags |= V_PVSYNC; - else - Mode->Flags |= V_NVSYNC; - - if (timing->misc & 0x01) - Mode->Flags |= V_PHSYNC; - else - Mode->Flags |= V_NHSYNC; + if (quirks & DDC_QUIRK_DETAILED_SYNC_PP) + Mode->Flags |= V_PVSYNC | V_PHSYNC; + else { + if (timing->misc & 0x02) + Mode->Flags |= V_PVSYNC; + else + Mode->Flags |= V_NVSYNC; + + if (timing->misc & 0x01) + Mode->Flags |= V_PHSYNC; + else + Mode->Flags |= V_NHSYNC; + } return Mode; } |