diff options
author | Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-09-16 09:50:02 +0800 |
---|---|---|
committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-09-28 15:58:20 +0800 |
commit | c8033f1b1ea118f3f47b7f3de557b7a8dcf11082 (patch) | |
tree | 708a177a7c62dd94fd65463dce56b508a5571cc0 | |
parent | 81aae67e58f7c3123724e629a81e2c937864e3be (diff) |
i965: Add all device ids for sandybridge
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_chipset.h | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h index b5f180bbc8..1e7ceed32a 100644 --- a/src/mesa/drivers/dri/intel/intel_chipset.h +++ b/src/mesa/drivers/dri/intel/intel_chipset.h @@ -71,9 +71,13 @@ #define PCI_CHIP_ILD_G 0x0042 #define PCI_CHIP_ILM_G 0x0046 -#define PCI_CHIP_SANDYBRIDGE 0x0102 -#define PCI_CHIP_SANDYBRIDGE_M 0x0106 -#define PCI_CHIP_SANDYBRIDGE_M_D0 0x0126 +#define PCI_CHIP_SANDYBRIDGE_GT1 0x0102 /* Desktop */ +#define PCI_CHIP_SANDYBRIDGE_GT2 0x0112 +#define PCI_CHIP_SANDYBRIDGE_GT2_PLUS 0x0122 +#define PCI_CHIP_SANDYBRIDGE_M_GT1 0x0106 /* Mobile */ +#define PCI_CHIP_SANDYBRIDGE_M_GT2 0x0116 +#define PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS 0x0126 +#define PCI_CHIP_SANDYBRIDGE_S 0x010A /* Server */ #define IS_MOBILE(devid) (devid == PCI_CHIP_I855_GM || \ devid == PCI_CHIP_I915_GM || \ @@ -119,9 +123,13 @@ /* Compat macro for intel_decode.c */ #define IS_IRONLAKE(devid) IS_GEN5(devid) -#define IS_GEN6(devid) (devid == PCI_CHIP_SANDYBRIDGE || \ - devid == PCI_CHIP_SANDYBRIDGE_M || \ - devid == PCI_CHIP_SANDYBRIDGE_M_D0) +#define IS_GEN6(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT1 || \ + devid == PCI_CHIP_SANDYBRIDGE_GT2 || \ + devid == PCI_CHIP_SANDYBRIDGE_GT2_PLUS || \ + devid == PCI_CHIP_SANDYBRIDGE_M_GT1 || \ + devid == PCI_CHIP_SANDYBRIDGE_M_GT2 || \ + devid == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS || \ + devid == PCI_CHIP_SANDYBRIDGE_S) #define IS_965(devid) (IS_GEN4(devid) || \ IS_G4X(devid) || \ |