diff options
| author | Jani Nikula <jani.nikula@intel.com> | 2018-01-19 10:24:30 +0200 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2018-01-19 14:10:18 +0200 |
| commit | 94bd67c5d6184c435c2fed0bfb39d75b3138b7a8 (patch) | |
| tree | b8a9f4459b45ec82c69a5c8e02138104c4ebc0f8 /tools | |
| parent | 51b2ce5f09a58f364e9aa289075ffa8280f23e05 (diff) | |
tools/intel_vbt_decode: update vbt defs from kernel
Sync up with the following intel_vbt_defs.h changes in kernel:
c4fb60b9aba9 ("drm/i915/bios: add DP max link rate to VBT child device
struct")
d6038611aa3d ("drm/i915: Parse max HDMI TMDS clock from VBT")
6e8fbf8d19e4 ("drm/i915/vbt: Fix HDMI level shifter and max data rate
bitfield sizes")
9c3b2689d01f ("drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.")
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'tools')
| -rw-r--r-- | tools/intel_vbt_defs.h | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/tools/intel_vbt_defs.h b/tools/intel_vbt_defs.h index e388f9ad..3f5eff49 100644 --- a/tools/intel_vbt_defs.h +++ b/tools/intel_vbt_defs.h @@ -304,8 +304,20 @@ struct bdb_general_features { #define DVO_PORT_MIPIC 23 /* 171 */ #define DVO_PORT_MIPID 24 /* 171 */ +#define HDMI_MAX_DATA_RATE_PLATFORM 0 /* 204 */ +#define HDMI_MAX_DATA_RATE_297 1 /* 204 */ +#define HDMI_MAX_DATA_RATE_165 2 /* 204 */ + #define LEGACY_CHILD_DEVICE_CONFIG_SIZE 33 +/* DDC Bus DDI Type 155+ */ +enum vbt_gmbus_ddi { + DDC_BUS_DDI_B = 0x1, + DDC_BUS_DDI_C, + DDC_BUS_DDI_D, + DDC_BUS_DDI_F, +}; + /* * The child device config, aka the display device data structure, provides a * description of a port and its configuration on the platform. @@ -334,8 +346,8 @@ struct child_device_config { u8 i2c_speed; u8 dp_onboard_redriver; /* 158 */ u8 dp_ondock_redriver; /* 158 */ - u8 hdmi_level_shifter_value:4; /* 169 */ - u8 hdmi_max_data_rate:4; /* 204 */ + u8 hdmi_level_shifter_value:5; /* 169 */ + u8 hdmi_max_data_rate:3; /* 204 */ u16 dtd_buf_ptr; /* 161 */ u8 edidless_efp:1; /* 161 */ u8 compression_enable:1; /* 198 */ @@ -400,6 +412,8 @@ struct child_device_config { u16 dp_gpio_pin_num; /* 195 */ u8 dp_iboost_level:4; /* 196 */ u8 hdmi_iboost_level:4; /* 196 */ + u8 dp_max_link_rate:2; /* 216 CNL+ */ + u8 dp_max_link_rate_reserved:6; /* 216 */ } __packed; struct bdb_general_definitions { |