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authorJunyan He <junyan.he@intel.com>2016-04-05 23:19:52 +0800
committerJunyan He <junyan.he@intel.com>2016-04-05 23:19:52 +0800
commit00d1ccff70e647381e90e64bf59a65bf48b9e307 (patch)
tree7388b0bf24760076b04caa4f0e370c750ce1604a /backend
parentbbb5b5eeaca7ad4e45f6143b3882f170264cbf86 (diff)
dev info
Diffstat (limited to 'backend')
-rw-r--r--backend/src/driver/cl_gen_batchbuffer.cpp6
-rw-r--r--backend/src/driver/cl_gen_device_id.cpp297
-rw-r--r--backend/src/driver/cl_gen_gpu_state.cpp1
-rw-r--r--backend/src/driver/cl_gen_kernel.cpp10
4 files changed, 201 insertions, 113 deletions
diff --git a/backend/src/driver/cl_gen_batchbuffer.cpp b/backend/src/driver/cl_gen_batchbuffer.cpp
index b3ec531e..7ed3e6a9 100644
--- a/backend/src/driver/cl_gen_batchbuffer.cpp
+++ b/backend/src/driver/cl_gen_batchbuffer.cpp
@@ -89,6 +89,12 @@ bool GenBatchbuffer::flush(void)
*(uint32_t*)this->ptr = MI_BATCH_BUFFER_END;
this->ptr += 4;
used = this->ptr - this->map;
+
+printf("{{{{{{{{{{{{{{{{{{{{{{{{{{{|b\n");
+ for (int i =0; i < used; i++)
+ printf(" \n%x", ((char *)this->map)[i]);
+
+
dri_bo_unmap(this->buffer);
this->ptr = this->map = NULL;
diff --git a/backend/src/driver/cl_gen_device_id.cpp b/backend/src/driver/cl_gen_device_id.cpp
index 049d555e..005be34b 100644
--- a/backend/src/driver/cl_gen_device_id.cpp
+++ b/backend/src/driver/cl_gen_device_id.cpp
@@ -252,251 +252,342 @@ GenGPUDevice::~GenGPUDevice(void)
gpgpuDeviceClose(this);
}
+struct GPUDeviceDetails {
+ cl_uint max_thread_per_unit;
+ cl_uint sub_slice_count;
+ cl_ulong scratch_mem_size;
+};
static void initGenDevice(GenGPUDevice* gpu)
{
+ static struct GPUDeviceDetails _ivb_gt1 = {
+ .max_thread_per_unit = 6,
+ .sub_slice_count = 1,
+ .scratch_mem_size = 12 << 10,
+ };
+ static struct GPUDeviceDetails _ivb_gt2 = {
+ .max_thread_per_unit = 8,
+ .sub_slice_count = 2,
+ .scratch_mem_size = 12 << 10,
+ };
+ static struct GPUDeviceDetails _baytrail_gt = {
+ .max_thread_per_unit = 8,
+ .sub_slice_count = 1,
+ .scratch_mem_size = 12 << 10,
+ };
+
+ /* XXX we clone IVB for HSW now */
+ static struct GPUDeviceDetails _hsw_gt1 = {
+ .max_thread_per_unit = 7,
+ .sub_slice_count = 1,
+ .scratch_mem_size = 2 << 20,
+ };
+ static struct GPUDeviceDetails _hsw_gt2 = {
+ .max_thread_per_unit = 7,
+ .sub_slice_count = 2,
+ .scratch_mem_size = 2 << 20,
+ };
+ static struct GPUDeviceDetails _hsw_gt3 = {
+ .max_thread_per_unit = 7,
+ .sub_slice_count = 4,
+ .scratch_mem_size = 2 << 20,
+ };
+//Cherryview has the same pciid, must get the max_compute_unit and max_thread_per_unit from drm
+ static struct GPUDeviceDetails _chv_gt = {
+ .max_thread_per_unit = 7,
+ .sub_slice_count = 2,
+ .scratch_mem_size = 2 << 20,
+ };
+
+ static struct GPUDeviceDetails _brw_gt1 = {
+ .max_thread_per_unit = 7,
+ .sub_slice_count = 2,
+ .scratch_mem_size = 2 << 20,
+ };
+ static struct GPUDeviceDetails _brw_gt2 = {
+ .max_thread_per_unit = 7,
+ .sub_slice_count = 3,
+ .scratch_mem_size = 2 << 20,
+ };
+ static struct GPUDeviceDetails _brw_gt3 = {
+ .max_thread_per_unit = 7,
+ .sub_slice_count = 6,
+ .scratch_mem_size = 2 << 20,
+ };
+
+ /* XXX we clone brw now */
+ static struct GPUDeviceDetails _skl_gt1 = {
+ .max_thread_per_unit = 7,
+ .sub_slice_count = 2,
+ .scratch_mem_size = 2 << 20,
+ };
+ static struct GPUDeviceDetails _skl_gt2 = {
+ .max_thread_per_unit = 7,
+ .sub_slice_count = 3,
+ .scratch_mem_size = 2 << 20,
+ };
+ static struct GPUDeviceDetails _skl_gt3 = {
+ .max_thread_per_unit = 7,
+ .sub_slice_count = 6,
+ .scratch_mem_size = 2 << 20,
+ };
+ static struct GPUDeviceDetails _skl_gt4 = {
+ .max_thread_per_unit = 7,
+ .sub_slice_count = 9,
+ .scratch_mem_size = 2 << 20,
+ };
+ static struct GPUDeviceDetails _bxt_gt = {
+ .max_thread_per_unit = 6,
+ .sub_slice_count = 3,
+ .scratch_mem_size = 2 << 20,
+ };
+
+
int device_id = gpu->device_id;
-#define DECL_INFO_STRING(STRUCT, FIELD, STRING) \
+#define DECL_INFO_STRING(STRUCT, FIELD, STRING, DEV_DETAIL) \
STRUCT.FIELD = STRING; \
STRUCT.JOIN(FIELD,_sz) = sizeof(STRING); \
gen_device = &STRUCT; \
+ gpu->max_thread_per_unit = DEV_DETAIL.max_thread_per_unit; \
+ gpu->sub_slice_count = DEV_DETAIL.sub_slice_count; \
+ gpu->scratch_mem_size = DEV_DETAIL.scratch_mem_size; \
break;
switch (device_id) {
case PCI_CHIP_HASWELL_D1:
- DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell GT1 Desktop");
+ DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell GT1 Desktop", _hsw_gt1);
case PCI_CHIP_HASWELL_D2:
- DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell GT2 Desktop");
+ DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell GT2 Desktop", _hsw_gt2);
case PCI_CHIP_HASWELL_D3:
- DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell GT3 Desktop");
+ DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell GT3 Desktop", _hsw_gt3);
case PCI_CHIP_HASWELL_S1:
- DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell GT1 Server");
+ DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell GT1 Server", _hsw_gt1);
case PCI_CHIP_HASWELL_S2:
- DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell GT2 Server");
+ DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell GT2 Server", _hsw_gt2);
case PCI_CHIP_HASWELL_S3:
- DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell GT3 Server");
+ DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell GT3 Server", _hsw_gt3);
case PCI_CHIP_HASWELL_M1:
- DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell GT1 Mobile");
+ DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell GT1 Mobile", _hsw_gt1);
case PCI_CHIP_HASWELL_M2:
- DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell GT2 Mobile");
+ DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell GT2 Mobile", _hsw_gt2);
case PCI_CHIP_HASWELL_M3:
- DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell GT3 Mobile");
+ DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell GT3 Mobile", _hsw_gt3);
case PCI_CHIP_HASWELL_B1:
- DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell GT1 reserved");
+ DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell GT1 reserved", _hsw_gt1);
case PCI_CHIP_HASWELL_B2:
- DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell GT2 reserved");
+ DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell GT2 reserved", _hsw_gt2);
case PCI_CHIP_HASWELL_B3:
- DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell GT3 reserved");
+ DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell GT3 reserved", _hsw_gt3);
case PCI_CHIP_HASWELL_E1:
- DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell GT1 reserved");
+ DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell GT1 reserved", _hsw_gt1);
case PCI_CHIP_HASWELL_E2:
- DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell GT2 reserved");
+ DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell GT2 reserved", _hsw_gt2);
case PCI_CHIP_HASWELL_E3:
- DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell GT3 reserved");
+ DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell GT3 reserved", _hsw_gt3);
case PCI_CHIP_HASWELL_SDV_D1:
DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell"
- " Software Development Vehicle device GT1 Desktop");
+ " Software Development Vehicle device GT1 Desktop", _hsw_gt1);
case PCI_CHIP_HASWELL_SDV_D2:
DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell"
- " Software Development Vehicle device GT2 Desktop");
+ " Software Development Vehicle device GT2 Desktop", _hsw_gt2);
case PCI_CHIP_HASWELL_SDV_D3:
DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell"
- " Software Development Vehicle device GT3 Desktop");
+ " Software Development Vehicle device GT3 Desktop", _hsw_gt3);
case PCI_CHIP_HASWELL_SDV_S1:
DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell"
- " Software Development Vehicle device GT1 Server");
+ " Software Development Vehicle device GT1 Server", _hsw_gt1);
case PCI_CHIP_HASWELL_SDV_S2:
DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell"
- " Software Development Vehicle device GT2 Server");
+ " Software Development Vehicle device GT2 Server", _hsw_gt2);
case PCI_CHIP_HASWELL_SDV_S3:
DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell"
- " Software Development Vehicle device GT3 Server");
+ " Software Development Vehicle device GT3 Server", _hsw_gt3);
case PCI_CHIP_HASWELL_SDV_M1:
DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell"
- " Software Development Vehicle device GT1 Mobile");
+ " Software Development Vehicle device GT1 Mobile", _hsw_gt1);
case PCI_CHIP_HASWELL_SDV_M2:
DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell"
- " Software Development Vehicle device GT2 Mobile");
+ " Software Development Vehicle device GT2 Mobile", _hsw_gt2);
case PCI_CHIP_HASWELL_SDV_M3:
DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell"
- " Software Development Vehicle device GT3 Mobile");
+ " Software Development Vehicle device GT3 Mobile", _hsw_gt3);
case PCI_CHIP_HASWELL_SDV_B1:
DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell"
- " Software Development Vehicle device GT1 reserved");
+ " Software Development Vehicle device GT1 reserved", _hsw_gt1);
case PCI_CHIP_HASWELL_SDV_B2:
DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell"
- " Software Development Vehicle device GT2 reserved");
+ " Software Development Vehicle device GT2 reserved", _hsw_gt2);
case PCI_CHIP_HASWELL_SDV_B3:
DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell"
- " Software Development Vehicle device GT3 reserved");
+ " Software Development Vehicle device GT3 reserved", _hsw_gt3);
case PCI_CHIP_HASWELL_SDV_E1:
DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell"
- " Software Development Vehicle device GT1 reserved");
+ " Software Development Vehicle device GT1 reserved", _hsw_gt1);
case PCI_CHIP_HASWELL_SDV_E2:
DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell"
- " Software Development Vehicle device GT2 reserved");
+ " Software Development Vehicle device GT2 reserved", _hsw_gt2);
case PCI_CHIP_HASWELL_SDV_E3:
DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell"
- " Software Development Vehicle device GT3 reserved");
+ " Software Development Vehicle device GT3 reserved", _hsw_gt3);
case PCI_CHIP_HASWELL_ULT_D1:
- DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT1 Desktop");
+ DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT1 Desktop", _hsw_gt1);
case PCI_CHIP_HASWELL_ULT_D2:
- DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT2 Desktop");
+ DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT2 Desktop", _hsw_gt2);
case PCI_CHIP_HASWELL_ULT_D3:
- DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT3 Desktop");
+ DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT3 Desktop", _hsw_gt3);
case PCI_CHIP_HASWELL_ULT_S1:
- DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT1 Server");
+ DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT1 Server", _hsw_gt1);
case PCI_CHIP_HASWELL_ULT_S2:
- DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT2 Server");
+ DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT2 Server", _hsw_gt2);
case PCI_CHIP_HASWELL_ULT_S3:
- DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT3 Server");
+ DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT3 Server", _hsw_gt3);
case PCI_CHIP_HASWELL_ULT_M1:
- DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT1 Mobile");
+ DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT1 Mobile", _hsw_gt1);
case PCI_CHIP_HASWELL_ULT_M2:
- DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT2 Mobile");
+ DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT2 Mobile", _hsw_gt2);
case PCI_CHIP_HASWELL_ULT_M3:
- DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT3 Mobile");
+ DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT3 Mobile", _hsw_gt3);
case PCI_CHIP_HASWELL_ULT_B1:
- DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT1 reserved");
+ DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT1 reserved", _hsw_gt1);
case PCI_CHIP_HASWELL_ULT_B2:
- DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT2 reserved");
+ DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT2 reserved", _hsw_gt2);
case PCI_CHIP_HASWELL_ULT_B3:
- DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT3 reserved");
+ DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT3 reserved", _hsw_gt3);
case PCI_CHIP_HASWELL_ULT_E1:
- DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT1 reserved");
+ DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT1 reserved", _hsw_gt1);
case PCI_CHIP_HASWELL_ULT_E2:
- DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT2 reserved");
+ DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT2 reserved", _hsw_gt2);
case PCI_CHIP_HASWELL_ULT_E3:
- DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT3 reserved");
+ DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT3 reserved", _hsw_gt3);
/* CRW */
case PCI_CHIP_HASWELL_CRW_D1:
- DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell CRW GT1 Desktop");
+ DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell CRW GT1 Desktop", _hsw_gt1);
case PCI_CHIP_HASWELL_CRW_D2:
- DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell CRW GT2 Desktop");
+ DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell CRW GT2 Desktop", _hsw_gt2);
case PCI_CHIP_HASWELL_CRW_D3:
- DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell CRW GT3 Desktop");
+ DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell CRW GT3 Desktop", _hsw_gt3);
case PCI_CHIP_HASWELL_CRW_S1:
- DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell CRW GT1 Server");
+ DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell CRW GT1 Server", _hsw_gt1);
case PCI_CHIP_HASWELL_CRW_S2:
- DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell CRW GT2 Server");
+ DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell CRW GT2 Server", _hsw_gt2);
case PCI_CHIP_HASWELL_CRW_S3:
- DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell CRW GT3 Server");
+ DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell CRW GT3 Server", _hsw_gt3);
case PCI_CHIP_HASWELL_CRW_M1:
- DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell CRW GT1 Mobile");
+ DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell CRW GT1 Mobile", _hsw_gt1);
case PCI_CHIP_HASWELL_CRW_M2:
- DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell CRW GT2 Mobile");
+ DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell CRW GT2 Mobile", _hsw_gt2);
case PCI_CHIP_HASWELL_CRW_M3:
- DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell CRW GT3 Mobile");
+ DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell CRW GT3 Mobile", _hsw_gt3);
case PCI_CHIP_HASWELL_CRW_B1:
- DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell CRW GT1 reserved");
+ DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell CRW GT1 reserved", _hsw_gt1);
case PCI_CHIP_HASWELL_CRW_B2:
- DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell CRW GT2 reserved");
+ DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell CRW GT2 reserved", _hsw_gt2);
case PCI_CHIP_HASWELL_CRW_B3:
- DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell CRW GT3 reserved");
+ DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell CRW GT3 reserved", _hsw_gt3);
case PCI_CHIP_HASWELL_CRW_E1:
- DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell CRW GT1 reserved");
+ DECL_INFO_STRING(intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell CRW GT1 reserved", _hsw_gt1);
case PCI_CHIP_HASWELL_CRW_E2:
- DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell CRW GT2 reserved");
+ DECL_INFO_STRING(intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell CRW GT2 reserved", _hsw_gt2);
case PCI_CHIP_HASWELL_CRW_E3:
- DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell CRW GT3 reserved");
+ DECL_INFO_STRING(intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell CRW GT3 reserved", _hsw_gt3);
case PCI_CHIP_IVYBRIDGE_GT1:
- DECL_INFO_STRING(intel_ivb_gt1_device, name, "Intel(R) HD Graphics IvyBridge GT1");
+ DECL_INFO_STRING(intel_ivb_gt1_device, name, "Intel(R) HD Graphics IvyBridge GT1", _ivb_gt1);
case PCI_CHIP_IVYBRIDGE_M_GT1:
- DECL_INFO_STRING(intel_ivb_gt1_device, name, "Intel(R) HD Graphics IvyBridge M GT1");
+ DECL_INFO_STRING(intel_ivb_gt1_device, name, "Intel(R) HD Graphics IvyBridge M GT1", _ivb_gt1);
case PCI_CHIP_IVYBRIDGE_S_GT1:
- DECL_INFO_STRING(intel_ivb_gt1_device, name, "Intel(R) HD Graphics IvyBridge S GT1");
+ DECL_INFO_STRING(intel_ivb_gt1_device, name, "Intel(R) HD Graphics IvyBridge S GT1", _ivb_gt1);
case PCI_CHIP_IVYBRIDGE_GT2:
- DECL_INFO_STRING(intel_ivb_gt2_device, name, "Intel(R) HD Graphics IvyBridge GT2");
+ DECL_INFO_STRING(intel_ivb_gt2_device, name, "Intel(R) HD Graphics IvyBridge GT2", _ivb_gt2);
case PCI_CHIP_IVYBRIDGE_M_GT2:
- DECL_INFO_STRING(intel_ivb_gt2_device, name, "Intel(R) HD Graphics IvyBridge M GT2");
+ DECL_INFO_STRING(intel_ivb_gt2_device, name, "Intel(R) HD Graphics IvyBridge M GT2", _ivb_gt2);
case PCI_CHIP_IVYBRIDGE_S_GT2:
- DECL_INFO_STRING(intel_ivb_gt2_device, name, "Intel(R) HD Graphics IvyBridge S GT2");
+ DECL_INFO_STRING(intel_ivb_gt2_device, name, "Intel(R) HD Graphics IvyBridge S GT2", _ivb_gt2);
case PCI_CHIP_BAYTRAIL_T:
- DECL_INFO_STRING(intel_baytrail_t_device, name, "Intel(R) HD Graphics Bay Trail-T");
+ DECL_INFO_STRING(intel_baytrail_t_device, name, "Intel(R) HD Graphics Bay Trail-T", _baytrail_gt);
case PCI_CHIP_BROADWLL_M_GT1:
- DECL_INFO_STRING(intel_brw_gt1_device, name, "Intel(R) HD Graphics BroadWell Mobile GT1");
+ DECL_INFO_STRING(intel_brw_gt1_device, name, "Intel(R) HD Graphics BroadWell Mobile GT1", _brw_gt1);
case PCI_CHIP_BROADWLL_D_GT1:
- DECL_INFO_STRING(intel_brw_gt1_device, name, "Intel(R) HD Graphics BroadWell U-Processor GT1");
+ DECL_INFO_STRING(intel_brw_gt1_device, name, "Intel(R) HD Graphics BroadWell U-Processor GT1", _brw_gt1);
case PCI_CHIP_BROADWLL_S_GT1:
- DECL_INFO_STRING(intel_brw_gt1_device, name, "Intel(R) HD Graphics BroadWell Server GT1");
+ DECL_INFO_STRING(intel_brw_gt1_device, name, "Intel(R) HD Graphics BroadWell Server GT1", _brw_gt1);
case PCI_CHIP_BROADWLL_W_GT1:
- DECL_INFO_STRING(intel_brw_gt1_device, name, "Intel(R) HD Graphics BroadWell Workstation GT1");
+ DECL_INFO_STRING(intel_brw_gt1_device, name, "Intel(R) HD Graphics BroadWell Workstation GT1", _brw_gt1);
case PCI_CHIP_BROADWLL_U_GT1:
- DECL_INFO_STRING(intel_brw_gt1_device, name, "Intel(R) HD Graphics BroadWell ULX GT1");
+ DECL_INFO_STRING(intel_brw_gt1_device, name, "Intel(R) HD Graphics BroadWell ULX GT1", _brw_gt1);
case PCI_CHIP_BROADWLL_M_GT2:
- DECL_INFO_STRING(intel_brw_gt2_device, name, "Intel(R) HD Graphics 5600 BroadWell Mobile GT2");
+ DECL_INFO_STRING(intel_brw_gt2_device, name, "Intel(R) HD Graphics 5600 BroadWell Mobile GT2", _brw_gt2);
case PCI_CHIP_BROADWLL_D_GT2:
- DECL_INFO_STRING(intel_brw_gt2_device, name, "Intel(R) HD Graphics 5500 BroadWell U-Processor GT2");
+ DECL_INFO_STRING(intel_brw_gt2_device, name, "Intel(R) HD Graphics 5500 BroadWell U-Processor GT2", _brw_gt2);
case PCI_CHIP_BROADWLL_S_GT2:
- DECL_INFO_STRING(intel_brw_gt2_device, name, "Intel(R) HD Graphics BroadWell Server GT2");
+ DECL_INFO_STRING(intel_brw_gt2_device, name, "Intel(R) HD Graphics BroadWell Server GT2", _brw_gt2);
case PCI_CHIP_BROADWLL_W_GT2:
- DECL_INFO_STRING(intel_brw_gt2_device, name, "Intel(R) HD Graphics BroadWell Workstation GT2");
+ DECL_INFO_STRING(intel_brw_gt2_device, name, "Intel(R) HD Graphics BroadWell Workstation GT2", _brw_gt2);
case PCI_CHIP_BROADWLL_U_GT2:
- DECL_INFO_STRING(intel_brw_gt2_device, name, "Intel(R) HD Graphics 5300 BroadWell ULX GT2");
+ DECL_INFO_STRING(intel_brw_gt2_device, name, "Intel(R) HD Graphics 5300 BroadWell ULX GT2", _brw_gt2);
case PCI_CHIP_BROADWLL_M_GT3:
- DECL_INFO_STRING(intel_brw_gt3_device, name, "Intel(R) Iris Pro Graphics 6200 BroadWell Mobile GT3");
+ DECL_INFO_STRING(intel_brw_gt3_device, name, "Intel(R) Iris Pro Graphics 6200 BroadWell Mobile GT3", _brw_gt3);
case PCI_CHIP_BROADWLL_D_GT3:
- DECL_INFO_STRING(intel_brw_gt3_device, name, "Intel(R) HD Graphics 6000 BroadWell U-Processor GT3");
+ DECL_INFO_STRING(intel_brw_gt3_device, name, "Intel(R) HD Graphics 6000 BroadWell U-Processor GT3", _brw_gt3);
case PCI_CHIP_BROADWLL_UI_GT3:
- DECL_INFO_STRING(intel_brw_gt3_device, name, "Intel(R) Iris Graphics 6100 BroadWell U-Processor GT3");
+ DECL_INFO_STRING(intel_brw_gt3_device, name, "Intel(R) Iris Graphics 6100 BroadWell U-Processor GT3", _brw_gt3);
case PCI_CHIP_BROADWLL_S_GT3:
- DECL_INFO_STRING(intel_brw_gt3_device, name, "Intel(R) Iris Pro Graphics P6300 BroadWell Server GT3");
+ DECL_INFO_STRING(intel_brw_gt3_device, name, "Intel(R) Iris Pro Graphics P6300 BroadWell Server GT3", _brw_gt3);
case PCI_CHIP_BROADWLL_W_GT3:
- DECL_INFO_STRING(intel_brw_gt3_device, name, "Intel(R) HD Graphics BroadWell Workstation GT3");
+ DECL_INFO_STRING(intel_brw_gt3_device, name, "Intel(R) HD Graphics BroadWell Workstation GT3", _brw_gt3);
case PCI_CHIP_BROADWLL_U_GT3:
- DECL_INFO_STRING(intel_brw_gt3_device, name, "Intel(R) HD Graphics BroadWell ULX GT3");
+ DECL_INFO_STRING(intel_brw_gt3_device, name, "Intel(R) HD Graphics BroadWell ULX GT3", _brw_gt3);
case PCI_CHIP_CHV_0:
case PCI_CHIP_CHV_1:
case PCI_CHIP_CHV_2:
case PCI_CHIP_CHV_3:
- DECL_INFO_STRING(intel_chv_device, name, "Intel(R) HD Graphics Cherryview");
+ DECL_INFO_STRING(intel_chv_device, name, "Intel(R) HD Graphics Cherryview", _chv_gt);
case PCI_CHIP_SKYLAKE_ULT_GT1:
- DECL_INFO_STRING(intel_skl_gt1_device, name, "Intel(R) HD Graphics Skylake ULT GT1");
+ DECL_INFO_STRING(intel_skl_gt1_device, name, "Intel(R) HD Graphics Skylake ULT GT1", _skl_gt1);
case PCI_CHIP_SKYLAKE_ULX_GT1:
- DECL_INFO_STRING(intel_skl_gt1_device, name, "Intel(R) HD Graphics Skylake ULX GT1");
+ DECL_INFO_STRING(intel_skl_gt1_device, name, "Intel(R) HD Graphics Skylake ULX GT1", _skl_gt1);
case PCI_CHIP_SKYLAKE_DT_GT1:
- DECL_INFO_STRING(intel_skl_gt1_device, name, "Intel(R) HD Graphics Skylake Desktop GT1");
+ DECL_INFO_STRING(intel_skl_gt1_device, name, "Intel(R) HD Graphics Skylake Desktop GT1", _skl_gt1);
case PCI_CHIP_SKYLAKE_HALO_GT1:
- DECL_INFO_STRING(intel_skl_gt1_device, name, "Intel(R) HD Graphics Skylake Halo GT1");
+ DECL_INFO_STRING(intel_skl_gt1_device, name, "Intel(R) HD Graphics Skylake Halo GT1", _skl_gt1);
case PCI_CHIP_SKYLAKE_SRV_GT1:
- DECL_INFO_STRING(intel_skl_gt1_device, name, "Intel(R) HD Graphics Skylake Server GT1");
+ DECL_INFO_STRING(intel_skl_gt1_device, name, "Intel(R) HD Graphics Skylake Server GT1", _skl_gt1);
case PCI_CHIP_SKYLAKE_ULT_GT2:
- DECL_INFO_STRING(intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake ULT GT2");
+ DECL_INFO_STRING(intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake ULT GT2", _skl_gt2);
case PCI_CHIP_SKYLAKE_ULT_GT2F:
- DECL_INFO_STRING(intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake ULT GT2F");
+ DECL_INFO_STRING(intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake ULT GT2F", _skl_gt2);
case PCI_CHIP_SKYLAKE_ULX_GT2:
- DECL_INFO_STRING(intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake ULX GT2");
+ DECL_INFO_STRING(intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake ULX GT2", _skl_gt2);
case PCI_CHIP_SKYLAKE_DT_GT2:
- DECL_INFO_STRING(intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake Desktop GT2");
+ DECL_INFO_STRING(intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake Desktop GT2", _skl_gt2);
case PCI_CHIP_SKYLAKE_HALO_GT2:
- DECL_INFO_STRING(intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake Halo GT2");
+ DECL_INFO_STRING(intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake Halo GT2", _skl_gt2);
case PCI_CHIP_SKYLAKE_SRV_GT2:
- DECL_INFO_STRING(intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake Server GT2");
+ DECL_INFO_STRING(intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake Server GT2", _skl_gt2);
case PCI_CHIP_SKYLAKE_ULT_GT3:
- DECL_INFO_STRING(intel_skl_gt3_device, name, "Intel(R) HD Graphics Skylake ULT GT3");
+ DECL_INFO_STRING(intel_skl_gt3_device, name, "Intel(R) HD Graphics Skylake ULT GT3", _skl_gt3);
case PCI_CHIP_SKYLAKE_HALO_GT3:
- DECL_INFO_STRING(intel_skl_gt3_device, name, "Intel(R) HD Graphics Skylake Halo GT3");
+ DECL_INFO_STRING(intel_skl_gt3_device, name, "Intel(R) HD Graphics Skylake Halo GT3", _skl_gt3);
case PCI_CHIP_SKYLAKE_SRV_GT3:
- DECL_INFO_STRING(intel_skl_gt3_device, name, "Intel(R) HD Graphics Skylake Server GT3");
+ DECL_INFO_STRING(intel_skl_gt3_device, name, "Intel(R) HD Graphics Skylake Server GT3", _skl_gt3);
case PCI_CHIP_SKYLAKE_HALO_GT4:
- DECL_INFO_STRING(intel_skl_gt4_device, name, "Intel(R) HD Graphics Skylake Halo GT4");
+ DECL_INFO_STRING(intel_skl_gt4_device, name, "Intel(R) HD Graphics Skylake Halo GT4", _skl_gt4);
case PCI_CHIP_SKYLAKE_SRV_GT4:
- DECL_INFO_STRING(intel_skl_gt4_device, name, "Intel(R) HD Graphics Skylake Server GT4");
+ DECL_INFO_STRING(intel_skl_gt4_device, name, "Intel(R) HD Graphics Skylake Server GT4", _skl_gt4);
case PCI_CHIP_BROXTON_P:
- DECL_INFO_STRING(intel_bxt_device, name, "Intel(R) HD Graphics Broxton-P");
+ DECL_INFO_STRING(intel_bxt_device, name, "Intel(R) HD Graphics Broxton-P", _bxt_gt);
case PCI_CHIP_SANDYBRIDGE_BRIDGE:
case PCI_CHIP_SANDYBRIDGE_GT1:
@@ -561,7 +652,7 @@ static void initGenDevice(GenGPUDevice* gpu)
/* Prefer driver-queried subslice count if supported */
if (!drm_intel_get_subslice_total(gpu->fd, &subslice_total))
- gen_device->sub_slice_count = subslice_total;
+ gpu->sub_slice_count = subslice_total;
else if (IS_CHERRYVIEW(device->device_id))
printf(CHV_CONFIG_WARNING);
#else
diff --git a/backend/src/driver/cl_gen_gpu_state.cpp b/backend/src/driver/cl_gen_gpu_state.cpp
index a74d83cd..a5a88bc9 100644
--- a/backend/src/driver/cl_gen_gpu_state.cpp
+++ b/backend/src/driver/cl_gen_gpu_state.cpp
@@ -214,6 +214,7 @@ bool GenGPUState::stateInit(uint32_t max_threads, uint32_t size_cs_entry)
this->curb.num_cs_entries = 64;
this->curb.size_cs_entry = size_cs_entry;
this->max_threads = max_threads;
+printf("TTTTTTTTTTTTTTTHread num is %d\n", max_threads);
/* Set all buffers NULL. */
this->stack_b.bo = NULL;
diff --git a/backend/src/driver/cl_gen_kernel.cpp b/backend/src/driver/cl_gen_kernel.cpp
index 83aedba2..27617b02 100644
--- a/backend/src/driver/cl_gen_kernel.cpp
+++ b/backend/src/driver/cl_gen_kernel.cpp
@@ -821,16 +821,6 @@ cl_int GenEnqueueNDRangeKernel(cl_command_queue queue, cl_kernel kernel, const u
GBE_FREE(ndRange);
return CL_OUT_OF_RESOURCES;
}
-
-printf("CCCCCCCCCurbe size is %d\n", thread_n*cst_sz);
-for (int j = 0; j < thread_n*cst_sz; j++)
-printf("\n%x", ((char*)final_curbe)[j]);
-printf(";;;;;;;;;;;;;;;;;;;;;\n\n");
-
- dri_bo_map(ndRange->gpuState->aux_buf.bo, 1);
- for (int j = 0; j < 24576; j++)
- printf("\n%x", ((char*)ndRange->gpuState->aux_buf.bo->virt)[j]);
-
}
/* Start a new batch buffer */