summaryrefslogtreecommitdiff
path: root/backend
AgeCommit message (Expand)AuthorFilesLines
2015-11-17Backend: Fix two bugs about curbe related pointer.Junyan He2-6/+8
2015-11-17Add profiling info APIs to runtime.Junyan He4-1/+62
2015-11-17Backend: Add profilingProlog function for GenContext.Junyan He2-0/+135
2015-11-17Backend: Add tm0 function for arf timestamp register.Junyan He1-0/+10
2015-11-17Backend: Add a auxiliary function to convert GenReg to uniform.Junyan He1-0/+9
2015-11-17Backend: Add CalcTimestamp and StoreProfiling to insn selection.Junyan He6-0/+163
2015-11-17Backend: Add IVAR OCL_PROFILING_LOG to control profiling log.Junyan He9-10/+32
2015-11-17Backend: Add CalcTimestamp and StoreProfiling.Junyan He2-0/+47
2015-11-17Backend: Insert store_profiling before lowed return.Junyan He1-0/+7
2015-11-17Backend: Add ProfilingInfo to Unit.Junyan He2-1/+15
2015-11-17Backend: Add profiling registers to curbe.Junyan He3-2/+24
2015-11-17Backend: Add ProfilingInserter and a new function pass.Junyan He2-0/+210
2015-11-17Backend: Add StoreProfiling and CalcTimestamp instructionsJunyan He3-2/+123
2015-11-17Backend: Add ProfilingInfo class to ir.Junyan He3-0/+208
2015-11-11gbe: fix uitofp instruction issue.Luo Xionghu1-1/+11
2015-11-10Add built-in function __gen_ocl_vme.Chuanbo Weng18-5/+436
2015-11-10GBE: fix a regression bug at post phi copy optimization.Zhigang Gong1-0/+6
2015-11-06GBE: Refine ir for memory operation like atomic/load/storeRuiling Song6-505/+531
2015-11-06Backend: Fix half->long convertion bug for BSW.Junyan He1-3/+13
2015-11-06Backend: Fix a potential bug for uniform conversion.Junyan He1-0/+33
2015-11-06Backend: Add double conversion to insn selection.Junyan He1-8/+189
2015-11-06Backend: Delete LOAD_DF_IMM instruction.Junyan He9-97/+2
2015-11-06Backend: Delete the useless MOV_DF instruction.Junyan He9-145/+1
2015-11-04GBE: Don't read past end of printf format stringRebecca N. Palmer1-1/+1
2015-11-03add more OP for LOGICAL_SRCMOD caseGuo Yejun3-8/+9
2015-11-03add comments to explain 32bit is enough to represent w+hstrid+vstrideGuo Yejun1-0/+4
2015-11-03GBE: Fix unaligned load/store issues.Ruiling Song1-4/+5
2015-10-27Backend: Add madm and invm instrucions to disasm.Junyan He1-18/+116
2015-10-27Backend: Implement FDIV64 on BDW.Junyan He2-0/+147
2015-10-27Backend: Add the MADM function to gen8 encoder.Junyan He2-0/+63
2015-10-27Backend: Add MATH_WITH_ACC function.Junyan He3-0/+77
2015-10-27Backend: Fix a bug for double imm src setting.Junyan He1-1/+1
2015-10-27Backend: Delete getDoubleExecWidth and refine handleDouble.Junyan He6-60/+55
2015-10-27Backend: Add gen8 instruction field for special accumulator.Junyan He1-0/+86
2015-10-27Backend: Add FDIV64 function for gen_insn_selection.Junyan He5-1/+58
2015-10-27Backend: Redefine double register pattern.Junyan He2-3/+3
2015-10-27Backend: Fix the bug for double imm reg.Junyan He1-1/+1
2015-10-21fix a long relative regreesion issue on BSW caused by local copy propagationGuo Yejun3-2/+10
2015-10-21fix a regression issue caused by LocalCopyPropagationGuo Yejun3-0/+14
2015-10-21LibOcl: Fix float convert to long/ulong bug.Yang Rong1-3/+23
2015-10-21Libocl: forgot to add memset.h.Yang Rong1-0/+1
2015-10-21use table to define and query binary headers.Luo Xionghu1-48/+78
2015-10-20fix uniform case for ByteGatherGuo Yejun1-2/+2
2015-10-20using name instead of index to query from ConstantSet.Luo Xionghu1-3/+1
2015-10-20reset the variables in printf_paser to NULL.Luo Xionghu1-0/+2
2015-10-19Backend: Refine ConvertInstruction logic in insn_selectionJunyan He1-305/+475
2015-10-13GBE: Add datalayout and triple to ll files.Yang Rong2-0/+6
2015-10-13GBE: Move createStripAttributesPass before createInstructionCombiningPass.Yang Rong1-1/+1
2015-10-13GBE: Add llvm3.7 support.Yang Rong19-453/+207
2015-10-13GBE: use opencl c to implement llvm.memset and llvm.memcpy.Yang Rong8-924/+181
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-21 20:58:47 +0000