summaryrefslogtreecommitdiff
path: root/backend/src/ir/instruction.hxx
AgeCommit message (Expand)AuthorFilesLines
2015-12-10Backend: refine mix with hardware lrp functionPan Xiuli1-0/+1
2015-11-25Add the WorkGroupInstruction as a new type of instruction.Junyan He1-0/+1
2015-11-24Backend: add debugwait functionPan Xiuli1-0/+1
2015-11-17Backend: Add StoreProfiling and CalcTimestamp instructionsJunyan He1-0/+2
2015-11-10Add built-in function __gen_ocl_vme.Chuanbo Weng1-0/+1
2015-07-17Use a separate pattern for simd shuffle instead of binary patternGuo Yejun1-1/+1
2015-05-15Add Indirect struct argument read support.Yang Rong1-0/+1
2015-05-12add sub group functions intel_sub_group_shuffleGuo Yejun1-0/+1
2015-04-24add simd level function __gen_ocl_get_simd_idGuo Yejun1-0/+1
2015-04-24add simd level function __gen_ocl_get_simd_sizeGuo Yejun1-0/+1
2015-03-09Backend: Delete bswap logic in the llvm_to_gen stage.Junyan He1-0/+1
2015-01-15add LZD IR instruction.Luo Xionghu1-0/+1
2014-10-14add opencl-1.2 builtin function popcount.Luo1-0/+1
2014-09-26Add Gen IR WHILE.Luo Xionghu1-0/+1
2014-09-18GBE/libocl: Add __gen_ocl_get_timestamp() to get timestamp.Ruiling Song1-0/+2
2014-07-08Add Gen IR IF, ELSE and ENDIFYongjia Zhang1-0/+3
2014-04-22support __gen_ocl_simd_any and __gen_ocl_simd_allGuo Yejun1-0/+2
2014-02-24GBE: remove the useless get sampler info function.Zhigang Gong1-1/+0
2014-01-21GBE: use native exp instruction when enough precisionGuo Yejun1-0/+1
2013-11-27Add convert between fp16 and fp32.Yang Rong1-0/+2
2013-11-15Add FCmpInst ord support.Yang Rong1-0/+1
2013-11-13Add bitcast support between vetor and scalar type.Yang Rong1-0/+1
2013-11-06GBE: use ISA mad for mad() builtin function.Ruiling Song1-0/+1
2013-10-10saturated conversion of native GPU data type, larger to narrowerHomer Hsing1-0/+1
2013-09-26GBE/Runtime: implement workaround for IVB sampler bugZhigang Gong1-0/+1
2013-09-26add 64-bit version of "mad_sat"Homer Hsing1-0/+1
2013-09-26add 64-bit version of "mul_hi"Homer Hsing1-0/+1
2013-09-17add 64-bit version of "rhadd"Homer Hsing1-0/+1
2013-09-11add 64-bit version of "hadd"Homer Hsing1-0/+1
2013-08-16add 64bit version of "upsample"Homer Hsing1-0/+1
2013-07-05support built-in function "upsample"Homer Hsing1-0/+2
2013-07-02support built-in functions "mul_hi", "mad_hi"Homer Hsing1-0/+1
2013-07-02support built-in functions "hadd", "rhadd"Homer Hsing1-0/+2
2013-06-27Add atomic help functions.Yang Rong1-0/+1
2013-06-26support zero bit countingHomer Hsing1-0/+2
2013-05-17GBE: Add support for get_image_width/height.Zhigang Gong1-1/+1
2013-04-10add sub_sat operationLu Guanqun1-0/+1
2013-04-10add add_sat operationLu Guanqun1-0/+1
2012-11-09Started the boiler plate for barrier (and fences) instructionsBenjamin Segovia1-1/+1
2012-11-09Removed MAD instruction in the IRBenjamin Segovia1-1/+0
2012-11-05Removed the remaining bits of the Gen specific extensions. Much cleaner codeBenjamin Segovia1-7/+0
2012-11-02Made compiler_clod pass. The image is now properly computed.Benjamin Segovia1-0/+5
2012-10-12Added support for various math functionsBenjamin Segovia1-1/+1
2012-09-17Pushed back modified files for Gen extension supportbsegovia1-0/+7
2012-08-10Fixed a bug in masked gathe for the simulatorBenjamin Segovia1-1/+2
2012-08-10Added shuffle/insert/extract elements LLVM IR translation Added Gen IR select...Benjamin Segovia1-0/+1
2012-08-10Added various helper functions in the LLVM to Gen translation Implemented bin...Benjamin Segovia1-0/+1
2012-08-10Fixed instruction size in the instruction definitions Added more tests for th...Benjamin Segovia1-2/+6
2012-08-10Added compare instructions Finished to implement well formed functions. They ...Benjamin Segovia1-0/+1
2012-08-10Renamed ir_{...} to {...} Put ir structures and classes into an IR namespace ...Benjamin Segovia1-0/+59
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-24 18:10:17 +0000