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authorGuo Yejun <yejun.guo@intel.com>2014-11-07 16:18:54 +0800
committerZhigang Gong <zhigang.gong@intel.com>2014-11-07 15:50:41 +0800
commit075390db926de7bfd2ac853404ab1bcfc8b9c650 (patch)
tree9f70873dae000f4374025cfd27b3714562242b4d /src/intel/intel_driver.c
parent54594b626c31a68956af97f69dc29132dc545f7c (diff)
support CL_MEM_USE_HOST_PTR with userptr for cl buffer
userptr is used to wrap a memory pointer (page aligned) supplied by user space into a buffer object accessed by GPU, and so no extra copy is needed. It is supported starting from linux kernel 3.16 and libdrm 2.4.58. This patch is originally finished by Zhenyu Wang <zhenyuw@linux.intel.com>, I did a little change and some code clean. No regression issue found on IVB+Ubuntu14.10 with libdrm upgraded with tests: beignet/utests, piglit, OpenCV/test&perf, conformance/basic&mem_host_flags&buffers V2: add page align limit for data size, add comments for kernel without MMU_NOTIFIER V3: add runtime check with host_unified_memory, return CL_MEM_OBJECT_ALLOCATION_FAILURE if failed Signed-off-by: Guo Yejun <yejun.guo@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com> Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'src/intel/intel_driver.c')
-rw-r--r--src/intel/intel_driver.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/intel/intel_driver.c b/src/intel/intel_driver.c
index bb97220c..fc037cc8 100644
--- a/src/intel/intel_driver.c
+++ b/src/intel/intel_driver.c
@@ -690,6 +690,20 @@ cl_buffer intel_share_image_from_libva(cl_context ctx,
return (cl_buffer)intel_bo;
}
+static cl_buffer intel_buffer_alloc_userptr(cl_buffer_mgr bufmgr, const char* name, void *data,size_t size, unsigned long flags)
+{
+#ifdef HAS_USERPTR
+ drm_intel_bo *bo;
+ bo = drm_intel_bo_alloc_userptr((drm_intel_bufmgr *)bufmgr, name, data, I915_TILING_NONE, 0, size, flags);
+ /* Fallback to unsynchronized userptr allocation if kernel has no MMU notifier enabled. */
+ if (bo == NULL)
+ bo = drm_intel_bo_alloc_userptr((drm_intel_bufmgr *)bufmgr, name, data, I915_TILING_NONE, 0, size, flags | I915_USERPTR_UNSYNCHRONIZED);
+ return (cl_buffer)bo;
+#else
+ return NULL;
+#endif
+}
+
static int32_t get_intel_tiling(cl_int tiling, uint32_t *intel_tiling)
{
switch (tiling) {
@@ -734,6 +748,7 @@ intel_setup_callbacks(void)
cl_driver_get_bufmgr = (cl_driver_get_bufmgr_cb *) intel_driver_get_bufmgr;
cl_driver_get_device_id = (cl_driver_get_device_id_cb *) intel_get_device_id;
cl_buffer_alloc = (cl_buffer_alloc_cb *) drm_intel_bo_alloc;
+ cl_buffer_alloc_userptr = (cl_buffer_alloc_userptr_cb*) intel_buffer_alloc_userptr;
cl_buffer_set_tiling = (cl_buffer_set_tiling_cb *) intel_buffer_set_tiling;
#if defined(HAS_EGL)
cl_buffer_alloc_from_texture = (cl_buffer_alloc_from_texture_cb *) intel_alloc_buffer_from_texture;