diff options
| author | Yang Rong <rong.r.yang@intel.com> | 2014-02-21 16:54:39 +0800 |
|---|---|---|
| committer | Zhigang Gong <zhigang.gong@intel.com> | 2014-02-21 16:03:02 +0800 |
| commit | 92966ce26677352dd01be5003f0783653749ab31 (patch) | |
| tree | 79a20afd9765fe981892437d44f60ce6bdc4a13a /backend | |
| parent | a0f277455862f2a12377e31c11d454b39b81a82e (diff) | |
Fix a long DIV/REM hang.
There is a jumpi in long DIV/REM, with predication is any16/any8. So
MUST AND the predication register with emask, otherwise may dead loop.
Signed-off-by: Yang Rong <rong.r.yang@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Diffstat (limited to 'backend')
| -rw-r--r-- | backend/src/backend/gen_context.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/backend/src/backend/gen_context.cpp b/backend/src/backend/gen_context.cpp index 7a748567..44dbee2e 100644 --- a/backend/src/backend/gen_context.cpp +++ b/backend/src/backend/gen_context.cpp @@ -1364,6 +1364,7 @@ namespace gbe GenRegister l = ra->genReg(insn.dst(12)); GenRegister m = ra->genReg(insn.dst(13)); GenRegister flagReg = checkFlagRegister(ra->genReg(insn.dst(14))); + GenRegister emaskReg = ra->genReg(GenRegister::uw1grf(ir::ocl::emask)); GenRegister zero = GenRegister::immud(0), one = GenRegister::immud(1), imm31 = GenRegister::immud(31); @@ -1445,6 +1446,11 @@ namespace gbe p->curr.predicate = GEN_PREDICATE_NONE; p->curr.useFlag(flagReg.flag_nr(), flagReg.flag_subnr()); p->CMP(GEN_CONDITIONAL_L, m, GenRegister::immud(64)); + + p->curr.execWidth = 1; + p->curr.noMask = 1; + p->AND(flagReg, flagReg, emaskReg); + p->curr.predicate = GEN_PREDICATE_NORMAL; // under condition, jump back to start point if (simdWidth == 8) @@ -1453,8 +1459,6 @@ namespace gbe p->curr.predicate = GEN_PREDICATE_ALIGN1_ANY16H; else NOT_IMPLEMENTED; - p->curr.execWidth = 1; - p->curr.noMask = 1; int jip = -(int)(p->n_instruction() - loop_start + 1) * 2; p->JMPI(zero); p->patchJMPI(p->n_instruction()-2, jip); |