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authorZhigang Gong <zhigang.gong@intel.com>2014-04-08 17:58:15 +0800
committerZhigang Gong <zhigang.gong@intel.com>2014-04-16 09:44:26 +0800
commitd7ad5ee6f79fc28cf82321c8b527ae73da9f10f2 (patch)
tree289d0bbe220b13feb33ddbd230aa681f367896ca
parent745fb36d9f756ebce120d49498f8ab04a9f14848 (diff)
GBE: fixed two 'long' related bugs.
Didn't modify some hard coded number correctly in previous patch. Now fix them. This could pass the corresponding regressions in piglit test. Signed-off-by: Zhigang Gong <zhigang.gong@intel.com> Reviewed-by: "Yang, Rong R" <rong.r.yang@intel.com>
-rw-r--r--backend/src/backend/gen_insn_selection.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp
index d0e3d0b7..961f3af3 100644
--- a/backend/src/backend/gen_insn_selection.cpp
+++ b/backend/src/backend/gen_insn_selection.cpp
@@ -1259,7 +1259,7 @@ namespace gbe
}
void Selection::Opaque::I64SATADD(Reg dst, Reg src0, Reg src1, GenRegister tmp[5]) {
- SelectionInstruction *insn = this->appendInsn(SEL_OP_I64SATADD, 7, 2);
+ SelectionInstruction *insn = this->appendInsn(SEL_OP_I64SATADD, 6, 2);
insn->dst(0) = dst;
insn->src(0) = src0;
insn->src(1) = src1;
@@ -1302,12 +1302,12 @@ namespace gbe
insn->dst(i + 1) = tmp[i];
}
- void Selection::Opaque::I64_MUL_HI(Reg dst, Reg src0, Reg src1, GenRegister tmp[10]) {
- SelectionInstruction *insn = this->appendInsn(SEL_OP_I64_MUL_HI, 11, 2);
+ void Selection::Opaque::I64_MUL_HI(Reg dst, Reg src0, Reg src1, GenRegister tmp[9]) {
+ SelectionInstruction *insn = this->appendInsn(SEL_OP_I64_MUL_HI, 10, 2);
insn->dst(0) = dst;
insn->src(0) = src0;
insn->src(1) = src1;
- for(int i = 0; i < 10; i ++)
+ for(int i = 0; i < 9; i ++)
insn->dst(i + 1) = tmp[i];
}