Backend: Delete getDoubleExecWidth and refine handleDouble.

We will not support double type on gen7 and gen75 platforms,
so there is no need for getDoubleExecWidth for all platforms.
We redefine handleDouble as a virtual function and just handle
the double type just on BDW later platforms, other platforms
will just generate assert.

V3:
   Delete the double utest case to avoid utest failure.

Signed-off-by: Junyan He <junyan.he@linux.intel.com>
Reviewed-by: Yang Rong <rong.r.yang@intel.com>

7 files changed, 55 insertions, 61 deletions

diff --git a/backend/src/backend/gen75_encoder.hpp b/backend/src/backend/gen75_encoder.hpp
index 5d80bbdc..e494f291 100644
--- a/backend/src/backend/gen75_encoder.hpp
+++ b/backend/src/backend/gen75_encoder.hpp
@@ -33,8 +33,6 @@ namespace gbe
   class Gen75Encoder : public Gen7Encoder
   {
   public:
-    /*! exec width of the double data type */    
-    #define GEN75_DOUBLE_EXEC_WIDTH  4
     virtual ~Gen75Encoder(void) { }
 
     Gen75Encoder(uint32_t simdWidth, uint32_t gen, uint32_t deviceID)
@@ -44,8 +42,6 @@ namespace gbe
     virtual void JMPI(GenRegister src, bool longjmp = false);
     /*! Patch JMPI/BRC/BRD (located at index insnID) with the given jump distance */
     virtual void patchJMPI(uint32_t insnID, int32_t jip, int32_t uip);
-    /*! Get double/long exec width */
-    virtual int getDoubleExecWidth(void) { return GEN75_DOUBLE_EXEC_WIDTH; }
     virtual void MOV_DF(GenRegister dest, GenRegister src0, GenRegister tmp = GenRegister::null());
     virtual void LOAD_DF_IMM(GenRegister dest, GenRegister tmp, double value);
     virtual void ATOMIC(GenRegister dst, uint32_t function, GenRegister src, GenRegister bti, uint32_t srcNum);
diff --git a/backend/src/backend/gen7_encoder.hpp b/backend/src/backend/gen7_encoder.hpp
index f0092630..1276c679 100644
--- a/backend/src/backend/gen7_encoder.hpp
+++ b/backend/src/backend/gen7_encoder.hpp
@@ -31,15 +31,11 @@ namespace gbe
   class Gen7Encoder : public GenEncoder
   {
   public:
-    /*! gen7 exec width of the double data type */
-    #define GEN7_DOUBLE_EXEC_WIDTH  8
     virtual ~Gen7Encoder(void) { }
 
     Gen7Encoder(uint32_t simdWidth, uint32_t gen, uint32_t deviceID)
          : GenEncoder(simdWidth, gen, deviceID) { }
 
-    /*! Get double/long exec width */
-    virtual int getDoubleExecWidth(void) { return GEN7_DOUBLE_EXEC_WIDTH; }
     virtual void setHeader(GenNativeInstruction *insn);
     virtual void setDst(GenNativeInstruction *insn, GenRegister dest);
     virtual void setSrc0(GenNativeInstruction *insn, GenRegister reg);
diff --git a/backend/src/backend/gen8_encoder.cpp b/backend/src/backend/gen8_encoder.cpp
index 69eabb28..63126b1e 100644
--- a/backend/src/backend/gen8_encoder.cpp
+++ b/backend/src/backend/gen8_encoder.cpp
@@ -459,6 +459,53 @@ namespace gbe
     return false;
   }
 
+  void Gen8Encoder::handleDouble(GenEncoder *p, uint32_t opcode, GenRegister dst, GenRegister src0, GenRegister src1)
+  {
+    uint32_t w = p->curr.execWidth;
+    GenNativeInstruction *insn = NULL;
+
+    if (w <= 8) {
+      insn = p->next(opcode);
+      p->setHeader(insn);
+      p->setDst(insn, dst);
+      p->setSrc0(insn, src0);
+      if (!GenRegister::isNull(src1))
+        p->setSrc1(insn, src1);
+      return;
+    } else {
+      GBE_ASSERT(w == 16);
+      GBE_ASSERT(dst.hstride != GEN_HORIZONTAL_STRIDE_0); //Should not be a uniform.
+      p->push(); {
+        p->curr.execWidth = 8;
+        p->curr.quarterControl = GEN_COMPRESSION_Q1;
+        insn = p->next(opcode);
+        p->setHeader(insn);
+        p->setDst(insn, dst);
+        p->setSrc0(insn, src0);
+        if (!GenRegister::isNull(src1))
+          p->setSrc1(insn, src1);
+
+        // second half
+        p->curr.quarterControl = GEN_COMPRESSION_Q2;
+        insn = p->next(opcode);
+        p->setHeader(insn);
+        p->setDst(insn, GenRegister::offset(dst, 2));
+
+        if (src0.hstride != GEN_HORIZONTAL_STRIDE_0)
+          p->setSrc0(insn, GenRegister::offset(src0, 2));
+        else
+          p->setSrc0(insn, src0);
+
+        if (!GenRegister::isNull(src1)) {
+          if (src1.hstride != GEN_HORIZONTAL_STRIDE_0)
+            p->setSrc1(insn, GenRegister::offset(src1, 2));
+          else
+            p->setSrc1(insn, src1);
+        }
+      } p->pop();
+    }
+  }
+
 #define NO_SWIZZLE ((0<<0) | (1<<2) | (2<<4) | (3<<6))
 
   void Gen8Encoder::alu3(uint32_t opcode,
diff --git a/backend/src/backend/gen8_encoder.hpp b/backend/src/backend/gen8_encoder.hpp
index 504e13d2..12ee8fa4 100644
--- a/backend/src/backend/gen8_encoder.hpp
+++ b/backend/src/backend/gen8_encoder.hpp
@@ -31,8 +31,6 @@ namespace gbe
   class Gen8Encoder : public GenEncoder
   {
   public:
-    /*! exec width of the double data type */
-    #define GEN8_DOUBLE_EXEC_WIDTH  4
     virtual ~Gen8Encoder(void) { }
 
     Gen8Encoder(uint32_t simdWidth, uint32_t gen, uint32_t deviceID)
@@ -42,8 +40,6 @@ namespace gbe
     virtual void JMPI(GenRegister src, bool longjmp = false);
     /*! Patch JMPI/BRC/BRD (located at index insnID) with the given jump distance */
     virtual void patchJMPI(uint32_t insnID, int32_t jip, int32_t uip);
-    /*! Get double/long exec width */
-    virtual int getDoubleExecWidth(void) { return GEN8_DOUBLE_EXEC_WIDTH; }
     virtual void F16TO32(GenRegister dest, GenRegister src0);
     virtual void F32TO16(GenRegister dest, GenRegister src0);
     virtual void MOV_DF(GenRegister dest, GenRegister src0, GenRegister tmp = GenRegister::null());
@@ -66,6 +62,7 @@ namespace gbe
                        GenRegister src0, GenRegister src1, GenRegister src2);
     virtual bool canHandleLong(uint32_t opcode, GenRegister dst, GenRegister src0,
                             GenRegister src1 = GenRegister::null());
+    virtual void handleDouble(GenEncoder *p, uint32_t opcode, GenRegister dst, GenRegister src0, GenRegister src1 = GenRegister::null());
     virtual unsigned setAtomicMessageDesc(GenNativeInstruction *insn, unsigned function, unsigned bti, unsigned srcNum);
     virtual unsigned setUntypedReadMessageDesc(GenNativeInstruction *insn, unsigned bti, unsigned elemNum);
     virtual unsigned setUntypedWriteMessageDesc(GenNativeInstruction *insn, unsigned bti, unsigned elemNum);
diff --git a/backend/src/backend/gen_encoder.cpp b/backend/src/backend/gen_encoder.cpp
index cac29e8a..2cc51cc5 100644
--- a/backend/src/backend/gen_encoder.cpp
+++ b/backend/src/backend/gen_encoder.cpp
@@ -610,61 +610,21 @@ namespace gbe
 
   bool GenEncoder::canHandleLong(uint32_t opcode, GenRegister dst, GenRegister src0, GenRegister src1)
   {
-	/* By now, just alu1 insn will come to here. So just MOV */
+    /* By now, just alu1 insn will come to here. So just MOV */
     this->MOV(dst.bottom_half(), src0.bottom_half());
     this->MOV(dst.top_half(this->simdWidth), src0.top_half(this->simdWidth));
     return true;
   }
 
-  INLINE void _handleDouble(GenEncoder *p, uint32_t opcode, GenRegister dst,
-                            GenRegister src0, GenRegister src1 = GenRegister::null()) {
-       int w = p->curr.execWidth;
-       p->push();
-       p->curr.execWidth = p->getDoubleExecWidth();
-       p->curr.nibControl = 0;
-       GenNativeInstruction *insn = p->next(opcode);
-       p->setHeader(insn);
-       p->setDst(insn, dst);
-       p->setSrc0(insn, src0);
-       if (!GenRegister::isNull(src1))
-         p->setSrc1(insn, src1);
-       if (w == 8)
-         p->curr.nibControl = 1; // second 1/8 mask
-       insn = p->next(opcode);
-       p->setHeader(insn);
-       p->setDst(insn, GenRegister::suboffset(dst, w / 2));
-       p->setSrc0(insn, GenRegister::suboffset(src0, w / 2));
-       if (!GenRegister::isNull(src1))
-         p->setSrc1(insn, GenRegister::suboffset(src1, w / 2));
-       p->pop();
-  }
-
-  // Double register accessing is a little special,
-  // Per Gen spec, then only supported mode is SIMD8 and, it only
-  // handles four doubles each time.
-  // We need to lower down SIMD16 to two SIMD8 and lower down SIMD8
-  // to two SIMD1x4.
-  INLINE void handleDouble(GenEncoder *p, uint32_t opcode, GenRegister dst,
-                           GenRegister src0, GenRegister src1 = GenRegister::null()) {
-      if (p->curr.execWidth == 8)
-        _handleDouble(p, opcode, dst, src0, src1);
-      else if (p->curr.execWidth == 16) {
-        p->push();
-        p->curr.execWidth = 8;
-        p->curr.quarterControl = GEN_COMPRESSION_Q1;
-        _handleDouble(p, opcode, dst, src0, src1);
-        p->curr.quarterControl = GEN_COMPRESSION_Q2;
-        if (!GenRegister::isNull(src1))
-          src1 = GenRegister::offset(src1, 2);
-        _handleDouble(p, opcode, GenRegister::offset(dst, 2), GenRegister::offset(src0, 2), src1);
-        p->pop();
-      }
+  void GenEncoder::handleDouble(GenEncoder *p, uint32_t opcode, GenRegister dst, GenRegister src0, GenRegister src1) {
+    /* For platform before gen8, we do not support double and can not get here. */
+    GBE_ASSERT(0);
   }
 
   void alu1(GenEncoder *p, uint32_t opcode, GenRegister dst,
             GenRegister src, uint32_t condition) {
      if (dst.isdf() && src.isdf()) {
-       handleDouble(p, opcode, dst, src);
+       p->handleDouble(p, opcode, dst, src);
      } else if (dst.isint64() && src.isint64()
                 && p->canHandleLong(opcode, dst, src)) { // handle int64
        return;
@@ -709,7 +669,7 @@ namespace gbe
             uint32_t condition)
   {
     if (dst.isdf() && src0.isdf() && src1.isdf()) {
-       handleDouble(p, opcode, dst, src0, src1);
+       p->handleDouble(p, opcode, dst, src0, src1);
     } else if (needToSplitAlu2(p, dst, src0, src1) == false) {
        if(compactAlu2(p, opcode, dst, src0, src1, condition, false))
          return;
diff --git a/backend/src/backend/gen_encoder.hpp b/backend/src/backend/gen_encoder.hpp
index 79e7b6e0..f2bb5ab9 100644
--- a/backend/src/backend/gen_encoder.hpp
+++ b/backend/src/backend/gen_encoder.hpp
@@ -135,8 +135,6 @@ namespace gbe
 
     virtual void F16TO32(GenRegister dest, GenRegister src0);
     virtual void F32TO16(GenRegister dest, GenRegister src0);
-    /*! Get double/long exec width */
-    virtual int getDoubleExecWidth(void) = 0;
     virtual void MOV_DF(GenRegister dest, GenRegister src0, GenRegister tmp = GenRegister::null());
     virtual void LOAD_DF_IMM(GenRegister dest, GenRegister tmp, double value);
     virtual void LOAD_INT64_IMM(GenRegister dest, GenRegister value);
@@ -252,6 +250,7 @@ namespace gbe
     uint32_t n_instruction(void) const { return store.size(); }
     virtual bool canHandleLong(uint32_t opcode, GenRegister dst, GenRegister src0,
                             GenRegister src1 = GenRegister::null());
+    virtual void handleDouble(GenEncoder *p, uint32_t opcode, GenRegister dst, GenRegister src0, GenRegister src1 = GenRegister::null());
 
     GBE_CLASS(GenEncoder); //!< Use custom allocators
     virtual void alu3(uint32_t opcode, GenRegister dst,
diff --git a/utests/CMakeLists.txt b/utests/CMakeLists.txt
index b26f4d05..2f1e10f2 100644
--- a/utests/CMakeLists.txt
+++ b/utests/CMakeLists.txt
@@ -193,7 +193,6 @@ set (utests_sources
   compiler_sub_group_any.cpp
   compiler_sub_group_all.cpp
   compiler_time_stamp.cpp
-  compiler_double_precision.cpp
   load_program_from_gen_bin.cpp
   load_program_from_spir.cpp
   get_arg_info.cpp