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author | njn <njn@a5019735-40e9-0310-863c-91ae7b9d1cf9> | 2005-07-25 23:30:24 +0000 |
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committer | njn <njn@a5019735-40e9-0310-863c-91ae7b9d1cf9> | 2005-07-25 23:30:24 +0000 |
commit | c8cccb10061d75f98437ea7fe7cfd9a5dfab3785 (patch) | |
tree | e09f4eaf89cbcc60abe15d67d136c7b390be908b /cachegrind | |
parent | 85773eeb76884e71967f067b16e90533f53f7e13 (diff) |
fix breakage/wibbles
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@4261 a5019735-40e9-0310-863c-91ae7b9d1cf9
Diffstat (limited to 'cachegrind')
-rw-r--r-- | cachegrind/docs/cg-manual.xml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cachegrind/docs/cg-manual.xml b/cachegrind/docs/cg-manual.xml index 35b55eb0..88b93e80 100644 --- a/cachegrind/docs/cg-manual.xml +++ b/cachegrind/docs/cg-manual.xml @@ -35,7 +35,7 @@ misses. In particular, it records:</para> </listitem> </itemizedlist> -<para>On a modern x86 machine, an L1 miss will typically cost +<para>On a modern machine, an L1 miss will typically cost around 10 cycles, and an L2 miss can cost as much as 200 cycles. Detailed cache profiling can be very useful for improving the performance of your program.</para> |