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authortom <tom@a5019735-40e9-0310-863c-91ae7b9d1cf9>2005-07-27 22:59:50 +0000
committertom <tom@a5019735-40e9-0310-863c-91ae7b9d1cf9>2005-07-27 22:59:50 +0000
commit942d9efe96b793d25cc2a647e4a06eb496b6d120 (patch)
tree32a2a53d67d6c6c58312d835117e0d01d0d6fa7e /cachegrind
parent20d357216104d6b8a95b8ac33d338c44c4579986 (diff)
Ignore prefetch information when decoding Intel cache details. Patch
from Josef Weidendorfer <Josef.Weidendorfer@gmx.de>. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@4286 a5019735-40e9-0310-863c-91ae7b9d1cf9
Diffstat (limited to 'cachegrind')
-rw-r--r--cachegrind/cg-x86.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/cachegrind/cg-x86.c b/cachegrind/cg-x86.c
index f235660f..b0bd3af4 100644
--- a/cachegrind/cg-x86.c
+++ b/cachegrind/cg-x86.c
@@ -169,6 +169,10 @@ Int Intel_cache_info(Int level, cache_t* I1c, cache_t* D1c, cache_t* L2c)
case 0x86: *L2c = (cache_t) { 512, 4, 64 }; L2_found = True; break;
case 0x87: *L2c = (cache_t) { 1024, 8, 64 }; L2_found = True; break;
+ /* Ignore prefetch information */
+ case 0xf0: case 0xf1:
+ break;
+
default:
VG_(message)(Vg_DebugMsg,
"warning: Unknown Intel cache config value "