Add support for IBM Power ISA 2.06 -- stage 3 -- Test cases.

Bug 279994 comment 2).
(Maynard Johnson, maynardj@us.ibm.com)


git-svn-id: svn://svn.valgrind.org/valgrind/trunk@12007 a5019735-40e9-0310-863c-91ae7b9d1cf9

10 files changed, 2872 insertions, 4 deletions

diff --git a/none/tests/ppc32/Makefile.am b/none/tests/ppc32/Makefile.am
index b451b683..f43e1be9 100644
--- a/none/tests/ppc32/Makefile.am
+++ b/none/tests/ppc32/Makefile.am
@@ -28,7 +28,8 @@ EXTRA_DIST = \
 	power5+_round.stderr.exp power5+_round.stdout.exp power5+_round.vgtest \
 	power6_bcmp.stderr.exp power6_bcmp.stdout.exp power6_bcmp.vgtest \
 	test_isa_2_06_part1.stderr.exp  test_isa_2_06_part1.stdout.exp  test_isa_2_06_part1.vgtest \
-	test_isa_2_06_part2.stderr.exp  test_isa_2_06_part2.stdout.exp  test_isa_2_06_part2.vgtest
+	test_isa_2_06_part2.stderr.exp  test_isa_2_06_part2.stdout.exp  test_isa_2_06_part2.vgtest \
+	test_isa_2_06_part3.stderr.exp  test_isa_2_06_part3.stdout.exp  test_isa_2_06_part3.vgtest
 
 check_PROGRAMS = \
 	bug129390-ppc32 \
@@ -36,7 +37,8 @@ check_PROGRAMS = \
 	ldstrev lsw jm-insns mftocrf mcrfs round test_fx test_gx \
 	testVMX twi tw xlc_dbl_u32 power5+_round power6_bcmp \
 	test_isa_2_06_part1 \
-	test_isa_2_06_part2
+	test_isa_2_06_part2 \
+	test_isa_2_06_part3
 
 AM_CFLAGS    += @FLAG_M32@
 AM_CXXFLAGS  += @FLAG_M32@
@@ -68,3 +70,6 @@ test_isa_2_06_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_
 test_isa_2_06_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \
 			@FLAG_M32@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX)
 
+test_isa_2_06_part3_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mregnames $(VSX_FLAG) \
+			@FLAG_M32@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX)
+
diff --git a/none/tests/ppc32/test_isa_2_06_part3.c b/none/tests/ppc32/test_isa_2_06_part3.c
new file mode 100644
index 00000000..2f86760a
--- /dev/null
+++ b/none/tests/ppc32/test_isa_2_06_part3.c
@@ -0,0 +1,1582 @@
+/*  Copyright (C) 2011 IBM
+
+ Author: Maynard Johnson <maynardj@us.ibm.com>
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+ */
+
+#ifdef HAS_VSX
+
+#include <stdio.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <malloc.h>
+#include <altivec.h>
+#include <math.h>
+
+#ifndef __powerpc64__
+typedef uint32_t HWord_t;
+#else
+typedef uint64_t HWord_t;
+#endif /* __powerpc64__ */
+
+typedef unsigned char Bool;
+#define True 1
+#define False 0
+register HWord_t r14 __asm__ ("r14");
+register HWord_t r15 __asm__ ("r15");
+register HWord_t r16 __asm__ ("r16");
+register HWord_t r17 __asm__ ("r17");
+register double f14 __asm__ ("fr14");
+register double f15 __asm__ ("fr15");
+register double f16 __asm__ ("fr16");
+register double f17 __asm__ ("fr17");
+
+static volatile unsigned int div_flags, div_xer;
+
+#define ALLCR "cr0","cr1","cr2","cr3","cr4","cr5","cr6","cr7"
+
+#define SET_CR(_arg) \
+      __asm__ __volatile__ ("mtcr  %0" : : "b"(_arg) : ALLCR );
+
+#define SET_XER(_arg) \
+      __asm__ __volatile__ ("mtxer %0" : : "b"(_arg) : "xer" );
+
+#define GET_CR(_lval) \
+      __asm__ __volatile__ ("mfcr %0"  : "=b"(_lval) )
+
+#define GET_XER(_lval) \
+      __asm__ __volatile__ ("mfxer %0" : "=b"(_lval) )
+
+#define GET_CR_XER(_lval_cr,_lval_xer) \
+   do { GET_CR(_lval_cr); GET_XER(_lval_xer); } while (0)
+
+#define SET_CR_ZERO \
+      SET_CR(0)
+
+#define SET_XER_ZERO \
+      SET_XER(0)
+
+#define SET_CR_XER_ZERO \
+   do { SET_CR_ZERO; SET_XER_ZERO; } while (0)
+
+#define SET_FPSCR_ZERO \
+   do { double _d = 0.0; \
+        __asm__ __volatile__ ("mtfsf 0xFF, %0" : : "f"(_d) ); \
+   } while (0)
+
+
+typedef void (*test_func_t)(void);
+typedef struct test_table test_table_t;
+
+
+/* These functions below that construct a table of floating point
+ * values were lifted from none/tests/ppc32/jm-insns.c.
+ */
+
+#if defined (DEBUG_ARGS_BUILD)
+#define AB_DPRINTF(fmt, args...) do { fprintf(stderr, fmt , ##args); } while (0)
+#else
+#define AB_DPRINTF(fmt, args...) do { } while (0)
+#endif
+
+static inline void register_farg (void *farg,
+                                  int s, uint16_t _exp, uint64_t mant)
+{
+   uint64_t tmp;
+
+   tmp = ((uint64_t)s << 63) | ((uint64_t)_exp << 52) | mant;
+   *(uint64_t *)farg = tmp;
+   AB_DPRINTF("%d %03x %013llx => %016llx %0e\n",
+              s, _exp, mant, *(uint64_t *)farg, *(double *)farg);
+}
+
+
+typedef struct fp_test_args {
+   int fra_idx;
+   int frb_idx;
+} fp_test_args_t;
+
+
+fp_test_args_t two_arg_fp_tests[] = {
+                                     {8, 8},
+                                     {8, 14},
+                                     {15, 16},
+                                     {8, 5},
+                                     {8, 4},
+                                     {8, 7},
+                                     {8, 9},
+                                     {8, 11},
+                                     {14, 8},
+                                     {14, 14},
+                                     {14, 6},
+                                     {14, 5},
+                                     {14, 4},
+                                     {14, 7},
+                                     {14, 9},
+                                     {14, 11},
+                                     {6, 8},
+                                     {6, 14},
+                                     {6, 6},
+                                     {6, 5},
+                                     {6, 4},
+                                     {6, 7},
+                                     {6, 9},
+                                     {6, 11},
+                                     {5, 8},
+                                     {5, 14},
+                                     {5, 6},
+                                     {5, 5},
+                                     {5, 4},
+                                     {5, 7},
+                                     {5, 9},
+                                     {5, 11},
+                                     {4, 8},
+                                     {4, 14},
+                                     {4, 6},
+                                     {4, 5},
+                                     {4, 1},
+                                     {4, 7},
+                                     {4, 9},
+                                     {4, 11},
+                                     {7, 8},
+                                     {7, 14},
+                                     {7, 6},
+                                     {7, 5},
+                                     {7, 4},
+                                     {7, 7},
+                                     {7, 9},
+                                     {7, 11},
+                                     {10, 8},
+                                     {10, 14},
+                                     {12, 6},
+                                     {12, 5},
+                                     {10, 4},
+                                     {10, 7},
+                                     {10, 9},
+                                     {10, 11},
+                                     {12, 8 },
+                                     {12, 14},
+                                     {12, 6},
+                                     {15, 16},
+                                     {15, 16},
+                                     {9, 11},
+                                     {11, 11},
+                                     {11, 12},
+                                     {16, 18},
+                                     {17, 16},
+                                     {19, 19},
+                                     {19, 18}
+};
+
+
+static int nb_special_fargs;
+static double * spec_fargs;
+static float * spec_sp_fargs;
+
+static void build_special_fargs_table(void)
+{
+/*
+  Entry  Sign Exp   fraction                  Special value
+   0      0   3fd   0x8000000000000ULL         Positive finite number
+   1      0   404   0xf000000000000ULL         ...
+   2      0   001   0x8000000b77501ULL         ...
+   3      0   7fe   0x800000000051bULL         ...
+   4      0   012   0x3214569900000ULL         ...
+   5      0   000   0x0000000000000ULL         +0.0 (+zero)
+   6      1   000   0x0000000000000ULL         -0.0 (-zero)
+   7      0   7ff   0x0000000000000ULL         +infinity
+   8      1   7ff   0x0000000000000ULL         -infinity
+   9      0   7ff   0x7FFFFFFFFFFFFULL         +SNaN
+   10     1   7ff   0x7FFFFFFFFFFFFULL         -SNaN
+   11     0   7ff   0x8000000000000ULL         +QNaN
+   12     1   7ff   0x8000000000000ULL         -QNaN
+   13     1   000   0x8340000078000ULL         Denormalized val (zero exp and non-zero fraction)
+   14     1   40d   0x0650f5a07b353ULL         Negative finite number
+   15     0   412   0x32585a9900000ULL         A few more positive finite numbers
+   16     0   413   0x82511a2000000ULL         ...
+   17  . . . . . . . . . . . . . . . . . . . . . . .
+   18  . . . . . . . . . . . . . . . . . . . . . . .
+   19  . . . . . . . . . . . . . . . . . . . . . . .
+*/
+
+   uint64_t mant;
+   uint16_t _exp;
+   int s;
+   int j, i = 0;
+
+   if (spec_fargs)
+      return;
+
+   spec_fargs = malloc( 20 * sizeof(double) );
+   spec_sp_fargs = malloc( 20 * sizeof(float) );
+
+   // #0
+   s = 0;
+   _exp = 0x3fd;
+   mant = 0x8000000000000ULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   // #1
+   s = 0;
+   _exp = 0x404;
+   mant = 0xf000000000000ULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   // #2
+   s = 0;
+   _exp = 0x001;
+   mant = 0x8000000b77501ULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   // #3
+   s = 0;
+   _exp = 0x7fe;
+   mant = 0x800000000051bULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   // #4
+   s = 0;
+   _exp = 0x012;
+   mant = 0x3214569900000ULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+
+   /* Special values */
+   /* +0.0      : 0 0x000 0x0000000000000 */
+   // #5
+   s = 0;
+   _exp = 0x000;
+   mant = 0x0000000000000ULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   /* -0.0      : 1 0x000 0x0000000000000 */
+   // #6
+   s = 1;
+   _exp = 0x000;
+   mant = 0x0000000000000ULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   /* +infinity : 0 0x7FF 0x0000000000000  */
+   // #7
+   s = 0;
+   _exp = 0x7FF;
+   mant = 0x0000000000000ULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   /* -infinity : 1 0x7FF 0x0000000000000 */
+   // #8
+   s = 1;
+   _exp = 0x7FF;
+   mant = 0x0000000000000ULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   /* +QNaN     : 0 0x7FF 0x7FFFFFFFFFFFF */
+   // #9
+   s = 0;
+   _exp = 0x7FF;
+   mant = 0x7FFFFFFFFFFFFULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   /* -QNaN     : 1 0x7FF 0x7FFFFFFFFFFFF */
+   // #10
+   s = 1;
+   _exp = 0x7FF;
+   mant = 0x7FFFFFFFFFFFFULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   /* +SNaN     : 0 0x7FF 0x8000000000000 */
+   // #11
+   s = 0;
+   _exp = 0x7FF;
+   mant = 0x8000000000000ULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   /* -SNaN     : 1 0x7FF 0x8000000000000 */
+   // #12
+   s = 1;
+   _exp = 0x7FF;
+   mant = 0x8000000000000ULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   /* denormalized value */
+   // #13
+   s = 1;
+   _exp = 0x000;
+   mant = 0x8340000078000ULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   /* Negative finite number */
+   // #14
+   s = 1;
+   _exp = 0x40d;
+   mant = 0x0650f5a07b353ULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   /* A few positive finite numbers ... */
+   // #15
+   s = 0;
+   _exp = 0x412;
+   mant = 0x32585a9900000ULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   // #16
+   s = 0;
+   _exp = 0x413;
+   mant = 0x82511a2000000ULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   // #17
+   s = 0;
+   _exp = 0x403;
+   mant = 0x12ef5a9300000ULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   // #18
+   s = 0;
+   _exp = 0x405;
+   mant = 0x14bf5d2300000ULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   // #19
+   s = 0;
+   _exp = 0x409;
+   mant = 0x76bf982440000ULL;
+   register_farg(&spec_fargs[i++], s, _exp, mant);
+
+   nb_special_fargs = i;
+   for (j = 0; j < i; j++) {
+      spec_sp_fargs[j] = spec_fargs[j];
+   }
+}
+
+
+struct test_table
+{
+   test_func_t test_category;
+   char * name;
+};
+
+/*  Type of input for floating point operations.*/
+typedef enum {
+   SINGLE_TEST,
+   DOUBLE_TEST
+} precision_type_t;
+
+typedef enum {
+   VX_SCALAR_CONV_TO_WORD,
+   VX_CONV_TO_SINGLE,
+   VX_CONV_TO_DOUBLE,
+   VX_ESTIMATE,
+   VX_DEFAULT
+} vx_fp_test_type;
+
+static vector unsigned int vec_out, vec_inA, vec_inB;
+
+/* This function is for checking the reciprocal and reciprocal square root
+ * estimate instructions.
+ */
+Bool check_estimate(precision_type_t type, Bool is_rsqrte, int idx, int output_vec_idx)
+{
+   /* Technically, the number of bits of precision for xvredp and xvrsqrtedp is
+    * 14 bits (14 = log2 16384).  However, the VEX emulation of these instructions
+    * does an actual reciprocal calculation versus estimation, so the answer we get back from
+    * valgrind can easily differ from the estimate in the lower bits (within the 14 bits of
+    * precision) and the estimate may still be within expected tolerances.  On top of that,
+    * we can't count on these estimates always being the same across implementations.
+    * For example, with the fre[s] instruction (which should be correct to within one part
+    * in 256 -- i.e., 8 bits of precision) . . . When approximating the value 1.0111_1111_1111,
+    * one implementation could return 1.0111_1111_0000 and another implementation could return
+    * 1.1000_0000_0000.  Both estimates meet the 1/256 accuracy requirement, but share only a
+    * single bit in common.
+    *
+    * The upshot is we can't validate the VEX output for these instructions by comparing against
+    * stored bit patterns.  We must check that the result is within expected tolerances.
+    */
+
+
+   /* A mask to be used for validation as a last resort.
+    * Only use 12 bits of precision for reasons discussed above.
+    */
+#define VSX_RECIP_ESTIMATE_MASK_DP 0xFFFFFF0000000000ULL
+#define VSX_RECIP_ESTIMATE_MASK_SP 0xFFFFFF00
+
+   Bool result = False;
+   Bool dp_test = type == DOUBLE_TEST;
+   double src_dp, res_dp;
+   float src_sp, res_sp;
+   src_dp = res_dp = 0;
+   src_sp = res_sp = 0;
+#define SRC (dp_test ? src_dp : src_sp)
+#define RES (dp_test ? res_dp : res_sp)
+   Bool src_is_negative = False;
+   Bool res_is_negative = False;
+   unsigned long long * dst_dp = NULL;
+   unsigned int * dst_sp = NULL;
+   if (dp_test) {
+      unsigned long long * src_dp_ull;
+      dst_dp = (unsigned long long *) &vec_out;
+      src_dp = spec_fargs[idx];
+      src_dp_ull = (unsigned long long *) &src_dp;
+      src_is_negative = (*src_dp_ull & 0x8000000000000000ULL) ? True : False;
+      res_is_negative = (dst_dp[output_vec_idx] & 0x8000000000000000ULL) ? True : False;
+      memcpy(&res_dp, &dst_dp[output_vec_idx], 8);
+   } else {
+      unsigned int * src_sp_uint;
+      dst_sp = (unsigned int *) &vec_out;
+      src_sp = spec_sp_fargs[idx];
+      src_sp_uint = (unsigned int *) &src_sp;
+      src_is_negative = (*src_sp_uint & 0x80000000) ? True : False;
+      res_is_negative = (dst_sp[output_vec_idx] & 0x80000000) ? True : False;
+      memcpy(&res_sp, &dst_sp[output_vec_idx], 4);
+   }
+
+   // Below are common rules for xvre{d|s}p and xvrsqrte{d|s}p
+   if (isnan(SRC))
+      return isnan(RES);
+   if (fpclassify(SRC) == FP_ZERO)
+      return isinf(RES);
+   if (!src_is_negative && isinf(SRC))
+      return !res_is_negative && (fpclassify(RES) == FP_ZERO);
+   if (is_rsqrte) {
+      if (src_is_negative)
+         return isnan(RES);
+   } else {
+      if (src_is_negative && isinf(SRC))
+         return res_is_negative && (fpclassify(RES) == FP_ZERO);
+   }
+   if (dp_test) {
+      double calc_diff;
+      double real_diff;
+      double recip_divisor;
+      double div_result;
+      double calc_diff_tmp;
+
+      if (is_rsqrte)
+         recip_divisor = sqrt(src_dp);
+      else
+         recip_divisor = src_dp;
+
+      div_result = 1.0/recip_divisor;
+      calc_diff_tmp = recip_divisor * 16384.0;
+      if (isnormal(calc_diff_tmp)) {
+         calc_diff = fabs(1.0/calc_diff_tmp);
+         real_diff = fabs(res_dp - div_result);
+         result = ( ( res_dp == div_result )
+                  || ( real_diff <= calc_diff ) );
+      } else {
+         /* Unable to compute theoretical difference, so we fall back to masking out
+          * un-precise bits.
+          */
+         unsigned long long * div_result_dp = (unsigned long long *) &div_result;
+         result = (dst_dp[output_vec_idx] & VSX_RECIP_ESTIMATE_MASK_DP) == (*div_result_dp & VSX_RECIP_ESTIMATE_MASK_DP);
+      }
+      /* For debug use . . .
+         if (!result) {
+             unsigned long long * dv = &div_result;
+             unsigned long long * rd = &real_diff;
+             unsigned long long * cd = &calc_diff;
+             printf("\n\t {actual div_result: %016llx; real_diff:  %016llx; calc_diff:  %016llx}\n",
+       *dv, *rd, *cd);
+          }
+       */
+   } else {  // single precision test (only have xvrsqrtesp, since xvresp was implemented in stage 2)
+      float calc_diff;
+      float real_diff;
+      float div_result;
+      float calc_diff_tmp;
+      float recip_divisor = sqrt(src_sp);
+
+      div_result = 1.0/recip_divisor;
+      calc_diff_tmp = recip_divisor * 16384.0;
+      if (isnormal(calc_diff_tmp)) {
+         calc_diff = fabsf(1.0/calc_diff_tmp);
+         real_diff = fabsf(res_sp - div_result);
+         result = ( ( res_sp == div_result )
+                  || ( real_diff <= calc_diff ) );
+      } else {
+         /* Unable to compute theoretical difference, so we fall back to masking out
+          * un-precise bits.
+          */
+         unsigned int * div_result_sp = (unsigned int *) &div_result;
+         result = (dst_sp[output_vec_idx] & VSX_RECIP_ESTIMATE_MASK_SP) == (*div_result_sp & VSX_RECIP_ESTIMATE_MASK_SP);
+      }
+      /* For debug use . . .
+         if (!result) {
+             unsigned long long * dv = &div_result;
+             unsigned long long * rd = &real_diff;
+             unsigned long long * cd = &calc_diff;
+             printf("\n\t {actual div_result: %016llx; real_diff:  %016llx; calc_diff:  %016llx}\n",
+       *dv, *rd, *cd);
+          }
+       */
+   }
+   return result;
+}
+
+typedef struct vx_fp_test
+{
+   test_func_t test_func;
+   const char * name;
+   fp_test_args_t * targs;
+   int num_tests;
+   precision_type_t precision;
+   vx_fp_test_type type;
+   const char * op;
+} vx_fp_test_t;
+
+
+static Bool do_dot;
+
+static void test_xvredp(void)
+{
+   __asm__ __volatile__ ("xvredp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xsredp(void)
+{
+   __asm__ __volatile__ ("xsredp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvrsqrtedp(void)
+{
+   __asm__ __volatile__ ("xvrsqrtedp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xsrsqrtedp(void)
+{
+   __asm__ __volatile__ ("xsrsqrtedp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvrsqrtesp(void)
+{
+   __asm__ __volatile__ ("xvrsqrtesp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xstsqrtdp(void)
+{
+   __asm__ __volatile__ ("xstsqrtdp   cr1, %x0" : : "wa" (vec_inB));
+}
+
+static void test_xvtsqrtdp(void)
+{
+   __asm__ __volatile__ ("xvtsqrtdp   cr1, %x0" : : "wa" (vec_inB));
+}
+
+static void test_xvtsqrtsp(void)
+{
+   __asm__ __volatile__ ("xvtsqrtsp   cr1, %x0" : : "wa" (vec_inB));
+}
+
+static void test_xvsqrtdp(void)
+{
+   __asm__ __volatile__ ("xvsqrtdp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvsqrtsp(void)
+{
+   __asm__ __volatile__ ("xvsqrtsp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvtdivdp(void)
+{
+   __asm__ __volatile__ ("xvtdivdp   cr1, %x0, %x1" : : "wa" (vec_inA), "wa" (vec_inB));
+}
+
+static void test_xvtdivsp(void)
+{
+   __asm__ __volatile__ ("xvtdivsp   cr1, %x0, %x1" : : "wa" (vec_inA), "wa" (vec_inB));
+}
+
+static void test_xscvdpsp(void)
+{
+   __asm__ __volatile__ ("xscvdpsp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xscvdpuxws(void)
+{
+   __asm__ __volatile__ ("xscvdpuxws   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xscvspdp(void)
+{
+   __asm__ __volatile__ ("xscvspdp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvcvdpsp(void)
+{
+   __asm__ __volatile__ ("xvcvdpsp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvcvdpuxds(void)
+{
+   __asm__ __volatile__ ("xvcvdpuxds   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvcvdpuxws(void)
+{
+   __asm__ __volatile__ ("xvcvdpuxws   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvcvspdp(void)
+{
+   __asm__ __volatile__ ("xvcvspdp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvcvspsxds(void)
+{
+   __asm__ __volatile__ ("xvcvspsxds   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvcvspuxds(void)
+{
+   __asm__ __volatile__ ("xvcvspuxds   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvcvdpsxds(void)
+{
+   __asm__ __volatile__ ("xvcvdpsxds   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvcvspuxws(void)
+{
+   __asm__ __volatile__ ("xvcvspuxws   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvcvsxddp(void)
+{
+   __asm__ __volatile__ ("xvcvsxddp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvcvuxddp(void)
+{
+   __asm__ __volatile__ ("xvcvuxddp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvcvsxdsp(void)
+{
+   __asm__ __volatile__ ("xvcvsxdsp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvcvuxdsp(void)
+{
+   __asm__ __volatile__ ("xvcvuxdsp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvcvsxwdp(void)
+{
+   __asm__ __volatile__ ("xvcvsxwdp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvcvuxwdp(void)
+{
+   __asm__ __volatile__ ("xvcvuxwdp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvcvsxwsp(void)
+{
+   __asm__ __volatile__ ("xvcvsxwsp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvcvuxwsp(void)
+{
+   __asm__ __volatile__ ("xvcvuxwsp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xsrdpic(void)
+{
+   __asm__ __volatile__ ("xsrdpic   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xsrdpiz(void)
+{
+   __asm__ __volatile__ ("xsrdpiz   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xsrdpi(void)
+{
+   __asm__ __volatile__ ("xsrdpi   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvabsdp(void)
+{
+   __asm__ __volatile__ ("xvabsdp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvnabsdp(void)
+{
+   __asm__ __volatile__ ("xvnabsdp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvnegdp(void)
+{
+   __asm__ __volatile__ ("xvnegdp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvabssp(void)
+{
+   __asm__ __volatile__ ("xvabssp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvnabssp(void)
+{
+   __asm__ __volatile__ ("xvnabssp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvrdpi(void)
+{
+   __asm__ __volatile__ ("xvrdpi   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvrdpic(void)
+{
+   __asm__ __volatile__ ("xvrdpic   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvrdpim(void)
+{
+   __asm__ __volatile__ ("xvrdpim   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvrdpip(void)
+{
+   __asm__ __volatile__ ("xvrdpip   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvrdpiz(void)
+{
+   __asm__ __volatile__ ("xvrdpiz   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvrspi(void)
+{
+   __asm__ __volatile__ ("xvrspi   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvrspic(void)
+{
+   __asm__ __volatile__ ("xvrspic   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvrspim(void)
+{
+   __asm__ __volatile__ ("xvrspim   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvrspip(void)
+{
+   __asm__ __volatile__ ("xvrspip   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static void test_xvrspiz(void)
+{
+   __asm__ __volatile__ ("xvrspiz   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
+static vx_fp_test_t
+vsx_one_fp_arg_tests[] = {
+                                { &test_xvredp, "xvredp", NULL, 18, DOUBLE_TEST, VX_ESTIMATE, "1/x"},
+                                { &test_xsredp, "xsredp", NULL, 18, DOUBLE_TEST, VX_ESTIMATE, "1/x"},
+                                { &test_xvrsqrtedp, "xvrsqrtedp", NULL, 18, DOUBLE_TEST, VX_ESTIMATE, "1/x-sqrt"},
+                                { &test_xsrsqrtedp, "xsrsqrtedp", NULL, 18, DOUBLE_TEST, VX_ESTIMATE, "1/x-sqrt"},
+                                { &test_xvrsqrtesp, "xvrsqrtesp", NULL, 18, SINGLE_TEST, VX_ESTIMATE, "1/x-sqrt"},
+                                { &test_xvsqrtdp, "xvsqrtdp", NULL, 18, DOUBLE_TEST, VX_DEFAULT, "sqrt"},
+                                { &test_xvsqrtsp, "xvsqrtsp", NULL, 18, SINGLE_TEST, VX_DEFAULT, "sqrt"},
+                                { &test_xscvdpsp, "xscvdpsp", NULL, 20, DOUBLE_TEST, VX_CONV_TO_SINGLE, "conv"},
+                                { &test_xscvdpuxws, "xscvdpuxws", NULL, 20, DOUBLE_TEST, VX_SCALAR_CONV_TO_WORD, "conv"},
+                                { &test_xscvspdp, "xscvspdp", NULL, 20, SINGLE_TEST, VX_CONV_TO_DOUBLE, "conv"},
+                                { &test_xvcvdpsp, "xvcvdpsp", NULL, 20, DOUBLE_TEST, VX_CONV_TO_SINGLE, "conv"},
+                                { &test_xvcvdpuxds, "xvcvdpuxds", NULL, 20, DOUBLE_TEST, VX_CONV_TO_DOUBLE, "conv"},
+                                { &test_xvcvdpuxws, "xvcvdpuxws", NULL, 20, DOUBLE_TEST, VX_CONV_TO_SINGLE, "conv"},
+                                { &test_xvcvspdp, "xvcvspdp", NULL, 20, SINGLE_TEST, VX_CONV_TO_DOUBLE, "conv"},
+                                { &test_xvcvspsxds, "xvcvspsxds", NULL, 20, SINGLE_TEST, VX_CONV_TO_DOUBLE, "conv"},
+                                { &test_xvcvdpsxds, "xvcvdpsxds", NULL, 20, DOUBLE_TEST, VX_CONV_TO_DOUBLE, "conv"},
+                                { &test_xvcvspuxds, "xvcvspuxds", NULL, 20, SINGLE_TEST, VX_CONV_TO_DOUBLE, "conv"},
+                                { &test_xvcvspuxws, "xvcvspuxws", NULL, 20, SINGLE_TEST, VX_CONV_TO_SINGLE, "conv"},
+                                { &test_xsrdpic, "xsrdpic", NULL, 20, DOUBLE_TEST, VX_CONV_TO_DOUBLE, "round"},
+                                { &test_xsrdpiz, "xsrdpiz", NULL, 20, DOUBLE_TEST, VX_CONV_TO_DOUBLE, "round"},
+                                { &test_xsrdpi, "xsrdpi", NULL, 20, DOUBLE_TEST, VX_CONV_TO_DOUBLE, "round"},
+                                { &test_xvabsdp, "xvabsdp", NULL, 20, DOUBLE_TEST, VX_DEFAULT, "abs"},
+                                { &test_xvnabsdp, "xvnabsdp", NULL, 20, DOUBLE_TEST, VX_DEFAULT, "nabs"},
+                                { &test_xvnegdp, "xvnegdp", NULL, 20, DOUBLE_TEST, VX_DEFAULT, "neg"},
+                                { &test_xvabssp, "xvabssp", NULL, 20, SINGLE_TEST, VX_DEFAULT, "abs"},
+                                { &test_xvnabssp, "xvnabssp", NULL, 20, SINGLE_TEST, VX_DEFAULT, "nabs"},
+                                { &test_xvrdpi,  "xvrdpi",  NULL, 20, DOUBLE_TEST, VX_CONV_TO_DOUBLE, "round"},
+                                { &test_xvrdpic, "xvrdpic", NULL, 20, DOUBLE_TEST, VX_CONV_TO_DOUBLE, "round"},
+                                { &test_xvrdpim, "xvrdpim", NULL, 20, DOUBLE_TEST, VX_CONV_TO_DOUBLE, "round"},
+                                { &test_xvrdpip, "xvrdpip", NULL, 20, DOUBLE_TEST, VX_CONV_TO_DOUBLE, "round"},
+                                { &test_xvrdpiz, "xvrdpiz", NULL, 20, DOUBLE_TEST, VX_CONV_TO_DOUBLE, "round"},
+                                { &test_xvrspi,  "xvrspi",  NULL, 20, SINGLE_TEST, VX_CONV_TO_SINGLE, "round"},
+                                { &test_xvrspic, "xvrspic", NULL, 20, SINGLE_TEST, VX_CONV_TO_SINGLE, "round"},
+                                { &test_xvrspim, "xvrspim", NULL, 20, SINGLE_TEST, VX_CONV_TO_SINGLE, "round"},
+                                { &test_xvrspip, "xvrspip", NULL, 20, SINGLE_TEST, VX_CONV_TO_SINGLE, "round"},
+                                { &test_xvrspiz, "xvrspiz", NULL, 20, SINGLE_TEST, VX_CONV_TO_SINGLE, "round"},
+                                { NULL, NULL, NULL, 0, 0, 0, NULL}
+};
+
+static vx_fp_test_t
+vx_tdivORtsqrt_tests[] = {
+                          { &test_xstsqrtdp, "xstsqrtdp", NULL, 20, DOUBLE_TEST, VX_DEFAULT, "test-sqrt"},
+                          { &test_xvtsqrtdp, "xvtsqrtdp", NULL, 20, DOUBLE_TEST, VX_DEFAULT, "test-sqrt"},
+                          { &test_xvtsqrtsp, "xvtsqrtsp", NULL, 20, SINGLE_TEST, VX_DEFAULT, "test-sqrt"},
+                          { &test_xvtdivdp, "xvtdivdp", two_arg_fp_tests, 68, DOUBLE_TEST, VX_DEFAULT, "test-div"},
+                          { &test_xvtdivsp, "xvtdivsp", two_arg_fp_tests, 68, SINGLE_TEST, VX_DEFAULT, "test-div"},
+                          { NULL, NULL, NULL, 0 , 0, 0, NULL}
+};
+
+static unsigned long long doubleWord[] = { 0,
+                                  0xffffffff00000000LL,
+                                  0x00000000ffffffffLL,
+                                  0xffffffffffffffffLL,
+                                  0x89abcde123456789LL,
+                                  0x0102030405060708LL,
+                                  0x00000000a0b1c2d3LL,
+                                  0x1111222233334444LL
+};
+
+static unsigned int singleWord[] = {0,
+                                  0xffff0000,
+                                  0x0000ffff,
+                                  0xffffffff,
+                                  0x89a73522,
+                                  0x01020304,
+                                  0x0000abcd,
+                                  0x11223344
+};
+
+typedef struct vx_intToFp_test
+{
+   test_func_t test_func;
+   const char * name;
+   void * targs;
+   int num_tests;
+   precision_type_t precision;
+   vx_fp_test_type type;
+} vx_intToFp_test_t;
+
+static vx_intToFp_test_t
+intToFp_tests[] = {
+                   { test_xvcvsxddp, "xvcvsxddp", (void *)doubleWord, 8, DOUBLE_TEST, VX_CONV_TO_DOUBLE },
+                   { test_xvcvuxddp, "xvcvuxddp", (void *)doubleWord, 8, DOUBLE_TEST, VX_CONV_TO_DOUBLE },
+                   { test_xvcvsxdsp, "xvcvsxdsp", (void *)doubleWord, 8, DOUBLE_TEST, VX_CONV_TO_SINGLE },
+                   { test_xvcvuxdsp, "xvcvuxdsp", (void *)doubleWord, 8, DOUBLE_TEST, VX_CONV_TO_SINGLE },
+                   { test_xvcvsxwdp, "xvcvsxwdp", (void *)singleWord, 8, SINGLE_TEST, VX_CONV_TO_DOUBLE },
+                   { test_xvcvuxwdp, "xvcvuxwdp", (void *)singleWord, 8, SINGLE_TEST, VX_CONV_TO_DOUBLE },
+                   { test_xvcvsxwsp, "xvcvsxwsp", (void *)singleWord, 8, SINGLE_TEST, VX_CONV_TO_SINGLE },
+                   { test_xvcvuxwsp, "xvcvuxwsp", (void *)singleWord, 8, SINGLE_TEST, VX_CONV_TO_SINGLE },
+                   { NULL, NULL, NULL, 0, 0 }
+};
+
+static Bool do_OE;
+typedef enum {
+   DIV_BASE = 1,
+   DIV_OE = 2,
+   DIV_DOT = 4,
+} div_type_t;
+/* Possible divde type combinations are:
+ *   - base
+ *   - base+dot
+ *   - base+OE
+ *   - base+OE+dot
+ */
+#ifdef __powerpc64__
+static void test_divdeu(void)
+{
+   int divdeu_type = DIV_BASE;
+   if (do_OE)
+      divdeu_type |= DIV_OE;
+   if (do_dot)
+      divdeu_type |= DIV_DOT;
+
+   switch (divdeu_type) {
+      case 1:
+        SET_CR_XER_ZERO;
+         __asm__ __volatile__ ("divdeu %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
+         GET_CR_XER(div_flags, div_xer);
+         break;
+      case 3:
+        SET_CR_XER_ZERO;
+         __asm__ __volatile__ ("divdeuo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
+         GET_CR_XER(div_flags, div_xer);
+         break;
+      case 5:
+        SET_CR_XER_ZERO;
+         __asm__ __volatile__ ("divdeu. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
+         GET_CR_XER(div_flags, div_xer);
+         break;
+      case 7:
+        SET_CR_XER_ZERO;
+         __asm__ __volatile__ ("divdeuo. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
+         GET_CR_XER(div_flags, div_xer);
+         break;
+      default:
+         fprintf(stderr, "Invalid divdeu type. Exiting\n");
+         exit(1);
+   }
+}
+#endif
+
+static void test_divwe(void)
+{
+   int divwe_type = DIV_BASE;
+   if (do_OE)
+      divwe_type |= DIV_OE;
+   if (do_dot)
+      divwe_type |= DIV_DOT;
+
+   switch (divwe_type) {
+      case 1:
+        SET_CR_XER_ZERO;
+         __asm__ __volatile__ ("divwe %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
+         GET_CR_XER(div_flags, div_xer);
+         break;
+      case 3:
+        SET_CR_XER_ZERO;
+         __asm__ __volatile__ ("divweo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
+         GET_CR_XER(div_flags, div_xer);
+         break;
+      case 5:
+        SET_CR_XER_ZERO;
+         __asm__ __volatile__ ("divwe. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
+         GET_CR_XER(div_flags, div_xer);
+         break;
+      case 7:
+        SET_CR_XER_ZERO;
+         __asm__ __volatile__ ("divweo. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
+         GET_CR_XER(div_flags, div_xer);
+         break;
+      default:
+         fprintf(stderr, "Invalid divweu type. Exiting\n");
+         exit(1);
+   }
+}
+
+
+typedef struct simple_test {
+   test_func_t test_func;
+   char * name;
+   precision_type_t precision;
+} simple_test_t;
+
+
+static void setup_sp_fp_args(fp_test_args_t * targs, Bool swap_inputs)
+{
+   int a_idx, b_idx, i;
+   void * inA, * inB;
+   void * vec_src = swap_inputs ? &vec_out : &vec_inB;
+
+   for (i = 0; i < 4; i++) {
+      a_idx = targs->fra_idx;
+      b_idx = targs->frb_idx;
+      inA = (void *)&spec_sp_fargs[a_idx];
+      inB = (void *)&spec_sp_fargs[b_idx];
+      // copy single precision FP  into vector element i
+      memcpy(((void *)&vec_inA) + (i * 4), inA, 4);
+      memcpy(vec_src + (i * 4), inB, 4);
+      targs++;
+   }
+}
+
+static void setup_dp_fp_args(fp_test_args_t * targs, Bool swap_inputs)
+{
+   int a_idx, b_idx, i;
+   void * inA, * inB;
+   void * vec_src = swap_inputs ? (void *)&vec_out : (void *)&vec_inB;
+
+   for (i = 0; i < 2; i++) {
+      a_idx = targs->fra_idx;
+      b_idx = targs->frb_idx;
+      inA = (void *)&spec_fargs[a_idx];
+      inB = (void *)&spec_fargs[b_idx];
+      // copy double precision FP  into vector element i
+      memcpy(((void *)&vec_inA) + (i * 8), inA, 8);
+      memcpy(vec_src + (i * 8), inB, 8);
+      targs++;
+   }
+}
+
+#define VX_NOT_CMP_OP 0xffffffff
+static void print_vector_fp_result(unsigned int cc, vx_fp_test_t * test_group, int i, Bool print_vec_out)
+{
+   int a_idx, b_idx, k;
+   char * name = malloc(20);
+   int dp = test_group->precision == DOUBLE_TEST ? 1 : 0;
+   int loops = dp ? 2 : 4;
+   fp_test_args_t * targs = &test_group->targs[i];
+   unsigned long long * frA_dp, * frB_dp, * dst_dp;
+   unsigned int * frA_sp, *frB_sp, * dst_sp;
+   strcpy(name, test_group->name);
+   printf("#%d: %s%s ", dp? i/2 : i/4, name, (do_dot ? "." : ""));
+   for (k = 0; k < loops; k++) {
+      a_idx = targs->fra_idx;
+      b_idx = targs->frb_idx;
+      if (k)
+         printf(" AND ");
+      if (dp) {
+         frA_dp = (unsigned long long *)&spec_fargs[a_idx];
+         frB_dp = (unsigned long long *)&spec_fargs[b_idx];
+         printf("%016llx %s %016llx", *frA_dp, test_group->op, *frB_dp);
+      } else {
+         frA_sp = (unsigned int *)&spec_sp_fargs[a_idx];
+         frB_sp = (unsigned int *)&spec_sp_fargs[b_idx];
+         printf("%08x %s %08x", *frA_sp, test_group->op, *frB_sp);
+      }
+      targs++;
+   }
+   if (cc != VX_NOT_CMP_OP)
+      printf(" ? cc=%x", cc);
+
+   if (print_vec_out) {
+      if (dp) {
+         dst_dp = (unsigned long long *) &vec_out;
+         printf(" => %016llx %016llx\n", dst_dp[0], dst_dp[1]);
+      } else {
+         dst_sp = (unsigned int *) &vec_out;
+         printf(" => %08x %08x %08x %08x\n", dst_sp[0], dst_sp[1], dst_sp[2], dst_sp[3]);
+      }
+   } else {
+      printf("\n");
+   }
+   free(name);
+}
+
+
+
+static void test_vsx_one_fp_arg(void)
+{
+   test_func_t func;
+   int k;
+   k = 0;
+   build_special_fargs_table();
+
+   while ((func = vsx_one_fp_arg_tests[k].test_func)) {
+      int idx, i;
+      vx_fp_test_t test_group = vsx_one_fp_arg_tests[k];
+      Bool estimate = (test_group.type == VX_ESTIMATE);
+      Bool dp = (test_group.precision == DOUBLE_TEST) ? True : False;
+      Bool is_sqrt = (strstr(test_group.name, "sqrt")) ? True : False;
+      Bool is_scalar = (strstr(test_group.name, "xs")) ? True : False;
+      Bool sparse_sp = False;
+      int stride = dp ? 2 : 4;
+      int loops = is_scalar ? 1 : stride;
+      stride = is_scalar ? 1: stride;
+
+      /* For conversions of single to double, the 128-bit input register is sparsely populated:
+       *    |___ SP___|_Unused_|___SP___|__Unused__|   // for vector op
+       *                     or
+       *    |___ SP___|_Unused_|_Unused_|__Unused__|   // for scalar op
+       *
+       * For the vector op case, we need to adjust stride from '4' to '2', since
+       * we'll only be loading two values per loop into the input register.
+       */
+      if (!dp && !is_scalar && test_group.type == VX_CONV_TO_DOUBLE) {
+         sparse_sp = True;
+         stride = 2;
+      }
+
+      for (i = 0; i < test_group.num_tests; i+=stride) {
+         unsigned int * pv;
+         void * inB;
+
+         pv = (unsigned int *)&vec_out;
+         // clear vec_out
+         for (idx = 0; idx < 4; idx++, pv++)
+            *pv = 0;
+
+         if (dp) {
+            int j;
+            unsigned long long * frB_dp, *dst_dp;
+            for (j = 0; j < loops; j++) {
+               inB = (void *)&spec_fargs[i + j];
+               // copy double precision FP into vector element i
+               memcpy(((void *)&vec_inB) + (j * 8), inB, 8);
+            }
+            // execute test insn
+            (*func)();
+            dst_dp = (unsigned long long *) &vec_out;
+            printf("#%d: %s ", i/stride, test_group.name);
+            for (j = 0; j < loops; j++) {
+               if (j)
+                  printf("; ");
+               frB_dp = (unsigned long long *)&spec_fargs[i + j];
+               printf("%s(%016llx)", test_group.op, *frB_dp);
+               if (estimate) {
+                  Bool res = check_estimate(DOUBLE_TEST, is_sqrt, i + j, j);
+                  printf(" ==> %s)", res ? "PASS" : "FAIL");
+                  /* For debugging . . .
+                   printf(" ==> %s (res=%016llx)", res ? "PASS" : "FAIL", dst_dp[j]);
+                   */
+               } else {
+                  vx_fp_test_type type = test_group.type;
+                  switch (type) {
+                     case VX_SCALAR_CONV_TO_WORD:
+                        printf(" = %016llx", dst_dp[j] & 0x00000000ffffffffULL);
+                        break;
+                     case VX_CONV_TO_SINGLE:
+                        printf(" = %016llx", dst_dp[j] & 0xffffffff00000000ULL);
+                        break;
+                     default:  // For VX_CONV_TO_DOUBLE and non-convert instructions . . .
+                        printf(" = %016llx", dst_dp[j]);
+                  }
+               }
+            }
+            printf("\n");
+         } else {
+            int j, skip_slot;
+            unsigned int * frB_sp, * dst_sp = NULL;
+            unsigned long long * dst_dp = NULL;
+            if (sparse_sp) {
+               skip_slot = 1;
+               loops = 2;
+            } else {
+               skip_slot = 0;
+            }
+            for (j = 0; j < loops; j++) {
+               inB = (void *)&spec_sp_fargs[i + j];
+               // copy single precision FP into vector element i
+               if (skip_slot && j > 0)
+                  memcpy(((void *)&vec_inB) + ((j + j) * 4), inB, 4);
+               else
+                  memcpy(((void *)&vec_inB) + (j * 4), inB, 4);
+            }
+            // execute test insn
+            (*func)();
+            if (test_group.type == VX_CONV_TO_DOUBLE)
+               dst_dp = (unsigned long long *) &vec_out;
+            else
+               dst_sp = (unsigned int *) &vec_out;
+            // print result
+            printf("#%d: %s ", i/stride, test_group.name);
+            for (j = 0; j < loops; j++) {
+               if (j)
+                  printf("; ");
+               frB_sp = (unsigned int *)&spec_sp_fargs[i + j];
+               printf("%s(%08x)", test_group.op, *frB_sp);
+               if (estimate) {
+                  Bool res = check_estimate(SINGLE_TEST, is_sqrt, i + j, j);
+                  printf(" ==> %s)", res ? "PASS" : "FAIL");
+               } else {
+                  if (test_group.type == VX_CONV_TO_DOUBLE)
+                        printf(" = %016llx", dst_dp[j]);
+                  else
+                  /* Special case: Current VEX implementation for fsqrts (single precision)
+                   * uses the same implementation as that used for double precision fsqrt.
+                   * However, I've found that for xvsqrtsp, the result from that implementation
+                   * may be off by the two LSBs.  Generally, even this small inaccuracy can cause the
+                   * output to appear very different if you end up with a carry.  But for the given
+                   * inputs in this testcase, we can simply mask out these bits.
+                   */
+                     printf(" = %08x", is_sqrt ? (dst_sp[j] & 0xfffffffc) : dst_sp[j]);
+               }
+            }
+            printf("\n");
+         }
+      }
+      k++;
+      printf( "\n" );
+   }
+}
+
+static void test_int_to_fp_convert(void)
+{
+   test_func_t func;
+   int k;
+   k = 0;
+
+   while ((func = intToFp_tests[k].test_func)) {
+      int idx, i;
+      vx_intToFp_test_t test_group = intToFp_tests[k];
+      Bool dp = (test_group.precision == DOUBLE_TEST) ? True : False;
+      Bool sparse_sp = False;
+      int stride = dp ? 2 : 4;
+      int loops = stride;
+
+      /* For conversions of single to double, the 128-bit input register is sparsely populated:
+       *    |___ int___|_Unused_|___int___|__Unused__|   // for vector op
+       *                     or
+       * We need to adjust stride from '4' to '2', since we'll only be loading
+       * two values per loop into the input register.
+       */
+      if (!dp && test_group.type == VX_CONV_TO_DOUBLE) {
+         sparse_sp = True;
+         stride = 2;
+      }
+
+      for (i = 0; i < test_group.num_tests; i+=stride) {
+         unsigned int * pv;
+         void * inB;
+
+         pv = (unsigned int *)&vec_out;
+         // clear vec_out
+         for (idx = 0; idx < 4; idx++, pv++)
+            *pv = 0;
+
+         if (dp) {
+            int j;
+            unsigned long long  *dst_dw, * targs = test_group.targs;
+            for (j = 0; j < loops; j++) {
+               inB = (void *)&targs[i + j];
+               // copy doubleword into vector element i
+               memcpy(((void *)&vec_inB) + (j * 8), inB, 8);
+            }
+            // execute test insn
+            (*func)();
+            dst_dw = (unsigned long long *) &vec_out;
+            printf("#%d: %s ", i/stride, test_group.name);
+            for (j = 0; j < loops; j++) {
+               if (j)
+                  printf("; ");
+               printf("conv(%016llx)", targs[i + j]);
+
+               if (test_group.type == VX_CONV_TO_SINGLE)
+                  printf(" = %016llx", dst_dw[j] & 0xffffffff00000000ULL);
+               else
+                  printf(" = %016llx", dst_dw[j]);
+            }
+            printf("\n");
+         } else {
+            int j, skip_slot;
+            unsigned int * dst_sp = NULL;
+            unsigned int * targs = test_group.targs;
+            unsigned long long * dst_dp = NULL;
+            if (sparse_sp) {
+               skip_slot = 1;
+               loops = 2;
+            } else {
+               skip_slot = 0;
+            }
+            for (j = 0; j < loops; j++) {
+               inB = (void *)&targs[i + j];
+               // copy single word into vector element i
+               if (skip_slot && j > 0)
+                  memcpy(((void *)&vec_inB) + ((j + j) * 4), inB, 4);
+               else
+                  memcpy(((void *)&vec_inB) + (j * 4), inB, 4);
+            }
+            // execute test insn
+            (*func)();
+            if (test_group.type == VX_CONV_TO_DOUBLE)
+               dst_dp = (unsigned long long *) &vec_out;
+            else
+               dst_sp = (unsigned int *) &vec_out;
+            // print result
+            printf("#%d: %s ", i/stride, test_group.name);
+            for (j = 0; j < loops; j++) {
+               if (j)
+                  printf("; ");
+               printf("conv(%08x)", targs[i + j]);
+               if (test_group.type == VX_CONV_TO_DOUBLE)
+                  printf(" = %016llx", dst_dp[j]);
+               else
+                  printf(" = %08x", dst_sp[j]);
+            }
+            printf("\n");
+         }
+      }
+      k++;
+      printf( "\n" );
+   }
+}
+
+
+
+// The div doubleword test data
+signed long long div_dw_tdata[13][2] = {
+                                       { 4, -4 },
+                                       { 4, -3 },
+                                       { 4, 4 },
+                                       { 4, -5 },
+                                       { 3, 8 },
+                                       { 0x8000000000000000, 0xa },
+                                       { 0x50c, -1 },
+                                       { 0x50c, -4096 },
+                                       { 0x1234fedc, 0x8000a873 },
+                                       { 0xabcd87651234fedc, 0xa123b893 },
+                                       { 0x123456789abdc, 0 },
+                                       { 0, 2 },
+                                       { 0x77, 0xa3499 }
+};
+#define dw_tdata_len (sizeof(div_dw_tdata)/sizeof(signed long long)/2)
+
+// The div word test data
+unsigned int div_w_tdata[6][2] = {
+                              { 0, 2 },
+                              { 2, 0 },
+                              { 0x7abc1234, 0xf0000000 },
+                              { 0xfabc1234, 5 },
+                              { 77, 66 },
+                              { 5, 0xfabc1234 },
+};
+#define w_tdata_len (sizeof(div_w_tdata)/sizeof(unsigned int)/2)
+
+typedef struct div_ext_test
+{
+   test_func_t test_func;
+   const char *name;
+   int num_tests;
+   div_type_t div_type;
+   precision_type_t precision;
+} div_ext_test_t;
+
+static div_ext_test_t div_tests[] = {
+#ifdef __powerpc64__
+                                   { &test_divdeu, "divdeu", dw_tdata_len, DIV_BASE, DOUBLE_TEST },
+                                   { &test_divdeu, "divdeuo", dw_tdata_len, DIV_OE, DOUBLE_TEST },
+#endif
+                                   { &test_divwe, "divwe", w_tdata_len, DIV_BASE, SINGLE_TEST },
+                                   { &test_divwe, "divweo", w_tdata_len, DIV_OE, SINGLE_TEST },
+                                   { NULL, NULL, 0, 0, 0 }
+};
+
+static void test_div_extensions(void)
+{
+   test_func_t func;
+   int k;
+   k = 0;
+
+   while ((func = div_tests[k].test_func)) {
+      int i, repeat = 1;
+      div_ext_test_t test_group = div_tests[k];
+      do_dot = False;
+
+again:
+      for (i = 0; i < test_group.num_tests; i++) {
+         unsigned int condreg;
+
+         if (test_group.div_type == DIV_OE)
+            do_OE = True;
+         else
+            do_OE = False;
+
+         if (test_group.precision == DOUBLE_TEST) {
+            r14 = div_dw_tdata[i][0];
+            r15 = div_dw_tdata[i][1];
+         } else {
+            r14 = div_w_tdata[i][0];
+            r15 = div_w_tdata[i][1];
+         }
+         // execute test insn
+         (*func)();
+         condreg = (div_flags & 0xf0000000) >> 28;
+         printf("#%d: %s%s: ", i, test_group.name, do_dot ? "." : "");
+         if (test_group.precision == DOUBLE_TEST) {
+            printf("0x%016llx0000000000000000 / 0x%016llx = 0x%016llx;",
+                   div_dw_tdata[i][0], div_dw_tdata[i][1], (signed long long) r17);
+         } else {
+            printf("0x%08x00000000 / 0x%08x = 0x%08x;",
+                   div_w_tdata[i][0], div_w_tdata[i][1], (unsigned int) r17);
+         }
+         printf(" CR=%x; XER=%x\n", condreg, div_xer);
+      }
+      printf("\n");
+      if (repeat) {
+         repeat = 0;
+         do_dot = True;
+         goto again;
+      }
+      k++;
+      printf( "\n" );
+   }
+}
+
+
+static void test_vx_tdivORtsqrt(void)
+{
+   test_func_t func;
+   int k, crx;
+   unsigned int flags;
+   k = 0;
+   do_dot = False;
+   build_special_fargs_table();
+
+   while ((func = vx_tdivORtsqrt_tests[k].test_func)) {
+      int idx, i;
+      vx_fp_test_t test_group = vx_tdivORtsqrt_tests[k];
+      Bool dp = (test_group.precision == DOUBLE_TEST) ? True : False;
+      Bool is_scalar = (strstr(test_group.name, "xs")) ? True : False;
+      Bool two_args = test_group.targs ?  True : False;
+      int stride = dp ? 2 : 4;
+      int loops = is_scalar ? 1 : stride;
+      stride = is_scalar ? 1: stride;
+
+      for (i = 0; i < test_group.num_tests; i+=stride) {
+         unsigned int * pv;
+         void * inB;
+
+         pv = (unsigned int *)&vec_out;
+         // clear vec_out
+         for (idx = 0; idx < 4; idx++, pv++)
+            *pv = 0;
+
+         if (dp) {
+            int j;
+            unsigned long long * frB_dp;
+            if (two_args) {
+               setup_dp_fp_args(&test_group.targs[i], False);
+            } else {
+               for (j = 0; j < loops; j++) {
+                  inB = (void *)&spec_fargs[i + j];
+                  // copy double precision FP into vector element i
+                  memcpy(((void *)&vec_inB) + (j * 8), inB, 8);
+               }
+            }
+            // execute test insn
+            // Must do set/get of CRs immediately before/after calling the asm func
+            // to avoid CRs being modified by other instructions.
+            SET_FPSCR_ZERO;
+            SET_CR_XER_ZERO;
+            (*func)();
+            GET_CR(flags);
+            // assumes using CR1
+            crx = (flags & 0x0f000000) >> 24;
+            if (two_args) {
+               print_vector_fp_result(crx, &test_group, i, False/*do not print vec_out*/);
+            } else {
+               printf("#%d: %s ", i/stride, test_group.name);
+               for (j = 0; j < loops; j++) {
+                  if (j)
+                     printf("; ");
+                  frB_dp = (unsigned long long *)&spec_fargs[i + j];
+                  printf("%s(%016llx)", test_group.op, *frB_dp);
+               }
+               printf( " ? %x (CRx)\n", crx);
+            }
+         } else {
+            int j;
+            unsigned int * frB_sp;
+            if (two_args) {
+               setup_sp_fp_args(&test_group.targs[i], False);
+            } else {
+               for (j = 0; j < loops; j++) {
+                  inB = (void *)&spec_sp_fargs[i + j];
+                  // copy single precision FP into vector element i
+                  memcpy(((void *)&vec_inB) + (j * 4), inB, 4);
+               }
+            }
+            // execute test insn
+            SET_FPSCR_ZERO;
+            SET_CR_XER_ZERO;
+            (*func)();
+            GET_CR(flags);
+            crx = (flags & 0x0f000000) >> 24;
+            // print result
+            if (two_args) {
+               print_vector_fp_result(crx, &test_group, i, False/*do not print vec_out*/);
+            } else {
+               printf("#%d: %s ", i/stride, test_group.name);
+               for (j = 0; j < loops; j++) {
+                  if (j)
+                     printf("; ");
+                  frB_sp = (unsigned int *)&spec_sp_fargs[i + j];
+                  printf("%s(%08x)", test_group.op, *frB_sp);
+               }
+               printf( " ? %x (CRx)\n", crx);
+            }
+         }
+      }
+      k++;
+      printf( "\n" );
+   }
+}
+
+
+static void test_ftsqrt(void)
+{
+   int i, crx;
+   unsigned int flags;
+   unsigned long long * frbp;
+   build_special_fargs_table();
+
+
+   for (i = 0; i < nb_special_fargs; i++) {
+      f14 = spec_fargs[i];
+      frbp = (unsigned long long *)&spec_fargs[i];
+      SET_FPSCR_ZERO;
+      SET_CR_XER_ZERO;
+      __asm__ __volatile__ ("ftsqrt           cr1, %0" : : "d" (f14));
+      GET_CR(flags);
+      crx = (flags & 0x0f000000) >> 24;
+      printf( "ftsqrt: %016llx ? %x (CRx)\n", *frbp, crx);
+   }
+   printf( "\n" );
+}
+
+static void
+test_popcntw(void)
+{
+#ifdef __powerpc64__
+   uint64_t res;
+   unsigned long long src = 0x9182736405504536ULL;
+   r14 = src;
+   __asm__ __volatile__ ("popcntw          %0, %1" : "=r" (res): "r" (r14));
+   printf("popcntw: 0x%llx => 0x%016llx\n", (unsigned long long)src, (unsigned long long)res);
+#else
+   uint32_t res;
+   unsigned int src = 0x9182730E;
+   r14 = src;
+   __asm__ __volatile__ ("popcntw          %0, %1" : "=r" (res): "r" (r14));
+   printf("popcntw: 0x%x => 0x%08x\n", src, (int)res);
+#endif
+   printf( "\n" );
+}
+
+
+static test_table_t
+         all_tests[] =
+{
+
+                    { &test_vsx_one_fp_arg,
+                      "Test VSX vector and scalar single argument instructions"} ,
+                    { &test_int_to_fp_convert,
+                      "Test VSX vector integer to float conversion instructions" },
+                    { &test_div_extensions,
+                       "Test div extensions" },
+                    { &test_ftsqrt,
+                       "Test ftsqrt instruction" },
+                    { &test_vx_tdivORtsqrt,
+                       "Test vector and scalar tdiv and tsqrt instructions" },
+                    { &test_popcntw,
+                       "Test popcntw instruction" },
+                    { NULL, NULL }
+};
+#endif // HAS_VSX
+
+int main(int argc, char *argv[])
+{
+#ifdef HAS_VSX
+
+   test_table_t aTest;
+   test_func_t func;
+   int i = 0;
+
+   while ((func = all_tests[i].test_category)) {
+      aTest = all_tests[i];
+      printf( "%s\n", aTest.name );
+      (*func)();
+      i++;
+   }
+   if (spec_fargs)
+     free(spec_fargs);
+   if (spec_sp_fargs)
+     free(spec_sp_fargs);
+
+#endif // HAS _VSX
+
+   return 0;
+}
diff --git a/none/tests/ppc32/test_isa_2_06_part3.stderr.exp b/none/tests/ppc32/test_isa_2_06_part3.stderr.exp
new file mode 100644
index 00000000..139597f9
--- /dev/null
+++ b/none/tests/ppc32/test_isa_2_06_part3.stderr.exp
@@ -0,0 +1,2 @@
+
+
diff --git a/none/tests/ppc32/test_isa_2_06_part3.stdout.exp b/none/tests/ppc32/test_isa_2_06_part3.stdout.exp
new file mode 100644
index 00000000..df25d908
--- /dev/null
+++ b/none/tests/ppc32/test_isa_2_06_part3.stdout.exp
@@ -0,0 +1,605 @@
+Test VSX vector and scalar single argument instructions
+#0: xvredp 1/x(3fd8000000000000) ==> PASS); 1/x(404f000000000000) ==> PASS)
+#1: xvredp 1/x(0018000000b77501) ==> PASS); 1/x(7fe800000000051b) ==> PASS)
+#2: xvredp 1/x(0123214569900000) ==> PASS); 1/x(0000000000000000) ==> PASS)
+#3: xvredp 1/x(8000000000000000) ==> PASS); 1/x(7ff0000000000000) ==> PASS)
+#4: xvredp 1/x(fff0000000000000) ==> PASS); 1/x(7ff7ffffffffffff) ==> PASS)
+#5: xvredp 1/x(fff7ffffffffffff) ==> PASS); 1/x(7ff8000000000000) ==> PASS)
+#6: xvredp 1/x(fff8000000000000) ==> PASS); 1/x(8008340000078000) ==> PASS)
+#7: xvredp 1/x(c0d0650f5a07b353) ==> PASS); 1/x(41232585a9900000) ==> PASS)
+#8: xvredp 1/x(41382511a2000000) ==> PASS); 1/x(40312ef5a9300000) ==> PASS)
+
+#0: xsredp 1/x(3fd8000000000000) ==> PASS)
+#1: xsredp 1/x(404f000000000000) ==> PASS)
+#2: xsredp 1/x(0018000000b77501) ==> PASS)
+#3: xsredp 1/x(7fe800000000051b) ==> PASS)
+#4: xsredp 1/x(0123214569900000) ==> PASS)
+#5: xsredp 1/x(0000000000000000) ==> PASS)
+#6: xsredp 1/x(8000000000000000) ==> PASS)
+#7: xsredp 1/x(7ff0000000000000) ==> PASS)
+#8: xsredp 1/x(fff0000000000000) ==> PASS)
+#9: xsredp 1/x(7ff7ffffffffffff) ==> PASS)
+#10: xsredp 1/x(fff7ffffffffffff) ==> PASS)
+#11: xsredp 1/x(7ff8000000000000) ==> PASS)
+#12: xsredp 1/x(fff8000000000000) ==> PASS)
+#13: xsredp 1/x(8008340000078000) ==> PASS)
+#14: xsredp 1/x(c0d0650f5a07b353) ==> PASS)
+#15: xsredp 1/x(41232585a9900000) ==> PASS)
+#16: xsredp 1/x(41382511a2000000) ==> PASS)
+#17: xsredp 1/x(40312ef5a9300000) ==> PASS)
+
+#0: xvrsqrtedp 1/x-sqrt(3fd8000000000000) ==> PASS); 1/x-sqrt(404f000000000000) ==> PASS)
+#1: xvrsqrtedp 1/x-sqrt(0018000000b77501) ==> PASS); 1/x-sqrt(7fe800000000051b) ==> PASS)
+#2: xvrsqrtedp 1/x-sqrt(0123214569900000) ==> PASS); 1/x-sqrt(0000000000000000) ==> PASS)
+#3: xvrsqrtedp 1/x-sqrt(8000000000000000) ==> PASS); 1/x-sqrt(7ff0000000000000) ==> PASS)
+#4: xvrsqrtedp 1/x-sqrt(fff0000000000000) ==> PASS); 1/x-sqrt(7ff7ffffffffffff) ==> PASS)
+#5: xvrsqrtedp 1/x-sqrt(fff7ffffffffffff) ==> PASS); 1/x-sqrt(7ff8000000000000) ==> PASS)
+#6: xvrsqrtedp 1/x-sqrt(fff8000000000000) ==> PASS); 1/x-sqrt(8008340000078000) ==> PASS)
+#7: xvrsqrtedp 1/x-sqrt(c0d0650f5a07b353) ==> PASS); 1/x-sqrt(41232585a9900000) ==> PASS)
+#8: xvrsqrtedp 1/x-sqrt(41382511a2000000) ==> PASS); 1/x-sqrt(40312ef5a9300000) ==> PASS)
+
+#0: xsrsqrtedp 1/x-sqrt(3fd8000000000000) ==> PASS)
+#1: xsrsqrtedp 1/x-sqrt(404f000000000000) ==> PASS)
+#2: xsrsqrtedp 1/x-sqrt(0018000000b77501) ==> PASS)
+#3: xsrsqrtedp 1/x-sqrt(7fe800000000051b) ==> PASS)
+#4: xsrsqrtedp 1/x-sqrt(0123214569900000) ==> PASS)
+#5: xsrsqrtedp 1/x-sqrt(0000000000000000) ==> PASS)
+#6: xsrsqrtedp 1/x-sqrt(8000000000000000) ==> PASS)
+#7: xsrsqrtedp 1/x-sqrt(7ff0000000000000) ==> PASS)
+#8: xsrsqrtedp 1/x-sqrt(fff0000000000000) ==> PASS)
+#9: xsrsqrtedp 1/x-sqrt(7ff7ffffffffffff) ==> PASS)
+#10: xsrsqrtedp 1/x-sqrt(fff7ffffffffffff) ==> PASS)
+#11: xsrsqrtedp 1/x-sqrt(7ff8000000000000) ==> PASS)
+#12: xsrsqrtedp 1/x-sqrt(fff8000000000000) ==> PASS)
+#13: xsrsqrtedp 1/x-sqrt(8008340000078000) ==> PASS)
+#14: xsrsqrtedp 1/x-sqrt(c0d0650f5a07b353) ==> PASS)
+#15: xsrsqrtedp 1/x-sqrt(41232585a9900000) ==> PASS)
+#16: xsrsqrtedp 1/x-sqrt(41382511a2000000) ==> PASS)
+#17: xsrsqrtedp 1/x-sqrt(40312ef5a9300000) ==> PASS)
+
+#0: xvrsqrtesp 1/x-sqrt(3ec00000) ==> PASS); 1/x-sqrt(42780000) ==> PASS); 1/x-sqrt(00000000) ==> PASS); 1/x-sqrt(7f800000) ==> PASS)
+#1: xvrsqrtesp 1/x-sqrt(00000000) ==> PASS); 1/x-sqrt(00000000) ==> PASS); 1/x-sqrt(80000000) ==> PASS); 1/x-sqrt(7f800000) ==> PASS)
+#2: xvrsqrtesp 1/x-sqrt(ff800000) ==> PASS); 1/x-sqrt(7fffffff) ==> PASS); 1/x-sqrt(ffffffff) ==> PASS); 1/x-sqrt(7fc00000) ==> PASS)
+#3: xvrsqrtesp 1/x-sqrt(ffc00000) ==> PASS); 1/x-sqrt(80000000) ==> PASS); 1/x-sqrt(c683287b) ==> PASS); 1/x-sqrt(49192c2d) ==> PASS)
+#4: xvrsqrtesp 1/x-sqrt(49c1288d) ==> PASS); 1/x-sqrt(418977ad) ==> PASS); 1/x-sqrt(428a5faf) ==> PASS); 1/x-sqrt(44bb5fcc) ==> PASS)
+
+#0: xvsqrtdp sqrt(3fd8000000000000) = 3fe3988e1409212e; sqrt(404f000000000000) = 401f7efbeb8d4f12
+#1: xvsqrtdp sqrt(0018000000b77501) = 2003988e14540690; sqrt(7fe800000000051b) = 5febb67ae8584f9d
+#2: xvsqrtdp sqrt(0123214569900000) = 2088bde98d60ebe6; sqrt(0000000000000000) = 0000000000000000
+#3: xvsqrtdp sqrt(8000000000000000) = 8000000000000000; sqrt(7ff0000000000000) = 7ff0000000000000
+#4: xvsqrtdp sqrt(fff0000000000000) = 7ff8000000000000; sqrt(7ff7ffffffffffff) = 7fffffffffffffff
+#5: xvsqrtdp sqrt(fff7ffffffffffff) = ffffffffffffffff; sqrt(7ff8000000000000) = 7ff8000000000000
+#6: xvsqrtdp sqrt(fff8000000000000) = fff8000000000000; sqrt(8008340000078000) = 7ff8000000000000
+#7: xvsqrtdp sqrt(c0d0650f5a07b353) = 7ff8000000000000; sqrt(41232585a9900000) = 4088c0a9258a4a8b
+#8: xvsqrtdp sqrt(41382511a2000000) = 4093a7aa60f34e85; sqrt(40312ef5a9300000) = 401094c71dec3a9c
+
+#0: xvsqrtsp sqrt(3ec00000) = 3f1cc470; sqrt(42780000) = 40fbf7dc; sqrt(00000000) = 00000000; sqrt(7f800000) = 7f800000
+#1: xvsqrtsp sqrt(00000000) = 00000000; sqrt(00000000) = 00000000; sqrt(80000000) = 80000000; sqrt(7f800000) = 7f800000
+#2: xvsqrtsp sqrt(ff800000) = 7fc00000; sqrt(7fffffff) = 7ffffffc; sqrt(ffffffff) = fffffffc; sqrt(7fc00000) = 7fc00000
+#3: xvsqrtsp sqrt(ffc00000) = ffc00000; sqrt(80000000) = 80000000; sqrt(c683287b) = 7fc00000; sqrt(49192c2d) = 44460548
+#4: xvsqrtsp sqrt(49c1288d) = 449d3d50; sqrt(418977ad) = 4084a638; sqrt(428a5faf) = 410515f8; sqrt(44bb5fcc) = 421ade08
+
+#0: xscvdpsp conv(3fd8000000000000) = 3ec0000000000000
+#1: xscvdpsp conv(404f000000000000) = 4278000000000000
+#2: xscvdpsp conv(0018000000b77501) = 0000000000000000
+#3: xscvdpsp conv(7fe800000000051b) = 7f80000000000000
+#4: xscvdpsp conv(0123214569900000) = 0000000000000000
+#5: xscvdpsp conv(0000000000000000) = 0000000000000000
+#6: xscvdpsp conv(8000000000000000) = 8000000000000000
+#7: xscvdpsp conv(7ff0000000000000) = 7f80000000000000
+#8: xscvdpsp conv(fff0000000000000) = ff80000000000000
+#9: xscvdpsp conv(7ff7ffffffffffff) = 7fffffff00000000
+#10: xscvdpsp conv(fff7ffffffffffff) = ffffffff00000000
+#11: xscvdpsp conv(7ff8000000000000) = 7fc0000000000000
+#12: xscvdpsp conv(fff8000000000000) = ffc0000000000000
+#13: xscvdpsp conv(8008340000078000) = 8000000000000000
+#14: xscvdpsp conv(c0d0650f5a07b353) = c683287b00000000
+#15: xscvdpsp conv(41232585a9900000) = 49192c2d00000000
+#16: xscvdpsp conv(41382511a2000000) = 49c1288d00000000
+#17: xscvdpsp conv(40312ef5a9300000) = 418977ad00000000
+#18: xscvdpsp conv(40514bf5d2300000) = 428a5faf00000000
+#19: xscvdpsp conv(40976bf982440000) = 44bb5fcc00000000
+
+#0: xscvdpuxws conv(3fd8000000000000) = 0000000000000000
+#1: xscvdpuxws conv(404f000000000000) = 000000000000003e
+#2: xscvdpuxws conv(0018000000b77501) = 0000000000000000
+#3: xscvdpuxws conv(7fe800000000051b) = 00000000ffffffff
+#4: xscvdpuxws conv(0123214569900000) = 0000000000000000
+#5: xscvdpuxws conv(0000000000000000) = 0000000000000000
+#6: xscvdpuxws conv(8000000000000000) = 0000000000000000
+#7: xscvdpuxws conv(7ff0000000000000) = 00000000ffffffff
+#8: xscvdpuxws conv(fff0000000000000) = 0000000000000000
+#9: xscvdpuxws conv(7ff7ffffffffffff) = 0000000000000000
+#10: xscvdpuxws conv(fff7ffffffffffff) = 0000000000000000
+#11: xscvdpuxws conv(7ff8000000000000) = 0000000000000000
+#12: xscvdpuxws conv(fff8000000000000) = 0000000000000000
+#13: xscvdpuxws conv(8008340000078000) = 0000000000000000
+#14: xscvdpuxws conv(c0d0650f5a07b353) = 0000000000000000
+#15: xscvdpuxws conv(41232585a9900000) = 00000000000992c2
+#16: xscvdpuxws conv(41382511a2000000) = 0000000000182511
+#17: xscvdpuxws conv(40312ef5a9300000) = 0000000000000011
+#18: xscvdpuxws conv(40514bf5d2300000) = 0000000000000045
+#19: xscvdpuxws conv(40976bf982440000) = 00000000000005da
+
+#0: xscvspdp conv(3ec00000) = 3fd8000000000000
+#1: xscvspdp conv(42780000) = 404f000000000000
+#2: xscvspdp conv(00000000) = 0000000000000000
+#3: xscvspdp conv(7f800000) = 7ff0000000000000
+#4: xscvspdp conv(00000000) = 0000000000000000
+#5: xscvspdp conv(00000000) = 0000000000000000
+#6: xscvspdp conv(80000000) = 8000000000000000
+#7: xscvspdp conv(7f800000) = 7ff0000000000000
+#8: xscvspdp conv(ff800000) = fff0000000000000
+#9: xscvspdp conv(7fffffff) = 7fffffffe0000000
+#10: xscvspdp conv(ffffffff) = ffffffffe0000000
+#11: xscvspdp conv(7fc00000) = 7ff8000000000000
+#12: xscvspdp conv(ffc00000) = fff8000000000000
+#13: xscvspdp conv(80000000) = 8000000000000000
+#14: xscvspdp conv(c683287b) = c0d0650f60000000
+#15: xscvspdp conv(49192c2d) = 41232585a0000000
+#16: xscvspdp conv(49c1288d) = 41382511a0000000
+#17: xscvspdp conv(418977ad) = 40312ef5a0000000
+#18: xscvspdp conv(428a5faf) = 40514bf5e0000000
+#19: xscvspdp conv(44bb5fcc) = 40976bf980000000
+
+#0: xvcvdpsp conv(3fd8000000000000) = 3ec0000000000000; conv(404f000000000000) = 4278000000000000
+#1: xvcvdpsp conv(0018000000b77501) = 0000000000000000; conv(7fe800000000051b) = 7f80000000000000
+#2: xvcvdpsp conv(0123214569900000) = 0000000000000000; conv(0000000000000000) = 0000000000000000
+#3: xvcvdpsp conv(8000000000000000) = 8000000000000000; conv(7ff0000000000000) = 7f80000000000000
+#4: xvcvdpsp conv(fff0000000000000) = ff80000000000000; conv(7ff7ffffffffffff) = 7fffffff00000000
+#5: xvcvdpsp conv(fff7ffffffffffff) = ffffffff00000000; conv(7ff8000000000000) = 7fc0000000000000
+#6: xvcvdpsp conv(fff8000000000000) = ffc0000000000000; conv(8008340000078000) = 8000000000000000
+#7: xvcvdpsp conv(c0d0650f5a07b353) = c683287b00000000; conv(41232585a9900000) = 49192c2d00000000
+#8: xvcvdpsp conv(41382511a2000000) = 49c1288d00000000; conv(40312ef5a9300000) = 418977ad00000000
+#9: xvcvdpsp conv(40514bf5d2300000) = 428a5faf00000000; conv(40976bf982440000) = 44bb5fcc00000000
+
+#0: xvcvdpuxds conv(3fd8000000000000) = 0000000000000000; conv(404f000000000000) = 000000000000003e
+#1: xvcvdpuxds conv(0018000000b77501) = 0000000000000000; conv(7fe800000000051b) = ffffffffffffffff
+#2: xvcvdpuxds conv(0123214569900000) = 0000000000000000; conv(0000000000000000) = 0000000000000000
+#3: xvcvdpuxds conv(8000000000000000) = 0000000000000000; conv(7ff0000000000000) = ffffffffffffffff
+#4: xvcvdpuxds conv(fff0000000000000) = 0000000000000000; conv(7ff7ffffffffffff) = 0000000000000000
+#5: xvcvdpuxds conv(fff7ffffffffffff) = 0000000000000000; conv(7ff8000000000000) = 0000000000000000
+#6: xvcvdpuxds conv(fff8000000000000) = 0000000000000000; conv(8008340000078000) = 0000000000000000
+#7: xvcvdpuxds conv(c0d0650f5a07b353) = 0000000000000000; conv(41232585a9900000) = 00000000000992c2
+#8: xvcvdpuxds conv(41382511a2000000) = 0000000000182511; conv(40312ef5a9300000) = 0000000000000011
+#9: xvcvdpuxds conv(40514bf5d2300000) = 0000000000000045; conv(40976bf982440000) = 00000000000005da
+
+#0: xvcvdpuxws conv(3fd8000000000000) = 0000000000000000; conv(404f000000000000) = 0000003e00000000
+#1: xvcvdpuxws conv(0018000000b77501) = 0000000000000000; conv(7fe800000000051b) = ffffffff00000000
+#2: xvcvdpuxws conv(0123214569900000) = 0000000000000000; conv(0000000000000000) = 0000000000000000
+#3: xvcvdpuxws conv(8000000000000000) = 0000000000000000; conv(7ff0000000000000) = ffffffff00000000
+#4: xvcvdpuxws conv(fff0000000000000) = 0000000000000000; conv(7ff7ffffffffffff) = 0000000000000000
+#5: xvcvdpuxws conv(fff7ffffffffffff) = 0000000000000000; conv(7ff8000000000000) = 0000000000000000
+#6: xvcvdpuxws conv(fff8000000000000) = 0000000000000000; conv(8008340000078000) = 0000000000000000
+#7: xvcvdpuxws conv(c0d0650f5a07b353) = 0000000000000000; conv(41232585a9900000) = 000992c200000000
+#8: xvcvdpuxws conv(41382511a2000000) = 0018251100000000; conv(40312ef5a9300000) = 0000001100000000
+#9: xvcvdpuxws conv(40514bf5d2300000) = 0000004500000000; conv(40976bf982440000) = 000005da00000000
+
+#0: xvcvspdp conv(3ec00000) = 3fd8000000000000; conv(42780000) = 404f000000000000
+#1: xvcvspdp conv(00000000) = 0000000000000000; conv(7f800000) = 7ff0000000000000
+#2: xvcvspdp conv(00000000) = 0000000000000000; conv(00000000) = 0000000000000000
+#3: xvcvspdp conv(80000000) = 8000000000000000; conv(7f800000) = 7ff0000000000000
+#4: xvcvspdp conv(ff800000) = fff0000000000000; conv(7fffffff) = 7fffffffe0000000
+#5: xvcvspdp conv(ffffffff) = ffffffffe0000000; conv(7fc00000) = 7ff8000000000000
+#6: xvcvspdp conv(ffc00000) = fff8000000000000; conv(80000000) = 8000000000000000
+#7: xvcvspdp conv(c683287b) = c0d0650f60000000; conv(49192c2d) = 41232585a0000000
+#8: xvcvspdp conv(49c1288d) = 41382511a0000000; conv(418977ad) = 40312ef5a0000000
+#9: xvcvspdp conv(428a5faf) = 40514bf5e0000000; conv(44bb5fcc) = 40976bf980000000
+
+#0: xvcvspsxds conv(3ec00000) = 0000000000000000; conv(42780000) = 000000000000003e
+#1: xvcvspsxds conv(00000000) = 0000000000000000; conv(7f800000) = 7fffffffffffffff
+#2: xvcvspsxds conv(00000000) = 0000000000000000; conv(00000000) = 0000000000000000
+#3: xvcvspsxds conv(80000000) = 0000000000000000; conv(7f800000) = 7fffffffffffffff
+#4: xvcvspsxds conv(ff800000) = 8000000000000000; conv(7fffffff) = 8000000000000000
+#5: xvcvspsxds conv(ffffffff) = 8000000000000000; conv(7fc00000) = 8000000000000000
+#6: xvcvspsxds conv(ffc00000) = 8000000000000000; conv(80000000) = 0000000000000000
+#7: xvcvspsxds conv(c683287b) = ffffffffffffbe6c; conv(49192c2d) = 00000000000992c2
+#8: xvcvspsxds conv(49c1288d) = 0000000000182511; conv(418977ad) = 0000000000000011
+#9: xvcvspsxds conv(428a5faf) = 0000000000000045; conv(44bb5fcc) = 00000000000005da
+
+#0: xvcvdpsxds conv(3fd8000000000000) = 0000000000000000; conv(404f000000000000) = 000000000000003e
+#1: xvcvdpsxds conv(0018000000b77501) = 0000000000000000; conv(7fe800000000051b) = 7fffffffffffffff
+#2: xvcvdpsxds conv(0123214569900000) = 0000000000000000; conv(0000000000000000) = 0000000000000000
+#3: xvcvdpsxds conv(8000000000000000) = 0000000000000000; conv(7ff0000000000000) = 7fffffffffffffff
+#4: xvcvdpsxds conv(fff0000000000000) = 8000000000000000; conv(7ff7ffffffffffff) = 8000000000000000
+#5: xvcvdpsxds conv(fff7ffffffffffff) = 8000000000000000; conv(7ff8000000000000) = 8000000000000000
+#6: xvcvdpsxds conv(fff8000000000000) = 8000000000000000; conv(8008340000078000) = 0000000000000000
+#7: xvcvdpsxds conv(c0d0650f5a07b353) = ffffffffffffbe6c; conv(41232585a9900000) = 00000000000992c2
+#8: xvcvdpsxds conv(41382511a2000000) = 0000000000182511; conv(40312ef5a9300000) = 0000000000000011
+#9: xvcvdpsxds conv(40514bf5d2300000) = 0000000000000045; conv(40976bf982440000) = 00000000000005da
+
+#0: xvcvspuxds conv(3ec00000) = 0000000000000000; conv(42780000) = 000000000000003e
+#1: xvcvspuxds conv(00000000) = 0000000000000000; conv(7f800000) = ffffffffffffffff
+#2: xvcvspuxds conv(00000000) = 0000000000000000; conv(00000000) = 0000000000000000
+#3: xvcvspuxds conv(80000000) = 0000000000000000; conv(7f800000) = ffffffffffffffff
+#4: xvcvspuxds conv(ff800000) = 0000000000000000; conv(7fffffff) = 0000000000000000
+#5: xvcvspuxds conv(ffffffff) = 0000000000000000; conv(7fc00000) = 0000000000000000
+#6: xvcvspuxds conv(ffc00000) = 0000000000000000; conv(80000000) = 0000000000000000
+#7: xvcvspuxds conv(c683287b) = 0000000000000000; conv(49192c2d) = 00000000000992c2
+#8: xvcvspuxds conv(49c1288d) = 0000000000182511; conv(418977ad) = 0000000000000011
+#9: xvcvspuxds conv(428a5faf) = 0000000000000045; conv(44bb5fcc) = 00000000000005da
+
+#0: xvcvspuxws conv(3ec00000) = 00000000; conv(42780000) = 0000003e; conv(00000000) = 00000000; conv(7f800000) = ffffffff
+#1: xvcvspuxws conv(00000000) = 00000000; conv(00000000) = 00000000; conv(80000000) = 00000000; conv(7f800000) = ffffffff
+#2: xvcvspuxws conv(ff800000) = 00000000; conv(7fffffff) = 00000000; conv(ffffffff) = 00000000; conv(7fc00000) = 00000000
+#3: xvcvspuxws conv(ffc00000) = 00000000; conv(80000000) = 00000000; conv(c683287b) = 00000000; conv(49192c2d) = 000992c2
+#4: xvcvspuxws conv(49c1288d) = 00182511; conv(418977ad) = 00000011; conv(428a5faf) = 00000045; conv(44bb5fcc) = 000005da
+
+#0: xsrdpic round(3fd8000000000000) = 0000000000000000
+#1: xsrdpic round(404f000000000000) = 404f000000000000
+#2: xsrdpic round(0018000000b77501) = 0000000000000000
+#3: xsrdpic round(7fe800000000051b) = 7fe800000000051b
+#4: xsrdpic round(0123214569900000) = 0000000000000000
+#5: xsrdpic round(0000000000000000) = 0000000000000000
+#6: xsrdpic round(8000000000000000) = 8000000000000000
+#7: xsrdpic round(7ff0000000000000) = 7ff0000000000000
+#8: xsrdpic round(fff0000000000000) = fff0000000000000
+#9: xsrdpic round(7ff7ffffffffffff) = 7fffffffffffffff
+#10: xsrdpic round(fff7ffffffffffff) = ffffffffffffffff
+#11: xsrdpic round(7ff8000000000000) = 7ff8000000000000
+#12: xsrdpic round(fff8000000000000) = fff8000000000000
+#13: xsrdpic round(8008340000078000) = 8000000000000000
+#14: xsrdpic round(c0d0650f5a07b353) = c0d0650000000000
+#15: xsrdpic round(41232585a9900000) = 4123258600000000
+#16: xsrdpic round(41382511a2000000) = 4138251200000000
+#17: xsrdpic round(40312ef5a9300000) = 4031000000000000
+#18: xsrdpic round(40514bf5d2300000) = 4051400000000000
+#19: xsrdpic round(40976bf982440000) = 40976c0000000000
+
+#0: xsrdpiz round(3fd8000000000000) = 0000000000000000
+#1: xsrdpiz round(404f000000000000) = 404f000000000000
+#2: xsrdpiz round(0018000000b77501) = 0000000000000000
+#3: xsrdpiz round(7fe800000000051b) = 7fe800000000051b
+#4: xsrdpiz round(0123214569900000) = 0000000000000000
+#5: xsrdpiz round(0000000000000000) = 0000000000000000
+#6: xsrdpiz round(8000000000000000) = 8000000000000000
+#7: xsrdpiz round(7ff0000000000000) = 7ff0000000000000
+#8: xsrdpiz round(fff0000000000000) = fff0000000000000
+#9: xsrdpiz round(7ff7ffffffffffff) = 7fffffffffffffff
+#10: xsrdpiz round(fff7ffffffffffff) = ffffffffffffffff
+#11: xsrdpiz round(7ff8000000000000) = 7ff8000000000000
+#12: xsrdpiz round(fff8000000000000) = fff8000000000000
+#13: xsrdpiz round(8008340000078000) = 8000000000000000
+#14: xsrdpiz round(c0d0650f5a07b353) = c0d0650000000000
+#15: xsrdpiz round(41232585a9900000) = 4123258400000000
+#16: xsrdpiz round(41382511a2000000) = 4138251100000000
+#17: xsrdpiz round(40312ef5a9300000) = 4031000000000000
+#18: xsrdpiz round(40514bf5d2300000) = 4051400000000000
+#19: xsrdpiz round(40976bf982440000) = 4097680000000000
+
+#0: xsrdpi round(3fd8000000000000) = 0000000000000000
+#1: xsrdpi round(404f000000000000) = 404f000000000000
+#2: xsrdpi round(0018000000b77501) = 0000000000000000
+#3: xsrdpi round(7fe800000000051b) = 7fe800000000051b
+#4: xsrdpi round(0123214569900000) = 0000000000000000
+#5: xsrdpi round(0000000000000000) = 0000000000000000
+#6: xsrdpi round(8000000000000000) = 8000000000000000
+#7: xsrdpi round(7ff0000000000000) = 7ff0000000000000
+#8: xsrdpi round(fff0000000000000) = fff0000000000000
+#9: xsrdpi round(7ff7ffffffffffff) = 7fffffffffffffff
+#10: xsrdpi round(fff7ffffffffffff) = ffffffffffffffff
+#11: xsrdpi round(7ff8000000000000) = 7ff8000000000000
+#12: xsrdpi round(fff8000000000000) = fff8000000000000
+#13: xsrdpi round(8008340000078000) = 8000000000000000
+#14: xsrdpi round(c0d0650f5a07b353) = c0d0650000000000
+#15: xsrdpi round(41232585a9900000) = 4123258600000000
+#16: xsrdpi round(41382511a2000000) = 4138251200000000
+#17: xsrdpi round(40312ef5a9300000) = 4031000000000000
+#18: xsrdpi round(40514bf5d2300000) = 4051400000000000
+#19: xsrdpi round(40976bf982440000) = 40976c0000000000
+
+#0: xvabsdp abs(3fd8000000000000) = 3fd8000000000000; abs(404f000000000000) = 404f000000000000
+#1: xvabsdp abs(0018000000b77501) = 0018000000b77501; abs(7fe800000000051b) = 7fe800000000051b
+#2: xvabsdp abs(0123214569900000) = 0123214569900000; abs(0000000000000000) = 0000000000000000
+#3: xvabsdp abs(8000000000000000) = 0000000000000000; abs(7ff0000000000000) = 7ff0000000000000
+#4: xvabsdp abs(fff0000000000000) = 7ff0000000000000; abs(7ff7ffffffffffff) = 7ff7ffffffffffff
+#5: xvabsdp abs(fff7ffffffffffff) = 7ff7ffffffffffff; abs(7ff8000000000000) = 7ff8000000000000
+#6: xvabsdp abs(fff8000000000000) = 7ff8000000000000; abs(8008340000078000) = 0008340000078000
+#7: xvabsdp abs(c0d0650f5a07b353) = 40d0650f5a07b353; abs(41232585a9900000) = 41232585a9900000
+#8: xvabsdp abs(41382511a2000000) = 41382511a2000000; abs(40312ef5a9300000) = 40312ef5a9300000
+#9: xvabsdp abs(40514bf5d2300000) = 40514bf5d2300000; abs(40976bf982440000) = 40976bf982440000
+
+#0: xvnabsdp nabs(3fd8000000000000) = bfd8000000000000; nabs(404f000000000000) = c04f000000000000
+#1: xvnabsdp nabs(0018000000b77501) = 8018000000b77501; nabs(7fe800000000051b) = ffe800000000051b
+#2: xvnabsdp nabs(0123214569900000) = 8123214569900000; nabs(0000000000000000) = 8000000000000000
+#3: xvnabsdp nabs(8000000000000000) = 8000000000000000; nabs(7ff0000000000000) = fff0000000000000
+#4: xvnabsdp nabs(fff0000000000000) = fff0000000000000; nabs(7ff7ffffffffffff) = fff7ffffffffffff
+#5: xvnabsdp nabs(fff7ffffffffffff) = fff7ffffffffffff; nabs(7ff8000000000000) = fff8000000000000
+#6: xvnabsdp nabs(fff8000000000000) = fff8000000000000; nabs(8008340000078000) = 8008340000078000
+#7: xvnabsdp nabs(c0d0650f5a07b353) = c0d0650f5a07b353; nabs(41232585a9900000) = c1232585a9900000
+#8: xvnabsdp nabs(41382511a2000000) = c1382511a2000000; nabs(40312ef5a9300000) = c0312ef5a9300000
+#9: xvnabsdp nabs(40514bf5d2300000) = c0514bf5d2300000; nabs(40976bf982440000) = c0976bf982440000
+
+#0: xvnegdp neg(3fd8000000000000) = bfd8000000000000; neg(404f000000000000) = c04f000000000000
+#1: xvnegdp neg(0018000000b77501) = 8018000000b77501; neg(7fe800000000051b) = ffe800000000051b
+#2: xvnegdp neg(0123214569900000) = 8123214569900000; neg(0000000000000000) = 8000000000000000
+#3: xvnegdp neg(8000000000000000) = 0000000000000000; neg(7ff0000000000000) = fff0000000000000
+#4: xvnegdp neg(fff0000000000000) = 7ff0000000000000; neg(7ff7ffffffffffff) = fff7ffffffffffff
+#5: xvnegdp neg(fff7ffffffffffff) = 7ff7ffffffffffff; neg(7ff8000000000000) = fff8000000000000
+#6: xvnegdp neg(fff8000000000000) = 7ff8000000000000; neg(8008340000078000) = 0008340000078000
+#7: xvnegdp neg(c0d0650f5a07b353) = 40d0650f5a07b353; neg(41232585a9900000) = c1232585a9900000
+#8: xvnegdp neg(41382511a2000000) = c1382511a2000000; neg(40312ef5a9300000) = c0312ef5a9300000
+#9: xvnegdp neg(40514bf5d2300000) = c0514bf5d2300000; neg(40976bf982440000) = c0976bf982440000
+
+#0: xvabssp abs(3ec00000) = 3ec00000; abs(42780000) = 42780000; abs(00000000) = 00000000; abs(7f800000) = 7f800000
+#1: xvabssp abs(00000000) = 00000000; abs(00000000) = 00000000; abs(80000000) = 00000000; abs(7f800000) = 7f800000
+#2: xvabssp abs(ff800000) = 7f800000; abs(7fffffff) = 7fffffff; abs(ffffffff) = 7fffffff; abs(7fc00000) = 7fc00000
+#3: xvabssp abs(ffc00000) = 7fc00000; abs(80000000) = 00000000; abs(c683287b) = 4683287b; abs(49192c2d) = 49192c2d
+#4: xvabssp abs(49c1288d) = 49c1288d; abs(418977ad) = 418977ad; abs(428a5faf) = 428a5faf; abs(44bb5fcc) = 44bb5fcc
+
+#0: xvnabssp nabs(3ec00000) = bec00000; nabs(42780000) = c2780000; nabs(00000000) = 80000000; nabs(7f800000) = ff800000
+#1: xvnabssp nabs(00000000) = 80000000; nabs(00000000) = 80000000; nabs(80000000) = 80000000; nabs(7f800000) = ff800000
+#2: xvnabssp nabs(ff800000) = ff800000; nabs(7fffffff) = ffffffff; nabs(ffffffff) = ffffffff; nabs(7fc00000) = ffc00000
+#3: xvnabssp nabs(ffc00000) = ffc00000; nabs(80000000) = 80000000; nabs(c683287b) = c683287b; nabs(49192c2d) = c9192c2d
+#4: xvnabssp nabs(49c1288d) = c9c1288d; nabs(418977ad) = c18977ad; nabs(428a5faf) = c28a5faf; nabs(44bb5fcc) = c4bb5fcc
+
+#0: xvrdpi round(3fd8000000000000) = 0000000000000000; round(404f000000000000) = 404f000000000000
+#1: xvrdpi round(0018000000b77501) = 0000000000000000; round(7fe800000000051b) = 7fe800000000051b
+#2: xvrdpi round(0123214569900000) = 0000000000000000; round(0000000000000000) = 0000000000000000
+#3: xvrdpi round(8000000000000000) = 8000000000000000; round(7ff0000000000000) = 7ff0000000000000
+#4: xvrdpi round(fff0000000000000) = fff0000000000000; round(7ff7ffffffffffff) = 7fffffffffffffff
+#5: xvrdpi round(fff7ffffffffffff) = ffffffffffffffff; round(7ff8000000000000) = 7ff8000000000000
+#6: xvrdpi round(fff8000000000000) = fff8000000000000; round(8008340000078000) = 8000000000000000
+#7: xvrdpi round(c0d0650f5a07b353) = c0d0650000000000; round(41232585a9900000) = 4123258600000000
+#8: xvrdpi round(41382511a2000000) = 4138251200000000; round(40312ef5a9300000) = 4031000000000000
+#9: xvrdpi round(40514bf5d2300000) = 4051400000000000; round(40976bf982440000) = 40976c0000000000
+
+#0: xvrdpic round(3fd8000000000000) = 0000000000000000; round(404f000000000000) = 404f000000000000
+#1: xvrdpic round(0018000000b77501) = 0000000000000000; round(7fe800000000051b) = 7fe800000000051b
+#2: xvrdpic round(0123214569900000) = 0000000000000000; round(0000000000000000) = 0000000000000000
+#3: xvrdpic round(8000000000000000) = 8000000000000000; round(7ff0000000000000) = 7ff0000000000000
+#4: xvrdpic round(fff0000000000000) = fff0000000000000; round(7ff7ffffffffffff) = 7fffffffffffffff
+#5: xvrdpic round(fff7ffffffffffff) = ffffffffffffffff; round(7ff8000000000000) = 7ff8000000000000
+#6: xvrdpic round(fff8000000000000) = fff8000000000000; round(8008340000078000) = 8000000000000000
+#7: xvrdpic round(c0d0650f5a07b353) = c0d0650000000000; round(41232585a9900000) = 4123258600000000
+#8: xvrdpic round(41382511a2000000) = 4138251200000000; round(40312ef5a9300000) = 4031000000000000
+#9: xvrdpic round(40514bf5d2300000) = 4051400000000000; round(40976bf982440000) = 40976c0000000000
+
+#0: xvrdpim round(3fd8000000000000) = 0000000000000000; round(404f000000000000) = 404f000000000000
+#1: xvrdpim round(0018000000b77501) = 0000000000000000; round(7fe800000000051b) = 7fe800000000051b
+#2: xvrdpim round(0123214569900000) = 0000000000000000; round(0000000000000000) = 0000000000000000
+#3: xvrdpim round(8000000000000000) = 8000000000000000; round(7ff0000000000000) = 7ff0000000000000
+#4: xvrdpim round(fff0000000000000) = fff0000000000000; round(7ff7ffffffffffff) = 7fffffffffffffff
+#5: xvrdpim round(fff7ffffffffffff) = ffffffffffffffff; round(7ff8000000000000) = 7ff8000000000000
+#6: xvrdpim round(fff8000000000000) = fff8000000000000; round(8008340000078000) = bff0000000000000
+#7: xvrdpim round(c0d0650f5a07b353) = c0d0654000000000; round(41232585a9900000) = 4123258400000000
+#8: xvrdpim round(41382511a2000000) = 4138251100000000; round(40312ef5a9300000) = 4031000000000000
+#9: xvrdpim round(40514bf5d2300000) = 4051400000000000; round(40976bf982440000) = 4097680000000000
+
+#0: xvrdpip round(3fd8000000000000) = 3ff0000000000000; round(404f000000000000) = 404f000000000000
+#1: xvrdpip round(0018000000b77501) = 3ff0000000000000; round(7fe800000000051b) = 7fe800000000051b
+#2: xvrdpip round(0123214569900000) = 3ff0000000000000; round(0000000000000000) = 0000000000000000
+#3: xvrdpip round(8000000000000000) = 8000000000000000; round(7ff0000000000000) = 7ff0000000000000
+#4: xvrdpip round(fff0000000000000) = fff0000000000000; round(7ff7ffffffffffff) = 7fffffffffffffff
+#5: xvrdpip round(fff7ffffffffffff) = ffffffffffffffff; round(7ff8000000000000) = 7ff8000000000000
+#6: xvrdpip round(fff8000000000000) = fff8000000000000; round(8008340000078000) = 8000000000000000
+#7: xvrdpip round(c0d0650f5a07b353) = c0d0650000000000; round(41232585a9900000) = 4123258600000000
+#8: xvrdpip round(41382511a2000000) = 4138251200000000; round(40312ef5a9300000) = 4032000000000000
+#9: xvrdpip round(40514bf5d2300000) = 4051800000000000; round(40976bf982440000) = 40976c0000000000
+
+#0: xvrdpiz round(3fd8000000000000) = 0000000000000000; round(404f000000000000) = 404f000000000000
+#1: xvrdpiz round(0018000000b77501) = 0000000000000000; round(7fe800000000051b) = 7fe800000000051b
+#2: xvrdpiz round(0123214569900000) = 0000000000000000; round(0000000000000000) = 0000000000000000
+#3: xvrdpiz round(8000000000000000) = 8000000000000000; round(7ff0000000000000) = 7ff0000000000000
+#4: xvrdpiz round(fff0000000000000) = fff0000000000000; round(7ff7ffffffffffff) = 7fffffffffffffff
+#5: xvrdpiz round(fff7ffffffffffff) = ffffffffffffffff; round(7ff8000000000000) = 7ff8000000000000
+#6: xvrdpiz round(fff8000000000000) = fff8000000000000; round(8008340000078000) = 8000000000000000
+#7: xvrdpiz round(c0d0650f5a07b353) = c0d0650000000000; round(41232585a9900000) = 4123258400000000
+#8: xvrdpiz round(41382511a2000000) = 4138251100000000; round(40312ef5a9300000) = 4031000000000000
+#9: xvrdpiz round(40514bf5d2300000) = 4051400000000000; round(40976bf982440000) = 4097680000000000
+
+#0: xvrspi round(3ec00000) = 00000000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
+#1: xvrspi round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
+#2: xvrspi round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#3: xvrspi round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832800; round(49192c2d) = 49192c30
+#4: xvrspi round(49c1288d) = 49c12890; round(418977ad) = 41880000; round(428a5faf) = 428a0000; round(44bb5fcc) = 44bb6000
+
+#0: xvrspic round(3ec00000) = 00000000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
+#1: xvrspic round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
+#2: xvrspic round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#3: xvrspic round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832800; round(49192c2d) = 49192c30
+#4: xvrspic round(49c1288d) = 49c12890; round(418977ad) = 41880000; round(428a5faf) = 428a0000; round(44bb5fcc) = 44bb6000
+
+#0: xvrspim round(3ec00000) = 00000000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
+#1: xvrspim round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
+#2: xvrspim round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#3: xvrspim round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832a00; round(49192c2d) = 49192c20
+#4: xvrspim round(49c1288d) = 49c12888; round(418977ad) = 41880000; round(428a5faf) = 428a0000; round(44bb5fcc) = 44bb4000
+
+#0: xvrspip round(3ec00000) = 3f800000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
+#1: xvrspip round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
+#2: xvrspip round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#3: xvrspip round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832800; round(49192c2d) = 49192c30
+#4: xvrspip round(49c1288d) = 49c12890; round(418977ad) = 41900000; round(428a5faf) = 428c0000; round(44bb5fcc) = 44bb6000
+
+#0: xvrspiz round(3ec00000) = 00000000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
+#1: xvrspiz round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
+#2: xvrspiz round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#3: xvrspiz round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832800; round(49192c2d) = 49192c20
+#4: xvrspiz round(49c1288d) = 49c12888; round(418977ad) = 41880000; round(428a5faf) = 428a0000; round(44bb5fcc) = 44bb4000
+
+Test VSX vector integer to float conversion instructions
+#0: xvcvsxddp conv(0000000000000000) = 0000000000000000; conv(ffffffff00000000) = c1f0000000000000
+#1: xvcvsxddp conv(00000000ffffffff) = 41efffffffe00000; conv(ffffffffffffffff) = bff0000000000000
+#2: xvcvsxddp conv(89abcde123456789) = c3dd950c87b72ea6; conv(0102030405060708) = 4370203040506070
+#3: xvcvsxddp conv(00000000a0b1c2d3) = 41e416385a600000; conv(1111222233334444) = 43b1112222333344
+
+#0: xvcvuxddp conv(0000000000000000) = 0000000000000000; conv(ffffffff00000000) = 43efffffffe00000
+#1: xvcvuxddp conv(00000000ffffffff) = 41efffffffe00000; conv(ffffffffffffffff) = 43f0000000000000
+#2: xvcvuxddp conv(89abcde123456789) = 43e13579bc2468ad; conv(0102030405060708) = 4370203040506070
+#3: xvcvuxddp conv(00000000a0b1c2d3) = 41e416385a600000; conv(1111222233334444) = 43b1112222333344
+
+#0: xvcvsxdsp conv(0000000000000000) = 0000000000000000; conv(ffffffff00000000) = cf80000000000000
+#1: xvcvsxdsp conv(00000000ffffffff) = 4f80000000000000; conv(ffffffffffffffff) = bf80000000000000
+#2: xvcvsxdsp conv(89abcde123456789) = deeca86400000000; conv(0102030405060708) = 5b81018200000000
+#3: xvcvsxdsp conv(00000000a0b1c2d3) = 4f20b1c300000000; conv(1111222233334444) = 5d88891100000000
+
+#0: xvcvuxdsp conv(0000000000000000) = 0000000000000000; conv(ffffffff00000000) = 5f80000000000000
+#1: xvcvuxdsp conv(00000000ffffffff) = 4f80000000000000; conv(ffffffffffffffff) = 5f80000000000000
+#2: xvcvuxdsp conv(89abcde123456789) = 5f09abce00000000; conv(0102030405060708) = 5b81018200000000
+#3: xvcvuxdsp conv(00000000a0b1c2d3) = 4f20b1c300000000; conv(1111222233334444) = 5d88891100000000
+
+#0: xvcvsxwdp conv(00000000) = 0000000000000000; conv(ffff0000) = c0f0000000000000
+#1: xvcvsxwdp conv(0000ffff) = 40efffe000000000; conv(ffffffff) = bff0000000000000
+#2: xvcvsxwdp conv(89a73522) = c1dd9632b7800000; conv(01020304) = 4170203040000000
+#3: xvcvsxwdp conv(0000abcd) = 40e579a000000000; conv(11223344) = 41b1223344000000
+
+#0: xvcvuxwdp conv(00000000) = 0000000000000000; conv(ffff0000) = 41efffe000000000
+#1: xvcvuxwdp conv(0000ffff) = 40efffe000000000; conv(ffffffff) = 41efffffffe00000
+#2: xvcvuxwdp conv(89a73522) = 41e134e6a4400000; conv(01020304) = 4170203040000000
+#3: xvcvuxwdp conv(0000abcd) = 40e579a000000000; conv(11223344) = 41b1223344000000
+
+#0: xvcvsxwsp conv(00000000) = 00000000; conv(ffff0000) = c7800000; conv(0000ffff) = 477fff00; conv(ffffffff) = bf800000
+#1: xvcvsxwsp conv(89a73522) = ceecb196; conv(01020304) = 4b810182; conv(0000abcd) = 472bcd00; conv(11223344) = 4d89119a
+
+#0: xvcvuxwsp conv(00000000) = 00000000; conv(ffff0000) = 4f7fff00; conv(0000ffff) = 477fff00; conv(ffffffff) = 4f800000
+#1: xvcvuxwsp conv(89a73522) = 4f09a735; conv(01020304) = 4b810182; conv(0000abcd) = 472bcd00; conv(11223344) = 4d89119a
+
+Test div extensions
+#0: divwe: 0x0000000000000000 / 0x00000002 = 0x00000000; CR=0; XER=0
+#1: divwe: 0x0000000200000000 / 0x00000000 = 0x00000000; CR=0; XER=0
+#2: divwe: 0x7abc123400000000 / 0xf0000000 = 0x00000000; CR=0; XER=0
+#3: divwe: 0xfabc123400000000 / 0x00000005 = 0x00000000; CR=0; XER=0
+#4: divwe: 0x0000004d00000000 / 0x00000042 = 0x00000000; CR=0; XER=0
+#5: divwe: 0x0000000500000000 / 0xfabc1234 = 0xffffff0d; CR=0; XER=0
+
+#0: divwe.: 0x0000000000000000 / 0x00000002 = 0x00000000; CR=2; XER=0
+#1: divwe.: 0x0000000200000000 / 0x00000000 = 0x00000000; CR=2; XER=0
+#2: divwe.: 0x7abc123400000000 / 0xf0000000 = 0x00000000; CR=2; XER=0
+#3: divwe.: 0xfabc123400000000 / 0x00000005 = 0x00000000; CR=2; XER=0
+#4: divwe.: 0x0000004d00000000 / 0x00000042 = 0x00000000; CR=2; XER=0
+#5: divwe.: 0x0000000500000000 / 0xfabc1234 = 0xffffff0d; CR=8; XER=0
+
+
+#0: divweo: 0x0000000000000000 / 0x00000002 = 0x00000000; CR=0; XER=0
+#1: divweo: 0x0000000200000000 / 0x00000000 = 0x00000000; CR=0; XER=c0000000
+#2: divweo: 0x7abc123400000000 / 0xf0000000 = 0x00000000; CR=0; XER=c0000000
+#3: divweo: 0xfabc123400000000 / 0x00000005 = 0x00000000; CR=0; XER=c0000000
+#4: divweo: 0x0000004d00000000 / 0x00000042 = 0x00000000; CR=0; XER=c0000000
+#5: divweo: 0x0000000500000000 / 0xfabc1234 = 0xffffff0d; CR=0; XER=0
+
+#0: divweo.: 0x0000000000000000 / 0x00000002 = 0x00000000; CR=2; XER=0
+#1: divweo.: 0x0000000200000000 / 0x00000000 = 0x00000000; CR=3; XER=c0000000
+#2: divweo.: 0x7abc123400000000 / 0xf0000000 = 0x00000000; CR=3; XER=c0000000
+#3: divweo.: 0xfabc123400000000 / 0x00000005 = 0x00000000; CR=3; XER=c0000000
+#4: divweo.: 0x0000004d00000000 / 0x00000042 = 0x00000000; CR=3; XER=c0000000
+#5: divweo.: 0x0000000500000000 / 0xfabc1234 = 0xffffff0d; CR=8; XER=0
+
+
+Test ftsqrt instruction
+ftsqrt: 3fd8000000000000 ? 8 (CRx)
+ftsqrt: 404f000000000000 ? 8 (CRx)
+ftsqrt: 0018000000b77501 ? a (CRx)
+ftsqrt: 7fe800000000051b ? 8 (CRx)
+ftsqrt: 0123214569900000 ? a (CRx)
+ftsqrt: 0000000000000000 ? e (CRx)
+ftsqrt: 8000000000000000 ? e (CRx)
+ftsqrt: 7ff0000000000000 ? e (CRx)
+ftsqrt: fff0000000000000 ? e (CRx)
+ftsqrt: 7ff7ffffffffffff ? a (CRx)
+ftsqrt: fff7ffffffffffff ? a (CRx)
+ftsqrt: 7ff8000000000000 ? a (CRx)
+ftsqrt: fff8000000000000 ? a (CRx)
+ftsqrt: 8008340000078000 ? e (CRx)
+ftsqrt: c0d0650f5a07b353 ? a (CRx)
+ftsqrt: 41232585a9900000 ? 8 (CRx)
+ftsqrt: 41382511a2000000 ? 8 (CRx)
+ftsqrt: 40312ef5a9300000 ? 8 (CRx)
+ftsqrt: 40514bf5d2300000 ? 8 (CRx)
+ftsqrt: 40976bf982440000 ? 8 (CRx)
+
+Test vector and scalar tdiv and tsqrt instructions
+#0: xstsqrtdp test-sqrt(3fd8000000000000) ? 8 (CRx)
+#1: xstsqrtdp test-sqrt(404f000000000000) ? 8 (CRx)
+#2: xstsqrtdp test-sqrt(0018000000b77501) ? a (CRx)
+#3: xstsqrtdp test-sqrt(7fe800000000051b) ? 8 (CRx)
+#4: xstsqrtdp test-sqrt(0123214569900000) ? a (CRx)
+#5: xstsqrtdp test-sqrt(0000000000000000) ? e (CRx)
+#6: xstsqrtdp test-sqrt(8000000000000000) ? e (CRx)
+#7: xstsqrtdp test-sqrt(7ff0000000000000) ? e (CRx)
+#8: xstsqrtdp test-sqrt(fff0000000000000) ? e (CRx)
+#9: xstsqrtdp test-sqrt(7ff7ffffffffffff) ? a (CRx)
+#10: xstsqrtdp test-sqrt(fff7ffffffffffff) ? a (CRx)
+#11: xstsqrtdp test-sqrt(7ff8000000000000) ? a (CRx)
+#12: xstsqrtdp test-sqrt(fff8000000000000) ? a (CRx)
+#13: xstsqrtdp test-sqrt(8008340000078000) ? e (CRx)
+#14: xstsqrtdp test-sqrt(c0d0650f5a07b353) ? a (CRx)
+#15: xstsqrtdp test-sqrt(41232585a9900000) ? 8 (CRx)
+#16: xstsqrtdp test-sqrt(41382511a2000000) ? 8 (CRx)
+#17: xstsqrtdp test-sqrt(40312ef5a9300000) ? 8 (CRx)
+#18: xstsqrtdp test-sqrt(40514bf5d2300000) ? 8 (CRx)
+#19: xstsqrtdp test-sqrt(40976bf982440000) ? 8 (CRx)
+
+#0: xvtsqrtdp test-sqrt(3fd8000000000000); test-sqrt(404f000000000000) ? 8 (CRx)
+#1: xvtsqrtdp test-sqrt(0018000000b77501); test-sqrt(7fe800000000051b) ? a (CRx)
+#2: xvtsqrtdp test-sqrt(0123214569900000); test-sqrt(0000000000000000) ? e (CRx)
+#3: xvtsqrtdp test-sqrt(8000000000000000); test-sqrt(7ff0000000000000) ? e (CRx)
+#4: xvtsqrtdp test-sqrt(fff0000000000000); test-sqrt(7ff7ffffffffffff) ? e (CRx)
+#5: xvtsqrtdp test-sqrt(fff7ffffffffffff); test-sqrt(7ff8000000000000) ? a (CRx)
+#6: xvtsqrtdp test-sqrt(fff8000000000000); test-sqrt(8008340000078000) ? e (CRx)
+#7: xvtsqrtdp test-sqrt(c0d0650f5a07b353); test-sqrt(41232585a9900000) ? a (CRx)
+#8: xvtsqrtdp test-sqrt(41382511a2000000); test-sqrt(40312ef5a9300000) ? 8 (CRx)
+#9: xvtsqrtdp test-sqrt(40514bf5d2300000); test-sqrt(40976bf982440000) ? 8 (CRx)
+
+#0: xvtsqrtsp test-sqrt(3ec00000); test-sqrt(42780000); test-sqrt(00000000); test-sqrt(7f800000) ? e (CRx)
+#1: xvtsqrtsp test-sqrt(00000000); test-sqrt(00000000); test-sqrt(80000000); test-sqrt(7f800000) ? e (CRx)
+#2: xvtsqrtsp test-sqrt(ff800000); test-sqrt(7fffffff); test-sqrt(ffffffff); test-sqrt(7fc00000) ? e (CRx)
+#3: xvtsqrtsp test-sqrt(ffc00000); test-sqrt(80000000); test-sqrt(c683287b); test-sqrt(49192c2d) ? e (CRx)
+#4: xvtsqrtsp test-sqrt(49c1288d); test-sqrt(418977ad); test-sqrt(428a5faf); test-sqrt(44bb5fcc) ? 8 (CRx)
+
+#0: xvtdivdp fff0000000000000 test-div fff0000000000000 AND fff0000000000000 test-div c0d0650f5a07b353 ? cc=e
+#1: xvtdivdp 41232585a9900000 test-div 41382511a2000000 AND fff0000000000000 test-div 0000000000000000 ? cc=e
+#2: xvtdivdp fff0000000000000 test-div 0123214569900000 AND fff0000000000000 test-div 7ff0000000000000 ? cc=e
+#3: xvtdivdp fff0000000000000 test-div 7ff7ffffffffffff AND fff0000000000000 test-div 7ff8000000000000 ? cc=e
+#4: xvtdivdp c0d0650f5a07b353 test-div fff0000000000000 AND c0d0650f5a07b353 test-div c0d0650f5a07b353 ? cc=e
+#5: xvtdivdp c0d0650f5a07b353 test-div 8000000000000000 AND c0d0650f5a07b353 test-div 0000000000000000 ? cc=e
+#6: xvtdivdp c0d0650f5a07b353 test-div 0123214569900000 AND c0d0650f5a07b353 test-div 7ff0000000000000 ? cc=e
+#7: xvtdivdp c0d0650f5a07b353 test-div 7ff7ffffffffffff AND c0d0650f5a07b353 test-div 7ff8000000000000 ? cc=a
+#8: xvtdivdp 8000000000000000 test-div fff0000000000000 AND 8000000000000000 test-div c0d0650f5a07b353 ? cc=e
+#9: xvtdivdp 8000000000000000 test-div 8000000000000000 AND 8000000000000000 test-div 0000000000000000 ? cc=e
+#10: xvtdivdp 8000000000000000 test-div 0123214569900000 AND 8000000000000000 test-div 7ff0000000000000 ? cc=e
+#11: xvtdivdp 8000000000000000 test-div 7ff7ffffffffffff AND 8000000000000000 test-div 7ff8000000000000 ? cc=a
+#12: xvtdivdp 0000000000000000 test-div fff0000000000000 AND 0000000000000000 test-div c0d0650f5a07b353 ? cc=e
+#13: xvtdivdp 0000000000000000 test-div 8000000000000000 AND 0000000000000000 test-div 0000000000000000 ? cc=e
+#14: xvtdivdp 0000000000000000 test-div 0123214569900000 AND 0000000000000000 test-div 7ff0000000000000 ? cc=e
+#15: xvtdivdp 0000000000000000 test-div 7ff7ffffffffffff AND 0000000000000000 test-div 7ff8000000000000 ? cc=a
+#16: xvtdivdp 0123214569900000 test-div fff0000000000000 AND 0123214569900000 test-div c0d0650f5a07b353 ? cc=e
+#17: xvtdivdp 0123214569900000 test-div 8000000000000000 AND 0123214569900000 test-div 0000000000000000 ? cc=e
+#18: xvtdivdp 0123214569900000 test-div 404f000000000000 AND 0123214569900000 test-div 7ff0000000000000 ? cc=e
+#19: xvtdivdp 0123214569900000 test-div 7ff7ffffffffffff AND 0123214569900000 test-div 7ff8000000000000 ? cc=a
+#20: xvtdivdp 7ff0000000000000 test-div fff0000000000000 AND 7ff0000000000000 test-div c0d0650f5a07b353 ? cc=e
+#21: xvtdivdp 7ff0000000000000 test-div 8000000000000000 AND 7ff0000000000000 test-div 0000000000000000 ? cc=e
+#22: xvtdivdp 7ff0000000000000 test-div 0123214569900000 AND 7ff0000000000000 test-div 7ff0000000000000 ? cc=e
+#23: xvtdivdp 7ff0000000000000 test-div 7ff7ffffffffffff AND 7ff0000000000000 test-div 7ff8000000000000 ? cc=e
+#24: xvtdivdp fff7ffffffffffff test-div fff0000000000000 AND fff7ffffffffffff test-div c0d0650f5a07b353 ? cc=e
+#25: xvtdivdp fff8000000000000 test-div 8000000000000000 AND fff8000000000000 test-div 0000000000000000 ? cc=e
+#26: xvtdivdp fff7ffffffffffff test-div 0123214569900000 AND fff7ffffffffffff test-div 7ff0000000000000 ? cc=e
+#27: xvtdivdp fff7ffffffffffff test-div 7ff7ffffffffffff AND fff7ffffffffffff test-div 7ff8000000000000 ? cc=a
+#28: xvtdivdp fff8000000000000 test-div fff0000000000000 AND fff8000000000000 test-div c0d0650f5a07b353 ? cc=e
+#29: xvtdivdp fff8000000000000 test-div 8000000000000000 AND 41232585a9900000 test-div 41382511a2000000 ? cc=e
+#30: xvtdivdp 41232585a9900000 test-div 41382511a2000000 AND 7ff7ffffffffffff test-div 7ff8000000000000 ? cc=a
+#31: xvtdivdp 7ff8000000000000 test-div 7ff8000000000000 AND 7ff8000000000000 test-div fff8000000000000 ? cc=a
+#32: xvtdivdp 41382511a2000000 test-div 40514bf5d2300000 AND 40312ef5a9300000 test-div 41382511a2000000 ? cc=8
+#33: xvtdivdp 40976bf982440000 test-div 40976bf982440000 AND 40976bf982440000 test-div 40514bf5d2300000 ? cc=8
+
+#0: xvtdivsp ff800000 test-div ff800000 AND ff800000 test-div c683287b AND 49192c2d test-div 49c1288d AND ff800000 test-div 00000000 ? cc=e
+#1: xvtdivsp ff800000 test-div 00000000 AND ff800000 test-div 7f800000 AND ff800000 test-div 7fffffff AND ff800000 test-div 7fc00000 ? cc=e
+#2: xvtdivsp c683287b test-div ff800000 AND c683287b test-div c683287b AND c683287b test-div 80000000 AND c683287b test-div 00000000 ? cc=e
+#3: xvtdivsp c683287b test-div 00000000 AND c683287b test-div 7f800000 AND c683287b test-div 7fffffff AND c683287b test-div 7fc00000 ? cc=e
+#4: xvtdivsp 80000000 test-div ff800000 AND 80000000 test-div c683287b AND 80000000 test-div 80000000 AND 80000000 test-div 00000000 ? cc=e
+#5: xvtdivsp 80000000 test-div 00000000 AND 80000000 test-div 7f800000 AND 80000000 test-div 7fffffff AND 80000000 test-div 7fc00000 ? cc=e
+#6: xvtdivsp 00000000 test-div ff800000 AND 00000000 test-div c683287b AND 00000000 test-div 80000000 AND 00000000 test-div 00000000 ? cc=e
+#7: xvtdivsp 00000000 test-div 00000000 AND 00000000 test-div 7f800000 AND 00000000 test-div 7fffffff AND 00000000 test-div 7fc00000 ? cc=e
+#8: xvtdivsp 00000000 test-div ff800000 AND 00000000 test-div c683287b AND 00000000 test-div 80000000 AND 00000000 test-div 00000000 ? cc=e
+#9: xvtdivsp 00000000 test-div 42780000 AND 00000000 test-div 7f800000 AND 00000000 test-div 7fffffff AND 00000000 test-div 7fc00000 ? cc=e
+#10: xvtdivsp 7f800000 test-div ff800000 AND 7f800000 test-div c683287b AND 7f800000 test-div 80000000 AND 7f800000 test-div 00000000 ? cc=e
+#11: xvtdivsp 7f800000 test-div 00000000 AND 7f800000 test-div 7f800000 AND 7f800000 test-div 7fffffff AND 7f800000 test-div 7fc00000 ? cc=e
+#12: xvtdivsp ffffffff test-div ff800000 AND ffffffff test-div c683287b AND ffc00000 test-div 80000000 AND ffc00000 test-div 00000000 ? cc=e
+#13: xvtdivsp ffffffff test-div 00000000 AND ffffffff test-div 7f800000 AND ffffffff test-div 7fffffff AND ffffffff test-div 7fc00000 ? cc=e
+#14: xvtdivsp ffc00000 test-div ff800000 AND ffc00000 test-div c683287b AND ffc00000 test-div 80000000 AND 49192c2d test-div 49c1288d ? cc=e
+#15: xvtdivsp 49192c2d test-div 49c1288d AND 7fffffff test-div 7fc00000 AND 7fc00000 test-div 7fc00000 AND 7fc00000 test-div ffc00000 ? cc=a
+#16: xvtdivsp 49c1288d test-div 428a5faf AND 418977ad test-div 49c1288d AND 44bb5fcc test-div 44bb5fcc AND 44bb5fcc test-div 428a5faf ? cc=8
+
+Test popcntw instruction
+popcntw: 0x9182730e => 0x0000000d
+
diff --git a/none/tests/ppc32/test_isa_2_06_part3.vgtest b/none/tests/ppc32/test_isa_2_06_part3.vgtest
new file mode 100644
index 00000000..3519c8a0
--- /dev/null
+++ b/none/tests/ppc32/test_isa_2_06_part3.vgtest
@@ -0,0 +1,2 @@
+prereq: ../../../tests/check_isa-2_06_cap
+prog: test_isa_2_06_part3
diff --git a/none/tests/ppc64/Makefile.am b/none/tests/ppc64/Makefile.am
index 363b7f08..15b4b39b 100644
--- a/none/tests/ppc64/Makefile.am
+++ b/none/tests/ppc64/Makefile.am
@@ -16,11 +16,12 @@ EXTRA_DIST = \
 	power6_bcmp.stderr.exp power6_bcmp.stdout.exp power6_bcmp.vgtest \
 	power6_mf_gpr.stderr.exp power6_mf_gpr.stdout.exp power6_mf_gpr.vgtest \
 	test_isa_2_06_part1.stderr.exp  test_isa_2_06_part1.stdout.exp  test_isa_2_06_part1.vgtest \
-	test_isa_2_06_part2.stderr.exp  test_isa_2_06_part2.stdout.exp  test_isa_2_06_part2.vgtest
+	test_isa_2_06_part2.stderr.exp  test_isa_2_06_part2.stdout.exp  test_isa_2_06_part2.vgtest \
+	test_isa_2_06_part3.stderr.exp  test_isa_2_06_part3.stdout.exp  test_isa_2_06_part3.vgtest
 
 check_PROGRAMS = \
 	jm-insns lsw round std_reg_imm twi_tdi tw_td power6_bcmp power6_mf_gpr test_isa_2_06_part1 \
-	test_isa_2_06_part2
+	test_isa_2_06_part2 test_isa_2_06_part3
 
 AM_CFLAGS    += @FLAG_M64@
 AM_CXXFLAGS  += @FLAG_M64@
@@ -46,6 +47,9 @@ test_isa_2_06_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_
 test_isa_2_06_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \
 			@FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX)
 
+test_isa_2_06_part3_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mregnames $(VSX_FLAG) \
+			@FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX)
+
 jm_insns_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames -maltivec \
 			@FLAG_M64@ $(ALTIVEC_FLAG)
 
diff --git a/none/tests/ppc64/test_isa_2_06_part3.c b/none/tests/ppc64/test_isa_2_06_part3.c
new file mode 120000
index 00000000..57da4ec0
--- /dev/null
+++ b/none/tests/ppc64/test_isa_2_06_part3.c
@@ -0,0 +1 @@
+../../../none/tests/ppc32/test_isa_2_06_part3.c
\ No newline at end of file
diff --git a/none/tests/ppc64/test_isa_2_06_part3.stderr.exp b/none/tests/ppc64/test_isa_2_06_part3.stderr.exp
new file mode 100644
index 00000000..139597f9
--- /dev/null
+++ b/none/tests/ppc64/test_isa_2_06_part3.stderr.exp
@@ -0,0 +1,2 @@
+
+
diff --git a/none/tests/ppc64/test_isa_2_06_part3.stdout.exp b/none/tests/ppc64/test_isa_2_06_part3.stdout.exp
new file mode 100644
index 00000000..c3da39f8
--- /dev/null
+++ b/none/tests/ppc64/test_isa_2_06_part3.stdout.exp
@@ -0,0 +1,663 @@
+Test VSX vector and scalar single argument instructions
+#0: xvredp 1/x(3fd8000000000000) ==> PASS); 1/x(404f000000000000) ==> PASS)
+#1: xvredp 1/x(0018000000b77501) ==> PASS); 1/x(7fe800000000051b) ==> PASS)
+#2: xvredp 1/x(0123214569900000) ==> PASS); 1/x(0000000000000000) ==> PASS)
+#3: xvredp 1/x(8000000000000000) ==> PASS); 1/x(7ff0000000000000) ==> PASS)
+#4: xvredp 1/x(fff0000000000000) ==> PASS); 1/x(7ff7ffffffffffff) ==> PASS)
+#5: xvredp 1/x(fff7ffffffffffff) ==> PASS); 1/x(7ff8000000000000) ==> PASS)
+#6: xvredp 1/x(fff8000000000000) ==> PASS); 1/x(8008340000078000) ==> PASS)
+#7: xvredp 1/x(c0d0650f5a07b353) ==> PASS); 1/x(41232585a9900000) ==> PASS)
+#8: xvredp 1/x(41382511a2000000) ==> PASS); 1/x(40312ef5a9300000) ==> PASS)
+
+#0: xsredp 1/x(3fd8000000000000) ==> PASS)
+#1: xsredp 1/x(404f000000000000) ==> PASS)
+#2: xsredp 1/x(0018000000b77501) ==> PASS)
+#3: xsredp 1/x(7fe800000000051b) ==> PASS)
+#4: xsredp 1/x(0123214569900000) ==> PASS)
+#5: xsredp 1/x(0000000000000000) ==> PASS)
+#6: xsredp 1/x(8000000000000000) ==> PASS)
+#7: xsredp 1/x(7ff0000000000000) ==> PASS)
+#8: xsredp 1/x(fff0000000000000) ==> PASS)
+#9: xsredp 1/x(7ff7ffffffffffff) ==> PASS)
+#10: xsredp 1/x(fff7ffffffffffff) ==> PASS)
+#11: xsredp 1/x(7ff8000000000000) ==> PASS)
+#12: xsredp 1/x(fff8000000000000) ==> PASS)
+#13: xsredp 1/x(8008340000078000) ==> PASS)
+#14: xsredp 1/x(c0d0650f5a07b353) ==> PASS)
+#15: xsredp 1/x(41232585a9900000) ==> PASS)
+#16: xsredp 1/x(41382511a2000000) ==> PASS)
+#17: xsredp 1/x(40312ef5a9300000) ==> PASS)
+
+#0: xvrsqrtedp 1/x-sqrt(3fd8000000000000) ==> PASS); 1/x-sqrt(404f000000000000) ==> PASS)
+#1: xvrsqrtedp 1/x-sqrt(0018000000b77501) ==> PASS); 1/x-sqrt(7fe800000000051b) ==> PASS)
+#2: xvrsqrtedp 1/x-sqrt(0123214569900000) ==> PASS); 1/x-sqrt(0000000000000000) ==> PASS)
+#3: xvrsqrtedp 1/x-sqrt(8000000000000000) ==> PASS); 1/x-sqrt(7ff0000000000000) ==> PASS)
+#4: xvrsqrtedp 1/x-sqrt(fff0000000000000) ==> PASS); 1/x-sqrt(7ff7ffffffffffff) ==> PASS)
+#5: xvrsqrtedp 1/x-sqrt(fff7ffffffffffff) ==> PASS); 1/x-sqrt(7ff8000000000000) ==> PASS)
+#6: xvrsqrtedp 1/x-sqrt(fff8000000000000) ==> PASS); 1/x-sqrt(8008340000078000) ==> PASS)
+#7: xvrsqrtedp 1/x-sqrt(c0d0650f5a07b353) ==> PASS); 1/x-sqrt(41232585a9900000) ==> PASS)
+#8: xvrsqrtedp 1/x-sqrt(41382511a2000000) ==> PASS); 1/x-sqrt(40312ef5a9300000) ==> PASS)
+
+#0: xsrsqrtedp 1/x-sqrt(3fd8000000000000) ==> PASS)
+#1: xsrsqrtedp 1/x-sqrt(404f000000000000) ==> PASS)
+#2: xsrsqrtedp 1/x-sqrt(0018000000b77501) ==> PASS)
+#3: xsrsqrtedp 1/x-sqrt(7fe800000000051b) ==> PASS)
+#4: xsrsqrtedp 1/x-sqrt(0123214569900000) ==> PASS)
+#5: xsrsqrtedp 1/x-sqrt(0000000000000000) ==> PASS)
+#6: xsrsqrtedp 1/x-sqrt(8000000000000000) ==> PASS)
+#7: xsrsqrtedp 1/x-sqrt(7ff0000000000000) ==> PASS)
+#8: xsrsqrtedp 1/x-sqrt(fff0000000000000) ==> PASS)
+#9: xsrsqrtedp 1/x-sqrt(7ff7ffffffffffff) ==> PASS)
+#10: xsrsqrtedp 1/x-sqrt(fff7ffffffffffff) ==> PASS)
+#11: xsrsqrtedp 1/x-sqrt(7ff8000000000000) ==> PASS)
+#12: xsrsqrtedp 1/x-sqrt(fff8000000000000) ==> PASS)
+#13: xsrsqrtedp 1/x-sqrt(8008340000078000) ==> PASS)
+#14: xsrsqrtedp 1/x-sqrt(c0d0650f5a07b353) ==> PASS)
+#15: xsrsqrtedp 1/x-sqrt(41232585a9900000) ==> PASS)
+#16: xsrsqrtedp 1/x-sqrt(41382511a2000000) ==> PASS)
+#17: xsrsqrtedp 1/x-sqrt(40312ef5a9300000) ==> PASS)
+
+#0: xvrsqrtesp 1/x-sqrt(3ec00000) ==> PASS); 1/x-sqrt(42780000) ==> PASS); 1/x-sqrt(00000000) ==> PASS); 1/x-sqrt(7f800000) ==> PASS)
+#1: xvrsqrtesp 1/x-sqrt(00000000) ==> PASS); 1/x-sqrt(00000000) ==> PASS); 1/x-sqrt(80000000) ==> PASS); 1/x-sqrt(7f800000) ==> PASS)
+#2: xvrsqrtesp 1/x-sqrt(ff800000) ==> PASS); 1/x-sqrt(7fffffff) ==> PASS); 1/x-sqrt(ffffffff) ==> PASS); 1/x-sqrt(7fc00000) ==> PASS)
+#3: xvrsqrtesp 1/x-sqrt(ffc00000) ==> PASS); 1/x-sqrt(80000000) ==> PASS); 1/x-sqrt(c683287b) ==> PASS); 1/x-sqrt(49192c2d) ==> PASS)
+#4: xvrsqrtesp 1/x-sqrt(49c1288d) ==> PASS); 1/x-sqrt(418977ad) ==> PASS); 1/x-sqrt(428a5faf) ==> PASS); 1/x-sqrt(44bb5fcc) ==> PASS)
+
+#0: xvsqrtdp sqrt(3fd8000000000000) = 3fe3988e1409212e; sqrt(404f000000000000) = 401f7efbeb8d4f12
+#1: xvsqrtdp sqrt(0018000000b77501) = 2003988e14540690; sqrt(7fe800000000051b) = 5febb67ae8584f9d
+#2: xvsqrtdp sqrt(0123214569900000) = 2088bde98d60ebe6; sqrt(0000000000000000) = 0000000000000000
+#3: xvsqrtdp sqrt(8000000000000000) = 8000000000000000; sqrt(7ff0000000000000) = 7ff0000000000000
+#4: xvsqrtdp sqrt(fff0000000000000) = 7ff8000000000000; sqrt(7ff7ffffffffffff) = 7fffffffffffffff
+#5: xvsqrtdp sqrt(fff7ffffffffffff) = ffffffffffffffff; sqrt(7ff8000000000000) = 7ff8000000000000
+#6: xvsqrtdp sqrt(fff8000000000000) = fff8000000000000; sqrt(8008340000078000) = 7ff8000000000000
+#7: xvsqrtdp sqrt(c0d0650f5a07b353) = 7ff8000000000000; sqrt(41232585a9900000) = 4088c0a9258a4a8b
+#8: xvsqrtdp sqrt(41382511a2000000) = 4093a7aa60f34e85; sqrt(40312ef5a9300000) = 401094c71dec3a9c
+
+#0: xvsqrtsp sqrt(3ec00000) = 3f1cc470; sqrt(42780000) = 40fbf7dc; sqrt(00000000) = 00000000; sqrt(7f800000) = 7f800000
+#1: xvsqrtsp sqrt(00000000) = 00000000; sqrt(00000000) = 00000000; sqrt(80000000) = 80000000; sqrt(7f800000) = 7f800000
+#2: xvsqrtsp sqrt(ff800000) = 7fc00000; sqrt(7fffffff) = 7ffffffc; sqrt(ffffffff) = fffffffc; sqrt(7fc00000) = 7fc00000
+#3: xvsqrtsp sqrt(ffc00000) = ffc00000; sqrt(80000000) = 80000000; sqrt(c683287b) = 7fc00000; sqrt(49192c2d) = 44460548
+#4: xvsqrtsp sqrt(49c1288d) = 449d3d50; sqrt(418977ad) = 4084a638; sqrt(428a5faf) = 410515f8; sqrt(44bb5fcc) = 421ade08
+
+#0: xscvdpsp conv(3fd8000000000000) = 3ec0000000000000
+#1: xscvdpsp conv(404f000000000000) = 4278000000000000
+#2: xscvdpsp conv(0018000000b77501) = 0000000000000000
+#3: xscvdpsp conv(7fe800000000051b) = 7f80000000000000
+#4: xscvdpsp conv(0123214569900000) = 0000000000000000
+#5: xscvdpsp conv(0000000000000000) = 0000000000000000
+#6: xscvdpsp conv(8000000000000000) = 8000000000000000
+#7: xscvdpsp conv(7ff0000000000000) = 7f80000000000000
+#8: xscvdpsp conv(fff0000000000000) = ff80000000000000
+#9: xscvdpsp conv(7ff7ffffffffffff) = 7fffffff00000000
+#10: xscvdpsp conv(fff7ffffffffffff) = ffffffff00000000
+#11: xscvdpsp conv(7ff8000000000000) = 7fc0000000000000
+#12: xscvdpsp conv(fff8000000000000) = ffc0000000000000
+#13: xscvdpsp conv(8008340000078000) = 8000000000000000
+#14: xscvdpsp conv(c0d0650f5a07b353) = c683287b00000000
+#15: xscvdpsp conv(41232585a9900000) = 49192c2d00000000
+#16: xscvdpsp conv(41382511a2000000) = 49c1288d00000000
+#17: xscvdpsp conv(40312ef5a9300000) = 418977ad00000000
+#18: xscvdpsp conv(40514bf5d2300000) = 428a5faf00000000
+#19: xscvdpsp conv(40976bf982440000) = 44bb5fcc00000000
+
+#0: xscvdpuxws conv(3fd8000000000000) = 0000000000000000
+#1: xscvdpuxws conv(404f000000000000) = 000000000000003e
+#2: xscvdpuxws conv(0018000000b77501) = 0000000000000000
+#3: xscvdpuxws conv(7fe800000000051b) = 00000000ffffffff
+#4: xscvdpuxws conv(0123214569900000) = 0000000000000000
+#5: xscvdpuxws conv(0000000000000000) = 0000000000000000
+#6: xscvdpuxws conv(8000000000000000) = 0000000000000000
+#7: xscvdpuxws conv(7ff0000000000000) = 00000000ffffffff
+#8: xscvdpuxws conv(fff0000000000000) = 0000000000000000
+#9: xscvdpuxws conv(7ff7ffffffffffff) = 0000000000000000
+#10: xscvdpuxws conv(fff7ffffffffffff) = 0000000000000000
+#11: xscvdpuxws conv(7ff8000000000000) = 0000000000000000
+#12: xscvdpuxws conv(fff8000000000000) = 0000000000000000
+#13: xscvdpuxws conv(8008340000078000) = 0000000000000000
+#14: xscvdpuxws conv(c0d0650f5a07b353) = 0000000000000000
+#15: xscvdpuxws conv(41232585a9900000) = 00000000000992c2
+#16: xscvdpuxws conv(41382511a2000000) = 0000000000182511
+#17: xscvdpuxws conv(40312ef5a9300000) = 0000000000000011
+#18: xscvdpuxws conv(40514bf5d2300000) = 0000000000000045
+#19: xscvdpuxws conv(40976bf982440000) = 00000000000005da
+
+#0: xscvspdp conv(3ec00000) = 3fd8000000000000
+#1: xscvspdp conv(42780000) = 404f000000000000
+#2: xscvspdp conv(00000000) = 0000000000000000
+#3: xscvspdp conv(7f800000) = 7ff0000000000000
+#4: xscvspdp conv(00000000) = 0000000000000000
+#5: xscvspdp conv(00000000) = 0000000000000000
+#6: xscvspdp conv(80000000) = 8000000000000000
+#7: xscvspdp conv(7f800000) = 7ff0000000000000
+#8: xscvspdp conv(ff800000) = fff0000000000000
+#9: xscvspdp conv(7fffffff) = 7fffffffe0000000
+#10: xscvspdp conv(ffffffff) = ffffffffe0000000
+#11: xscvspdp conv(7fc00000) = 7ff8000000000000
+#12: xscvspdp conv(ffc00000) = fff8000000000000
+#13: xscvspdp conv(80000000) = 8000000000000000
+#14: xscvspdp conv(c683287b) = c0d0650f60000000
+#15: xscvspdp conv(49192c2d) = 41232585a0000000
+#16: xscvspdp conv(49c1288d) = 41382511a0000000
+#17: xscvspdp conv(418977ad) = 40312ef5a0000000
+#18: xscvspdp conv(428a5faf) = 40514bf5e0000000
+#19: xscvspdp conv(44bb5fcc) = 40976bf980000000
+
+#0: xvcvdpsp conv(3fd8000000000000) = 3ec0000000000000; conv(404f000000000000) = 4278000000000000
+#1: xvcvdpsp conv(0018000000b77501) = 0000000000000000; conv(7fe800000000051b) = 7f80000000000000
+#2: xvcvdpsp conv(0123214569900000) = 0000000000000000; conv(0000000000000000) = 0000000000000000
+#3: xvcvdpsp conv(8000000000000000) = 8000000000000000; conv(7ff0000000000000) = 7f80000000000000
+#4: xvcvdpsp conv(fff0000000000000) = ff80000000000000; conv(7ff7ffffffffffff) = 7fffffff00000000
+#5: xvcvdpsp conv(fff7ffffffffffff) = ffffffff00000000; conv(7ff8000000000000) = 7fc0000000000000
+#6: xvcvdpsp conv(fff8000000000000) = ffc0000000000000; conv(8008340000078000) = 8000000000000000
+#7: xvcvdpsp conv(c0d0650f5a07b353) = c683287b00000000; conv(41232585a9900000) = 49192c2d00000000
+#8: xvcvdpsp conv(41382511a2000000) = 49c1288d00000000; conv(40312ef5a9300000) = 418977ad00000000
+#9: xvcvdpsp conv(40514bf5d2300000) = 428a5faf00000000; conv(40976bf982440000) = 44bb5fcc00000000
+
+#0: xvcvdpuxds conv(3fd8000000000000) = 0000000000000000; conv(404f000000000000) = 000000000000003e
+#1: xvcvdpuxds conv(0018000000b77501) = 0000000000000000; conv(7fe800000000051b) = ffffffffffffffff
+#2: xvcvdpuxds conv(0123214569900000) = 0000000000000000; conv(0000000000000000) = 0000000000000000
+#3: xvcvdpuxds conv(8000000000000000) = 0000000000000000; conv(7ff0000000000000) = ffffffffffffffff
+#4: xvcvdpuxds conv(fff0000000000000) = 0000000000000000; conv(7ff7ffffffffffff) = 0000000000000000
+#5: xvcvdpuxds conv(fff7ffffffffffff) = 0000000000000000; conv(7ff8000000000000) = 0000000000000000
+#6: xvcvdpuxds conv(fff8000000000000) = 0000000000000000; conv(8008340000078000) = 0000000000000000
+#7: xvcvdpuxds conv(c0d0650f5a07b353) = 0000000000000000; conv(41232585a9900000) = 00000000000992c2
+#8: xvcvdpuxds conv(41382511a2000000) = 0000000000182511; conv(40312ef5a9300000) = 0000000000000011
+#9: xvcvdpuxds conv(40514bf5d2300000) = 0000000000000045; conv(40976bf982440000) = 00000000000005da
+
+#0: xvcvdpuxws conv(3fd8000000000000) = 0000000000000000; conv(404f000000000000) = 0000003e00000000
+#1: xvcvdpuxws conv(0018000000b77501) = 0000000000000000; conv(7fe800000000051b) = ffffffff00000000
+#2: xvcvdpuxws conv(0123214569900000) = 0000000000000000; conv(0000000000000000) = 0000000000000000
+#3: xvcvdpuxws conv(8000000000000000) = 0000000000000000; conv(7ff0000000000000) = ffffffff00000000
+#4: xvcvdpuxws conv(fff0000000000000) = 0000000000000000; conv(7ff7ffffffffffff) = 0000000000000000
+#5: xvcvdpuxws conv(fff7ffffffffffff) = 0000000000000000; conv(7ff8000000000000) = 0000000000000000
+#6: xvcvdpuxws conv(fff8000000000000) = 0000000000000000; conv(8008340000078000) = 0000000000000000
+#7: xvcvdpuxws conv(c0d0650f5a07b353) = 0000000000000000; conv(41232585a9900000) = 000992c200000000
+#8: xvcvdpuxws conv(41382511a2000000) = 0018251100000000; conv(40312ef5a9300000) = 0000001100000000
+#9: xvcvdpuxws conv(40514bf5d2300000) = 0000004500000000; conv(40976bf982440000) = 000005da00000000
+
+#0: xvcvspdp conv(3ec00000) = 3fd8000000000000; conv(42780000) = 404f000000000000
+#1: xvcvspdp conv(00000000) = 0000000000000000; conv(7f800000) = 7ff0000000000000
+#2: xvcvspdp conv(00000000) = 0000000000000000; conv(00000000) = 0000000000000000
+#3: xvcvspdp conv(80000000) = 8000000000000000; conv(7f800000) = 7ff0000000000000
+#4: xvcvspdp conv(ff800000) = fff0000000000000; conv(7fffffff) = 7fffffffe0000000
+#5: xvcvspdp conv(ffffffff) = ffffffffe0000000; conv(7fc00000) = 7ff8000000000000
+#6: xvcvspdp conv(ffc00000) = fff8000000000000; conv(80000000) = 8000000000000000
+#7: xvcvspdp conv(c683287b) = c0d0650f60000000; conv(49192c2d) = 41232585a0000000
+#8: xvcvspdp conv(49c1288d) = 41382511a0000000; conv(418977ad) = 40312ef5a0000000
+#9: xvcvspdp conv(428a5faf) = 40514bf5e0000000; conv(44bb5fcc) = 40976bf980000000
+
+#0: xvcvspsxds conv(3ec00000) = 0000000000000000; conv(42780000) = 000000000000003e
+#1: xvcvspsxds conv(00000000) = 0000000000000000; conv(7f800000) = 7fffffffffffffff
+#2: xvcvspsxds conv(00000000) = 0000000000000000; conv(00000000) = 0000000000000000
+#3: xvcvspsxds conv(80000000) = 0000000000000000; conv(7f800000) = 7fffffffffffffff
+#4: xvcvspsxds conv(ff800000) = 8000000000000000; conv(7fffffff) = 8000000000000000
+#5: xvcvspsxds conv(ffffffff) = 8000000000000000; conv(7fc00000) = 8000000000000000
+#6: xvcvspsxds conv(ffc00000) = 8000000000000000; conv(80000000) = 0000000000000000
+#7: xvcvspsxds conv(c683287b) = ffffffffffffbe6c; conv(49192c2d) = 00000000000992c2
+#8: xvcvspsxds conv(49c1288d) = 0000000000182511; conv(418977ad) = 0000000000000011
+#9: xvcvspsxds conv(428a5faf) = 0000000000000045; conv(44bb5fcc) = 00000000000005da
+
+#0: xvcvdpsxds conv(3fd8000000000000) = 0000000000000000; conv(404f000000000000) = 000000000000003e
+#1: xvcvdpsxds conv(0018000000b77501) = 0000000000000000; conv(7fe800000000051b) = 7fffffffffffffff
+#2: xvcvdpsxds conv(0123214569900000) = 0000000000000000; conv(0000000000000000) = 0000000000000000
+#3: xvcvdpsxds conv(8000000000000000) = 0000000000000000; conv(7ff0000000000000) = 7fffffffffffffff
+#4: xvcvdpsxds conv(fff0000000000000) = 8000000000000000; conv(7ff7ffffffffffff) = 8000000000000000
+#5: xvcvdpsxds conv(fff7ffffffffffff) = 8000000000000000; conv(7ff8000000000000) = 8000000000000000
+#6: xvcvdpsxds conv(fff8000000000000) = 8000000000000000; conv(8008340000078000) = 0000000000000000
+#7: xvcvdpsxds conv(c0d0650f5a07b353) = ffffffffffffbe6c; conv(41232585a9900000) = 00000000000992c2
+#8: xvcvdpsxds conv(41382511a2000000) = 0000000000182511; conv(40312ef5a9300000) = 0000000000000011
+#9: xvcvdpsxds conv(40514bf5d2300000) = 0000000000000045; conv(40976bf982440000) = 00000000000005da
+
+#0: xvcvspuxds conv(3ec00000) = 0000000000000000; conv(42780000) = 000000000000003e
+#1: xvcvspuxds conv(00000000) = 0000000000000000; conv(7f800000) = ffffffffffffffff
+#2: xvcvspuxds conv(00000000) = 0000000000000000; conv(00000000) = 0000000000000000
+#3: xvcvspuxds conv(80000000) = 0000000000000000; conv(7f800000) = ffffffffffffffff
+#4: xvcvspuxds conv(ff800000) = 0000000000000000; conv(7fffffff) = 0000000000000000
+#5: xvcvspuxds conv(ffffffff) = 0000000000000000; conv(7fc00000) = 0000000000000000
+#6: xvcvspuxds conv(ffc00000) = 0000000000000000; conv(80000000) = 0000000000000000
+#7: xvcvspuxds conv(c683287b) = 0000000000000000; conv(49192c2d) = 00000000000992c2
+#8: xvcvspuxds conv(49c1288d) = 0000000000182511; conv(418977ad) = 0000000000000011
+#9: xvcvspuxds conv(428a5faf) = 0000000000000045; conv(44bb5fcc) = 00000000000005da
+
+#0: xvcvspuxws conv(3ec00000) = 00000000; conv(42780000) = 0000003e; conv(00000000) = 00000000; conv(7f800000) = ffffffff
+#1: xvcvspuxws conv(00000000) = 00000000; conv(00000000) = 00000000; conv(80000000) = 00000000; conv(7f800000) = ffffffff
+#2: xvcvspuxws conv(ff800000) = 00000000; conv(7fffffff) = 00000000; conv(ffffffff) = 00000000; conv(7fc00000) = 00000000
+#3: xvcvspuxws conv(ffc00000) = 00000000; conv(80000000) = 00000000; conv(c683287b) = 00000000; conv(49192c2d) = 000992c2
+#4: xvcvspuxws conv(49c1288d) = 00182511; conv(418977ad) = 00000011; conv(428a5faf) = 00000045; conv(44bb5fcc) = 000005da
+
+#0: xsrdpic round(3fd8000000000000) = 0000000000000000
+#1: xsrdpic round(404f000000000000) = 404f000000000000
+#2: xsrdpic round(0018000000b77501) = 0000000000000000
+#3: xsrdpic round(7fe800000000051b) = 7fe800000000051b
+#4: xsrdpic round(0123214569900000) = 0000000000000000
+#5: xsrdpic round(0000000000000000) = 0000000000000000
+#6: xsrdpic round(8000000000000000) = 8000000000000000
+#7: xsrdpic round(7ff0000000000000) = 7ff0000000000000
+#8: xsrdpic round(fff0000000000000) = fff0000000000000
+#9: xsrdpic round(7ff7ffffffffffff) = 7fffffffffffffff
+#10: xsrdpic round(fff7ffffffffffff) = ffffffffffffffff
+#11: xsrdpic round(7ff8000000000000) = 7ff8000000000000
+#12: xsrdpic round(fff8000000000000) = fff8000000000000
+#13: xsrdpic round(8008340000078000) = 8000000000000000
+#14: xsrdpic round(c0d0650f5a07b353) = c0d0650000000000
+#15: xsrdpic round(41232585a9900000) = 4123258600000000
+#16: xsrdpic round(41382511a2000000) = 4138251200000000
+#17: xsrdpic round(40312ef5a9300000) = 4031000000000000
+#18: xsrdpic round(40514bf5d2300000) = 4051400000000000
+#19: xsrdpic round(40976bf982440000) = 40976c0000000000
+
+#0: xsrdpiz round(3fd8000000000000) = 0000000000000000
+#1: xsrdpiz round(404f000000000000) = 404f000000000000
+#2: xsrdpiz round(0018000000b77501) = 0000000000000000
+#3: xsrdpiz round(7fe800000000051b) = 7fe800000000051b
+#4: xsrdpiz round(0123214569900000) = 0000000000000000
+#5: xsrdpiz round(0000000000000000) = 0000000000000000
+#6: xsrdpiz round(8000000000000000) = 8000000000000000
+#7: xsrdpiz round(7ff0000000000000) = 7ff0000000000000
+#8: xsrdpiz round(fff0000000000000) = fff0000000000000
+#9: xsrdpiz round(7ff7ffffffffffff) = 7fffffffffffffff
+#10: xsrdpiz round(fff7ffffffffffff) = ffffffffffffffff
+#11: xsrdpiz round(7ff8000000000000) = 7ff8000000000000
+#12: xsrdpiz round(fff8000000000000) = fff8000000000000
+#13: xsrdpiz round(8008340000078000) = 8000000000000000
+#14: xsrdpiz round(c0d0650f5a07b353) = c0d0650000000000
+#15: xsrdpiz round(41232585a9900000) = 4123258400000000
+#16: xsrdpiz round(41382511a2000000) = 4138251100000000
+#17: xsrdpiz round(40312ef5a9300000) = 4031000000000000
+#18: xsrdpiz round(40514bf5d2300000) = 4051400000000000
+#19: xsrdpiz round(40976bf982440000) = 4097680000000000
+
+#0: xsrdpi round(3fd8000000000000) = 0000000000000000
+#1: xsrdpi round(404f000000000000) = 404f000000000000
+#2: xsrdpi round(0018000000b77501) = 0000000000000000
+#3: xsrdpi round(7fe800000000051b) = 7fe800000000051b
+#4: xsrdpi round(0123214569900000) = 0000000000000000
+#5: xsrdpi round(0000000000000000) = 0000000000000000
+#6: xsrdpi round(8000000000000000) = 8000000000000000
+#7: xsrdpi round(7ff0000000000000) = 7ff0000000000000
+#8: xsrdpi round(fff0000000000000) = fff0000000000000
+#9: xsrdpi round(7ff7ffffffffffff) = 7fffffffffffffff
+#10: xsrdpi round(fff7ffffffffffff) = ffffffffffffffff
+#11: xsrdpi round(7ff8000000000000) = 7ff8000000000000
+#12: xsrdpi round(fff8000000000000) = fff8000000000000
+#13: xsrdpi round(8008340000078000) = 8000000000000000
+#14: xsrdpi round(c0d0650f5a07b353) = c0d0650000000000
+#15: xsrdpi round(41232585a9900000) = 4123258600000000
+#16: xsrdpi round(41382511a2000000) = 4138251200000000
+#17: xsrdpi round(40312ef5a9300000) = 4031000000000000
+#18: xsrdpi round(40514bf5d2300000) = 4051400000000000
+#19: xsrdpi round(40976bf982440000) = 40976c0000000000
+
+#0: xvabsdp abs(3fd8000000000000) = 3fd8000000000000; abs(404f000000000000) = 404f000000000000
+#1: xvabsdp abs(0018000000b77501) = 0018000000b77501; abs(7fe800000000051b) = 7fe800000000051b
+#2: xvabsdp abs(0123214569900000) = 0123214569900000; abs(0000000000000000) = 0000000000000000
+#3: xvabsdp abs(8000000000000000) = 0000000000000000; abs(7ff0000000000000) = 7ff0000000000000
+#4: xvabsdp abs(fff0000000000000) = 7ff0000000000000; abs(7ff7ffffffffffff) = 7ff7ffffffffffff
+#5: xvabsdp abs(fff7ffffffffffff) = 7ff7ffffffffffff; abs(7ff8000000000000) = 7ff8000000000000
+#6: xvabsdp abs(fff8000000000000) = 7ff8000000000000; abs(8008340000078000) = 0008340000078000
+#7: xvabsdp abs(c0d0650f5a07b353) = 40d0650f5a07b353; abs(41232585a9900000) = 41232585a9900000
+#8: xvabsdp abs(41382511a2000000) = 41382511a2000000; abs(40312ef5a9300000) = 40312ef5a9300000
+#9: xvabsdp abs(40514bf5d2300000) = 40514bf5d2300000; abs(40976bf982440000) = 40976bf982440000
+
+#0: xvnabsdp nabs(3fd8000000000000) = bfd8000000000000; nabs(404f000000000000) = c04f000000000000
+#1: xvnabsdp nabs(0018000000b77501) = 8018000000b77501; nabs(7fe800000000051b) = ffe800000000051b
+#2: xvnabsdp nabs(0123214569900000) = 8123214569900000; nabs(0000000000000000) = 8000000000000000
+#3: xvnabsdp nabs(8000000000000000) = 8000000000000000; nabs(7ff0000000000000) = fff0000000000000
+#4: xvnabsdp nabs(fff0000000000000) = fff0000000000000; nabs(7ff7ffffffffffff) = fff7ffffffffffff
+#5: xvnabsdp nabs(fff7ffffffffffff) = fff7ffffffffffff; nabs(7ff8000000000000) = fff8000000000000
+#6: xvnabsdp nabs(fff8000000000000) = fff8000000000000; nabs(8008340000078000) = 8008340000078000
+#7: xvnabsdp nabs(c0d0650f5a07b353) = c0d0650f5a07b353; nabs(41232585a9900000) = c1232585a9900000
+#8: xvnabsdp nabs(41382511a2000000) = c1382511a2000000; nabs(40312ef5a9300000) = c0312ef5a9300000
+#9: xvnabsdp nabs(40514bf5d2300000) = c0514bf5d2300000; nabs(40976bf982440000) = c0976bf982440000
+
+#0: xvnegdp neg(3fd8000000000000) = bfd8000000000000; neg(404f000000000000) = c04f000000000000
+#1: xvnegdp neg(0018000000b77501) = 8018000000b77501; neg(7fe800000000051b) = ffe800000000051b
+#2: xvnegdp neg(0123214569900000) = 8123214569900000; neg(0000000000000000) = 8000000000000000
+#3: xvnegdp neg(8000000000000000) = 0000000000000000; neg(7ff0000000000000) = fff0000000000000
+#4: xvnegdp neg(fff0000000000000) = 7ff0000000000000; neg(7ff7ffffffffffff) = fff7ffffffffffff
+#5: xvnegdp neg(fff7ffffffffffff) = 7ff7ffffffffffff; neg(7ff8000000000000) = fff8000000000000
+#6: xvnegdp neg(fff8000000000000) = 7ff8000000000000; neg(8008340000078000) = 0008340000078000
+#7: xvnegdp neg(c0d0650f5a07b353) = 40d0650f5a07b353; neg(41232585a9900000) = c1232585a9900000
+#8: xvnegdp neg(41382511a2000000) = c1382511a2000000; neg(40312ef5a9300000) = c0312ef5a9300000
+#9: xvnegdp neg(40514bf5d2300000) = c0514bf5d2300000; neg(40976bf982440000) = c0976bf982440000
+
+#0: xvabssp abs(3ec00000) = 3ec00000; abs(42780000) = 42780000; abs(00000000) = 00000000; abs(7f800000) = 7f800000
+#1: xvabssp abs(00000000) = 00000000; abs(00000000) = 00000000; abs(80000000) = 00000000; abs(7f800000) = 7f800000
+#2: xvabssp abs(ff800000) = 7f800000; abs(7fffffff) = 7fffffff; abs(ffffffff) = 7fffffff; abs(7fc00000) = 7fc00000
+#3: xvabssp abs(ffc00000) = 7fc00000; abs(80000000) = 00000000; abs(c683287b) = 4683287b; abs(49192c2d) = 49192c2d
+#4: xvabssp abs(49c1288d) = 49c1288d; abs(418977ad) = 418977ad; abs(428a5faf) = 428a5faf; abs(44bb5fcc) = 44bb5fcc
+
+#0: xvnabssp nabs(3ec00000) = bec00000; nabs(42780000) = c2780000; nabs(00000000) = 80000000; nabs(7f800000) = ff800000
+#1: xvnabssp nabs(00000000) = 80000000; nabs(00000000) = 80000000; nabs(80000000) = 80000000; nabs(7f800000) = ff800000
+#2: xvnabssp nabs(ff800000) = ff800000; nabs(7fffffff) = ffffffff; nabs(ffffffff) = ffffffff; nabs(7fc00000) = ffc00000
+#3: xvnabssp nabs(ffc00000) = ffc00000; nabs(80000000) = 80000000; nabs(c683287b) = c683287b; nabs(49192c2d) = c9192c2d
+#4: xvnabssp nabs(49c1288d) = c9c1288d; nabs(418977ad) = c18977ad; nabs(428a5faf) = c28a5faf; nabs(44bb5fcc) = c4bb5fcc
+
+#0: xvrdpi round(3fd8000000000000) = 0000000000000000; round(404f000000000000) = 404f000000000000
+#1: xvrdpi round(0018000000b77501) = 0000000000000000; round(7fe800000000051b) = 7fe800000000051b
+#2: xvrdpi round(0123214569900000) = 0000000000000000; round(0000000000000000) = 0000000000000000
+#3: xvrdpi round(8000000000000000) = 8000000000000000; round(7ff0000000000000) = 7ff0000000000000
+#4: xvrdpi round(fff0000000000000) = fff0000000000000; round(7ff7ffffffffffff) = 7fffffffffffffff
+#5: xvrdpi round(fff7ffffffffffff) = ffffffffffffffff; round(7ff8000000000000) = 7ff8000000000000
+#6: xvrdpi round(fff8000000000000) = fff8000000000000; round(8008340000078000) = 8000000000000000
+#7: xvrdpi round(c0d0650f5a07b353) = c0d0650000000000; round(41232585a9900000) = 4123258600000000
+#8: xvrdpi round(41382511a2000000) = 4138251200000000; round(40312ef5a9300000) = 4031000000000000
+#9: xvrdpi round(40514bf5d2300000) = 4051400000000000; round(40976bf982440000) = 40976c0000000000
+
+#0: xvrdpic round(3fd8000000000000) = 0000000000000000; round(404f000000000000) = 404f000000000000
+#1: xvrdpic round(0018000000b77501) = 0000000000000000; round(7fe800000000051b) = 7fe800000000051b
+#2: xvrdpic round(0123214569900000) = 0000000000000000; round(0000000000000000) = 0000000000000000
+#3: xvrdpic round(8000000000000000) = 8000000000000000; round(7ff0000000000000) = 7ff0000000000000
+#4: xvrdpic round(fff0000000000000) = fff0000000000000; round(7ff7ffffffffffff) = 7fffffffffffffff
+#5: xvrdpic round(fff7ffffffffffff) = ffffffffffffffff; round(7ff8000000000000) = 7ff8000000000000
+#6: xvrdpic round(fff8000000000000) = fff8000000000000; round(8008340000078000) = 8000000000000000
+#7: xvrdpic round(c0d0650f5a07b353) = c0d0650000000000; round(41232585a9900000) = 4123258600000000
+#8: xvrdpic round(41382511a2000000) = 4138251200000000; round(40312ef5a9300000) = 4031000000000000
+#9: xvrdpic round(40514bf5d2300000) = 4051400000000000; round(40976bf982440000) = 40976c0000000000
+
+#0: xvrdpim round(3fd8000000000000) = 0000000000000000; round(404f000000000000) = 404f000000000000
+#1: xvrdpim round(0018000000b77501) = 0000000000000000; round(7fe800000000051b) = 7fe800000000051b
+#2: xvrdpim round(0123214569900000) = 0000000000000000; round(0000000000000000) = 0000000000000000
+#3: xvrdpim round(8000000000000000) = 8000000000000000; round(7ff0000000000000) = 7ff0000000000000
+#4: xvrdpim round(fff0000000000000) = fff0000000000000; round(7ff7ffffffffffff) = 7fffffffffffffff
+#5: xvrdpim round(fff7ffffffffffff) = ffffffffffffffff; round(7ff8000000000000) = 7ff8000000000000
+#6: xvrdpim round(fff8000000000000) = fff8000000000000; round(8008340000078000) = bff0000000000000
+#7: xvrdpim round(c0d0650f5a07b353) = c0d0654000000000; round(41232585a9900000) = 4123258400000000
+#8: xvrdpim round(41382511a2000000) = 4138251100000000; round(40312ef5a9300000) = 4031000000000000
+#9: xvrdpim round(40514bf5d2300000) = 4051400000000000; round(40976bf982440000) = 4097680000000000
+
+#0: xvrdpip round(3fd8000000000000) = 3ff0000000000000; round(404f000000000000) = 404f000000000000
+#1: xvrdpip round(0018000000b77501) = 3ff0000000000000; round(7fe800000000051b) = 7fe800000000051b
+#2: xvrdpip round(0123214569900000) = 3ff0000000000000; round(0000000000000000) = 0000000000000000
+#3: xvrdpip round(8000000000000000) = 8000000000000000; round(7ff0000000000000) = 7ff0000000000000
+#4: xvrdpip round(fff0000000000000) = fff0000000000000; round(7ff7ffffffffffff) = 7fffffffffffffff
+#5: xvrdpip round(fff7ffffffffffff) = ffffffffffffffff; round(7ff8000000000000) = 7ff8000000000000
+#6: xvrdpip round(fff8000000000000) = fff8000000000000; round(8008340000078000) = 8000000000000000
+#7: xvrdpip round(c0d0650f5a07b353) = c0d0650000000000; round(41232585a9900000) = 4123258600000000
+#8: xvrdpip round(41382511a2000000) = 4138251200000000; round(40312ef5a9300000) = 4032000000000000
+#9: xvrdpip round(40514bf5d2300000) = 4051800000000000; round(40976bf982440000) = 40976c0000000000
+
+#0: xvrdpiz round(3fd8000000000000) = 0000000000000000; round(404f000000000000) = 404f000000000000
+#1: xvrdpiz round(0018000000b77501) = 0000000000000000; round(7fe800000000051b) = 7fe800000000051b
+#2: xvrdpiz round(0123214569900000) = 0000000000000000; round(0000000000000000) = 0000000000000000
+#3: xvrdpiz round(8000000000000000) = 8000000000000000; round(7ff0000000000000) = 7ff0000000000000
+#4: xvrdpiz round(fff0000000000000) = fff0000000000000; round(7ff7ffffffffffff) = 7fffffffffffffff
+#5: xvrdpiz round(fff7ffffffffffff) = ffffffffffffffff; round(7ff8000000000000) = 7ff8000000000000
+#6: xvrdpiz round(fff8000000000000) = fff8000000000000; round(8008340000078000) = 8000000000000000
+#7: xvrdpiz round(c0d0650f5a07b353) = c0d0650000000000; round(41232585a9900000) = 4123258400000000
+#8: xvrdpiz round(41382511a2000000) = 4138251100000000; round(40312ef5a9300000) = 4031000000000000
+#9: xvrdpiz round(40514bf5d2300000) = 4051400000000000; round(40976bf982440000) = 4097680000000000
+
+#0: xvrspi round(3ec00000) = 00000000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
+#1: xvrspi round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
+#2: xvrspi round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#3: xvrspi round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832800; round(49192c2d) = 49192c30
+#4: xvrspi round(49c1288d) = 49c12890; round(418977ad) = 41880000; round(428a5faf) = 428a0000; round(44bb5fcc) = 44bb6000
+
+#0: xvrspic round(3ec00000) = 00000000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
+#1: xvrspic round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
+#2: xvrspic round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#3: xvrspic round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832800; round(49192c2d) = 49192c30
+#4: xvrspic round(49c1288d) = 49c12890; round(418977ad) = 41880000; round(428a5faf) = 428a0000; round(44bb5fcc) = 44bb6000
+
+#0: xvrspim round(3ec00000) = 00000000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
+#1: xvrspim round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
+#2: xvrspim round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#3: xvrspim round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832a00; round(49192c2d) = 49192c20
+#4: xvrspim round(49c1288d) = 49c12888; round(418977ad) = 41880000; round(428a5faf) = 428a0000; round(44bb5fcc) = 44bb4000
+
+#0: xvrspip round(3ec00000) = 3f800000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
+#1: xvrspip round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
+#2: xvrspip round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#3: xvrspip round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832800; round(49192c2d) = 49192c30
+#4: xvrspip round(49c1288d) = 49c12890; round(418977ad) = 41900000; round(428a5faf) = 428c0000; round(44bb5fcc) = 44bb6000
+
+#0: xvrspiz round(3ec00000) = 00000000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
+#1: xvrspiz round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
+#2: xvrspiz round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#3: xvrspiz round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832800; round(49192c2d) = 49192c20
+#4: xvrspiz round(49c1288d) = 49c12888; round(418977ad) = 41880000; round(428a5faf) = 428a0000; round(44bb5fcc) = 44bb4000
+
+Test VSX vector integer to float conversion instructions
+#0: xvcvsxddp conv(0000000000000000) = 0000000000000000; conv(ffffffff00000000) = c1f0000000000000
+#1: xvcvsxddp conv(00000000ffffffff) = 41efffffffe00000; conv(ffffffffffffffff) = bff0000000000000
+#2: xvcvsxddp conv(89abcde123456789) = c3dd950c87b72ea6; conv(0102030405060708) = 4370203040506070
+#3: xvcvsxddp conv(00000000a0b1c2d3) = 41e416385a600000; conv(1111222233334444) = 43b1112222333344
+
+#0: xvcvuxddp conv(0000000000000000) = 0000000000000000; conv(ffffffff00000000) = 43efffffffe00000
+#1: xvcvuxddp conv(00000000ffffffff) = 41efffffffe00000; conv(ffffffffffffffff) = 43f0000000000000
+#2: xvcvuxddp conv(89abcde123456789) = 43e13579bc2468ad; conv(0102030405060708) = 4370203040506070
+#3: xvcvuxddp conv(00000000a0b1c2d3) = 41e416385a600000; conv(1111222233334444) = 43b1112222333344
+
+#0: xvcvsxdsp conv(0000000000000000) = 0000000000000000; conv(ffffffff00000000) = cf80000000000000
+#1: xvcvsxdsp conv(00000000ffffffff) = 4f80000000000000; conv(ffffffffffffffff) = bf80000000000000
+#2: xvcvsxdsp conv(89abcde123456789) = deeca86400000000; conv(0102030405060708) = 5b81018200000000
+#3: xvcvsxdsp conv(00000000a0b1c2d3) = 4f20b1c300000000; conv(1111222233334444) = 5d88891100000000
+
+#0: xvcvuxdsp conv(0000000000000000) = 0000000000000000; conv(ffffffff00000000) = 5f80000000000000
+#1: xvcvuxdsp conv(00000000ffffffff) = 4f80000000000000; conv(ffffffffffffffff) = 5f80000000000000
+#2: xvcvuxdsp conv(89abcde123456789) = 5f09abce00000000; conv(0102030405060708) = 5b81018200000000
+#3: xvcvuxdsp conv(00000000a0b1c2d3) = 4f20b1c300000000; conv(1111222233334444) = 5d88891100000000
+
+#0: xvcvsxwdp conv(00000000) = 0000000000000000; conv(ffff0000) = c0f0000000000000
+#1: xvcvsxwdp conv(0000ffff) = 40efffe000000000; conv(ffffffff) = bff0000000000000
+#2: xvcvsxwdp conv(89a73522) = c1dd9632b7800000; conv(01020304) = 4170203040000000
+#3: xvcvsxwdp conv(0000abcd) = 40e579a000000000; conv(11223344) = 41b1223344000000
+
+#0: xvcvuxwdp conv(00000000) = 0000000000000000; conv(ffff0000) = 41efffe000000000
+#1: xvcvuxwdp conv(0000ffff) = 40efffe000000000; conv(ffffffff) = 41efffffffe00000
+#2: xvcvuxwdp conv(89a73522) = 41e134e6a4400000; conv(01020304) = 4170203040000000
+#3: xvcvuxwdp conv(0000abcd) = 40e579a000000000; conv(11223344) = 41b1223344000000
+
+#0: xvcvsxwsp conv(00000000) = 00000000; conv(ffff0000) = c7800000; conv(0000ffff) = 477fff00; conv(ffffffff) = bf800000
+#1: xvcvsxwsp conv(89a73522) = ceecb196; conv(01020304) = 4b810182; conv(0000abcd) = 472bcd00; conv(11223344) = 4d89119a
+
+#0: xvcvuxwsp conv(00000000) = 00000000; conv(ffff0000) = 4f7fff00; conv(0000ffff) = 477fff00; conv(ffffffff) = 4f800000
+#1: xvcvuxwsp conv(89a73522) = 4f09a735; conv(01020304) = 4b810182; conv(0000abcd) = 472bcd00; conv(11223344) = 4d89119a
+
+Test div extensions
+#0: divdeu: 0x00000000000000040000000000000000 / 0xfffffffffffffffc = 0x0000000000000004; CR=0; XER=0
+#1: divdeu: 0x00000000000000040000000000000000 / 0xfffffffffffffffd = 0x0000000000000004; CR=0; XER=0
+#2: divdeu: 0x00000000000000040000000000000000 / 0x0000000000000004 = 0x0000000000000000; CR=0; XER=0
+#3: divdeu: 0x00000000000000040000000000000000 / 0xfffffffffffffffb = 0x0000000000000004; CR=0; XER=0
+#4: divdeu: 0x00000000000000030000000000000000 / 0x0000000000000008 = 0x6000000000000000; CR=0; XER=0
+#5: divdeu: 0x80000000000000000000000000000000 / 0x000000000000000a = 0x0000000000000000; CR=0; XER=0
+#6: divdeu: 0x000000000000050c0000000000000000 / 0xffffffffffffffff = 0x000000000000050c; CR=0; XER=0
+#7: divdeu: 0x000000000000050c0000000000000000 / 0xfffffffffffff000 = 0x000000000000050c; CR=0; XER=0
+#8: divdeu: 0x000000001234fedc0000000000000000 / 0x000000008000a873 = 0x2469cdcc6ad4ce20; CR=0; XER=0
+#9: divdeu: 0xabcd87651234fedc0000000000000000 / 0x00000000a123b893 = 0x0000000000000000; CR=0; XER=0
+#10: divdeu: 0x000123456789abdc0000000000000000 / 0x0000000000000000 = 0x0000000000000000; CR=0; XER=0
+#11: divdeu: 0x00000000000000000000000000000000 / 0x0000000000000002 = 0x0000000000000000; CR=0; XER=0
+#12: divdeu: 0x00000000000000770000000000000000 / 0x00000000000a3499 = 0x000ba911a321dcca; CR=0; XER=0
+
+#0: divdeu.: 0x00000000000000040000000000000000 / 0xfffffffffffffffc = 0x0000000000000004; CR=4; XER=0
+#1: divdeu.: 0x00000000000000040000000000000000 / 0xfffffffffffffffd = 0x0000000000000004; CR=4; XER=0
+#2: divdeu.: 0x00000000000000040000000000000000 / 0x0000000000000004 = 0x0000000000000000; CR=2; XER=0
+#3: divdeu.: 0x00000000000000040000000000000000 / 0xfffffffffffffffb = 0x0000000000000004; CR=4; XER=0
+#4: divdeu.: 0x00000000000000030000000000000000 / 0x0000000000000008 = 0x6000000000000000; CR=4; XER=0
+#5: divdeu.: 0x80000000000000000000000000000000 / 0x000000000000000a = 0x0000000000000000; CR=2; XER=0
+#6: divdeu.: 0x000000000000050c0000000000000000 / 0xffffffffffffffff = 0x000000000000050c; CR=4; XER=0
+#7: divdeu.: 0x000000000000050c0000000000000000 / 0xfffffffffffff000 = 0x000000000000050c; CR=4; XER=0
+#8: divdeu.: 0x000000001234fedc0000000000000000 / 0x000000008000a873 = 0x2469cdcc6ad4ce20; CR=4; XER=0
+#9: divdeu.: 0xabcd87651234fedc0000000000000000 / 0x00000000a123b893 = 0x0000000000000000; CR=2; XER=0
+#10: divdeu.: 0x000123456789abdc0000000000000000 / 0x0000000000000000 = 0x0000000000000000; CR=2; XER=0
+#11: divdeu.: 0x00000000000000000000000000000000 / 0x0000000000000002 = 0x0000000000000000; CR=2; XER=0
+#12: divdeu.: 0x00000000000000770000000000000000 / 0x00000000000a3499 = 0x000ba911a321dcca; CR=4; XER=0
+
+
+#0: divdeuo: 0x00000000000000040000000000000000 / 0xfffffffffffffffc = 0x0000000000000004; CR=0; XER=0
+#1: divdeuo: 0x00000000000000040000000000000000 / 0xfffffffffffffffd = 0x0000000000000004; CR=0; XER=0
+#2: divdeuo: 0x00000000000000040000000000000000 / 0x0000000000000004 = 0x0000000000000000; CR=0; XER=c0000000
+#3: divdeuo: 0x00000000000000040000000000000000 / 0xfffffffffffffffb = 0x0000000000000004; CR=0; XER=0
+#4: divdeuo: 0x00000000000000030000000000000000 / 0x0000000000000008 = 0x6000000000000000; CR=0; XER=0
+#5: divdeuo: 0x80000000000000000000000000000000 / 0x000000000000000a = 0x0000000000000000; CR=0; XER=c0000000
+#6: divdeuo: 0x000000000000050c0000000000000000 / 0xffffffffffffffff = 0x000000000000050c; CR=0; XER=0
+#7: divdeuo: 0x000000000000050c0000000000000000 / 0xfffffffffffff000 = 0x000000000000050c; CR=0; XER=0
+#8: divdeuo: 0x000000001234fedc0000000000000000 / 0x000000008000a873 = 0x2469cdcc6ad4ce20; CR=0; XER=0
+#9: divdeuo: 0xabcd87651234fedc0000000000000000 / 0x00000000a123b893 = 0x0000000000000000; CR=0; XER=c0000000
+#10: divdeuo: 0x000123456789abdc0000000000000000 / 0x0000000000000000 = 0x0000000000000000; CR=0; XER=c0000000
+#11: divdeuo: 0x00000000000000000000000000000000 / 0x0000000000000002 = 0x0000000000000000; CR=0; XER=0
+#12: divdeuo: 0x00000000000000770000000000000000 / 0x00000000000a3499 = 0x000ba911a321dcca; CR=0; XER=0
+
+#0: divdeuo.: 0x00000000000000040000000000000000 / 0xfffffffffffffffc = 0x0000000000000004; CR=4; XER=0
+#1: divdeuo.: 0x00000000000000040000000000000000 / 0xfffffffffffffffd = 0x0000000000000004; CR=4; XER=0
+#2: divdeuo.: 0x00000000000000040000000000000000 / 0x0000000000000004 = 0x0000000000000000; CR=3; XER=c0000000
+#3: divdeuo.: 0x00000000000000040000000000000000 / 0xfffffffffffffffb = 0x0000000000000004; CR=4; XER=0
+#4: divdeuo.: 0x00000000000000030000000000000000 / 0x0000000000000008 = 0x6000000000000000; CR=4; XER=0
+#5: divdeuo.: 0x80000000000000000000000000000000 / 0x000000000000000a = 0x0000000000000000; CR=3; XER=c0000000
+#6: divdeuo.: 0x000000000000050c0000000000000000 / 0xffffffffffffffff = 0x000000000000050c; CR=4; XER=0
+#7: divdeuo.: 0x000000000000050c0000000000000000 / 0xfffffffffffff000 = 0x000000000000050c; CR=4; XER=0
+#8: divdeuo.: 0x000000001234fedc0000000000000000 / 0x000000008000a873 = 0x2469cdcc6ad4ce20; CR=4; XER=0
+#9: divdeuo.: 0xabcd87651234fedc0000000000000000 / 0x00000000a123b893 = 0x0000000000000000; CR=3; XER=c0000000
+#10: divdeuo.: 0x000123456789abdc0000000000000000 / 0x0000000000000000 = 0x0000000000000000; CR=3; XER=c0000000
+#11: divdeuo.: 0x00000000000000000000000000000000 / 0x0000000000000002 = 0x0000000000000000; CR=2; XER=0
+#12: divdeuo.: 0x00000000000000770000000000000000 / 0x00000000000a3499 = 0x000ba911a321dcca; CR=4; XER=0
+
+
+#0: divwe: 0x0000000000000000 / 0x00000002 = 0x00000000; CR=0; XER=0
+#1: divwe: 0x0000000200000000 / 0x00000000 = 0x00000000; CR=0; XER=0
+#2: divwe: 0x7abc123400000000 / 0xf0000000 = 0x00000000; CR=0; XER=0
+#3: divwe: 0xfabc123400000000 / 0x00000005 = 0x00000000; CR=0; XER=0
+#4: divwe: 0x0000004d00000000 / 0x00000042 = 0x00000000; CR=0; XER=0
+#5: divwe: 0x0000000500000000 / 0xfabc1234 = 0xffffff0d; CR=0; XER=0
+
+#0: divwe.: 0x0000000000000000 / 0x00000002 = 0x00000000; CR=2; XER=0
+#1: divwe.: 0x0000000200000000 / 0x00000000 = 0x00000000; CR=2; XER=0
+#2: divwe.: 0x7abc123400000000 / 0xf0000000 = 0x00000000; CR=2; XER=0
+#3: divwe.: 0xfabc123400000000 / 0x00000005 = 0x00000000; CR=2; XER=0
+#4: divwe.: 0x0000004d00000000 / 0x00000042 = 0x00000000; CR=2; XER=0
+#5: divwe.: 0x0000000500000000 / 0xfabc1234 = 0xffffff0d; CR=4; XER=0
+
+
+#0: divweo: 0x0000000000000000 / 0x00000002 = 0x00000000; CR=0; XER=0
+#1: divweo: 0x0000000200000000 / 0x00000000 = 0x00000000; CR=0; XER=c0000000
+#2: divweo: 0x7abc123400000000 / 0xf0000000 = 0x00000000; CR=0; XER=c0000000
+#3: divweo: 0xfabc123400000000 / 0x00000005 = 0x00000000; CR=0; XER=c0000000
+#4: divweo: 0x0000004d00000000 / 0x00000042 = 0x00000000; CR=0; XER=c0000000
+#5: divweo: 0x0000000500000000 / 0xfabc1234 = 0xffffff0d; CR=0; XER=0
+
+#0: divweo.: 0x0000000000000000 / 0x00000002 = 0x00000000; CR=2; XER=0
+#1: divweo.: 0x0000000200000000 / 0x00000000 = 0x00000000; CR=3; XER=c0000000
+#2: divweo.: 0x7abc123400000000 / 0xf0000000 = 0x00000000; CR=3; XER=c0000000
+#3: divweo.: 0xfabc123400000000 / 0x00000005 = 0x00000000; CR=3; XER=c0000000
+#4: divweo.: 0x0000004d00000000 / 0x00000042 = 0x00000000; CR=3; XER=c0000000
+#5: divweo.: 0x0000000500000000 / 0xfabc1234 = 0xffffff0d; CR=4; XER=0
+
+
+Test ftsqrt instruction
+ftsqrt: 3fd8000000000000 ? 8 (CRx)
+ftsqrt: 404f000000000000 ? 8 (CRx)
+ftsqrt: 0018000000b77501 ? a (CRx)
+ftsqrt: 7fe800000000051b ? 8 (CRx)
+ftsqrt: 0123214569900000 ? a (CRx)
+ftsqrt: 0000000000000000 ? e (CRx)
+ftsqrt: 8000000000000000 ? e (CRx)
+ftsqrt: 7ff0000000000000 ? e (CRx)
+ftsqrt: fff0000000000000 ? e (CRx)
+ftsqrt: 7ff7ffffffffffff ? a (CRx)
+ftsqrt: fff7ffffffffffff ? a (CRx)
+ftsqrt: 7ff8000000000000 ? a (CRx)
+ftsqrt: fff8000000000000 ? a (CRx)
+ftsqrt: 8008340000078000 ? e (CRx)
+ftsqrt: c0d0650f5a07b353 ? a (CRx)
+ftsqrt: 41232585a9900000 ? 8 (CRx)
+ftsqrt: 41382511a2000000 ? 8 (CRx)
+ftsqrt: 40312ef5a9300000 ? 8 (CRx)
+ftsqrt: 40514bf5d2300000 ? 8 (CRx)
+ftsqrt: 40976bf982440000 ? 8 (CRx)
+
+Test vector and scalar tdiv and tsqrt instructions
+#0: xstsqrtdp test-sqrt(3fd8000000000000) ? 8 (CRx)
+#1: xstsqrtdp test-sqrt(404f000000000000) ? 8 (CRx)
+#2: xstsqrtdp test-sqrt(0018000000b77501) ? a (CRx)
+#3: xstsqrtdp test-sqrt(7fe800000000051b) ? 8 (CRx)
+#4: xstsqrtdp test-sqrt(0123214569900000) ? a (CRx)
+#5: xstsqrtdp test-sqrt(0000000000000000) ? e (CRx)
+#6: xstsqrtdp test-sqrt(8000000000000000) ? e (CRx)
+#7: xstsqrtdp test-sqrt(7ff0000000000000) ? e (CRx)
+#8: xstsqrtdp test-sqrt(fff0000000000000) ? e (CRx)
+#9: xstsqrtdp test-sqrt(7ff7ffffffffffff) ? a (CRx)
+#10: xstsqrtdp test-sqrt(fff7ffffffffffff) ? a (CRx)
+#11: xstsqrtdp test-sqrt(7ff8000000000000) ? a (CRx)
+#12: xstsqrtdp test-sqrt(fff8000000000000) ? a (CRx)
+#13: xstsqrtdp test-sqrt(8008340000078000) ? e (CRx)
+#14: xstsqrtdp test-sqrt(c0d0650f5a07b353) ? a (CRx)
+#15: xstsqrtdp test-sqrt(41232585a9900000) ? 8 (CRx)
+#16: xstsqrtdp test-sqrt(41382511a2000000) ? 8 (CRx)
+#17: xstsqrtdp test-sqrt(40312ef5a9300000) ? 8 (CRx)
+#18: xstsqrtdp test-sqrt(40514bf5d2300000) ? 8 (CRx)
+#19: xstsqrtdp test-sqrt(40976bf982440000) ? 8 (CRx)
+
+#0: xvtsqrtdp test-sqrt(3fd8000000000000); test-sqrt(404f000000000000) ? 8 (CRx)
+#1: xvtsqrtdp test-sqrt(0018000000b77501); test-sqrt(7fe800000000051b) ? a (CRx)
+#2: xvtsqrtdp test-sqrt(0123214569900000); test-sqrt(0000000000000000) ? e (CRx)
+#3: xvtsqrtdp test-sqrt(8000000000000000); test-sqrt(7ff0000000000000) ? e (CRx)
+#4: xvtsqrtdp test-sqrt(fff0000000000000); test-sqrt(7ff7ffffffffffff) ? e (CRx)
+#5: xvtsqrtdp test-sqrt(fff7ffffffffffff); test-sqrt(7ff8000000000000) ? a (CRx)
+#6: xvtsqrtdp test-sqrt(fff8000000000000); test-sqrt(8008340000078000) ? e (CRx)
+#7: xvtsqrtdp test-sqrt(c0d0650f5a07b353); test-sqrt(41232585a9900000) ? a (CRx)
+#8: xvtsqrtdp test-sqrt(41382511a2000000); test-sqrt(40312ef5a9300000) ? 8 (CRx)
+#9: xvtsqrtdp test-sqrt(40514bf5d2300000); test-sqrt(40976bf982440000) ? 8 (CRx)
+
+#0: xvtsqrtsp test-sqrt(3ec00000); test-sqrt(42780000); test-sqrt(00000000); test-sqrt(7f800000) ? e (CRx)
+#1: xvtsqrtsp test-sqrt(00000000); test-sqrt(00000000); test-sqrt(80000000); test-sqrt(7f800000) ? e (CRx)
+#2: xvtsqrtsp test-sqrt(ff800000); test-sqrt(7fffffff); test-sqrt(ffffffff); test-sqrt(7fc00000) ? e (CRx)
+#3: xvtsqrtsp test-sqrt(ffc00000); test-sqrt(80000000); test-sqrt(c683287b); test-sqrt(49192c2d) ? e (CRx)
+#4: xvtsqrtsp test-sqrt(49c1288d); test-sqrt(418977ad); test-sqrt(428a5faf); test-sqrt(44bb5fcc) ? 8 (CRx)
+
+#0: xvtdivdp fff0000000000000 test-div fff0000000000000 AND fff0000000000000 test-div c0d0650f5a07b353 ? cc=e
+#1: xvtdivdp 41232585a9900000 test-div 41382511a2000000 AND fff0000000000000 test-div 0000000000000000 ? cc=e
+#2: xvtdivdp fff0000000000000 test-div 0123214569900000 AND fff0000000000000 test-div 7ff0000000000000 ? cc=e
+#3: xvtdivdp fff0000000000000 test-div 7ff7ffffffffffff AND fff0000000000000 test-div 7ff8000000000000 ? cc=e
+#4: xvtdivdp c0d0650f5a07b353 test-div fff0000000000000 AND c0d0650f5a07b353 test-div c0d0650f5a07b353 ? cc=e
+#5: xvtdivdp c0d0650f5a07b353 test-div 8000000000000000 AND c0d0650f5a07b353 test-div 0000000000000000 ? cc=e
+#6: xvtdivdp c0d0650f5a07b353 test-div 0123214569900000 AND c0d0650f5a07b353 test-div 7ff0000000000000 ? cc=e
+#7: xvtdivdp c0d0650f5a07b353 test-div 7ff7ffffffffffff AND c0d0650f5a07b353 test-div 7ff8000000000000 ? cc=a
+#8: xvtdivdp 8000000000000000 test-div fff0000000000000 AND 8000000000000000 test-div c0d0650f5a07b353 ? cc=e
+#9: xvtdivdp 8000000000000000 test-div 8000000000000000 AND 8000000000000000 test-div 0000000000000000 ? cc=e
+#10: xvtdivdp 8000000000000000 test-div 0123214569900000 AND 8000000000000000 test-div 7ff0000000000000 ? cc=e
+#11: xvtdivdp 8000000000000000 test-div 7ff7ffffffffffff AND 8000000000000000 test-div 7ff8000000000000 ? cc=a
+#12: xvtdivdp 0000000000000000 test-div fff0000000000000 AND 0000000000000000 test-div c0d0650f5a07b353 ? cc=e
+#13: xvtdivdp 0000000000000000 test-div 8000000000000000 AND 0000000000000000 test-div 0000000000000000 ? cc=e
+#14: xvtdivdp 0000000000000000 test-div 0123214569900000 AND 0000000000000000 test-div 7ff0000000000000 ? cc=e
+#15: xvtdivdp 0000000000000000 test-div 7ff7ffffffffffff AND 0000000000000000 test-div 7ff8000000000000 ? cc=a
+#16: xvtdivdp 0123214569900000 test-div fff0000000000000 AND 0123214569900000 test-div c0d0650f5a07b353 ? cc=e
+#17: xvtdivdp 0123214569900000 test-div 8000000000000000 AND 0123214569900000 test-div 0000000000000000 ? cc=e
+#18: xvtdivdp 0123214569900000 test-div 404f000000000000 AND 0123214569900000 test-div 7ff0000000000000 ? cc=e
+#19: xvtdivdp 0123214569900000 test-div 7ff7ffffffffffff AND 0123214569900000 test-div 7ff8000000000000 ? cc=a
+#20: xvtdivdp 7ff0000000000000 test-div fff0000000000000 AND 7ff0000000000000 test-div c0d0650f5a07b353 ? cc=e
+#21: xvtdivdp 7ff0000000000000 test-div 8000000000000000 AND 7ff0000000000000 test-div 0000000000000000 ? cc=e
+#22: xvtdivdp 7ff0000000000000 test-div 0123214569900000 AND 7ff0000000000000 test-div 7ff0000000000000 ? cc=e
+#23: xvtdivdp 7ff0000000000000 test-div 7ff7ffffffffffff AND 7ff0000000000000 test-div 7ff8000000000000 ? cc=e
+#24: xvtdivdp fff7ffffffffffff test-div fff0000000000000 AND fff7ffffffffffff test-div c0d0650f5a07b353 ? cc=e
+#25: xvtdivdp fff8000000000000 test-div 8000000000000000 AND fff8000000000000 test-div 0000000000000000 ? cc=e
+#26: xvtdivdp fff7ffffffffffff test-div 0123214569900000 AND fff7ffffffffffff test-div 7ff0000000000000 ? cc=e
+#27: xvtdivdp fff7ffffffffffff test-div 7ff7ffffffffffff AND fff7ffffffffffff test-div 7ff8000000000000 ? cc=a
+#28: xvtdivdp fff8000000000000 test-div fff0000000000000 AND fff8000000000000 test-div c0d0650f5a07b353 ? cc=e
+#29: xvtdivdp fff8000000000000 test-div 8000000000000000 AND 41232585a9900000 test-div 41382511a2000000 ? cc=e
+#30: xvtdivdp 41232585a9900000 test-div 41382511a2000000 AND 7ff7ffffffffffff test-div 7ff8000000000000 ? cc=a
+#31: xvtdivdp 7ff8000000000000 test-div 7ff8000000000000 AND 7ff8000000000000 test-div fff8000000000000 ? cc=a
+#32: xvtdivdp 41382511a2000000 test-div 40514bf5d2300000 AND 40312ef5a9300000 test-div 41382511a2000000 ? cc=8
+#33: xvtdivdp 40976bf982440000 test-div 40976bf982440000 AND 40976bf982440000 test-div 40514bf5d2300000 ? cc=8
+
+#0: xvtdivsp ff800000 test-div ff800000 AND ff800000 test-div c683287b AND 49192c2d test-div 49c1288d AND ff800000 test-div 00000000 ? cc=e
+#1: xvtdivsp ff800000 test-div 00000000 AND ff800000 test-div 7f800000 AND ff800000 test-div 7fffffff AND ff800000 test-div 7fc00000 ? cc=e
+#2: xvtdivsp c683287b test-div ff800000 AND c683287b test-div c683287b AND c683287b test-div 80000000 AND c683287b test-div 00000000 ? cc=e
+#3: xvtdivsp c683287b test-div 00000000 AND c683287b test-div 7f800000 AND c683287b test-div 7fffffff AND c683287b test-div 7fc00000 ? cc=e
+#4: xvtdivsp 80000000 test-div ff800000 AND 80000000 test-div c683287b AND 80000000 test-div 80000000 AND 80000000 test-div 00000000 ? cc=e
+#5: xvtdivsp 80000000 test-div 00000000 AND 80000000 test-div 7f800000 AND 80000000 test-div 7fffffff AND 80000000 test-div 7fc00000 ? cc=e
+#6: xvtdivsp 00000000 test-div ff800000 AND 00000000 test-div c683287b AND 00000000 test-div 80000000 AND 00000000 test-div 00000000 ? cc=e
+#7: xvtdivsp 00000000 test-div 00000000 AND 00000000 test-div 7f800000 AND 00000000 test-div 7fffffff AND 00000000 test-div 7fc00000 ? cc=e
+#8: xvtdivsp 00000000 test-div ff800000 AND 00000000 test-div c683287b AND 00000000 test-div 80000000 AND 00000000 test-div 00000000 ? cc=e
+#9: xvtdivsp 00000000 test-div 42780000 AND 00000000 test-div 7f800000 AND 00000000 test-div 7fffffff AND 00000000 test-div 7fc00000 ? cc=e
+#10: xvtdivsp 7f800000 test-div ff800000 AND 7f800000 test-div c683287b AND 7f800000 test-div 80000000 AND 7f800000 test-div 00000000 ? cc=e
+#11: xvtdivsp 7f800000 test-div 00000000 AND 7f800000 test-div 7f800000 AND 7f800000 test-div 7fffffff AND 7f800000 test-div 7fc00000 ? cc=e
+#12: xvtdivsp ffffffff test-div ff800000 AND ffffffff test-div c683287b AND ffc00000 test-div 80000000 AND ffc00000 test-div 00000000 ? cc=e
+#13: xvtdivsp ffffffff test-div 00000000 AND ffffffff test-div 7f800000 AND ffffffff test-div 7fffffff AND ffffffff test-div 7fc00000 ? cc=e
+#14: xvtdivsp ffc00000 test-div ff800000 AND ffc00000 test-div c683287b AND ffc00000 test-div 80000000 AND 49192c2d test-div 49c1288d ? cc=e
+#15: xvtdivsp 49192c2d test-div 49c1288d AND 7fffffff test-div 7fc00000 AND 7fc00000 test-div 7fc00000 AND 7fc00000 test-div ffc00000 ? cc=a
+#16: xvtdivsp 49c1288d test-div 428a5faf AND 418977ad test-div 49c1288d AND 44bb5fcc test-div 44bb5fcc AND 44bb5fcc test-div 428a5faf ? cc=8
+
+Test popcntw instruction
+popcntw: 0x9182736405504536 => 0x0000000d0000000b
+
diff --git a/none/tests/ppc64/test_isa_2_06_part3.vgtest b/none/tests/ppc64/test_isa_2_06_part3.vgtest
new file mode 100644
index 00000000..3519c8a0
--- /dev/null
+++ b/none/tests/ppc64/test_isa_2_06_part3.vgtest
@@ -0,0 +1,2 @@
+prereq: ../../../tests/check_isa-2_06_cap
+prog: test_isa_2_06_part3