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path: root/drivers/gpu/drm/i915/i915_drv.h
AgeCommit message (Expand)AuthorFilesLines
2011-02-07drm: dumb scanout create/mmap for intel/radeon (v3)Dave Airlie1-0/+7
2011-01-24drm/i915,agp/intel: Do not clear stolen entriesChris Wilson1-1/+4
2011-01-13drm/i915: Add a module option to override the use of SSCChris Wilson1-0/+1
2011-01-11drm/i915/execbuffer: Reorder binding of objects to favour restrictionsChris Wilson1-0/+1
2011-01-11drm/i915: Record AGP memory type upon errorChris Wilson1-2/+3
2011-01-11drm/i915: Record the error batchbuffer on each ringChris Wilson1-1/+1
2011-01-11drm/i915: Propagate error from flushing the ringChris Wilson1-4/+4
2011-01-11drm/i915: cleanup rc6 codeJesse Barnes1-0/+1
2011-01-11drm/i915: Mask USER interrupts on gen6 (until required)Chris Wilson1-6/+0
2011-01-11drm/i915/panel: Only record the backlight level when it is enabledChris Wilson1-0/+1
2010-12-20drm/i915: Allow the application to choose the constant addressing modeChris Wilson1-0/+1
2010-12-18drm/i915: dynamic render p-state support for Sandy BridgeJesse Barnes1-0/+1
2010-12-16drm/i915: Add support for precise vblank timestamping (v2)Mario Kleiner1-0/+7
2010-12-09drm/i915: Terminate the FORCE WAKE after we have finished readingChris Wilson1-9/+12
2010-12-09drm/i915: Eliminate drm_gem_object_lookup during relocationChris Wilson1-0/+6
2010-12-05drm/i915: caps.has_rc6 is no longer used, remove it.Chris Wilson1-2/+0
2010-12-05drm/i915: Implement GPU semaphores for inter-ring synchronisation on SNBChris Wilson1-26/+22
2010-12-02drm/i915: Pipelined fencing [infrastructure]Chris Wilson1-4/+6
2010-12-02drm/i915: Prevent stalling for a GTT read back from a read-only GPU targetChris Wilson1-0/+6
2010-11-30drm/i915/ringbuffer: Handle cliprects in the callerChris Wilson1-2/+2
2010-11-25drm/i915: Avoid allocation for execbuffer object listChris Wilson1-8/+2
2010-11-25drm/i915: Split i915_gem_execbuffer into its own file.Chris Wilson1-0/+18
2010-11-25drm/i915: Defer accounting until read from debugfsChris Wilson1-9/+2
2010-11-25drm/i915: Mark a few functions as __must_checkChris Wilson1-35/+42
2010-11-24drm/i915: More accurately track last fence usage by the GPUChris Wilson1-5/+12
2010-11-23drm/i915: Thread the pipelining ring through the callers.Chris Wilson1-1/+1
2010-11-23drm/i915: Extend hangcheck timeoutChris Wilson1-1/+1
2010-11-23drm/i915: Move the implementation details of PIPE_CONTROL to the ringbufferChris Wilson1-3/+0
2010-11-23drm/i915: Record fence registers on error.Chris Wilson1-0/+1
2010-11-23drm/i915: Use drm_i915_gem_object as the preferred typeChris Wilson1-41/+43
2010-11-23drm/i915: no more agp for gemDaniel Vetter1-3/+6
2010-11-23drm/i915: move gtt handling to i915_gem_gtt.cDaniel Vetter1-0/+2
2010-11-23drm/i915: restore gtt on resume in the drm instead of in intel-gtt.koDaniel Vetter1-0/+3
2010-11-23drm/i915: track objects in the gttDaniel Vetter1-0/+4
2010-11-23agp/intel: Remove confusion of stolen entries not stolen memoryChris Wilson1-1/+1
2010-11-23drm/i915: Compute physical addresses from base of stolen memoryChris Wilson1-1/+1
2010-11-22drm/i915: Fix restore of 965 fence regs since the register tracing change.Keith Packard1-32/+36
2010-11-22drm/i915: Capture interesting display registers on errorChris Wilson1-0/+8
2010-11-22drm/i915: Capture pinned buffers on errorChris Wilson1-2/+2
2010-11-15Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson1-0/+2
2010-11-13drm/i915: Retire any pending operations on the old scanout when switchingChris Wilson1-0/+2
2010-11-11drm/i915/ringbuffer: set FORCE_WAKE bit before reading ring registerZou Nan hai1-81/+95
2010-11-11drm/i915: Remove the global irq wait queueChris Wilson1-1/+1
2010-11-08drm/i915: POSTING_READs are simply flushes and so irrelevant to tracingChris Wilson1-3/+5
2010-11-08drm/i915: Add untraced register read/write interfaceYuanhan Liu1-0/+5
2010-11-08drm/i915: trace down all the register write and readYuanhan Liu1-8/+53
2010-11-04drm/i915: kill mappable/fenceable disdinctionDaniel Vetter1-3/+7
2010-11-04Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson1-0/+1
2010-11-04drm/i915; Don't apply Ironlake FDI clock workaround to SandybridgeZhenyu Wang1-0/+1
2010-11-02Revert "drm/i915: add MMIO debug output"Chris Wilson1-28/+2
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