intel: implement picture structure.11.wayland_interlaced

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

8 files changed, 52 insertions, 9 deletions

diff --git a/include/GL/internal/dri_interface.h b/include/GL/internal/dri_interface.h
index 658566d665..1af222308f 100644
--- a/include/GL/internal/dri_interface.h
+++ b/include/GL/internal/dri_interface.h
@@ -924,6 +924,7 @@ struct __DRIdri2ExtensionRec {
  * by the driver (YUV planar formats) but serve as a base image for
  * creating sub-images for the different planes within the image.
  */
+#define __DRI_IMAGE_FORMAT_MASK         0x1fff
 #define __DRI_IMAGE_FORMAT_RGB565       0x1001
 #define __DRI_IMAGE_FORMAT_XRGB8888     0x1002
 #define __DRI_IMAGE_FORMAT_ARGB8888     0x1003
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 73ade0a153..482f13211a 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -261,6 +261,8 @@
 #define BRW_SURFACE_MIPMAPLAYOUT_BELOW   0
 #define BRW_SURFACE_MIPMAPLAYOUT_RIGHT   1
 #define BRW_SURFACE_CUBEFACE_ENABLES	0x3f
+#define BRW_SURFACE_VERT_LINE_STRIDE_SHIFT	12
+#define BRW_SURFACE_VERT_LINE_STRIDE_OFS_SHIFT	11
 #define BRW_SURFACE_BLEND_ENABLED	(1 << 13)
 #define BRW_SURFACE_WRITEDISABLE_B_SHIFT	14
 #define BRW_SURFACE_WRITEDISABLE_G_SHIFT	15
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 65ca2fc3f5..d7c94e108b 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -720,7 +720,7 @@ brw_update_texture_surface( struct gl_context *ctx, GLuint unit )
    struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
    const GLuint surf_index = SURF_INDEX_TEXTURE(unit);
    uint32_t *surf;
-   int width, height, depth;
+   int width, height, depth, vert_line_stride_ofs, vert_line_stride;
 
    if (tObj->Target == GL_TEXTURE_BUFFER) {
       brw_update_buffer_texture_surface(ctx, unit);
@@ -729,11 +729,31 @@ brw_update_texture_surface( struct gl_context *ctx, GLuint unit )
 
    intel_miptree_get_dimensions_for_image(firstImage, &width, &height, &depth);
 
+   /* Interlaced surface
+    * XXX: texture addrss control mode must be set to TEXCOORDMODE_CLAMP
+    * XXX: mip mode filter must be set to MIPFILTER_NONE
+    */
+   switch (mt->structure) {
+   case __DRI_IMAGE_STRUCTURE_BOTTOM_FIELD:
+      vert_line_stride_ofs = 1;
+      /* fall-through */
+   case __DRI_IMAGE_STRUCTURE_TOP_FIELD:
+      vert_line_stride = 1;
+      height /= 2;
+      break;
+   default:
+      vert_line_stride = 0;
+      vert_line_stride_ofs = 0;
+      break;
+   }
+
    surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
 			  6 * 4, 32, &brw->wm.surf_offset[surf_index]);
 
    surf[0] = (translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT |
 	      BRW_SURFACE_MIPMAPLAYOUT_BELOW << BRW_SURFACE_MIPLAYOUT_SHIFT |
+	      vert_line_stride << BRW_SURFACE_VERT_LINE_STRIDE_SHIFT |
+	      vert_line_stride_ofs << BRW_SURFACE_VERT_LINE_STRIDE_OFS_SHIFT |
 	      BRW_SURFACE_CUBEFACE_ENABLES |
 	      (translate_tex_format(mt->format,
 				    firstImage->InternalFormat,
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 62d2be8665..d4e0e56cf0 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -309,11 +309,22 @@ gen7_update_texture_surface(struct gl_context *ctx, GLuint unit)
 
    surf->ss0.is_array = depth > 1 && tObj->Target != GL_TEXTURE_3D;
 
+   /* Interlaced surface
+    * XXX: mip mode filter must be set to MIPFILTER_NONE
+    */
+   switch (mt->structure) {
+   case __DRI_IMAGE_STRUCTURE_BOTTOM_FIELD:
+      surf->ss0.vert_line_stride_ofs = 1;
+      /* fall-through */
+   case __DRI_IMAGE_STRUCTURE_TOP_FIELD:
+      surf->ss0.vert_line_stride = 1;
+      height /= 2;
+      break;
+   }
+
    gen7_set_surface_tiling(surf, intelObj->mt->region->tiling);
 
    /* ss0 remaining fields:
-    * - vert_line_stride (exists on gen6 but we ignore it)
-    * - vert_line_stride_ofs (exists on gen6 but we ignore it)
     * - surface_array_spacing
     * - render_cache_read_write (exists on gen6 but ignored here)
     */
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index 53bc23f2d0..caa4af284d 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -254,6 +254,7 @@ intel_miptree_create(struct intel_context *intel,
 				   mt->total_height,
 				   expect_accelerated_upload);
    mt->offset = 0;
+   mt->structure = 0;
 
    if (!mt->region) {
        intel_miptree_release(&mt);
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
index cfd671ea00..f36e9b1b61 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
@@ -247,6 +247,10 @@ struct intel_mipmap_tree
     */
    uint32_t offset;
 
+   /* Texture structure:
+    */
+   uint32_t structure;
+
    /**
     * \brief HiZ miptree
     *
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index e8a4ad13f4..013e8b0e2f 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -188,7 +188,7 @@ intel_allocate_image(int dri_format, void *loaderPrivate)
     image->dri_format = dri_format;
     image->offset = 0;
 
-    switch (dri_format) {
+    switch (dri_format & __DRI_IMAGE_FORMAT_MASK) {
     case __DRI_IMAGE_FORMAT_RGB565:
        image->format = MESA_FORMAT_RGB565;
        break;
@@ -356,7 +356,7 @@ intel_query_image(__DRIimage *image, int attrib, int *value)
    case __DRI_IMAGE_ATTRIB_NAME:
       return intel_region_flink(image->region, (uint32_t *) value);
    case __DRI_IMAGE_ATTRIB_FORMAT:
-      *value = image->dri_format;
+      *value = image->dri_format & __DRI_IMAGE_FORMAT_MASK;
       return true;
    case __DRI_IMAGE_ATTRIB_WIDTH:
       *value = image->region->width;
@@ -468,7 +468,7 @@ intel_create_sub_image(__DRIimage *parent,
 }
 
 static struct __DRIimageExtensionRec intelImageExtension = {
-    { __DRI_IMAGE, 5 },
+    { __DRI_IMAGE, 6 },
     intel_create_image_from_name,
     intel_create_image_from_renderbuffer,
     intel_destroy_image,
diff --git a/src/mesa/drivers/dri/intel/intel_tex_image.c b/src/mesa/drivers/dri/intel/intel_tex_image.c
index a023fef563..750937bd28 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_image.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_image.c
@@ -243,7 +243,7 @@ intel_set_texture_image_region(struct gl_context *ctx,
 			       GLenum target,
 			       GLenum internalFormat,
 			       gl_format format,
-                               uint32_t offset)
+                               uint32_t offset, uint32_t structure)
 {
    struct intel_context *intel = intel_context(ctx);
    struct intel_texture_image *intel_image = intel_texture_image(image);
@@ -263,6 +263,7 @@ intel_set_texture_image_region(struct gl_context *ctx,
        return;
 
    intel_image->mt->offset = offset;
+   intel_image->mt->structure = structure;
    intel_image->base.RowStride = region->pitch;
 
    /* Immediately validate the image to the object. */
@@ -318,7 +319,7 @@ intelSetTexBuffer2(__DRIcontext *pDRICtx, GLint target,
    _mesa_lock_texture(&intel->ctx, texObj);
    texImage = _mesa_get_tex_image(ctx, texObj, target, level);
    intel_set_texture_image_region(ctx, texImage, rb->mt->region, target,
-				  internalFormat, texFormat, 0);
+				  internalFormat, texFormat, 0, 0);
    _mesa_unlock_texture(&intel->ctx, texObj);
 }
 
@@ -341,6 +342,7 @@ intel_image_target_texture_2d(struct gl_context *ctx, GLenum target,
    struct intel_context *intel = intel_context(ctx);
    __DRIscreen *screen;
    __DRIimage *image;
+   uint32_t structure;
 
    screen = intel->intelScreen->driScrnPriv;
    image = screen->dri2.image->lookupEGLImage(screen, image_handle,
@@ -348,9 +350,11 @@ intel_image_target_texture_2d(struct gl_context *ctx, GLenum target,
    if (image == NULL)
       return;
 
+   structure = image->dri_format & __DRI_IMAGE_STRUCTURE_MASK;
    intel_set_texture_image_region(ctx, texImage, image->region,
 				  target, image->internal_format,
-                                  image->format, image->offset);
+                                  image->format, image->offset,
+                                  structure);
 }
 #endif