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path: root/src/gallium/drivers/r600/r600_asm.h
AgeCommit message (Expand)AuthorFilesLines
2014-02-05r600g/bc: add support for indexed memory writes.Dave Airlie1-0/+1
2014-02-05r600g: move barrier and end_of_program bits from output to cf struct (v2)Vadim Girlin1-2/+2
2013-06-28r600g/compute: Accept LDS size from the LLVM backendTom Stellard1-0/+1
2013-05-15r600g: cleanup MSAA texture support checkingMarek Olšák1-2/+2
2013-04-30r600g: plug in optimizing backendVadim Girlin1-0/+1
2013-04-02r600g: don't reserve more stack space than required v5Vadim Girlin1-8/+16
2013-04-01r600g/llvm: Add support for cf_alu native encodeVincent Lejeune1-0/+1
2013-03-11r600g: remove bytecode dumpingMarek Olšák1-1/+0
2013-02-01r600g: implement shader disassembler v3Vadim Girlin1-0/+1
2013-02-01r600g: use tables with ISA info v3Vadim Girlin1-29/+33
2013-01-28r600g: Add ar_chan member to struct r600_bytecodeTom Stellard1-0/+1
2013-01-11r600g: texture buffer object + glsl 1.40 enable support (v2)Dave Airlie1-0/+2
2012-12-16r600g: fixup offset types for printingDave Airlie1-3/+3
2012-11-02r600g: make tgsi-to-llvm generates store.pixel* intrinsic for fsVincent Lejeune1-0/+2
2012-10-29r600g: implement texturing with 8x MSAA compressed surfaces for EvergreenMarek Olšák1-1/+6
2012-10-12r600g: move shader structures into r600_shader.hMarek Olšák1-3/+1
2012-10-10r600g: atomize fetch shaderMarek Olšák1-2/+3
2012-09-19radeon/llvm: Emit ISA for ALU instructions in the R600 code emitterMichal Sciubidlo1-0/+2
2012-08-15r600g: Add support for predicatesVincent Lejeune1-1/+3
2012-05-02r600g: Add FC_NATIVE instructionTom Stellard1-0/+9
2012-03-05r600g: cleanup includesMarek Olšák1-0/+2
2012-01-31r600g: merge r600_context with r600_pipe_contextMarek Olšák1-2/+2
2012-01-31r600g: remove u8,u16,u32,u64 typesMarek Olšák1-3/+3
2012-01-21r600g: improve kcache line sets handling v2Vadim Girlin1-1/+3
2012-01-20r600g: fixup AR handling (v5)Dave Airlie1-1/+8
2011-12-17r600g: implement transform feedbackMarek Olšák1-0/+2
2011-11-15r600g: fix the representation of control-flow instructionsMarek Olšák1-0/+6
2011-11-13r600g: lazy load for AR registerVadim Girlin1-0/+2
2011-08-16r600g: rename bc -> bytecodeMarek Olšák1-35/+35
2011-08-16r600g: cleanup includes in winsysMarek Olšák1-2/+0
2011-07-09r600g: Store the chip class directly in r600_bc.Henri Verbeet1-2/+1
2011-07-09r600g: Replace the CHIPREV_* defines with the chip_class enum.Henri Verbeet1-1/+1
2011-05-25r600g: add initial cayman acceleration support.Dave Airlie1-0/+2
2011-04-19r600g: add big endian support for r6xx/r7xxCédric Cano1-0/+1
2011-03-14r600g: Move fetch shader register setup to r600_state.c / evergreen_state.c.Henri Verbeet1-1/+0
2011-03-09r600g: split R600 and R700 CF generation for VTX and TEXChristian König1-0/+1
2011-02-28r600g: implement instanced drawing supportChristian König1-1/+2
2011-02-07r600g: Split r600_bc_alu_src.Henri Verbeet1-1/+1
2011-02-07r600g: Store literal values in the r600_bc_alu_src structure.Henri Verbeet1-1/+1
2011-02-03r600g: Make some more things static.Henri Verbeet1-1/+0
2011-02-03r600g: Get rid of the unused r600_cf_vtx_tc() function.Henri Verbeet1-1/+0
2011-02-02r600g: use burst exports in shadersChristian König1-0/+1
2011-01-13r600g: rework literal handlingChristian König1-4/+2
2011-01-13r600g: merge alu groupsChristian König1-0/+1
2011-01-13r600g: implement replacing gpr with pv and psChristian König1-1/+1
2011-01-13r600g: rework bank swizzle codeChristian König1-4/+0
2011-01-12r600g: implement output modifiers and use them to further optimize LRPChristian König1-0/+1
2011-01-07r600g: Store kcache settings as an array.Henri Verbeet1-6/+7
2010-12-06r600g: build fetch shader from vertex elementsJerome Glisse1-0/+8
2010-12-03r600g: dump raw shader output for debuggingJerome Glisse1-0/+1
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