| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2016-05-06 | [mips] Correct the ordering of HI/LO pairs in the relocation table. | Daniel Sanders | 1 | -109/+382 |
| 2016-05-06 | [mips][microMIPS] Add CodeGen support for MUL* and DMUL* instructions | Zlatko Buljan | 2 | -0/+16 |
| 2016-05-05 | [Hexagon] Add aliases for vector loads/stores with no explicit offset | Krzysztof Parzyszek | 1 | -0/+61 |
| 2016-05-05 | AMDGPU/SI: Add support for AMD code object version 2. | Tom Stellard | 2 | -23/+14 |
| 2016-05-05 | Fix Mips Parser error reporting | Nirav Dave | 1 | -1/+8 |
| 2016-05-04 | [mips][ias] Only round section sizes when explicitly requested. | Daniel Sanders | 1 | -2/+2 |
| 2016-05-04 | [mips][microMIPS] Add CodeGen support for microMIPSr6 ROTR and ROTRV and add ... | Zlatko Buljan | 12 | -0/+111 |
| 2016-05-03 | [mips] Use MipsMCExpr instead of MCSymbolRefExpr for all relocations. | Daniel Sanders | 12 | -134/+134 |
| 2016-05-02 | [MC] Create unique .pdata sections for every .text section | Reid Kleckner | 2 | -5/+157 |
| 2016-05-01 | [AVX512] VPACKUSWB/VPACKSSWB should not be encoded with EVEX.W=1. While there... | Craig Topper | 2 | -198/+198 |
| 2016-04-29 | [AMDGPU][llvm-mc] Add some missing testcases to trap.s | Artem Tamazov | 1 | -0/+25 |
| 2016-04-29 | Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rewor... | Artem Tamazov | 3 | -0/+108 |
| 2016-04-29 | [mips][ias] Move createCpRestoreMemOp to MipsTargetStreamer. NFC. | Daniel Sanders | 1 | -4/+20 |
| 2016-04-29 | [mips][ias] Split expandMemInst between MipsAsmParser and MipsTargetStreamer.... | Daniel Sanders | 2 | -2/+2 |
| 2016-04-29 | [mips][ias] Make section sizes a multiple of the alignment. | Daniel Sanders | 1 | -0/+106 |
| 2016-04-29 | AMDGPU/SI: Assembler: Unify parsing/printing of operands. | Nikolay Haustov | 4 | -143/+142 |
| 2016-04-29 | [mips][microMIPS] Fix offsets for LLE, LWE, SBE, SCE and SHE instructions | Zlatko Buljan | 6 | -7/+122 |
| 2016-04-28 | This reverts commit r265505. | Kit Barton | 3 | -111/+0 |
| 2016-04-28 | [Hexagon] Add instruction aliases for vector unsigned compare-equal | Krzysztof Parzyszek | 1 | -0/+36 |
| 2016-04-28 | [Hexagon] Define certain aliases for vector instructions | Krzysztof Parzyszek | 1 | -0/+10 |
| 2016-04-28 | [Hexagon] Handle double-vector registers as new-value producers | Krzysztof Parzyszek | 1 | -0/+12 |
| 2016-04-27 | [Hexagon] Merging nops in to previous packet rather than always creating a ne... | Colin LeMahieu | 1 | -0/+60 |
| 2016-04-27 | Revert "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for ... | Chad Rosier | 3 | -107/+0 |
| 2016-04-27 | [AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD. | Artem Tamazov | 3 | -0/+107 |
| 2016-04-27 | [AMDGPU][llvm-mc] s_getreg/setreg* - Support symbolic names of hardware regis... | Artem Tamazov | 3 | -22/+59 |
| 2016-04-27 | [mips][microMIPS] Add CodeGen support for SUBU16, SUB, SUBU, DSUB and DSUBU i... | Zlatko Buljan | 3 | -0/+16 |
| 2016-04-27 | [mips][microMIPS] Add CodeGen support for SLL16, SRL16, SLL, SLLV, SRA, SRAV,... | Zlatko Buljan | 8 | -0/+95 |
| 2016-04-26 | Reapply: "ARM: put correct symbol index on indirect pointers in __thread_ptr."" | Tim Northover | 1 | -1/+5 |
| 2016-04-26 | [AMDGPU] Assembler: basic support for SDWA instructions | Sam Kolton | 1 | -0/+40 |
| 2016-04-26 | Revert "ARM: put correct symbol index on indirect pointers in __thread_ptr." | Renato Golin | 1 | -5/+1 |
| 2016-04-25 | ARM: put correct symbol index on indirect pointers in __thread_ptr. | Tim Northover | 1 | -1/+5 |
| 2016-04-25 | ARM: put extern __thread stubs in a special section. | Tim Northover | 1 | -0/+46 |
| 2016-04-25 | [Hexagon] Use llvm-mc instead of llc in an MC testcase | Krzysztof Parzyszek | 1 | -0/+9 |
| 2016-04-25 | [Hexagon] Use llvm-mc instead of llc in an MC testcase | Krzysztof Parzyszek | 1 | -9/+0 |
| 2016-04-25 | [mips][microMIPS] Revert commit r267137 | Hrvoje Varga | 2 | -8/+0 |
| 2016-04-25 | [mips][microMIPS] Revert commit r266977 | Zlatko Buljan | 12 | -111/+0 |
| 2016-04-25 | [AMDGPU][llvm-mc] s_getreg/setreg* - Add hwreg(...) syntax. | Artem Tamazov | 3 | -11/+55 |
| 2016-04-25 | [Hexagon] Correctly set "Flags" in ELF header | Krzysztof Parzyszek | 1 | -0/+9 |
| 2016-04-24 | [MC/ELF] Make the relaxation test more interesting. | Davide Italiano | 1 | -0/+2 |
| 2016-04-24 | [MC/ELF] Implement support for GOTPCRELX/REX_GOTPCRELX. | Davide Italiano | 1 | -0/+18 |
| 2016-04-22 | CodeGen: Use PLT relocations for relative references to unnamed_addr functions. | Peter Collingbourne | 2 | -5/+8 |
| 2016-04-22 | [mips][microMIPS] Revert commit r266861. | Zoran Jovanovic | 6 | -26/+7 |
| 2016-04-22 | [Hexagon] Add definitions for trap/pause instructions | Krzysztof Parzyszek | 1 | -0/+36 |
| 2016-04-22 | AMDGPU/SI: Add test missed in rL266865 | Nikolay Haustov | 1 | -0/+55 |
| 2016-04-22 | [mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions | Hrvoje Varga | 2 | -0/+8 |
| 2016-04-22 | [mips][microMIPS] Add R_MICROMIPS_PC18_S3 relocation | Zoran Jovanovic | 2 | -0/+9 |
| 2016-04-22 | [mips][microMIPS] Implement DVP, EVP and JALRC.HB instructions | Zlatko Buljan | 6 | -0/+36 |
| 2016-04-21 | MachO: enable .data_region directives everywhere | Tim Northover | 3 | -107/+96 |
| 2016-04-21 | [Hexagon] Properly recognize register alt names | Krzysztof Parzyszek | 1 | -0/+14 |
| 2016-04-21 | [mips][microMIPS] Implement ldpc instruction | Zoran Jovanovic | 2 | -0/+2 |
