| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2016-05-19 | [llvm-mc] - Teach llvm-mc to generate compressed debug sections in zlib style. | George Rimar | 1 | -5/+11 |
| 2016-05-19 | [AMDGPU][llvm-mc] Fixes to support buffer atomics. | Artem Tamazov | 3 | -1/+325 |
| 2016-05-19 | ps][microMIPS] Add R_MICROMIPS_PC21_S1 relocation | Zoran Jovanovic | 2 | -0/+20 |
| 2016-05-19 | [mips][microMIPS] Implement BC1EQZC, BC1NEZC, BC2EQZC and BC2NEZC instructions | Zlatko Buljan | 6 | -0/+56 |
| 2016-05-18 | [x86] add test for immediate comment formatting | Sanjay Patel | 1 | -0/+26 |
| 2016-05-18 | Add new flag and intrinsic support for MWAITX and MONITORX instructions | Ashutosh Nema | 2 | -0/+12 |
| 2016-05-18 | Don't pass a Reloc::Model to MC. | Rafael Espindola | 6 | -21/+21 |
| 2016-05-18 | [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add CodeGe... | Zlatko Buljan | 9 | -0/+96 |
| 2016-05-18 | Don't pass relocation-model= to tests that don't need it. | Rafael Espindola | 7 | -11/+11 |
| 2016-05-17 | [ARM] ARM mov InstAlias for MOVW lacks HasV6T2 | Renato Golin | 1 | -0/+5 |
| 2016-05-17 | [mips][microMIPS] Implement BEQZC and BNEZC instructions | Zoran Jovanovic | 2 | -0/+4 |
| 2016-05-17 | [mips][microMIPS][DSP] Implement BALIGN, BITREV, BPOSGE32, CMP*, CMPGDU*, CMP... | Zlatko Buljan | 10 | -0/+65 |
| 2016-05-16 | [SystemZ] Support LRVH and STRVH opcodes | Bryan Chan | 2 | -0/+104 |
| 2016-05-16 | [Sparc][LEON] Add LEON-specific CASA instruction. | Chris Dewhurst | 1 | -2/+10 |
| 2016-05-16 | [mips][ias] Fix R_MICROMIPS_GOT16 evaluation and eliminate symbol for R_MICRO... | Daniel Sanders | 1 | -1/+80 |
| 2016-05-16 | [mips][ias] EF_MIPS_MICROMIPS should iff microMIPS code was emitted. | Daniel Sanders | 2 | -1/+17 |
| 2016-05-16 | [mips] Addition of a third operand to the instructions [d]div, [d]divu | Zoran Jovanovic | 8 | -34/+192 |
| 2016-05-13 | add support for -print-imm-hex for AArch64 | Paul Osmialowski | 9 | -330/+330 |
| 2016-05-13 | [mips][ias] Work around yet another incorrect microMIPS relocation evaluation... | Daniel Sanders | 1 | -1/+3 |
| 2016-05-13 | [mips][microMIPS] Implement APPEND, BPOSGE32C, MODSUB, MULSA.W.PH and MULSAQ_... | Hrvoje Varga | 7 | -0/+21 |
| 2016-05-12 | [ARM] Support and tests for transform of LDR rt, = to MOV | Renato Golin | 5 | -8/+325 |
| 2016-05-12 | [ARM] Fixup tests to take into account mov translation. NFC. | Renato Golin | 5 | -54/+54 |
| 2016-05-12 | [mips][ias] Fix O32 .cprestore directive when inside .set noat region and off... | Daniel Sanders | 1 | -1/+20 |
| 2016-05-12 | [mips][ias] Work around incorrect another microMIPS relocation evaluation exp... | Daniel Sanders | 1 | -0/+9 |
| 2016-05-12 | Revert "[mips][microMIPS] Implement CFC*, CTC* and LDC* instructions" | Hrvoje Varga | 6 | -26/+7 |
| 2016-05-12 | [mips][ias] Correct ELF eflags when Octeon is the target. | Daniel Sanders | 2 | -12/+31 |
| 2016-05-12 | [mips][ias] Handle N64 compound relocations and R_MIPS_SUB in needsRelocateWi... | Daniel Sanders | 2 | -10/+45 |
| 2016-05-11 | [mips][ias] Work around incorrect microMIPS relocation evaluation exposed by ... | Daniel Sanders | 1 | -0/+20 |
| 2016-05-11 | [mips][ias] Fix N32 and N64 .cprestore directive when inside .set noat region. | Daniel Sanders | 1 | -0/+36 |
| 2016-05-11 | [mips][microMIPS] Implement CFC*, CTC* and LDC* instructions | Hrvoje Varga | 6 | -7/+26 |
| 2016-05-11 | [mips][micromips] Implement DSBH, DSHD, DSLL, DSLL32, DSLLV, DSRA, DSRA32 and... | Hrvoje Varga | 3 | -0/+23 |
| 2016-05-10 | ARM: report an error when attempting to target a misalgined BLX | Tim Northover | 2 | -0/+74 |
| 2016-05-10 | [SystemZ] Add support for additional branch extended mnemonics | Kit Barton | 2 | -0/+108 |
| 2016-05-10 | [mips][ias] Make the default path unreachable in needsRelocateWithSymbol() (e... | Daniel Sanders | 1 | -6/+6 |
| 2016-05-09 | [Hexagon] Treat all conditional branches as predicted (not-taken by default) | Krzysztof Parzyszek | 2 | -2/+16 |
| 2016-05-09 | [Sparc][LEON] Add UMAC and SMAC instruction support for Sparc LEON subtargets | Chris Dewhurst | 1 | -0/+12 |
| 2016-05-09 | [mips][ias] R_MIPS_(GOT|HI|LO|PC)16 and R_MIPS_GPREL32 do not need symbols. | Daniel Sanders | 3 | -43/+101 |
| 2016-05-09 | [mips][microMIPS] Implement LWP and SWP instructions | Zlatko Buljan | 7 | -0/+32 |
| 2016-05-06 | [AMDGPU][llvm-mc] Add support for sendmsg(...) syntax. | Artem Tamazov | 3 | -4/+175 |
| 2016-05-06 | [mips] Fix inconsistent .cprestore behaviour between direct object emission a... | Daniel Sanders | 1 | -0/+12 |
| 2016-05-06 | [mips] Correct the ordering of HI/LO pairs in the relocation table. | Daniel Sanders | 1 | -109/+382 |
| 2016-05-06 | [mips][microMIPS] Add CodeGen support for MUL* and DMUL* instructions | Zlatko Buljan | 2 | -0/+16 |
| 2016-05-05 | [Hexagon] Add aliases for vector loads/stores with no explicit offset | Krzysztof Parzyszek | 1 | -0/+61 |
| 2016-05-05 | AMDGPU/SI: Add support for AMD code object version 2. | Tom Stellard | 2 | -23/+14 |
| 2016-05-05 | Fix Mips Parser error reporting | Nirav Dave | 1 | -1/+8 |
| 2016-05-04 | [mips][ias] Only round section sizes when explicitly requested. | Daniel Sanders | 1 | -2/+2 |
| 2016-05-04 | [mips][microMIPS] Add CodeGen support for microMIPSr6 ROTR and ROTRV and add ... | Zlatko Buljan | 12 | -0/+111 |
| 2016-05-03 | [mips] Use MipsMCExpr instead of MCSymbolRefExpr for all relocations. | Daniel Sanders | 12 | -134/+134 |
| 2016-05-02 | [MC] Create unique .pdata sections for every .text section | Reid Kleckner | 2 | -5/+157 |
| 2016-05-01 | [AVX512] VPACKUSWB/VPACKSSWB should not be encoded with EVEX.W=1. While there... | Craig Topper | 2 | -198/+198 |
