summaryrefslogtreecommitdiff
path: root/test/CodeGen/X86
AgeCommit message (Collapse)AuthorFilesLines
2016-05-24Rework/enhance stack coloring data flow analysis.Than McIntosh2-2/+117
Replace bidirectional flow analysis to compute liveness with forward analysis pass. Treat lifetimes as starting when there is a first reference to the stack slot, as opposed to starting at the point of the lifetime.start intrinsic, so as to increase the number of stack variables we can overlap. Reviewers: gbiv, qcolumbet, wmi Differential Revision: http://reviews.llvm.org/D18827 Bug: 25776 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270559 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-24[X86][SSE] Added vector sitofp/uitofp folded load testsSimon Pilgrim1-0/+1641
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270558 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-24[llvm][AVX512][intrinsics] Fix vperm{b|w|d|q|ps|pd} intrinsics. Index is ↵Igor Breger6-63/+63
second argument to buildin function but it is first instruction operand. Differential Revision: http://reviews.llvm.org/D20515 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270548 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23[X86][SSE] Updated (V)CVTDQ2PD(Y) and (V)CVTPS2PD(Y) fast-isel codegen to ↵Simon Pilgrim2-8/+6
match D20528 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270501 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23[X86][SSE] Added cvtdq2pd/cvtps2pd generic IR testsSimon Pilgrim2-0/+51
Added D20528 implementations as well as existing x86 intrinsics versions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270494 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23[X86][SSE] Use shuffle/sext instead of deprecated (+ auto-upgraded) pmovsxwd ↵Simon Pilgrim1-5/+4
intrinsic call git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270489 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23[X86][RTM] _xabort() should not have "noreturn" attributeAsaf Badouh1-2/+16
Differential Revision: http://reviews.llvm.org/D20518 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270437 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23[X86][AVX] Added tests that access ymm registers before and after explicit ↵Simon Pilgrim1-6/+60
vzeroupper/vzeroall calls git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270434 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23[X86][SSE] Regenerated scalar load folding testsSimon Pilgrim1-22/+46
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270431 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23[X86][SSE] Regenerated partial register update testsSimon Pilgrim1-38/+46
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270430 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23[X86][SSE] Updated sse/avx cvtsi2sd tests to use non-constant valueSimon Pilgrim2-14/+10
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270425 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23[X86][SSE2] Regenerated sse2 upgraded intrinsics testsSimon Pilgrim1-5/+18
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270423 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23[X86][AVX] Regenerated avx upgraded intrinsics testsSimon Pilgrim1-41/+77
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270422 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22[AVX512] Add patterns to implement stores of extracts of least signficant ↵Craig Topper1-1/+217
subvectors using XMM or YMM stores instead of the vector extract instructions. Similar is already done for AVX and we had lost it going to AVX512VL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270383 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22[X86][SSE] Added extra i8 extract element testSimon Pilgrim1-0/+20
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270379 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22[x86, AVX] don't add a vzeroupper if that's what the code is already doing ↵Sanjay Patel2-6/+0
(PR27823) This isn't the complete fix, but it handles the trivial examples of duplicate vzero* ops in PR27823: https://llvm.org/bugs/show_bug.cgi?id=27823 ...and amusingly, the bogus cases already exist as regression tests, so let's take this baby step. We'll need to do more in the general case where there's legitimate AVX usage in the function + there's already a vzero in the code. Differential Revision: http://reviews.llvm.org/D20477 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270378 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22[x86, AVX] add test file to show vzeroupper pass excessesSanjay Patel1-0/+43
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270375 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22[AVX512] Implement missing patterns for any_extend load lowering.Igor Breger1-0/+70
Differential Revision: http://reviews.llvm.org/D20513 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270357 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22[AVX512] Add an AddedComplexity line to the 512-bit insert_subvector undef ↵Craig Topper1-14/+14
index 0 patterns. This gives them higher priority than the memory patterns. This matches AVX1/2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270355 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22[X86] Add a common check-prefix to both run lines on a test so identical ↵Craig Topper1-361/+168
checks appear just once. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270345 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22[AVX512] Add a couple patterns to fix some cases where two vector mask ↵Craig Topper1-12/+4
inversions could appear in a row. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270344 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21[AVX512] Add patterns for extracting subvectors and storing to memory.Craig Topper2-6/+84
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270334 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21[Clang][AVX512][intrinsics] Fix rcp and sqrt intrinsics.Michael Zuckerman2-20/+42
Differential Revision: http://reviews.llvm.org/D20438 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270322 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21[Clang][AVX512][intrinsics] Fix vscalef intrinsics.Michael Zuckerman3-35/+26
Differential Revision: http://reviews.llvm.org/D20324 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270321 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21[AVX512] Add patterns for VEXTRACT v16i16->v8i16 and v32i8->v16i8. Disable ↵Craig Topper4-19/+25
AVX2 versions of vector extract when AVX512VL is enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270318 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21[AVX512] Disable AVX2 VPERMD, VPERMQ, VPERMPS, and VPERMPD patterns when ↵Craig Topper1-4/+4
AVX512VL is enabled. Also add shuffle comment printing for AVX512VL VPERMPD/VPERMQ to keep some tests that now use these instructions instead of the AVX2 ones. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270317 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21[AVX512] Disable AVX/AVX2 VBROADCASTSS/VBROADCASTSD patterns when AVX512VL ↵Craig Topper1-3/+3
is enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270316 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21[AVX512] Use update_llc_test_checks to update some tests so we can see all ↵Craig Topper3-4415/+7909
the instruction encodings and ensure everything is with EVEX. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270315 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21[AVX512] Fix test cases I missed in r270311.Craig Topper1-4/+4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270313 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20[X86][AVX] Generalized matching for target shuffle combinesSimon Pilgrim2-34/+15
This patch is a first step towards a more extendible method of matching combined target shuffle masks. Initially this just pulls out the existing basic mask matches and adds support for some 256/512 bit equivalents. Future patterns will require a number of features to be added but I wanted to keep this patch simple. I hope we can avoid duplication between shuffle lowering and combining and share more complex pattern match functions in future commits. Differential Revision: http://reviews.llvm.org/D19198 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270230 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20[X86][AVX] Sync with clang/test/CodeGen/avx-builtins.cSimon Pilgrim1-211/+3303
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270229 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20Refactor X86 symbol access classification.Rafael Espindola1-1/+2
This refactors the logic in X86 to avoid code duplication. It also splits it in two steps: it first decides if a symbol is local to the DSO and then uses that information to decide how to access it. The first part is implemented by shouldAssumeDSOLocal. It is not in any way specific to X86. In a followup patch I intend to move it to somewhere common and reused it in other backends. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270209 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20[X86] Run the AVX/AVX2 intrinsic tests in AVX512VL mode too just to make ↵Craig Topper3-1901/+4168
sure we don't break any older intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270183 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20Revert accidental commit of a test command line addition.Craig Topper1-1/+0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270175 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20[X86] Fix some AVX patterns to only be disabled if VLX and BWI are ↵Craig Topper1-0/+1
supported. Without this we get isel failures on the avx-intrinsics-x86.ll test in AVX512VL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270174 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-19X86: Don't reset the stack after calls that don't return (PR27117)Hans Wennborg1-0/+48
Since the calls don't return, the instruction afterwards will never run, and is just taking up unnecessary space in the binary. Differential Revision: http://reviews.llvm.org/D20406 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270109 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-19[x86] add tests for urem loweringSanjay Patel1-0/+80
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270096 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-19[X86][SSE] Added fast-isel tests to sync with clang/test/CodeGen/sse-builtins.cSimon Pilgrim2-0/+2315
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270081 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-19[X86][SSE2] Fixed shuffle of results in _mm_cmpnge_sd/_mm_cmpngt_sd testsSimon Pilgrim1-8/+16
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270080 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-19[X86][SSE2] Added _mm_move_* testsSimon Pilgrim1-0/+31
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270046 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-19[X86][SSE2] Added _mm_cast* and _mm_set* testsSimon Pilgrim1-0/+720
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270041 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-19[X86] Enable RRL part of the LEA optimization pass for -O2.Andrey Turetskiy1-20/+39
Enable "Remove Redundant LEAs" part of the LEA optimization pass for -O2. This gives 6.4% performance improve on Broadwell on nnet benchmark from Coremark-pro. There is no significant effect on other benchmarks (Geekbench, Spec2000, Spec2006). Differential Revision: http://reviews.llvm.org/D19659 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270036 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-18[X86][SSE2] Added fast-isel tests to sync with ↵Simon Pilgrim2-0/+3116
clang/test/CodeGen/sse2-builtins.c git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269966 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-18Re-commit r269828 "X86: Avoid using _chkstk when lowering WIN_ALLOCA ↵Hans Wennborg8-16/+171
instructions" with an additional fix to make RegAllocFast ignore undef physreg uses. It would previously get confused about the "push %eax" instruction's use of eax. That method for adjusting the stack pointer is used in X86FrameLowering::emitSPUpdate as well, but since that runs after register-allocation, we didn't run into the RegAllocFast issue before. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269949 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-18[X86][SSE42] Added fast-isel tests to sync with ↵Simon Pilgrim2-0/+411
clang/test/CodeGen/sse42-builtins.c git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269929 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-18[X86][SSE41] Sync with clang/test/CodeGen/sse41-builtins.cSimon Pilgrim1-39/+39
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269925 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-18[X86][SSE3] Sync with clang/test/CodeGen/sse3-builtins.cSimon Pilgrim1-2/+3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269920 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-18Add new flag and intrinsic support for MWAITX and MONITORX instructionsAshutosh Nema1-0/+38
Summary: MONITORX/MWAITX instructions provide similar capability to the MONITOR/MWAIT pair while adding a timer function, such that another termination of the MWAITX instruction occurs when the timer expires. The presence of the MONITORX and MWAITX instructions is indicated by CPUID 8000_0001, ECX, bit 29. The MONITORX and MWAITX instructions are intercepted by the same bits that intercept MONITOR and MWAIT. MONITORX instruction establishes a range to be monitored. MWAITX instruction causes the processor to stop instruction execution and enter an implementation-dependent optimized state until occurrence of a class of events. Opcode of MONITORX instruction is "0F 01 FA". Opcode of MWAITX instruction is "0F 01 FB". These opcode information is used in adding tests for the disassembler. These instructions are enabled for AMD's bdver4 architecture. Patch by Ganesh Gopalasubramanian! Reviewers: echristo, craig.topper, RKSimon Subscribers: RKSimon, joker.eph, llvm-commits Differential Revision: http://reviews.llvm.org/D19795 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269911 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-18[X86][SSSE3] Sync with clang/test/CodeGen/ssse3-builtins.cSimon Pilgrim1-0/+19
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269903 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-18[X86][SSE4A] Sync with clang/test/CodeGen/sse4a-builtins.cSimon Pilgrim1-4/+6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269902 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-22 14:10:58 +0000