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test
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CodeGen
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X86
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masked-iv-safe.ll
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2015-02-27
[opaque pointer type] Add textual IR support for explicit type parameter to l...
David Blaikie
1
-24
/
+24
2015-02-27
[opaque pointer type] Add textual IR support for explicit type parameter to g...
David Blaikie
1
-24
/
+24
2014-05-20
[LSR] Canonicalize reg1 + ... + regN into reg1 + ... + 1*regN.
Quentin Colombet
1
-3
/
+3
2014-04-26
[X86] Implement TargetLowering::getScalingFactorCost hook.
Quentin Colombet
1
-4
/
+4
2013-10-15
Enable MI Sched for x86.
Andrew Trick
1
-8
/
+41
2013-06-25
Revert "Temporarily enable MI-Sched on X86."
Andrew Trick
1
-2
/
+2
2013-06-24
Temporarily enable MI-Sched on X86.
Andrew Trick
1
-2
/
+2
2013-05-31
Modify how the formulae are rated in Loop Strength Reduce.
Quentin Colombet
1
-3
/
+2
2012-02-01
Instruction scheduling itinerary for Intel Atom.
Andrew Trick
1
-1
/
+1
2011-11-10
Use a bigger hammer to fix PR11314 by disabling the "forcing two-address
Evan Cheng
1
-2
/
+2
2010-02-12
Reapply the new LoopStrengthReduction code, with compile time and
Dan Gohman
1
-3
/
+3
2010-01-22
Revert LoopStrengthReduce.cpp to pre-r94061 for now.
Dan Gohman
1
-5
/
+2
2010-01-21
Re-implement the main strength-reduction portion of LoopStrengthReduction.
Dan Gohman
1
-2
/
+5
2009-09-08
Eliminate more uses of llvm-as and llvm-dis.
Dan Gohman
1
-1
/
+1
2009-06-04
Split the Add, Sub, and Mul instruction opcodes into separate
Dan Gohman
1
-24
/
+24
2009-05-12
Factor the code for collecting IV users out of LSR into an IVUsers class,
Dan Gohman
1
-4
/
+3
2009-05-11
Reverse a loop that is counting up to a maximum to
Dale Johannesen
1
-2
/
+3
2009-04-27
Teach getZeroExtendExpr and getSignExtendExpr to use trip-count
Dan Gohman
1
-0
/
+244