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-rw-r--r--test/CodeGen/R600/and.ll28
1 files changed, 14 insertions, 14 deletions
diff --git a/test/CodeGen/R600/and.ll b/test/CodeGen/R600/and.ll
index ccb97e38f3b..9c0eb89e7df 100644
--- a/test/CodeGen/R600/and.ll
+++ b/test/CodeGen/R600/and.ll
@@ -1,7 +1,7 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
-; FUNC-LABEL: @test2
+; FUNC-LABEL: {{^}}test2:
; EG: AND_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
; EG: AND_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
@@ -17,7 +17,7 @@ define void @test2(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
ret void
}
-; FUNC-LABEL: @test4
+; FUNC-LABEL: {{^}}test4:
; EG: AND_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
; EG: AND_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
; EG: AND_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
@@ -37,7 +37,7 @@ define void @test4(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
ret void
}
-; FUNC-LABEL: @s_and_i32
+; FUNC-LABEL: {{^}}s_and_i32:
; SI: S_AND_B32
define void @s_and_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
%and = and i32 %a, %b
@@ -45,7 +45,7 @@ define void @s_and_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
ret void
}
-; FUNC-LABEL: @s_and_constant_i32
+; FUNC-LABEL: {{^}}s_and_constant_i32:
; SI: S_AND_B32 s{{[0-9]+}}, s{{[0-9]+}}, 0x12d687
define void @s_and_constant_i32(i32 addrspace(1)* %out, i32 %a) {
%and = and i32 %a, 1234567
@@ -53,7 +53,7 @@ define void @s_and_constant_i32(i32 addrspace(1)* %out, i32 %a) {
ret void
}
-; FUNC-LABEL: @v_and_i32
+; FUNC-LABEL: {{^}}v_and_i32:
; SI: V_AND_B32
define void @v_and_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) {
%a = load i32 addrspace(1)* %aptr, align 4
@@ -63,7 +63,7 @@ define void @v_and_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addr
ret void
}
-; FUNC-LABEL: @v_and_constant_i32
+; FUNC-LABEL: {{^}}v_and_constant_i32:
; SI: V_AND_B32
define void @v_and_constant_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr) {
%a = load i32 addrspace(1)* %aptr, align 4
@@ -72,7 +72,7 @@ define void @v_and_constant_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr)
ret void
}
-; FUNC-LABEL: @s_and_i64
+; FUNC-LABEL: {{^}}s_and_i64:
; SI: S_AND_B64
define void @s_and_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) {
%and = and i64 %a, %b
@@ -81,7 +81,7 @@ define void @s_and_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) {
}
; FIXME: Should use SGPRs
-; FUNC-LABEL: @s_and_i1
+; FUNC-LABEL: {{^}}s_and_i1:
; SI: V_AND_B32
define void @s_and_i1(i1 addrspace(1)* %out, i1 %a, i1 %b) {
%and = and i1 %a, %b
@@ -89,7 +89,7 @@ define void @s_and_i1(i1 addrspace(1)* %out, i1 %a, i1 %b) {
ret void
}
-; FUNC-LABEL: @s_and_constant_i64
+; FUNC-LABEL: {{^}}s_and_constant_i64:
; SI: S_AND_B64
define void @s_and_constant_i64(i64 addrspace(1)* %out, i64 %a) {
%and = and i64 %a, 281474976710655
@@ -97,7 +97,7 @@ define void @s_and_constant_i64(i64 addrspace(1)* %out, i64 %a) {
ret void
}
-; FUNC-LABEL: @v_and_i64
+; FUNC-LABEL: {{^}}v_and_i64:
; SI: V_AND_B32
; SI: V_AND_B32
define void @v_and_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr) {
@@ -108,7 +108,7 @@ define void @v_and_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 addr
ret void
}
-; FUNC-LABEL: @v_and_i64_br
+; FUNC-LABEL: {{^}}v_and_i64_br:
; SI: V_AND_B32
; SI: V_AND_B32
define void @v_and_i64_br(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr, i32 %cond) {
@@ -128,7 +128,7 @@ endif:
ret void
}
-; FUNC-LABEL: @v_and_constant_i64
+; FUNC-LABEL: {{^}}v_and_constant_i64:
; SI: V_AND_B32_e32 {{v[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}
; SI: V_AND_B32_e32 {{v[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}
define void @v_and_constant_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr) {
@@ -139,7 +139,7 @@ define void @v_and_constant_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr)
}
; FIXME: Replace and 0 with mov 0
-; FUNC-LABEL: @v_and_inline_imm_i64
+; FUNC-LABEL: {{^}}v_and_inline_imm_i64:
; SI: V_AND_B32_e32 {{v[0-9]+}}, 64, {{v[0-9]+}}
; SI: V_AND_B32_e32 {{v[0-9]+}}, 0, {{v[0-9]+}}
define void @v_and_inline_imm_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr) {
@@ -149,7 +149,7 @@ define void @v_and_inline_imm_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %apt
ret void
}
-; FUNC-LABEL: @s_and_inline_imm_i64
+; FUNC-LABEL: {{^}}s_and_inline_imm_i64:
; SI: S_AND_B64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 64
define void @s_and_inline_imm_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 %a) {
%and = and i64 %a, 64