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| author | Dan Gohman <gohman@apple.com> | 2009-06-04 22:49:04 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-06-04 22:49:04 +0000 |
| commit | ae3a0be92e33bc716722aa600983fc1535acb122 (patch) | |
| tree | 768333097a76cc105813c7c636daf6259e6a0fc7 /test/CodeGen/X86/stride-reuse.ll | |
| parent | d18e31ae17390d9c6f6cf93d18badf962452031d (diff) | |
Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.
For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.
This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/stride-reuse.ll')
| -rw-r--r-- | test/CodeGen/X86/stride-reuse.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/X86/stride-reuse.ll b/test/CodeGen/X86/stride-reuse.ll index 97f33d8adbc..277a4430aca 100644 --- a/test/CodeGen/X86/stride-reuse.ll +++ b/test/CodeGen/X86/stride-reuse.ll @@ -14,7 +14,7 @@ bb: %i.019.0 = phi i32 [ %indvar.next, %bb ], [ 0, %entry ] %tmp2 = getelementptr [1000 x float]* @B, i32 0, i32 %i.019.0 %tmp3 = load float* %tmp2, align 4 - %tmp4 = mul float %tmp3, 2.000000e+00 + %tmp4 = fmul float %tmp3, 2.000000e+00 %tmp5 = getelementptr [1000 x float]* @A, i32 0, i32 %i.019.0 store float %tmp4, float* %tmp5, align 4 %tmp8 = shl i32 %i.019.0, 1 |