[X86] Fix the (shl (and (setcc_c), c1), c2) -> (and setcc_c, (c1 << c2)) fold

We didn't check for the necessary preconditions before folding a
mask/shift into a single mask.

This fixes PR24516.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245544 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 20 insertions, 0 deletions

diff --git a/test/CodeGen/X86/setcc.ll b/test/CodeGen/X86/setcc.ll
index 6f1ddbdc6ac..b4847c54ffa 100644
--- a/test/CodeGen/X86/setcc.ll
+++ b/test/CodeGen/X86/setcc.ll
@@ -34,3 +34,23 @@ entry:
   %iftmp.2.0 = select i1 %0, i64 64, i64 0        ; <i64> [#uses=1]
   ret i64 %iftmp.2.0
 }
+
+@v4 = common global i32 0, align 4
+
+define i32 @t4(i32 %a) {
+entry:
+; CHECK-LABEL: t4:
+; CHECK:  movq    _v4@GOTPCREL(%rip), %rax
+; CHECK:  cmpl    $1, (%rax)
+; CHECK:  sbbl    %eax, %eax
+; CHECK:  andl    $32768, %eax
+; CHECK:  leal    65536(%rax,%rax), %eax
+  %0 = load i32, i32* @v4, align 4
+  %not.tobool = icmp eq i32 %0, 0
+  %conv.i = sext i1 %not.tobool to i16
+  %call.lobit = lshr i16 %conv.i, 15
+  %add.i.1 = add nuw nsw i16 %call.lobit, 1
+  %conv4.2 = zext i16 %add.i.1 to i32
+  %add = shl nuw nsw i32 %conv4.2, 16
+  ret i32 %add
+}