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| author | Sagar Thakur <sagar.thakur@imgtec.com> | 2016-05-24 09:57:10 +0000 |
|---|---|---|
| committer | Sagar Thakur <sagar.thakur@imgtec.com> | 2016-05-24 09:57:10 +0000 |
| commit | 805f1b70c411a4a692f3c65283b564acbf8e86a8 (patch) | |
| tree | 3ad6a3da7f3c314e60038b83046980ebd4794d3b /test/CodeGen/NVPTX/lit.local.cfg | |
| parent | c19728fa10d953dee24b5378a79d52f1653ffb9a (diff) | |
[MIPS][LLVM-MC] Fix Disassemble of Negative Offset
Patch by Nitesh Jain.
Summary: The type of Imm in MipsDisassembler.cpp was incorrect since SignExtend64 return int64_t type.As per the MIPSr6 doc ,the offset is added to the address of the instruction following the branch (not the branch itself), to form a PC-relative effective target address hence “4” is added to the offset. The offset of some test case are update to reflect the changes due to “ + 4 ” offset and new test case for negative offset are added.
Reviewers: dsanders, vkalintiris
Differential Revision: http://reviews.llvm.org/D17540
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270542 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/NVPTX/lit.local.cfg')
0 files changed, 0 insertions, 0 deletions