diff options
author | Tom Stellard <thomas.stellard@amd.com> | 2016-04-30 04:04:48 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2016-04-30 04:04:48 +0000 |
commit | df1aa5c25dff99dda577e51cc373933cbd287571 (patch) | |
tree | 3fb8d8176a26bf0cd515f4b95a2ffa7a496c2051 /test/CodeGen/AMDGPU | |
parent | dd0687afa43611f69527c10404a3a1b03e291a18 (diff) |
AMDGPU/SI: Remove wait state handling for SMRD in SIInsertWaits
This was supposed to be part of r268143.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268154 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/AMDGPU')
-rw-r--r-- | test/CodeGen/AMDGPU/missing-store.ll | 3 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/salu-to-valu.ll | 3 |
2 files changed, 4 insertions, 2 deletions
diff --git a/test/CodeGen/AMDGPU/missing-store.ll b/test/CodeGen/AMDGPU/missing-store.ll index 658666304f6..d608fd14ccf 100644 --- a/test/CodeGen/AMDGPU/missing-store.ll +++ b/test/CodeGen/AMDGPU/missing-store.ll @@ -10,7 +10,8 @@ ; SI: buffer_store_dword ; SI: v_readfirstlane_b32 s[[PTR_LO:[0-9]+]], v{{[0-9]+}} ; SI: v_readfirstlane_b32 s[[PTR_HI:[0-9]+]], v{{[0-9]+}} -; SI-NEXT: s_nop +; SI: s_load_dword +; SI: s_nop 2 ; SI: s_load_dword s{{[0-9]+}}, s{{\[}}[[PTR_LO]]:[[PTR_HI]]{{\]}} ; SI: buffer_store_dword ; SI: s_endpgm diff --git a/test/CodeGen/AMDGPU/salu-to-valu.ll b/test/CodeGen/AMDGPU/salu-to-valu.ll index bcd20ff5bdb..7d167e5dd44 100644 --- a/test/CodeGen/AMDGPU/salu-to-valu.ll +++ b/test/CodeGen/AMDGPU/salu-to-valu.ll @@ -56,7 +56,8 @@ done: ; preds = %loop ; SI: s_movk_i32 [[OFFSET:s[0-9]+]], 0x2ee0 ; GCN: v_readfirstlane_b32 s[[PTR_LO:[0-9]+]], v{{[0-9]+}} ; GCN: v_readfirstlane_b32 s[[PTR_HI:[0-9]+]], v{{[0-9]+}} -; SI-NEXT: s_nop +; SI: s_mov_b32 +; SI: s_nop 2 ; SI: s_load_dword [[OUT:s[0-9]+]], s{{\[}}[[PTR_LO]]:[[PTR_HI]]{{\]}}, [[OFFSET]] ; CI: s_load_dword [[OUT:s[0-9]+]], s{{\[}}[[PTR_LO]]:[[PTR_HI]]{{\]}}, 0xbb8 ; GCN: v_mov_b32_e32 [[V_OUT:v[0-9]+]], [[OUT]] |