diff options
| author | Tom Stellard <thomas.stellard@amd.com> | 2016-05-02 20:11:44 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2016-05-02 20:11:44 +0000 |
| commit | 451c792dbcd786e06a1f87f0ef3c692e68b83338 (patch) | |
| tree | edca1f5ca666dcdd16800d7eb8210cfd4108bd1c /test/CodeGen/AMDGPU | |
| parent | 7614ec64311822d77d393cdad5d1e3e8d857fc77 (diff) | |
AMDGPU/SI: Use v_readfirstlane_b32 when restoring SGPRs spilled to scratch
We were using v_readlane_b32 with the lane set to zero, but this won't
work if thread 0 is not active.
Differential Revision: http://reviews.llvm.org/D19745
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268295 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/AMDGPU')
| -rw-r--r-- | test/CodeGen/AMDGPU/si-spill-sgpr-stack.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/AMDGPU/si-spill-sgpr-stack.ll b/test/CodeGen/AMDGPU/si-spill-sgpr-stack.ll index 0731a4e1ec0..5171406469a 100644 --- a/test/CodeGen/AMDGPU/si-spill-sgpr-stack.ll +++ b/test/CodeGen/AMDGPU/si-spill-sgpr-stack.ll @@ -5,7 +5,7 @@ ; Make sure we are handling hazards correctly. ; CHECK: buffer_load_dword [[VHI:v[0-9]+]], off, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offset:12 ; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: v_readlane_b32 s[[HI:[0-9]+]], [[VHI]] +; CHECK-NEXT: v_readfirstlane_b32 s[[HI:[0-9]+]], [[VHI]] ; CHECK-NEXT: s_nop 4 ; CHECK-NEXT: buffer_store_dword v0, off, s[0:[[HI]]{{\]}}, 0 ; CHECK: s_endpgm |