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authorChris Lattner <sabre@nondot.org>2009-09-08 06:03:07 +0000
committerChris Lattner <sabre@nondot.org>2009-09-08 06:03:07 +0000
commitaf0b6cdb699c81529cf35f02160d790a64e3fec3 (patch)
tree8c03151c7d73c3bc185995081de125692874f70a
parent7ffa3c80294a2a55b5945b2a6bab43354c801033 (diff)
ADd support for "lowering" the X86::MOVZX16rr8/X86::MOVZX16rm8
subreg32 modifiers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81196 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/AsmPrinter/X86MCInstLower.cpp9
1 files changed, 8 insertions, 1 deletions
diff --git a/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp b/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
index 7cafe83fc7a..91047aa40a8 100644
--- a/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
+++ b/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
@@ -309,11 +309,18 @@ printInstructionThroughMCStreamer(const MachineInstr *MI) {
// Handle the 'subreg rewriting' for the lea64_32mem operand.
lower_lea64_32mem(&TmpInst, 1);
break;
-
case X86::MOV16r0:
TmpInst.setOpcode(X86::MOV32r0);
lower_subreg32(&TmpInst, 0);
break;
+ case X86::MOVZX16rr8:
+ TmpInst.setOpcode(X86::MOVZX32rr8);
+ lower_subreg32(&TmpInst, 0);
+ break;
+ case X86::MOVZX16rm8:
+ TmpInst.setOpcode(X86::MOVZX32rm8);
+ lower_subreg32(&TmpInst, 0);
+ break;
}
printInstruction(&TmpInst);