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authorPeter Collingbourne <peter@pcc.me.uk>2016-05-20 19:35:17 +0000
committerPeter Collingbourne <peter@pcc.me.uk>2016-05-20 19:35:17 +0000
commit37cc1ba8fa3028cf059bda797d9c531dbab4b5af (patch)
tree6e0952b1a13bfd9303c8479b5d2b0db180561078
parentea1ed45029989960023f2c20ece89caeb567e0a2 (diff)
CodeGen: Do not require a MachineFunction just to create a DIEDwarfExpression.
We are about to start using DIEDwarfExpression to create global variable DIEs, which happens before we generate code for functions. Differential Revision: http://reviews.llvm.org/D20412 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270257 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp6
-rw-r--r--lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp8
-rw-r--r--lib/CodeGen/AsmPrinter/DwarfDebug.cpp14
-rw-r--r--lib/CodeGen/AsmPrinter/DwarfExpression.cpp21
-rw-r--r--lib/CodeGen/AsmPrinter/DwarfExpression.h27
-rw-r--r--lib/CodeGen/AsmPrinter/DwarfUnit.cpp14
6 files changed, 49 insertions, 41 deletions
diff --git a/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp b/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
index 504c5d283cb..60f40d063cc 100644
--- a/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
+++ b/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
@@ -178,8 +178,7 @@ void AsmPrinter::emitDwarfStringOffset(DwarfStringPoolEntryRef S) const {
/// EmitDwarfRegOp - Emit dwarf register operation.
void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
const MachineLocation &MLoc) const {
- DebugLocDwarfExpression Expr(*MF->getSubtarget().getRegisterInfo(),
- getDwarfDebug()->getDwarfVersion(), Streamer);
+ DebugLocDwarfExpression Expr(getDwarfDebug()->getDwarfVersion(), Streamer);
const MCRegisterInfo *MRI = MMI->getContext().getRegisterInfo();
int Reg = MRI->getDwarfRegNum(MLoc.getReg(), false);
if (Reg < 0) {
@@ -193,7 +192,8 @@ void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
"nop (could not find a dwarf register number)");
// Attempt to find a valid super- or sub-register.
- if (!Expr.AddMachineRegPiece(MLoc.getReg()))
+ if (!Expr.AddMachineRegPiece(*MF->getSubtarget().getRegisterInfo(),
+ MLoc.getReg()))
Expr.EmitOp(dwarf::DW_OP_nop,
"nop (could not find a dwarf register number)");
return;
diff --git a/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp b/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
index ff70f6ca044..0523cf2408a 100644
--- a/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
+++ b/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
@@ -539,7 +539,8 @@ DIE *DwarfCompileUnit::constructVariableDIEImpl(const DbgVariable &DV,
const TargetFrameLowering *TFI = Asm->MF->getSubtarget().getFrameLowering();
int Offset = TFI->getFrameIndexReference(*Asm->MF, FI, FrameReg);
assert(Expr != DV.getExpression().end() && "Wrong number of expressions");
- DwarfExpr.AddMachineRegIndirect(FrameReg, Offset);
+ DwarfExpr.AddMachineRegIndirect(*Asm->MF->getSubtarget().getRegisterInfo(),
+ FrameReg, Offset);
DwarfExpr.AddExpression((*Expr)->expr_op_begin(), (*Expr)->expr_op_end());
++Expr;
}
@@ -766,13 +767,14 @@ void DwarfCompileUnit::addComplexAddress(const DbgVariable &DV, DIE &Die,
DIEDwarfExpression DwarfExpr(*Asm, *this, *Loc);
const DIExpression *Expr = DV.getSingleExpression();
bool ValidReg;
+ const TargetRegisterInfo &TRI = *Asm->MF->getSubtarget().getRegisterInfo();
if (Location.getOffset()) {
- ValidReg = DwarfExpr.AddMachineRegIndirect(Location.getReg(),
+ ValidReg = DwarfExpr.AddMachineRegIndirect(TRI, Location.getReg(),
Location.getOffset());
if (ValidReg)
DwarfExpr.AddExpression(Expr->expr_op_begin(), Expr->expr_op_end());
} else
- ValidReg = DwarfExpr.AddMachineRegExpression(Expr, Location.getReg());
+ ValidReg = DwarfExpr.AddMachineRegExpression(TRI, Expr, Location.getReg());
// Now attach the location information to the DIE.
if (ValidReg)
diff --git a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
index 66e3c899c17..52f5a02791e 100644
--- a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+++ b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
@@ -138,7 +138,8 @@ void DebugLocDwarfExpression::EmitUnsigned(uint64_t Value) {
BS.EmitULEB128(Value, Twine(Value));
}
-bool DebugLocDwarfExpression::isFrameRegister(unsigned MachineReg) {
+bool DebugLocDwarfExpression::isFrameRegister(const TargetRegisterInfo &TRI,
+ unsigned MachineReg) {
// This information is not available while emitting .debug_loc entries.
return false;
}
@@ -1400,8 +1401,7 @@ static void emitDebugLocValue(const AsmPrinter &AP, const DIBasicType *BT,
ByteStreamer &Streamer,
const DebugLocEntry::Value &Value,
unsigned PieceOffsetInBits) {
- DebugLocDwarfExpression DwarfExpr(*AP.MF->getSubtarget().getRegisterInfo(),
- AP.getDwarfDebug()->getDwarfVersion(),
+ DebugLocDwarfExpression DwarfExpr(AP.getDwarfDebug()->getDwarfVersion(),
Streamer);
// Regular entry.
if (Value.isInt()) {
@@ -1418,12 +1418,13 @@ static void emitDebugLocValue(const AsmPrinter &AP, const DIBasicType *BT,
AP.EmitDwarfRegOp(Streamer, Loc);
else {
// Complex address entry.
+ const TargetRegisterInfo &TRI = *AP.MF->getSubtarget().getRegisterInfo();
if (Loc.getOffset()) {
- DwarfExpr.AddMachineRegIndirect(Loc.getReg(), Loc.getOffset());
+ DwarfExpr.AddMachineRegIndirect(TRI, Loc.getReg(), Loc.getOffset());
DwarfExpr.AddExpression(Expr->expr_op_begin(), Expr->expr_op_end(),
PieceOffsetInBits);
} else
- DwarfExpr.AddMachineRegExpression(Expr, Loc.getReg(),
+ DwarfExpr.AddMachineRegExpression(TRI, Expr, Loc.getReg(),
PieceOffsetInBits);
}
} else if (Value.isConstantFP()) {
@@ -1454,8 +1455,7 @@ void DebugLocEntry::finalize(const AsmPrinter &AP,
assert(Offset <= PieceOffset && "overlapping or duplicate pieces");
if (Offset < PieceOffset) {
// The DWARF spec seriously mandates pieces with no locations for gaps.
- DebugLocDwarfExpression Expr(*AP.MF->getSubtarget().getRegisterInfo(),
- AP.getDwarfDebug()->getDwarfVersion(),
+ DebugLocDwarfExpression Expr(AP.getDwarfDebug()->getDwarfVersion(),
Streamer);
Expr.AddOpPiece(PieceOffset-Offset, 0);
Offset += PieceOffset-Offset;
diff --git a/lib/CodeGen/AsmPrinter/DwarfExpression.cpp b/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
index 0608e05edd5..d614dfd6fc8 100644
--- a/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
+++ b/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
@@ -65,8 +65,9 @@ void DwarfExpression::AddShr(unsigned ShiftBy) {
EmitOp(dwarf::DW_OP_shr);
}
-bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) {
- if (isFrameRegister(MachineReg)) {
+bool DwarfExpression::AddMachineRegIndirect(const TargetRegisterInfo &TRI,
+ unsigned MachineReg, int Offset) {
+ if (isFrameRegister(TRI, MachineReg)) {
// If variable offset is based in frame register then use fbreg.
EmitOp(dwarf::DW_OP_fbreg);
EmitSigned(Offset);
@@ -81,7 +82,8 @@ bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) {
return true;
}
-bool DwarfExpression::AddMachineRegPiece(unsigned MachineReg,
+bool DwarfExpression::AddMachineRegPiece(const TargetRegisterInfo &TRI,
+ unsigned MachineReg,
unsigned PieceSizeInBits,
unsigned PieceOffsetInBits) {
if (!TRI.isPhysicalRegister(MachineReg))
@@ -200,13 +202,14 @@ static unsigned getOffsetOrZero(unsigned OffsetInBits,
return OffsetInBits;
}
-bool DwarfExpression::AddMachineRegExpression(const DIExpression *Expr,
+bool DwarfExpression::AddMachineRegExpression(const TargetRegisterInfo &TRI,
+ const DIExpression *Expr,
unsigned MachineReg,
unsigned PieceOffsetInBits) {
auto I = Expr->expr_op_begin();
auto E = Expr->expr_op_end();
if (I == E)
- return AddMachineRegPiece(MachineReg);
+ return AddMachineRegPiece(TRI, MachineReg);
// Pattern-match combinations for which more efficient representations exist
// first.
@@ -216,7 +219,7 @@ bool DwarfExpression::AddMachineRegExpression(const DIExpression *Expr,
unsigned OffsetInBits = I->getArg(0);
unsigned SizeInBits = I->getArg(1);
// Piece always comes at the end of the expression.
- return AddMachineRegPiece(MachineReg, SizeInBits,
+ return AddMachineRegPiece(TRI, MachineReg, SizeInBits,
getOffsetOrZero(OffsetInBits, PieceOffsetInBits));
}
case dwarf::DW_OP_plus:
@@ -227,15 +230,15 @@ bool DwarfExpression::AddMachineRegExpression(const DIExpression *Expr,
if (N != E && N->getOp() == dwarf::DW_OP_deref) {
unsigned Offset = I->getArg(0);
ValidReg = AddMachineRegIndirect(
- MachineReg, I->getOp() == dwarf::DW_OP_plus ? Offset : -Offset);
+ TRI, MachineReg, I->getOp() == dwarf::DW_OP_plus ? Offset : -Offset);
std::advance(I, 2);
break;
} else
- ValidReg = AddMachineRegPiece(MachineReg);
+ ValidReg = AddMachineRegPiece(TRI, MachineReg);
}
case dwarf::DW_OP_deref: {
// [DW_OP_reg,DW_OP_deref] --> [DW_OP_breg].
- ValidReg = AddMachineRegIndirect(MachineReg);
+ ValidReg = AddMachineRegIndirect(TRI, MachineReg);
++I;
break;
}
diff --git a/lib/CodeGen/AsmPrinter/DwarfExpression.h b/lib/CodeGen/AsmPrinter/DwarfExpression.h
index 5de9131d5c4..318d8d3d765 100644
--- a/lib/CodeGen/AsmPrinter/DwarfExpression.h
+++ b/lib/CodeGen/AsmPrinter/DwarfExpression.h
@@ -31,13 +31,10 @@ class DIELoc;
class DwarfExpression {
protected:
// Various convenience accessors that extract things out of AsmPrinter.
- const TargetRegisterInfo &TRI;
unsigned DwarfVersion;
public:
- DwarfExpression(const TargetRegisterInfo &TRI,
- unsigned DwarfVersion)
- : TRI(TRI), DwarfVersion(DwarfVersion) {}
+ DwarfExpression(unsigned DwarfVersion) : DwarfVersion(DwarfVersion) {}
virtual ~DwarfExpression() {}
/// Output a dwarf operand and an optional assembler comment.
@@ -48,7 +45,7 @@ public:
virtual void EmitUnsigned(uint64_t Value) = 0;
/// Return whether the given machine register is the frame register in the
/// current function.
- virtual bool isFrameRegister(unsigned MachineReg) = 0;
+ virtual bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) = 0;
/// Emit a dwarf register operation.
void AddReg(int DwarfReg, const char *Comment = nullptr);
@@ -77,7 +74,8 @@ public:
/// Emit an indirect dwarf register operation for the given machine register.
/// \return false if no DWARF register exists for MachineReg.
- bool AddMachineRegIndirect(unsigned MachineReg, int Offset = 0);
+ bool AddMachineRegIndirect(const TargetRegisterInfo &TRI, unsigned MachineReg,
+ int Offset = 0);
/// \brief Emit a partial DWARF register operation.
/// \param MachineReg the register
@@ -93,7 +91,8 @@ public:
/// subregisters that alias the register.
///
/// \return false if no DWARF register exists for MachineReg.
- bool AddMachineRegPiece(unsigned MachineReg, unsigned PieceSizeInBits = 0,
+ bool AddMachineRegPiece(const TargetRegisterInfo &TRI, unsigned MachineReg,
+ unsigned PieceSizeInBits = 0,
unsigned PieceOffsetInBits = 0);
/// Emit a signed constant.
@@ -108,7 +107,8 @@ public:
/// \param PieceOffsetInBits If this is one piece out of a fragmented
/// location, this is the offset of the piece inside the entire variable.
/// \return false if no DWARF register exists for MachineReg.
- bool AddMachineRegExpression(const DIExpression *Expr, unsigned MachineReg,
+ bool AddMachineRegExpression(const TargetRegisterInfo &TRI,
+ const DIExpression *Expr, unsigned MachineReg,
unsigned PieceOffsetInBits = 0);
/// Emit a the operations remaining the DIExpressionIterator I.
/// \param PieceOffsetInBits If this is one piece out of a fragmented
@@ -123,14 +123,14 @@ class DebugLocDwarfExpression : public DwarfExpression {
ByteStreamer &BS;
public:
- DebugLocDwarfExpression(const TargetRegisterInfo &TRI,
- unsigned DwarfVersion, ByteStreamer &BS)
- : DwarfExpression(TRI, DwarfVersion), BS(BS) {}
+ DebugLocDwarfExpression(unsigned DwarfVersion, ByteStreamer &BS)
+ : DwarfExpression(DwarfVersion), BS(BS) {}
void EmitOp(uint8_t Op, const char *Comment = nullptr) override;
void EmitSigned(int64_t Value) override;
void EmitUnsigned(uint64_t Value) override;
- bool isFrameRegister(unsigned MachineReg) override;
+ bool isFrameRegister(const TargetRegisterInfo &TRI,
+ unsigned MachineReg) override;
};
/// DwarfExpression implementation for singular DW_AT_location.
@@ -144,7 +144,8 @@ public:
void EmitOp(uint8_t Op, const char *Comment = nullptr) override;
void EmitSigned(int64_t Value) override;
void EmitUnsigned(uint64_t Value) override;
- bool isFrameRegister(unsigned MachineReg) override;
+ bool isFrameRegister(const TargetRegisterInfo &TRI,
+ unsigned MachineReg) override;
};
}
diff --git a/lib/CodeGen/AsmPrinter/DwarfUnit.cpp b/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
index ad895e721e9..1ea1cef97f7 100644
--- a/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
+++ b/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
@@ -46,9 +46,8 @@ GenerateDwarfTypeUnits("generate-type-units", cl::Hidden,
DIEDwarfExpression::DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU,
DIELoc &DIE)
- : DwarfExpression(*AP.MF->getSubtarget().getRegisterInfo(),
- AP.getDwarfDebug()->getDwarfVersion()),
- AP(AP), DU(DU), DIE(DIE) {}
+ : DwarfExpression(AP.getDwarfDebug()->getDwarfVersion()), AP(AP), DU(DU),
+ DIE(DIE) {}
void DIEDwarfExpression::EmitOp(uint8_t Op, const char* Comment) {
DU.addUInt(DIE, dwarf::DW_FORM_data1, Op);
@@ -59,7 +58,8 @@ void DIEDwarfExpression::EmitSigned(int64_t Value) {
void DIEDwarfExpression::EmitUnsigned(uint64_t Value) {
DU.addUInt(DIE, dwarf::DW_FORM_udata, Value);
}
-bool DIEDwarfExpression::isFrameRegister(unsigned MachineReg) {
+bool DIEDwarfExpression::isFrameRegister(const TargetRegisterInfo &TRI,
+ unsigned MachineReg) {
return MachineReg == TRI.getFrameRegister(*AP.MF);
}
@@ -368,14 +368,16 @@ void DwarfUnit::addSourceLine(DIE &Die, const DINamespace *NS) {
bool DwarfUnit::addRegisterOpPiece(DIELoc &TheDie, unsigned Reg,
unsigned SizeInBits, unsigned OffsetInBits) {
DIEDwarfExpression Expr(*Asm, *this, TheDie);
- Expr.AddMachineRegPiece(Reg, SizeInBits, OffsetInBits);
+ Expr.AddMachineRegPiece(*Asm->MF->getSubtarget().getRegisterInfo(), Reg,
+ SizeInBits, OffsetInBits);
return true;
}
bool DwarfUnit::addRegisterOffset(DIELoc &TheDie, unsigned Reg,
int64_t Offset) {
DIEDwarfExpression Expr(*Asm, *this, TheDie);
- return Expr.AddMachineRegIndirect(Reg, Offset);
+ return Expr.AddMachineRegIndirect(*Asm->MF->getSubtarget().getRegisterInfo(),
+ Reg, Offset);
}
/* Byref variables, in Blocks, are declared by the programmer as "SomeType