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2020-04-09mtd: spi-nor: Compile files in controllers/ directoryGuenter Roeck1-0/+2
Commit a0900d0195d2 ("mtd: spi-nor: Prepare core / manufacturer code split") moved various files into a new directory, but did not add the new directory to its parent directory Makefile. The moved files no longer build, and affected flash chips no longer instantiate. Adding the new directory to the parent directory Makefile fixes the problem. Fixes: a0900d0195d2 ("mtd: spi-nor: Prepare core / manufacturer code split") Cc: Boris Brezillon <bbrezillon@kernel.org> Cc: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Acked-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2020-04-07Merge tag 'for-linus-5.7-rc1' of ↵Linus Torvalds3-4/+16
git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs Pull UBI and UBIFS updates from Richard Weinberger: - Fix for memory leaks around UBIFS orphan handling - Fix for memory leaks around UBI fastmap - Remove zero-length array from ubi-media.h - Fix for TNC lookup in UBIFS orphan code * tag 'for-linus-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs: ubi: ubi-media.h: Replace zero-length array with flexible-array member ubifs: Fix out-of-bounds memory access caused by abnormal value of node_len ubi: fastmap: Only produce the initial anchor PEB when fastmap is used ubi: fastmap: Free unused fastmap anchor peb during detach ubifs: ubifs_add_orphan: Fix a memory leak bug ubifs: ubifs_jnl_write_inode: Fix a memory leak bug ubifs: Fix ubifs_tnc_lookup() usage in do_kill_orphans()
2020-03-30ubi: ubi-media.h: Replace zero-length array with flexible-array memberGustavo A. R. Silva1-1/+1
The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2020-03-30ubi: fastmap: Only produce the initial anchor PEB when fastmap is usedHou Tao1-1/+2
Don't produce the initial anchor PEB when ubi device is read-only or fastmap is disabled, else the resulting PEB will be unusable to any volume. Signed-off-by: Hou Tao <houtao1@huawei.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2020-03-30ubi: fastmap: Free unused fastmap anchor peb during detachHou Tao1-2/+13
When CONFIG_MTD_UBI_FASTMAP is enabled, fm_anchor will be assigned a free PEB during ubi_wl_init() or ubi_update_fastmap(). However if fastmap is not used or disabled on the MTD device, ubi_wl_entry related with the PEB will not be freed during detach. So Fix it by freeing the unused fastmap anchor during detach. Fixes: f9c34bb52997 ("ubi: Fix producing anchor PEBs") Reported-by: syzbot+f317896aae32eb281a58@syzkaller.appspotmail.com Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Hou Tao <houtao1@huawei.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2020-03-30mtd: Convert fallthrough comments into statementsMiquel Raynal22-60/+45
Use Joe Perches cvt_fallthrough.pl script to convert /* fallthrough */ comments (and its derivatives) into a fallthrough; statement. This automatically drops useless ones. Do it MTD-wide. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Richard Weinberger <richard@nod.at> Link: https://lore.kernel.org/linux-mtd/20200325212115.14170-1-miquel.raynal@bootlin.com
2020-03-30Merge tag 'nand/for-5.7' into mtd/nextMiquel Raynal26-427/+1347
Raw NAND core changes: * Add support for manufacturer specific suspend/resume operation * Add support for manufacturer specific lock/unlock operation * Replace zero-length array with flexible-array member * Fix a typo ("manufecturer") * Ensure nand_soft_waitrdy wait period is enough Raw NAND controller driver changes: * Brcmnand: Add support for flash-edu for dma transfers (+ bindings) * Cadence: Reinit completion before executing a new command Change bad block marker size Fix the calculation of the avaialble OOB size Get meta data size from registers * Qualcom: Use dma_request_chan() instead dma_request_slave_channel() Release resources on failure within qcom_nandc_alloc() * Allwinner: Use dma_request_chan() instead dma_request_slave_channel() * Marvell: Use dma_request_chan() instead dma_request_slave_channel() Release DMA channel on error * Freescale: Use dma_request_chan() instead dma_request_slave_channel() * Macronix: Add support for Macronix NAND randomizer (+ bindings) * Ams-delta: Rename structures and functions to gpio_nand* Make the driver custom I/O ready Drop useless local variable Support custom driver initialisation Add module device tables Handle more GPIO pins as optional Make read pulses optional Don't hardcode read/write pulse widths Push inversion handling to gpiolib Enable OF partition info support Drop board specific partition info Use struct gpio_nand_platdata Write protect device during probe * Ingenic: Use devm_platform_ioremap_resource() Add dependency on MIPS || COMPILE_TEST * Denali: Deassert write protect pin * ST: Use dma_request_chan() instead dma_request_slave_channel() Raw NAND chip driver changes: * Toshiba: Support reading the number of bitflips for BENAND (Built-in ECC NAND) * Macronix: Add support for deep power down mode Add support for block protection SPI-NAND core changes: * Do not erase the block before writing a bad block marker * Explicitly use MTD_OPS_RAW to write the bad block marker to OOB * Stop using spinand->oobbuf for buffering bad block markers * Rework detect procedure for different READ_ID operation SPI-NAND driver changes: * Toshiba: Support for new Kioxia Serial NAND Rename function name to change suffix and prefix (8Gbit) Add comment about Kioxia ID * Micron: Add new Micron SPI NAND devices with multiple dies Add M70A series Micron SPI NAND devices identify SPI NAND device with Continuous Read mode Add new Micron SPI NAND devices Describe the SPI NAND device MT29F2G01ABAGD Generalize the OOB layout structure and function names
2020-03-25mtd: rawnand: toshiba: Support reading the number of bitflips for BENAND ↵Yoshio Furuyama1-2/+56
(Built-in ECC NAND) Add support vendor specific commands for KIOXIA CORPORATION BENAND. The actual bitflips number can be retrieved by this command. Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/1585124572-4693-1-git-send-email-ytc-mb-yfuruyama7@kioxia.com
2020-03-25Merge tag 'spi-nor/for-5.7' into mtd/nextMiquel Raynal34-6090/+6398
SPI NOR core changes: - move all the manufacturer specific quirks/code out of the core, to make the core logic more readable and thus ease maintenance. - move the SFDP logic out of the core, it provides a better separation between the SFDP parsing and core logic. - trim what is exposed in spi-nor.h. The SPI NOR controllers drivers must not be able to use structures that are meant just for the SPI NOR core. - use the spi-mem direct mapping API to let advanced controllers optimize the read/write operations when they support direct mapping. - add generic formula for the Status Register block protection handling. It fixes some long standing locking limitations and eases the addition of the 4bit block protection support. - add block protection support for flashes with 4 block protection bits in the Status Register. SPI NOR controller drivers changes: - the mtk-quadspi driver is replaced by the new spi-mem spi-mtk-nor driver. Merge tag 'mtk-mtd-spi-move' into spi-nor/next to avoid conflicts.
2020-03-25Merge tag 'cfi/for-5.7' into mtd/nextMiquel Raynal2-12/+15
HyperBus changes * Print err msg when compatible is wrong or missing * Move mapping of direct access window from core to individual drivers
2020-03-24mtd: Fix issue where write_cached_data() fails but write() still returns successXiaoming Ni1-2/+3
The following sequence is problematic: mtdblock_flush() -->write_cached_data() --->erase_write() mtdblock: erase of region [0x40000, 0x20000] on "xxx" failed Problem is: mtdblock_flush() always returns 0. Indeed, even if write_cached_data() fails and data is not written to the device, syscall_write() still returns success. Avoid this situation by actually returning the error coming out of write_cached_data(). Signed-off-by: Xiaoming Ni <nixiaoming@huawei.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/1584674111-101462-1-git-send-email-nixiaoming@huawei.com
2020-03-24mtd: maps: sa1100-flash: Replace zero-length array with flexible-array memberGustavo A. R. Silva1-1/+1
The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200319224200.GA25162@embeddedor.com
2020-03-24mtd: phram: fix a double free issue in error pathWen Yang1-6/+9
The variable 'name' is released multiple times in the error path, which may cause double free issues. This problem is avoided by adding a goto label to release the memory uniformly. And this change also makes the code a bit more cleaner. Fixes: 4f678a58d335 ("mtd: fix memory leaks in phram_setup") Signed-off-by: Wen Yang <wenyang@linux.alibaba.com> Cc: Joern Engel <joern@lazybastard.org> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Richard Weinberger <richard@nod.at> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: linux-mtd@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200318153156.25612-1-wenyang@linux.alibaba.com
2020-03-24mtd: spinand: toshiba: Support for new Kioxia Serial NANDYoshio Furuyama1-17/+111
Add support for new Kioxia products. The new Kioxia products support program load x4 command, and have HOLD_D bit which is equivalent to QE bit. Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/aa69e455beedc5ce0d7141359b9364ed8aec9e65.1584949601.git.ytc-mb-yfuruyama7@kioxia.com
2020-03-24mtd: spinand: toshiba: Rename function name to change suffix and prefix (8Gbit)Yoshio Furuyama1-30/+30
The suffix was changed from "G" to "J" to classify between 1st generation and 2nd generation serial NAND devices (which now belong to the Kioxia brand). As reference that's 1st generation device of 1Gbit product is "TC58CVG0S3HRAIG" 2nd generation device of 1Gbit product is "TC58CVG0S3HRAIJ". The 8Gbit type "TH58CxG3S0HRAIJ" is new to Kioxia's serial NAND lineup and the prefix was changed from "TC58" to "TH58". Thus the functions were renamed from tc58cxgxsx_*() to tx58cxgxsxraix_*(). Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/0dedd9869569a17625822dba87878254d253ba0e.1584949601.git.ytc-mb-yfuruyama7@kioxia.com
2020-03-24mtd: rawnand: macronix: Add support for deep power down modeMason Yang1-0/+74
Macronix AD series support deep power down mode for a minimum power consumption state. Overload nand_suspend() & nand_resume() in Macronix specific code to support deep power down mode. Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-03-24mtd: rawnand: Add support for manufacturer specific suspend/resume operationMason Yang1-4/+13
Patch nand_suspend() & nand_resume() to let manufacturers overwrite suspend/resume operations. Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/1584517348-14486-2-git-send-email-masonccyang@mxic.com.tw
2020-03-24mtd: spi-nor: Enable locking for n25q512ax3/n25q512aJungseung Lee1-2/+6
n25q512ax3 and n25q512a use the 4 bit Block Protection scheme. Enable locking for both. Tested on n25q512ax3. The other is modified following the datasheet. Signed-off-by: Jungseung Lee <js07.lee@samsung.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-24mtd: spi-nor: Add SR 4bit block protection supportJungseung Lee2-18/+58
Currently we are supporting block protection only for flash chips with 3 block protection bits (BP0-2) in the SR register. Enable block protection support for flashes with 4 block protection bits (BP0-3). Add a flash_info flag for flashes that describe 4 block protection bits. Add another flash_info flag for flashes in which BP3 bit is not adjacent to the BP0-2 bits. Tested with a n25q512ax3 (BP0-3) and w25q128 (BP0-2). Signed-off-by: Jungseung Lee <js07.lee@samsung.com> Reviewed-by: Michael Walle <michael@walle.cc> Tested-by: Michael Walle <michael@walle.cc> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-24mtd: spi-nor: Add generic formula for SR block protection handlingJungseung Lee1-31/+41
The current mainline locking was restricted and could only be applied to flashes that have 3 block protection bits and fixed locking ratio. A new method of normalization was reached at the end of the discussion [1]. (1) - if bp slot is insufficient. (2) - if bp slot is sufficient. if (bp_slots_needed > bp_slots) // (1) min_prot_length = sector_size << (bp_slots_needed - bp_slots); else // (2) min_prot_length = sector_size; This patch changes logic to handle block protection based on min_prot_length. It is suitable for the overall flashes with exception of some corner cases (see EON and catalyst) and easy to extend and apply for the case of 2bit or 4bit block protection. [1] http://lists.infradead.org/pipermail/linux-mtd/2020-February/093934.html Signed-off-by: Jungseung Lee <js07.lee@samsung.com> Reviewed-by: Michael Walle <michael@walle.cc> Tested-by: Michael Walle <michael@walle.cc> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-24mtd: spi-nor: Set all BP bits to one when lock_len == mtd->sizeTudor Ambarus1-7/+13
When there are more BP settings than needed for defining the protected areas of the flash memory, most flashes will define the remaining settings as "protect all", i.e. the equivalent of having all the BP bits set to one. But there are flashes where the in-between BP values are undefined (not mentioned), and only the "all bits set" is protecting the entire memory. One such example is w25q80, where BP[2:0]=0b101 and 0b110 are not defined. Set all the BP bits to one when lock_len == mtd->size, to treat this special case. Suggested-by: Michael Walle <michael@walle.cc> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Jungseung Lee <js07.lee@samsung.com> Reviewed-by: Michael Walle <michael@walle.cc>
2020-03-23mtd: spi-nor: controllers: aspeed-smc: Replace zero-length array with ↵Gustavo A. R. Silva1-1/+1
flexible-array member The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-23mtd: spi-nor: Clear WEL bit when erase or program errors occurTudor Ambarus1-0/+22
When an Erase or Program error occurs on a spansion/cypress or a micron flash, the WEL bit remains set to one and should be cleared with a WRDI command in order to protect against inadvertent writes that can possible corrupt the contents of the memory. Winbond, macronix, gd, etc., do not support the E_ERR and P_ERR bits in the Status Register and always clear the WEL bit regardless of the outcome of the erase or page program operation (ex w25q40bw, MX25L25635E). Issue a WRDI command when erase or page program errors occur. Reported-by: John Garry <john.garry@huawei.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Tested-by: John Garry <john.garry@huawei.com>
2020-03-17mtd: spi-nor: Trim what is exposed in spi-nor.hTudor Ambarus10-42/+288
The SPI NOR controllers drivers must not be able to use structures that are meant just for the SPI NOR core. struct spi_nor_flash_parameter is filled at run-time with info gathered from flash_info, manufacturer and sfdp data. struct spi_nor_flash_parameter should be opaque to the SPI NOR controller drivers, make sure it is. spi_nor_option_flags, spi_nor_read_command, spi_nor_pp_command, spi_nor_read_command_index and spi_nor_pp_command_index are defined for the core use, make sure they are opaque to the SPI NOR controller drivers. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-17mtd: spi-nor: Drop the MFR definitionsTudor Ambarus1-2/+0
Cross manufacturer code is unlikely and discouraged, get rid of the MFR definitions. Suggested-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
2020-03-17mtd: spi-nor: Get rid of the now empty spi_nor_ids[] tableBoris Brezillon1-25/+0
All entries have been moved to manufacturer drivers. Get rid of this empty table. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-17mtd: spi-nor: Move XMC bits out of core.cBoris Brezillon4-3/+26
Create a SPI NOR manufacturer driver for XMC chips, and move the XMC definitions outside of core.c. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17mtd: spi-nor: Move Xilinx bits out of core.cBoris Brezillon4-86/+98
Create a SPI NOR manufacturer driver for Xilinx chips, and move the Xilinx definitions outside of core.c. While at it, remove the SPI_S3AN flag which is now useless. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17mtd: spi-nor: Move Catalyst bits out of core.cBoris Brezillon4-7/+32
Create a SPI NOR manufacturer driver for Catalyst chips, and move the Catalyst definitions outside of core.c. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17mtd: spi-nor: Move Winbond bits out of core.cBoris Brezillon4-114/+115
Create a SPI NOR manufacturer driver for Winbond chips, and move the Winbond definitions outside of core.c. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17mtd: spi-nor: Move SST bits out of core.cBoris Brezillon4-120/+156
Create a SPI NOR manufacturer driver for SST chips, and move the SST definitions outside of core.c. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17mtd: spi-nor: Move Spansion bits out of core.cBoris Brezillon4-58/+98
Create a SPI NOR manufacturer driver for Spansion chips, and move the Spansion definitions outside of core.c. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17mtd: spi-nor: Move Micron/ST bits out of core.cBoris Brezillon4-120/+158
Create a SPI NOR manufacturer driver for Micron/ST chips, and move the Micron/ST definitions outside of core.c. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17mtd: spi-nor: Move Macronix bits out of core.cBoris Brezillon4-68/+101
Create a SPI NOR manufacturer driver for Macronix chips, and move the Macronix definitions outside of core.c. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Tested-by: Xiang Chen <chenxiang66@hisilicon.com>
2020-03-17mtd: spi-nor: Move ISSI bits out of core.cBoris Brezillon4-65/+86
Create a SPI NOR manufacturer driver for ISSI chips, and move the ISSI definitions outside of core.c. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17mtd: spi-nor: Move Intel bits out of core.cBoris Brezillon4-14/+35
Create a SPI NOR manufacturer driver for Intel chips, and move the Intel definitions outside of core.c. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-03-17mtd: spi-nor: Move GigaDevice bits out of core.cBoris Brezillon4-59/+62
Create a SPI NOR manufacturer driver for GigaDevice chips, and move the GigaDevice definitions outside of core.c. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17mtd: spi-nor: Move Fujitsu bits out of core.cBoris Brezillon4-3/+23
Create a SPI NOR manufacturer driver for Fujitsu chips, and move the Fujitsu definitions outside of core.c. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17mtd: spi-nor: Move Everspin bits out of core.cBoris Brezillon4-6/+30
Create a SPI NOR manufacturer driver for Everspin chips, and move the Everspin definitions outside of core.c. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17mtd: spi-nor: Move ESMT bits out of core.cBoris Brezillon4-5/+28
Create a SPI NOR manufacturer driver for ESMT chips, and move the ESMT definitions outside of core.c. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17mtd: spi-nor: Move Eon bits out of core.cBoris Brezillon4-17/+37
Create a SPI NOR manufacturer driver for Eon chips, and move the Eon definitions outside of core.c. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17mtd: spi-nor: Move Atmel bits out of core.cBoris Brezillon4-29/+53
Create a SPI NOR manufacturer driver for Atmel chips, and move the Atmel definitions outside of core.c. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17mtd: spi-nor: Add the concept of SPI NOR manufacturer driverBoris Brezillon2-11/+81
Declare a spi_nor_manufacturer struct and add basic building blocks to move manufacturer specific code outside of the core. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-17mtd: spi-nor: Expose stuctures and functions to manufacturer driversBoris Brezillon2-158/+169
Expose the flash_info struct and some function prototypes that will be used by manufacturers. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-16mtd: spi-nor: Move SFDP logic out of the coreTudor Ambarus5-1297/+1349
It makes the core file a bit smaller and provides better separation between the SFDP parsing and core logic. Keep the core.h and sfdp.h definitions private in drivers/mtd/spi-nor/. Both expose just the definitions that are required by the core and manufacturer drivers. None of the SPI NOR controller drivers should include them. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-16mtd: spi-nor: Prepare core / manufacturer code splitBoris Brezillon13-81/+86
Move all SPI NOR controller drivers to a controllers/ sub-directory so that we only have SPI NOR related source files under drivers/mtd/spi-nor/. Rename spi-nor.c into core.c, we are about to split this file in multiple source files (one per manufacturer, plus one for the SFDP parsing logic). Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-16mtd: spi-nor: Emphasise which is the generic set_4byte_addr_mode() methodTudor Ambarus1-16/+18
Rename (*set_4byte)() to (*set_4byte_addr_mode)() for a better differentiation between the 4 byte address mode and opcodes. Rename macronix_set_4byte() to spi_nor_set_4byte_addr_mode(), it will be the only 4 byte address mode method exposed to the manufacturer drivers. Here's how the manufacturers enter and exit the 4 byte address mode: - eon, gidadevice, issi, macronix, xmc use EN4B/EX4B - micron-st needs WEN. st_micron_set_4byte_addr_mode() will become a private method, as they are the only ones that need WEN before the EN4B/EX4B commands. - newer spansion have a 4BAM opcode (this translates to a new, public command). Older spansion flashes use the BRWR command (legacy in core.c -> spansion_set_4byte_addr_mode()) - winbond's method is hackish and may be reason for just a flash fixup hook -> private method Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-16mtd: spi-nor: Stop prefixing generic functions with a manufacturer nameBoris Brezillon1-35/+35
Replace the manufacturer prefix by something describing more precisely what those functions do. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> [tudor.ambarus@microchip.com: prepend spi_nor_ to all modified methods.] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-13Merge tag 'mtk-mtd-spi-move' into spi-nor/nextTudor Ambarus3-574/+0
spi: Rewrite mtk-quadspi spi-nor driver with spi-mem This patchset from Chuanhong Guo <gch981213@gmail.com> adds a spi-mem driver for Mediatek SPI-NOR controller, which already has limited support by mtk-quadspi. This new driver can make use of full quadspi capability of this controller. The mtk-quadspi driver is replaced by the new spi-mtk-nor driver. Merge it in spi-nor/next to avoid conflicts during the release cycle.
2020-03-12mtd: spinand: micron: Add new Micron SPI NAND devices with multiple diesShivamurthy Shastri1-0/+58
Add device table for new Micron SPI NAND devices, which have multiple dies. Also, enable support to select the dies. Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200311175735.2007-7-sshivamurthy@micron.com
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-23 20:33:55 +0000