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authorSunny Luo <sunny.luo@amlogic.com>2020-03-12 14:31:25 +0100
committerMark Brown <broonie@kernel.org>2020-03-12 17:22:51 +0000
commit3e0cf4d3fc2985beee011e9a1bbb8374fc02c0a0 (patch)
tree37a71c79dc3020c0b5d0eaef4d5c3c35d17a1071 /drivers/spi/Kconfig
parenta6cda1f905b4a5442eecce94bda1e136f7e1e539 (diff)
spi: meson-spicc: add a linear clock divider support
The SPICC controller in Meson-AXG SoC is capable of using a linear clock divider to reach a much fine tuned range of clocks, while the old controller only use a power of two clock divider, result at a more coarse clock range. Also convert the clock registration into Common Clock Framework. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Sunny Luo <sunny.luo@amlogic.com> Link: https://lore.kernel.org/r/20200312133131.26430-4-narmstrong@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/Kconfig')
-rw-r--r--drivers/spi/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index c33ca96b44de..efce98e9844e 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -428,6 +428,7 @@ config SPI_FSL_ESPI
config SPI_MESON_SPICC
tristate "Amlogic Meson SPICC controller"
+ depends on COMMON_CLK
depends on ARCH_MESON || COMPILE_TEST
help
This enables master mode support for the SPICC (SPI communication