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2019-01-07target/arm: SVE brk[ab] merging does not have s bitRichard Henderson1-2/+3
2019-01-07target/arm: Convert ARM_TBFLAG_* to FIELDsRichard Henderson4-135/+78
2019-01-04Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-december-2018...Peter Maydell1-126/+883
2019-01-03target/mips: Support R5900 three-operand MADD1 and MADDU1 instructionsFredrik Noring1-3/+9
2019-01-03target/mips: Support R5900 three-operand MADD and MADDU instructionsPhilippe Mathieu-Daudé1-5/+53
2019-01-03target/mips: MXU: Add handler for an align instructionAleksandar Markovic1-3/+194
2019-01-03target/mips: MXU: Add handlers for max/min instructionsAleksandar Markovic1-21/+279
2019-01-03target/mips: MXU: Add handlers for logic instructionsAleksandar Markovic1-34/+205
2019-01-03target/mips: MXU: Improve the comment containing MXU overviewAleksandar Markovic1-30/+44
2019-01-03target/mips: MXU: Add generic naming for optn2 constantsAleksandar Markovic1-0/+5
2019-01-03target/mips: MXU: Add missing opcodes/decoding for LX* instructionsAleksandar Markovic1-38/+102
2019-01-03Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-3.2-part1'...Peter Maydell3-11/+13
2018-12-21Changes requirement for "vsubsbs" instructionPaul A. Clarke1-1/+1
2018-12-21target/ppc: use g_new(T, n) instead of g_malloc(sizeof(T) * n)Greg Kurz1-3/+3
2018-12-21target/ppc: tcg: Implement addex instructionSuraj Jitindar Singh1-27/+33
2018-12-21target/ppc: Remove silly GETFIELD/SETFIELD/MASK_TO_LSH macrosDavid Gibson1-12/+0
2018-12-21target/ppc: fix the PPC_BIT definitionsCédric Le Goater1-3/+3
2018-12-20riscv/cpu: use device_class_set_parent_realizeMao Zhongyi1-2/+2
2018-12-20target/riscv/pmp.c: Fix pmp_decode_napot()Anup Patel1-1/+1
2018-12-20RISC-V: Add hartid and \n to interrupt loggingMichael Clark1-8/+10
2018-12-20Clean up includesMarkus Armbruster3-3/+2
2018-12-19Merge remote-tracking branch 'remotes/vivier2/tags/trivial-patches-pull-reque...Peter Maydell1-2/+0
2018-12-18i386: hvf: drop debug printf in decode_sldtgroupRoman Bolshakov1-2/+0
2018-12-17target/tricore: use float32_is_denormalEmilio G. Cota1-7/+2
2018-12-16Merge remote-tracking branch 'remotes/pmaydell/tags/pull-misc-20181214' into ...Peter Maydell1-9/+24
2018-12-14target/arm: Create timers in realize, not initPeter Maydell1-8/+9
2018-12-14target/arm: Free name string in ARMCPRegInfo hashtable entriesPeter Maydell1-1/+15
2018-12-13target/arm: Implement the ARMv8.1-LOR extensionRichard Henderson4-0/+93
2018-12-13target/arm: Use arm_hcr_el2_eff more placesRichard Henderson2-15/+11
2018-12-13target/arm: Introduce arm_hcr_el2_effRichard Henderson2-61/+72
2018-12-13target/arm: Implement the ARMv8.2-AA32HPD extensionRichard Henderson3-8/+42
2018-12-13target/arm: Implement the ARMv8.1-HPD extensionRichard Henderson2-7/+24
2018-12-13target/arm: Tidy scr_writeRichard Henderson2-7/+9
2018-12-13target/arm: Fix HCR_EL2.TGE check in arm_phys_excp_target_elRichard Henderson1-3/+0
2018-12-13target/arm: Add SCR_EL3 bits up to ARMv8.5Richard Henderson1-0/+10
2018-12-13target/arm: Add HCR_EL2 bits up to ARMv8.5Richard Henderson1-1/+21
2018-12-13target/arm: Move id_aa64mmfr* to ARMISARegistersPeter Maydell5-8/+35
2018-12-12Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' in...Peter Maydell3-4/+14
2018-12-11Merge remote-tracking branch 'remotes/vivier2/tags/trivial-patches-pull-reque...Peter Maydell2-14/+5
2018-12-11i386: Add "stibp" flag nameEduardo Habkost1-1/+1
2018-12-11target/i386/kvm.c: Don't mark cpuid_data as QEMU_PACKEDPeter Maydell1-1/+9
2018-12-11x86/cpu: Enable MOVDIR64B cpu featureLiu Jingqi2-1/+2
2018-12-11x86/cpu: Enable MOVDIRI cpu featureLiu Jingqi2-1/+2
2018-12-11qom: make interface types abstractMarc-André Lureau1-3/+1
2018-12-11target: hax: fix errors in commentLi Qiang1-1/+1
2018-12-11target: hax: replace g_malloc with g_new0Li Qiang1-12/+3
2018-12-11misc: fix spellingMarc-André Lureau1-1/+1
2018-12-03i386: hvf: Fix overrun of _decode_tbl1Roman Bolshakov1-3/+3
2018-11-28target/arm/sve_helper: Fix compilation with clang 3.4Thomas Huth1-10/+10
2018-11-27target/i386: Generate #UD when applying LOCK to a register destinationRichard Henderson1-15/+20