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translate.h
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Commit message (
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Author
Files
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2018-04-10
tcg: Introduce tcg_set_insn_start_param
Richard Henderson
1
-1
/
+1
2018-02-09
target/arm: Add SVE state to TB->FLAGS
Richard Henderson
1
-0
/
+2
2018-01-25
target/arm: Mark disas_set_insn_syndrome inline
Richard Henderson
1
-1
/
+1
2017-12-29
tcg: Dynamically allocate TCGOps
Richard Henderson
1
-5
/
+5
2017-10-24
tcg: Initialize cpu_env generically
Richard Henderson
1
-1
/
+0
2017-09-07
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20170907'...
Peter Maydell
1
-0
/
+1
2017-09-07
target/arm: Implement BXNS, and banked stack pointers
Peter Maydell
1
-0
/
+1
2017-09-06
target/arm: [tcg] Port to generic translation framework
Lluís Vilanova
1
-7
/
+1
2017-09-06
target/arm: [tcg] Port to translate_insn
Lluís Vilanova
1
-0
/
+1
2017-09-06
target/arm: [tcg] Port to DisasContextBase
Lluís Vilanova
1
-5
/
+6
2017-09-06
target: [tcg] Use a generic enum for DISAS_ values
Lluís Vilanova
1
-9
/
+14
2017-09-06
target/arm: Use DISAS_NORETURN
Richard Henderson
1
-6
/
+2
2017-07-19
tcg: Pass generic CPUState to gen_intermediate_code()
Lluís Vilanova
1
-2
/
+2
2017-07-17
target/arm/translate.h: expand comment on DISAS_EXIT
Alex Bennée
1
-1
/
+4
2017-06-05
target/arm: optimize indirect branches
Emilio G. Cota
1
-0
/
+4
2017-06-02
arm: Add support for M profile CPUs having different MMU index semantics
Peter Maydell
1
-1
/
+1
2017-04-20
arm: Implement M profile exception return properly
Peter Maydell
1
-0
/
+4
2017-04-20
arm: Track M profile handler mode state in TB flags
Peter Maydell
1
-0
/
+1
2017-02-07
target/arm: A32, T32: Create Instruction Syndromes for Data Aborts
Peter Maydell
1
-0
/
+14
2016-12-20
Move target-* CPU file into a target/ folder
Thomas Huth
1
-0
/
+155