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target-arm
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2016-05-19
cpu: move exec-all.h inclusion out of cpu.h
Paolo Bonzini
10
-2
/
+9
2016-05-19
hw: explicitly include qemu/log.h
Paolo Bonzini
3
-0
/
+3
2016-05-19
arm: move arm_log_exception into .c file
Paolo Bonzini
2
-15
/
+15
2016-05-19
qemu-common: push cpu.h inclusion out of qemu-common.h
Paolo Bonzini
6
-2
/
+7
2016-05-19
hw: move CPU state serialization to migration/cpu.h
Paolo Bonzini
1
-0
/
+1
2016-05-19
target-arm: make cpu-qom.h not target specific
Paolo Bonzini
2
-178
/
+179
2016-05-19
cpu: make cpu-qom.h only include-able from cpu.h
Paolo Bonzini
1
-1
/
+0
2016-05-12
tcg: Allow goto_tb to any target PC in user mode
Sergey Fedorov
2
-6
/
+14
2016-05-12
tcg: Clean up direct block chaining safety checks
Sergey Fedorov
1
-1
/
+2
2016-05-12
tb: consistently use uint32_t for tb->flags
Emilio G. Cota
1
-1
/
+1
2016-05-12
target-arm: Avoid unnecessary TLB flush on TCR_EL2, TCR_EL3 writes
Peter Maydell
1
-4
/
+8
2016-05-12
ARM: Factor out ARM on/off PSCI control functions
Jean-Christophe DUBOIS
4
-63
/
+307
2016-05-12
target-arm/translate-a64.c: Unify some of the ldst_reg decoding
Edgar E. Iglesias
1
-18
/
+23
2016-05-12
target-arm/translate-a64.c: Use extract32 in disas_ldst_reg_imm9
Edgar E. Iglesias
1
-2
/
+2
2016-05-12
target-arm: Split data abort syndrome generator
Peter Maydell
2
-5
/
+25
2016-05-12
target-arm: Fix descriptor address masking in ARM address translation
Sergey Sorokin
1
-18
/
+11
2016-05-12
target-arm: Stage 2 permission fault was fixed in AArch32 state
Sergey Sorokin
1
-1
/
+3
2016-04-04
target-arm: Make the 64-bit version of VTCR do the migration
Peter Maydell
1
-1
/
+5
2016-04-04
target-arm: Remove incorrect ALIAS tags from ESR_EL2 and ESR_EL3
Peter Maydell
1
-2
/
+0
2016-04-04
target-arm: Correctly reset SCTLR_EL3 for 64-bit CPUs
Peter Maydell
1
-10
/
+13
2016-03-30
arm: implement query-gic-capabilities
Peter Xu
1
-1
/
+57
2016-03-30
arm: enhance kvm_arm_create_scratch_host_vcpu
Peter Xu
2
-3
/
+18
2016-03-30
arm: qmp: add query-gic-capabilities interface
Peter Xu
2
-1
/
+29
2016-03-22
target-arm: dfilter support for in_asm
Alex Bennée
2
-2
/
+4
2016-03-22
util: move declarations out of qemu-common.h
Veronia Bahaa
1
-0
/
+1
2016-03-22
include/qemu/osdep.h: Don't include qapi/error.h
Markus Armbruster
2
-0
/
+2
2016-03-16
target-arm: Fix translation level on early translation faults
Sergey Sorokin
1
-10
/
+12
2016-03-16
target-arm: Implement MRS (banked) and MSR (banked) instructions
Peter Maydell
3
-3
/
+366
2016-03-04
target-arm: Only trap SRS from S-EL1 if specified mode is MON
Ralf-Philipp Weinmann
1
-1
/
+2
2016-03-04
target-arm: implement BE32 mode in system emulation
Paolo Bonzini
2
-18
/
+73
2016-03-04
target-arm: implement setend
Paolo Bonzini
3
-8
/
+12
2016-03-04
target-arm: introduce tbflag for endianness
Peter Crosthwaite
3
-2
/
+9
2016-03-04
target-arm: a64: Add endianness support
Peter Crosthwaite
1
-19
/
+30
2016-03-04
target-arm: introduce disas flag for endianness
Paolo Bonzini
3
-15
/
+26
2016-03-04
target-arm: pass DisasContext to gen_aa32_ld*/st*
Paolo Bonzini
1
-128
/
+142
2016-03-04
target-arm: implement SCTLR.EE
Peter Crosthwaite
1
-2
/
+21
2016-03-04
linux-user: arm: handle CPSR.E correctly in strex emulation
Paolo Bonzini
1
-0
/
+11
2016-03-04
arm: cpu: handle BE32 user-mode as BE
Peter Crosthwaite
1
-1
/
+16
2016-03-04
target-arm: cpu: Move cpu_is_big_endian to header
Peter Crosthwaite
2
-16
/
+22
2016-03-04
target-arm: implement SCTLR.B, drop bswap_code
Paolo Bonzini
7
-29
/
+60
2016-03-04
target-arm: Correct handling of writes to CPSR mode bits from gdb in usermode
Peter Maydell
1
-2
/
+9
2016-03-01
tcg: Add type for vCPU pointers
Lluís Vilanova
2
-2
/
+2
2016-02-26
target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF
Peter Maydell
2
-7
/
+122
2016-02-26
target-arm: Mark CNTHP_TVAL_EL2 as ARM_CP_NO_RAW
Edgar E. Iglesias
1
-1
/
+1
2016-02-26
target-arm: Implement MDCR_EL3.TPM and MDCR_EL2.TPM traps
Peter Maydell
1
-7
/
+36
2016-02-26
target-arm: Fix handling of SDCR for 32-bit code
Peter Maydell
2
-8
/
+19
2016-02-26
target-arm: Make Monitor->NS PL1 mode changes illegal if HCR.TGE is 1
Peter Maydell
1
-0
/
+10
2016-02-26
target-arm: Make mode switches from Hyp via CPS and MRS illegal
Peter Maydell
1
-2
/
+10
2016-02-26
target-arm: In v8, make illegal AArch32 mode changes set PSTATE.IL
Peter Maydell
1
-3
/
+12
2016-02-26
target-arm: Forbid mode switch to Mon from Secure EL1
Peter Maydell
1
-1
/
+1
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