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| author | Peter Maydell <peter.maydell@linaro.org> | 2018-01-09 18:23:27 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-01-09 18:23:27 +0000 |
| commit | 76302a95e759c7090396b0ca85cef3412e323130 (patch) | |
| tree | 5d97418ad1da0018091db0abbe26860de8373864 /tests | |
| parent | 3cee4db661ab9c0fce7937b3bbfa188a1845f31f (diff) | |
| parent | 5a6539e627faf9251e1db78238b9f9b870610518 (diff) | |
Merge remote-tracking branch 'remotes/xtensa/tags/20180109-xtensa' into staging
target/xtensa updates:
- add libisa to the xtensa target;
- change xtensa instruction translator to use it;
- switch existing xtensa cores to use it;
- add support for a number of instructions: salt/saltu, const16,
GPIO32 group, debug mode and MMU-related;
- add disassembler for Xtensa.
# gpg: Signature made Tue 09 Jan 2018 18:11:02 GMT
# gpg: using RSA key 0x51F9CC91F83FA044
# gpg: Good signature from "Max Filippov <filippov@cadence.com>"
# gpg: aka "Max Filippov <max.filippov@cogentembedded.com>"
# gpg: aka "Max Filippov <jcmvbkbc@gmail.com>"
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044
* remotes/xtensa/tags/20180109-xtensa:
target/xtensa: implement disassembler
target/xtensa: implement const16
target/xtensa: implement GPIO32
target/xtensa: implement salt/saltu
target/xtensa: add internal/noop SRs and opcodes
target/xtensa: drop DisasContext::litbase
target/xtensa: tests: fix memctl SR test
target/xtensa: use libisa for instruction decoding
target/xtensa: switch fsf to libisa
target/xtensa: switch dc233c to libisa
target/xtensa: switch dc232b to libisa
target/xtensa: update import_core.sh script for libisa
target/xtensa: extract FPU2000 opcode translators
target/xtensa: extract core opcode translators
target/xtensa: import libisa source
target/xtensa: pass actual frame size to the entry helper
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/tcg/xtensa/test_sr.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/tcg/xtensa/test_sr.S b/tests/tcg/xtensa/test_sr.S index 42e3e5e386..052f1e04a7 100644 --- a/tests/tcg/xtensa/test_sr.S +++ b/tests/tcg/xtensa/test_sr.S @@ -44,7 +44,6 @@ test_end test_sr acchi, 1 test_sr acclo, 1 -test_sr /*memctl*/97, 0 test_sr_mask /*atomctl*/99, 0, 0 test_sr_mask /*br*/4, 0, 0 test_sr_mask /*cacheattr*/98, 0, 0 @@ -76,6 +75,7 @@ test_sr lcount, 1 test_sr lend, 1 test_sr litbase, 1 test_sr m0, 1 +test_sr_mask /*memctl*/97, 0, 0 test_sr misc0, 1 test_sr_mask /*prefctl*/40, 0, 0 test_sr_mask /*prid*/235, 0, 1 |