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authorSebastian Andrzej Siewior <bigeasy@linutronix.de>2018-09-28 12:43:19 +0200
committerEduardo Habkost <ehabkost@redhat.com>2018-10-30 21:14:43 -0300
commitde2e68c902f7b6e438b0fa3cfedd74a06a20704f (patch)
tree6f4495f4137d678a0fe8213847eeb6b1923e843e /target
parenta2e002ff7913ce93aa0f7dbedd2123dce5f1a9cd (diff)
i386: correct cpu_x86_cpuid(0xd)
Intel SDM says for CPUID function 0DH, sub-function 0: | • ECX enumerates the size (in bytes) required by the XSAVE instruction for an | XSAVE area containing all the user state components supported by this | processor. | • EBX enumerates the size (in bytes) required by the XSAVE instruction for an | XSAVE area containing all the user state components corresponding to bits | currently set in XCR0. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Message-Id: <20180928104319.3296-1-bigeasy@linutronix.de> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'target')
-rw-r--r--target/i386/cpu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 1469a1be01..fe7c963e5e 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -4178,7 +4178,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
*ecx = xsave_area_size(x86_cpu_xsave_components(cpu));
*eax = env->features[FEAT_XSAVE_COMP_LO];
*edx = env->features[FEAT_XSAVE_COMP_HI];
- *ebx = *ecx;
+ *ebx = xsave_area_size(env->xcr0);
} else if (count == 1) {
*eax = env->features[FEAT_XSAVE];
} else if (count < ARRAY_SIZE(x86_ext_save_areas)) {