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authorPeter Maydell <peter.maydell@linaro.org>2018-07-09 13:45:35 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-07-10 10:54:40 +0100
commit2b83714d4ea659899069a4b94aa2dfadc847a013 (patch)
tree08c6699e8b22ece28fc957c3fb68eaabc28048c4 /target
parent3a340e84375145fa32ce68e0b7b58d964487336b (diff)
target/arm: Use correct mmu_idx for exception-return unstacking
For M-profile exception returns, the mmu index to use for exception return unstacking is supposed to be that of wherever we are returning to: * if returning to handler mode, privileged * if returning to thread mode, privileged or unprivileged depending on CONTROL.nPRIV for the destination security state We were passing the wrong thing as the 'priv' argument to arm_v7m_mmu_idx_for_secstate_and_priv(). The effect was that guests which programmed the MPU to behave differently for privileged and unprivileged code could get spurious MemManage Unstack exceptions. Reported-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180709124535.1116-1-peter.maydell@linaro.org
Diffstat (limited to 'target')
-rw-r--r--target/arm/helper.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c
index a2ac96084e..0604a0efbe 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -7171,9 +7171,11 @@ static void do_v7m_exception_exit(ARMCPU *cpu)
uint32_t frameptr = *frame_sp_p;
bool pop_ok = true;
ARMMMUIdx mmu_idx;
+ bool return_to_priv = return_to_handler ||
+ !(env->v7m.control[return_to_secure] & R_V7M_CONTROL_NPRIV_MASK);
mmu_idx = arm_v7m_mmu_idx_for_secstate_and_priv(env, return_to_secure,
- !return_to_handler);
+ return_to_priv);
if (!QEMU_IS_ALIGNED(frameptr, 8) &&
arm_feature(env, ARM_FEATURE_V8)) {