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authorpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2008-06-30 16:31:04 +0000
committerpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2008-06-30 16:31:04 +0000
commitb3c7724cbc70109630227c92df2d59deca4dab64 (patch)
tree52e335302d10fc433761851c312dbff9e820d661 /target-mips
parent6913ba56807e5a5275bd839550e8a951d2ef63af (diff)
Move CPU save/load registration to common code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/cpu.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 8e21f6b4a8..93c1610f1b 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -489,6 +489,8 @@ void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
#define cpu_signal_handler cpu_mips_signal_handler
#define cpu_list mips_cpu_list
+#define CPU_SAVE_VERSION 3
+
/* MMU modes definitions. We carefully match the indices with our
hflags layout. */
#define MMU_MODE0_SUFFIX _kernel