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authorMattias Holm <holm@liacs.nl>2010-12-08 13:15:17 +0200
committerAurelien Jarno <aurelien@aurel32.net>2010-12-27 21:21:17 +0100
commit9c486ad6e4e4afcd582460b4c70b1e2be856dbfd (patch)
treecd925ba0c0436e5489f3a2593d3d7553be21757f /target-arm
parentc0034328090880621ad8f33e03ae03599e353865 (diff)
target-arm: correct cp15 c1_sys reset value for cortex-a8
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/helper.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 409a6c00ab..e54fb27a87 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -109,6 +109,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c0_ccsid[0] = 0xe007e01a; /* 16k L1 dcache. */
env->cp15.c0_ccsid[1] = 0x2007e01a; /* 16k L1 icache. */
env->cp15.c0_ccsid[2] = 0xf0000000; /* No L2 icache. */
+ env->cp15.c1_sys = 0x00c50078;
break;
case ARM_CPUID_CORTEXA9:
set_feature(env, ARM_FEATURE_V6);