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authorAlexey Kardashevskiy <aik@ozlabs.ru>2014-05-30 19:34:12 +1000
committerAlexander Graf <agraf@suse.de>2014-06-27 13:48:26 +0200
commit4af88944d013330910826af10aaa2ef9a2919fde (patch)
tree7d5d4b08c573e4bdf6d9db8da92a16594253dacf /include/hw
parent3b50d8974b979bbaa091978e70d83de939593d1f (diff)
xics: Add flags for interrupts
The existing interrupt allocation scheme in SPAPR assumes that interrupts are allocated at the start time, continously and the config will not change. However, there are cases when this is not going to work such as: 1. migration - we will have to have an ability to choose interrupt numbers for devices in the command line and this will create gaps in interrupt space. 2. PCI hotplug - interrupts from unplugged device need to be returned back to interrupt pool, otherwise we will quickly run out of interrupts. This replaces a separate lslsi[] array with a byte in the ICSIRQState struct and defines "LSI" and "MSI" flags. Neither of these flags set signals that the descriptor is not allocated and not in use. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'include/hw')
-rw-r--r--include/hw/ppc/xics.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
index 85e4c8a3dd..2891599e38 100644
--- a/include/hw/ppc/xics.h
+++ b/include/hw/ppc/xics.h
@@ -136,7 +136,6 @@ struct ICSState {
uint32_t nr_irqs;
uint32_t offset;
qemu_irq *qirqs;
- bool *islsi;
ICSIRQState *irqs;
XICSState *icp;
};
@@ -150,6 +149,11 @@ struct ICSIRQState {
#define XICS_STATUS_REJECTED 0x4
#define XICS_STATUS_MASKED_PENDING 0x8
uint8_t status;
+/* (flags & XICS_FLAGS_IRQ_MASK) == 0 means the interrupt is not allocated */
+#define XICS_FLAGS_IRQ_LSI 0x1
+#define XICS_FLAGS_IRQ_MSI 0x2
+#define XICS_FLAGS_IRQ_MASK 0x3
+ uint8_t flags;
};
#define XICS_IRQS 1024