diff options
author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2018-10-02 23:25:16 +0200 |
---|---|---|
committer | Eduardo Habkost <ehabkost@redhat.com> | 2018-10-24 06:44:59 -0300 |
commit | 43fd7bbf53b66ce3239c33747832044fe9154f72 (patch) | |
tree | 5a1b575b78a4658fac16d370ee5ab39f9d13b512 /hw/mips/gt64xxx_pci.c | |
parent | e800894a1cb04c7ba79febfde8bc0fe7c27498df (diff) |
hw/mips/gt64xxx_pci: Convert gt64120_reset() function into Device reset method
Convert the gt64120_reset() function into a proper Device reset method.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20181002212522.23303-8-f4bug@amsat.org>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'hw/mips/gt64xxx_pci.c')
-rw-r--r-- | hw/mips/gt64xxx_pci.c | 17 |
1 files changed, 3 insertions, 14 deletions
diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 24ad0ad024..dcd1a66329 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -992,9 +992,9 @@ static void gt64120_pci_set_irq(void *opaque, int irq_num, int level) } -static void gt64120_reset(void *opaque) +static void gt64120_reset(DeviceState *dev) { - GT64120State *s = opaque; + GT64120State *s = GT64120_PCI_HOST_BRIDGE(dev); /* FIXME: Malta specific hw assumptions ahead */ @@ -1184,16 +1184,6 @@ PCIBus *gt64120_register(qemu_irq *pic) return phb->bus; } -static int gt64120_init(SysBusDevice *dev) -{ - GT64120State *s; - - s = GT64120_PCI_HOST_BRIDGE(dev); - - qemu_register_reset(gt64120_reset, s); - return 0; -} - static void gt64120_pci_realize(PCIDevice *d, Error **errp) { /* FIXME: Malta specific hw assumptions ahead */ @@ -1241,9 +1231,8 @@ static const TypeInfo gt64120_pci_info = { static void gt64120_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass); - sdc->init = gt64120_init; + dc->reset = gt64120_reset; dc->vmsd = &vmstate_gt64120; } |